1 // RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +bmi -emit-llvm -o - -Wall -Werror | FileCheck %s --check-prefixes=CHECK,TZCNT
2 // RUN: %clang_cc1 -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 -ffreestanding %s -triple=x86_64-windows-msvc -emit-llvm -o - -Wall -Werror -DTEST_TZCNT | FileCheck %s --check-prefix=TZCNT
3
4
5 #include <immintrin.h>
6
7 // NOTE: This should match the tests in llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
8
9 // The double underscore intrinsics are for compatibility with
10 // AMD's BMI interface. The single underscore intrinsics
11 // are for compatibility with Intel's BMI interface.
12 // Apart from the underscores, the interfaces are identical
13 // except in one case: although the 'bextr' register-form
14 // instruction is identical in hardware, the AMD and Intel
15 // intrinsics are different!
16
test_tzcnt_u16(unsigned short __X)17 unsigned short test_tzcnt_u16(unsigned short __X) {
18 // TZCNT-LABEL: test_tzcnt_u16
19 // TZCNT: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 false)
20 return _tzcnt_u16(__X);
21 }
22
test__tzcnt_u16(unsigned short __X)23 unsigned short test__tzcnt_u16(unsigned short __X) {
24 // TZCNT-LABEL: test__tzcnt_u16
25 // TZCNT: i16 @llvm.cttz.i16(i16 %{{.*}}, i1 false)
26 return __tzcnt_u16(__X);
27 }
28
test__tzcnt_u32(unsigned int __X)29 unsigned int test__tzcnt_u32(unsigned int __X) {
30 // TZCNT-LABEL: test__tzcnt_u32
31 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
32 return __tzcnt_u32(__X);
33 }
34
test_mm_tzcnt_32(unsigned int __X)35 int test_mm_tzcnt_32(unsigned int __X) {
36 // TZCNT-LABEL: test_mm_tzcnt_32
37 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
38 return _mm_tzcnt_32(__X);
39 }
40
test_tzcnt_u32(unsigned int __X)41 unsigned int test_tzcnt_u32(unsigned int __X) {
42 // TZCNT-LABEL: test_tzcnt_u32
43 // TZCNT: i32 @llvm.cttz.i32(i32 %{{.*}}, i1 false)
44 return _tzcnt_u32(__X);
45 }
46
47 #ifdef __x86_64__
test__tzcnt_u64(unsigned long long __X)48 unsigned long long test__tzcnt_u64(unsigned long long __X) {
49 // TZCNT-LABEL: test__tzcnt_u64
50 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
51 return __tzcnt_u64(__X);
52 }
53
test_mm_tzcnt_64(unsigned long long __X)54 long long test_mm_tzcnt_64(unsigned long long __X) {
55 // TZCNT-LABEL: test_mm_tzcnt_64
56 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
57 return _mm_tzcnt_64(__X);
58 }
59
test_tzcnt_u64(unsigned long long __X)60 unsigned long long test_tzcnt_u64(unsigned long long __X) {
61 // TZCNT-LABEL: test_tzcnt_u64
62 // TZCNT: i64 @llvm.cttz.i64(i64 %{{.*}}, i1 false)
63 return _tzcnt_u64(__X);
64 }
65 #endif
66
67 #if !defined(TEST_TZCNT)
test__andn_u32(unsigned int __X,unsigned int __Y)68 unsigned int test__andn_u32(unsigned int __X, unsigned int __Y) {
69 // CHECK-LABEL: test__andn_u32
70 // CHECK: xor i32 %{{.*}}, -1
71 // CHECK: and i32 %{{.*}}, %{{.*}}
72 return __andn_u32(__X, __Y);
73 }
74
test__bextr_u32(unsigned int __X,unsigned int __Y)75 unsigned int test__bextr_u32(unsigned int __X, unsigned int __Y) {
76 // CHECK-LABEL: test__bextr_u32
77 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
78 return __bextr_u32(__X, __Y);
79 }
80
test__blsi_u32(unsigned int __X)81 unsigned int test__blsi_u32(unsigned int __X) {
82 // CHECK-LABEL: test__blsi_u32
83 // CHECK: sub i32 0, %{{.*}}
84 // CHECK: and i32 %{{.*}}, %{{.*}}
85 return __blsi_u32(__X);
86 }
87
test__blsmsk_u32(unsigned int __X)88 unsigned int test__blsmsk_u32(unsigned int __X) {
89 // CHECK-LABEL: test__blsmsk_u32
90 // CHECK: sub i32 %{{.*}}, 1
91 // CHECK: xor i32 %{{.*}}, %{{.*}}
92 return __blsmsk_u32(__X);
93 }
94
test__blsr_u32(unsigned int __X)95 unsigned int test__blsr_u32(unsigned int __X) {
96 // CHECK-LABEL: test__blsr_u32
97 // CHECK: sub i32 %{{.*}}, 1
98 // CHECK: and i32 %{{.*}}, %{{.*}}
99 return __blsr_u32(__X);
100 }
101
102 #ifdef __x86_64__
test__andn_u64(unsigned long __X,unsigned long __Y)103 unsigned long long test__andn_u64(unsigned long __X, unsigned long __Y) {
104 // CHECK-LABEL: test__andn_u64
105 // CHECK: xor i64 %{{.*}}, -1
106 // CHECK: and i64 %{{.*}}, %{{.*}}
107 return __andn_u64(__X, __Y);
108 }
109
test__bextr_u64(unsigned long __X,unsigned long __Y)110 unsigned long long test__bextr_u64(unsigned long __X, unsigned long __Y) {
111 // CHECK-LABEL: test__bextr_u64
112 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
113 return __bextr_u64(__X, __Y);
114 }
115
test__blsi_u64(unsigned long long __X)116 unsigned long long test__blsi_u64(unsigned long long __X) {
117 // CHECK-LABEL: test__blsi_u64
118 // CHECK: sub i64 0, %{{.*}}
119 // CHECK: and i64 %{{.*}}, %{{.*}}
120 return __blsi_u64(__X);
121 }
122
test__blsmsk_u64(unsigned long long __X)123 unsigned long long test__blsmsk_u64(unsigned long long __X) {
124 // CHECK-LABEL: test__blsmsk_u64
125 // CHECK: sub i64 %{{.*}}, 1
126 // CHECK: xor i64 %{{.*}}, %{{.*}}
127 return __blsmsk_u64(__X);
128 }
129
test__blsr_u64(unsigned long long __X)130 unsigned long long test__blsr_u64(unsigned long long __X) {
131 // CHECK-LABEL: test__blsr_u64
132 // CHECK: sub i64 %{{.*}}, 1
133 // CHECK: and i64 %{{.*}}, %{{.*}}
134 return __blsr_u64(__X);
135 }
136 #endif
137
138 // Intel intrinsics
139
test_andn_u32(unsigned int __X,unsigned int __Y)140 unsigned int test_andn_u32(unsigned int __X, unsigned int __Y) {
141 // CHECK-LABEL: test_andn_u32
142 // CHECK: xor i32 %{{.*}}, -1
143 // CHECK: and i32 %{{.*}}, %{{.*}}
144 return _andn_u32(__X, __Y);
145 }
146
test_bextr_u32(unsigned int __X,unsigned int __Y,unsigned int __Z)147 unsigned int test_bextr_u32(unsigned int __X, unsigned int __Y,
148 unsigned int __Z) {
149 // CHECK-LABEL: test_bextr_u32
150 // CHECK: and i32 %{{.*}}, 255
151 // CHECK: and i32 %{{.*}}, 255
152 // CHECK: shl i32 %{{.*}}, 8
153 // CHECK: or i32 %{{.*}}, %{{.*}}
154 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
155 return _bextr_u32(__X, __Y, __Z);
156 }
157
test_bextr2_u32(unsigned int __X,unsigned int __Y)158 unsigned int test_bextr2_u32(unsigned int __X, unsigned int __Y) {
159 // CHECK-LABEL: test_bextr2_u32
160 // CHECK: i32 @llvm.x86.bmi.bextr.32(i32 %{{.*}}, i32 %{{.*}})
161 return _bextr2_u32(__X, __Y);
162 }
163
test_blsi_u32(unsigned int __X)164 unsigned int test_blsi_u32(unsigned int __X) {
165 // CHECK-LABEL: test_blsi_u32
166 // CHECK: sub i32 0, %{{.*}}
167 // CHECK: and i32 %{{.*}}, %{{.*}}
168 return _blsi_u32(__X);
169 }
170
test_blsmsk_u32(unsigned int __X)171 unsigned int test_blsmsk_u32(unsigned int __X) {
172 // CHECK-LABEL: test_blsmsk_u32
173 // CHECK: sub i32 %{{.*}}, 1
174 // CHECK: xor i32 %{{.*}}, %{{.*}}
175 return _blsmsk_u32(__X);
176 }
177
test_blsr_u32(unsigned int __X)178 unsigned int test_blsr_u32(unsigned int __X) {
179 // CHECK-LABEL: test_blsr_u32
180 // CHECK: sub i32 %{{.*}}, 1
181 // CHECK: and i32 %{{.*}}, %{{.*}}
182 return _blsr_u32(__X);
183 }
184
185 #ifdef __x86_64__
test_andn_u64(unsigned long __X,unsigned long __Y)186 unsigned long long test_andn_u64(unsigned long __X, unsigned long __Y) {
187 // CHECK-LABEL: test_andn_u64
188 // CHECK: xor i64 %{{.*}}, -1
189 // CHECK: and i64 %{{.*}}, %{{.*}}
190 return _andn_u64(__X, __Y);
191 }
192
test_bextr_u64(unsigned long __X,unsigned int __Y,unsigned int __Z)193 unsigned long long test_bextr_u64(unsigned long __X, unsigned int __Y,
194 unsigned int __Z) {
195 // CHECK-LABEL: test_bextr_u64
196 // CHECK: and i32 %{{.*}}, 255
197 // CHECK: and i32 %{{.*}}, 255
198 // CHECK: shl i32 %{{.*}}, 8
199 // CHECK: or i32 %{{.*}}, %{{.*}}
200 // CHECK: zext i32 %{{.*}} to i64
201 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
202 return _bextr_u64(__X, __Y, __Z);
203 }
204
test_bextr2_u64(unsigned long long __X,unsigned long long __Y)205 unsigned long long test_bextr2_u64(unsigned long long __X,
206 unsigned long long __Y) {
207 // CHECK-LABEL: test_bextr2_u64
208 // CHECK: i64 @llvm.x86.bmi.bextr.64(i64 %{{.*}}, i64 %{{.*}})
209 return _bextr2_u64(__X, __Y);
210 }
211
test_blsi_u64(unsigned long long __X)212 unsigned long long test_blsi_u64(unsigned long long __X) {
213 // CHECK-LABEL: test_blsi_u64
214 // CHECK: sub i64 0, %{{.*}}
215 // CHECK: and i64 %{{.*}}, %{{.*}}
216 return _blsi_u64(__X);
217 }
218
test_blsmsk_u64(unsigned long long __X)219 unsigned long long test_blsmsk_u64(unsigned long long __X) {
220 // CHECK-LABEL: test_blsmsk_u64
221 // CHECK: sub i64 %{{.*}}, 1
222 // CHECK: xor i64 %{{.*}}, %{{.*}}
223 return _blsmsk_u64(__X);
224 }
225
test_blsr_u64(unsigned long long __X)226 unsigned long long test_blsr_u64(unsigned long long __X) {
227 // CHECK-LABEL: test_blsr_u64
228 // CHECK: sub i64 %{{.*}}, 1
229 // CHECK: and i64 %{{.*}}, %{{.*}}
230 return _blsr_u64(__X);
231 }
232 #endif
233
234 #endif // !defined(TEST_TZCNT)
235