1 /*------------------------------------------------------------------------- 2 mc68hc908jkjl.h - register declarations for Motorola MC68HC908JK1/JK3/JL3/JK8/JL8 3 4 Copyright (C) 2004, Lucas Loizaga <lucas.loizaga AT ingenieria-inversa.com.ar> 5 6 Based on mc68hc908qy.h, 7 Written By - Erik Petrich <epetrich AT users.sourceforge.net> (2003) 8 9 This library is free software; you can redistribute it and/or modify it 10 under the terms of the GNU General Public License as published by the 11 Free Software Foundation; either version 2, or (at your option) any 12 later version. 13 14 This library is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this library; see the file COPYING. If not, write to the 21 Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 22 MA 02110-1301, USA. 23 24 As a special exception, if you link this library with other files, 25 some of which are compiled with SDCC, to produce an executable, 26 this library does not by itself cause the resulting executable to 27 be covered by the GNU General Public License. This exception does 28 not however invalidate any other reasons why the executable file 29 might be covered by the GNU General Public License. 30 -------------------------------------------------------------------------*/ 31 32 #ifndef _MC68HC908JKJL_H 33 #define _MC68HC908JKJL_H 34 35 #ifndef _UINT8 36 #define _UINT8 unsigned char 37 #endif 38 #ifndef _UINT16 39 #define _UINT16 unsigned int 40 #endif 41 #ifndef _VOLDATA 42 #define _VOLDATA volatile __data 43 #endif 44 #ifndef _VOLXDATA 45 #define _VOLXDATA volatile __xdata 46 #endif 47 48 struct __hc08_bits 49 { 50 unsigned int bit0:1; 51 unsigned int bit1:1; 52 unsigned int bit2:1; 53 unsigned int bit3:1; 54 unsigned int bit4:1; 55 unsigned int bit5:1; 56 unsigned int bit6:1; 57 unsigned int bit7:1; 58 }; 59 60 61 _VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */ 62 #define PORTA PTA /* Alias for PTA */ 63 #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0 64 #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1 65 #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2 66 #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3 67 #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4 68 #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5 69 #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6 70 #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7 71 72 _VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */ 73 #define PORTB PTB /* Alias for PTB */ 74 #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0 75 #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1 76 #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2 77 #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3 78 #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4 79 #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5 80 #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6 81 #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7 82 83 _VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */ 84 #define PORTD PTD /* Alias for PTD */ 85 #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0 86 #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1 87 #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2 88 #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3 89 #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4 90 #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5 91 #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6 92 #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7 93 94 _VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */ 95 #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0 96 #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1 97 #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2 98 #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3 99 #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4 100 #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5 101 #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6 102 #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7 103 104 _VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */ 105 #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0 106 #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1 107 #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2 108 #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3 109 #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4 110 #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5 111 #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6 112 #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7 113 114 _VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */ 115 #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0 116 #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1 117 #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2 118 #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3 119 #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4 120 #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5 121 #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6 122 #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7 123 124 _VOLDATA _UINT8 __at 0x08 PTE; /* Port E Data Register */ 125 #define PORTE PTE /* Alias for PTE */ 126 #define PTE0 ((struct __hc08_bits *)(&PTE))->bit0 127 #define PTE1 ((struct __hc08_bits *)(&PTE))->bit1 128 129 _VOLDATA _UINT8 __at 0x0A PDCR; /* Port D Control Register */ 130 131 #define PTDPU6 ((struct __hc08_bits *)(&PDCR))->bit0 132 #define PTDPU7 ((struct __hc08_bits *)(&PDCR))->bit1 133 #define SLOWD6 ((struct __hc08_bits *)(&PDCR))->bit2 134 #define SLOWD7 ((struct __hc08_bits *)(&PDCR))->bit3 135 136 _VOLDATA _UINT8 __at 0x0C DDRE; /* Data Direction Register E */ 137 #define DDRE0 ((struct __hc08_bits *)(&DDRE))->bit0 138 #define DDRE1 ((struct __hc08_bits *)(&DDRE))->bit1 139 140 141 _VOLDATA _UINT8 __at 0x0D PTAPUE; /* Port A pull-up enables */ 142 #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0 143 #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1 144 #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2 145 #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3 146 #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4 147 #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5 148 #define PTAPUE6 ((struct __hc08_bits *)(&PTAPUE))->bit6 149 #define PTA6EN ((struct __hc08_bits *)(&PTAPUE))->bit7 150 151 _VOLDATA _UINT8 __at 0x0E PTA7PUE; /* Port A pull-up enables */ 152 #define PTAPUE7 ((struct __hc08_bits *)(&PTA7PUE))->bit7 153 154 _VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */ 155 #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7 156 #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6 157 #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5 158 #define M ((struct __hc08_bits *)(&SCC1))->bit4 159 #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3 160 #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2 161 #define PEN ((struct __hc08_bits *)(&SCC1))->bit1 162 #define PTY ((struct __hc08_bits *)(&SCC1))->bit0 163 164 165 _VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */ 166 #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7 167 #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6 168 #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5 169 #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4 170 #define TE ((struct __hc08_bits *)(&SCC2))->bit3 171 #define RE ((struct __hc08_bits *)(&SCC2))->bit2 172 #define WRU ((struct __hc08_bits *)(&SCC2))->bit1 173 #define SBK ((struct __hc08_bits *)(&SCC2))->bit0 174 175 _VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */ 176 #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7 177 #define SCC3_TB ((struct __hc08_bits *)(&SCC3))->bit6 178 #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5 179 #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4 180 #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3 181 #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2 182 #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1 183 #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0 184 185 _VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */ 186 #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7 187 #define TC ((struct __hc08_bits *)(&SCS1))->bit6 188 #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5 189 #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4 190 #define OR ((struct __hc08_bits *)(&SCS1))->bit3 191 #define NF ((struct __hc08_bits *)(&SCS1))->bit2 192 #define FE ((struct __hc08_bits *)(&SCS1))->bit1 193 #define PE ((struct __hc08_bits *)(&SCS1))->bit0 194 195 _VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */ 196 #define RPF ((struct __hc08_bits *)(&SCS2))->bit0 197 #define BKF ((struct __hc08_bits *)(&SCS2))->bit1 198 /* Bits 2-7 not implemented */ 199 200 _VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */ 201 202 _VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */ 203 #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5 204 #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4 205 #define R ((struct __hc08_bits *)(&SCBR))->bit3 206 #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2 207 #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1 208 #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0 209 /*-- Bits 6 and 7 do not exist */ 210 211 212 _VOLDATA _UINT8 __at 0x1a KBSCR; /* Keyboard Status and Control Register */ 213 #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0 214 #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1 215 #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2 216 #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3 217 /*-- Bits 4-7 do not exist */ 218 219 _VOLDATA _UINT8 __at 0x1b KBIER; /* Keyboard Interrupt Enable Register */ 220 #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0 221 #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1 222 #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3 223 #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2 224 #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4 225 #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5 226 #define KBIE6 ((struct __hc08_bits *)(&KBIER))->bit6 227 #define KBIE7 ((struct __hc08_bits *)(&KBIER))->bit7 228 229 _VOLDATA _UINT8 __at 0x1D INTSCR; /* IRQ status/control */ 230 #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3 231 #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2 232 #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1 233 #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0 234 /* Bits 4-7 unimplemented */ 235 236 _VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */ 237 /* CONFIG2 is one-time writeble, so can't use bitfields */ 238 239 _VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */ 240 /* CONFIG1 is one-time writeable, so can't use bitfields */ 241 242 _VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */ 243 #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0 244 #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1 245 #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2 246 #define TRST ((struct __hc08_bits *)(&T1SC))->bit4 247 #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5 248 #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6 249 #define TOF ((struct __hc08_bits *)(&T1SC))->bit7 250 251 _VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */ 252 _VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */ 253 _VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */ 254 255 _VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */ 256 _VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */ 257 _VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */ 258 259 _VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */ 260 #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0 261 #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1 262 #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2 263 #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3 264 #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4 265 #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5 266 #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6 267 #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7 268 269 _VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */ 270 _VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */ 271 _VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */ 272 273 _VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */ 274 #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0 275 #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1 276 #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2 277 #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3 278 #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4 279 #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6 280 #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7 281 282 _VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */ 283 _VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */ 284 _VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */ 285 286 _VOLDATA _UINT8 __at 0x30 T2SC; /* TIM2 Status and Control Register */ 287 #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0 288 #define PS1_2 ((struct __hc08_bits *)(&T2SC0))->bit1 289 #define PS2_2 ((struct __hc08_bits *)(&T2SC0))->bit2 290 #define TRST_2 ((struct __hc08_bits *)(&T2SC0))->bit4 291 #define TSTOP_2 ((struct __hc08_bits *)(&T2SC0))->bit5 292 #define TOIE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 293 #define TOF_2 ((struct __hc08_bits *)(&T2SC0))->bit7 294 295 _VOLDATA _UINT16 __at 0x31 T2CNT; /* TIM2 Counter Registers */ 296 _VOLDATA _UINT8 __at 0x31 T2CNTH; /* TIM2 Counter Register High */ 297 _VOLDATA _UINT8 __at 0x32 T2CNTL; /* TIM2 Counter Register Low */ 298 299 300 _VOLDATA _UINT16 __at 0x33 T2MOD; /* TIM2 Counter Modulo Registers */ 301 _VOLDATA _UINT8 __at 0x33 T2MODH; /* TIM2 Counter Modulo Register High */ 302 _VOLDATA _UINT8 __at 0x34 T2MODL; /* TIM2 Counter Modulo Register Low */ 303 304 305 _VOLDATA _UINT8 __at 0x35 T2SC0; /* TIM2 Channel 0 Status and Control Register */ 306 #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC0))->bit0 307 #define TOV0_2 ((struct __hc08_bits *)(&T2SC0))->bit1 308 #define ELS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit2 309 #define ELS0B_2 ((struct __hc08_bits *)(&T2SC0))->bit3 310 #define MS0A_2 ((struct __hc08_bits *)(&T2SC0))->bit4 311 #define CH0IE_2 ((struct __hc08_bits *)(&T2SC0))->bit6 312 #define CH0F_2 ((struct __hc08_bits *)(&T2SC0))->bit7 313 314 _VOLDATA _UINT16 __at 0x36 T2CH0; /* TIM2 Channel 0 High & Low Registers */ 315 _VOLDATA _UINT8 __at 0x36 T2CH0H; /* TIM2 Channel 0 Register High */ 316 _VOLDATA _UINT8 __at 0x37 T2CH0L; /* TIM2 Channel 0 Register Low */ 317 318 _VOLDATA _UINT8 __at 0x38 T2SC1; /* TIM2 Channel 1 Status and Control Register */ 319 #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0 320 #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1 321 #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2 322 #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3 323 #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4 324 #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6 325 #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7 326 327 _VOLDATA _UINT16 __at 0x39 T2CH1; /* TIM2 Channel 1 High & Low Registers */ 328 _VOLDATA _UINT8 __at 0x39 T2CH1H; /* TIM2 Channel 1 Register High */ 329 _VOLDATA _UINT8 __at 0x3a T2CH1L; /* TIM2 Channel 1 Register Low */ 330 331 332 _VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */ 333 #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7 334 #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6 335 #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5 336 #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4 337 #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3 338 #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2 339 #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1 340 #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0 341 342 _VOLDATA _UINT8 __at 0x3d ADR; /* Analog-to-Digital Data Register */ 343 344 _VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */ 345 #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7 346 #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6 347 #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5 348 /* Bits 0-4 unimplemented */ 349 350 _VOLXDATA _UINT8 __at 0xfe00 BSR; /* SIM Break Status Register */ 351 #define SBSW ((struct __hc08_bits *)(&BSR))->bit1 352 353 _VOLXDATA _UINT8 __at 0xfe01 RSR; /* SIM Reset Status Register */ 354 #define LVI ((struct __hc08_bits *)(&RSR))->bit1 355 #define MODRST ((struct __hc08_bits *)(&RSR))->bit2 356 #define ILAD ((struct __hc08_bits *)(&RSR))->bit3 357 #define ILOP ((struct __hc08_bits *)(&RSR))->bit4 358 #define COP ((struct __hc08_bits *)(&RSR))->bit5 359 #define PIN ((struct __hc08_bits *)(&RSR))->bit6 360 #define POR ((struct __hc08_bits *)(&RSR))->bit7 361 /* Bit 0 unimplemented */ 362 363 _VOLXDATA _UINT8 __at 0xfe02 SUBAR; /* SIM Upper Byte Address */ 364 365 _VOLXDATA _UINT8 __at 0xfe03 BFCR; /* SIM Break Flag Control Register */ 366 #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7 367 368 _VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */ 369 #define IF1 ((struct __hc08_bits *)(&INT1))->bit2 370 #define IF3 ((struct __hc08_bits *)(&INT1))->bit4 371 #define IF4 ((struct __hc08_bits *)(&INT1))->bit5 372 #define IF5 ((struct __hc08_bits *)(&INT1))->bit6 373 374 375 _VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */ 376 #define IF14 ((struct __hc08_bits *)(&INT2))->bit7 377 378 _VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */ 379 #define IF16 ((struct __hc08_bits *)(&INT3))->bit1 380 #define IF15 ((struct __hc08_bits *)(&INT3))->bit0 381 382 _VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */ 383 #define PGM ((struct __hc08_bits *)(&FLCR))->bit0 384 #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1 385 #define MASS ((struct __hc08_bits *)(&FLCR))->bit2 386 #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3 387 388 _VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* Flash Block Protect Register */ 389 #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0 390 #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1 391 #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2 392 #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3 393 #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4 394 #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5 395 #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6 396 #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7 397 398 _VOLXDATA _UINT16 __at 0xfe0C BRK; /* Break Address High & Low Registers */ 399 _VOLXDATA _UINT8 __at 0xfe0C BRKH; /* Break Address High Register */ 400 _VOLXDATA _UINT8 __at 0xfe0D BRKL; /* Break Address Low Register */ 401 402 _VOLXDATA _UINT8 __at 0xfe0e BRKSCR; /* Break Status and Control Register */ 403 #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6 404 #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7 405 406 _VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */ 407 408 #endif 409