1 /*-------------------------------------------------------------------------
2    mc68hc908qy.h - Register Declarations for Motorola MC68HC908QY & MC68HC908QT
3 
4    Copyright (C) 2003, Erik Petrich epetrich@users.sourceforge.net
5 
6    This library is free software; you can redistribute it and/or modify it
7    under the terms of the GNU General Public License as published by the
8    Free Software Foundation; either version 2, or (at your option) any
9    later version.
10 
11    This library is distributed in the hope that it will be useful,
12    but WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14    GNU General Public License for more details.
15 
16    You should have received a copy of the GNU General Public License
17    along with this library; see the file COPYING. If not, write to the
18    Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
19    MA 02110-1301, USA.
20 
21    As a special exception, if you link this library with other files,
22    some of which are compiled with SDCC, to produce an executable,
23    this library does not by itself cause the resulting executable to
24    be covered by the GNU General Public License. This exception does
25    not however invalidate any other reasons why the executable file
26    might be covered by the GNU General Public License.
27 -------------------------------------------------------------------------*/
28 
29 #ifndef _MC68HC908QY_H
30 #define _MC68HC908QY_H
31 
32 #ifndef _UINT8
33  #define _UINT8 unsigned char
34 #endif
35 #ifndef _UINT16
36  #define _UINT16 unsigned int
37 #endif
38 #ifndef _VOLDATA
39  #define _VOLDATA volatile __data
40 #endif
41 #ifndef _VOLXDATA
42  #define _VOLXDATA volatile __xdata
43 #endif
44 
45 struct __hc08_bits
46 {
47   unsigned int bit0:1;
48   unsigned int bit1:1;
49   unsigned int bit2:1;
50   unsigned int bit3:1;
51   unsigned int bit4:1;
52   unsigned int bit5:1;
53   unsigned int bit6:1;
54   unsigned int bit7:1;
55 };
56 
57 
58 _VOLDATA _UINT8 __at 0x00 PTA;     /* Port A Data Register */
59   #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0
60   #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1
61   #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2
62   #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3
63   #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4
64   #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5
65   #define AWUL ((struct __hc08_bits *)(&PTA))->bit6
66 
67 _VOLDATA _UINT8 __at 0x01 PTB;     /* Port B Data Register */
68   #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0
69   #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1
70   #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2
71   #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3
72   #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4
73   #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5
74   #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6
75   #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7
76 
77 _VOLDATA _UINT8 __at 0x04 DDRA;    /* Data Direction Register A */
78   #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0
79   #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1
80   #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3
81   #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4
82   #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5
83 
84 _VOLDATA _UINT8 __at 0x05 DDRB;    /* Data Direction Register B */
85   #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0
86   #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1
87   #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2
88   #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3
89   #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4
90   #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5
91   #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6
92   #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7
93 
94 _VOLDATA _UINT8 __at 0x0b PTAPUE;  /* Port A Input Pullup Enable Register */
95   #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0
96   #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1
97   #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2
98   #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3
99   #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4
100   #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5
101   #define OSC2EN ((struct __hc08_bits *)(&PTAPUE))->bit7
102 
103 _VOLDATA _UINT8 __at 0x0c PTBPUE;  /* Port B Input Pullup Enable Register */
104   #define PTBPUE0 ((struct __hc08_bits *)(&PTBPUE))->bit0
105   #define PTBPUE1 ((struct __hc08_bits *)(&PTBPUE))->bit1
106   #define PTBPUE2 ((struct __hc08_bits *)(&PTBPUE))->bit2
107   #define PTBPUE3 ((struct __hc08_bits *)(&PTBPUE))->bit3
108   #define PTBPUE4 ((struct __hc08_bits *)(&PTBPUE))->bit4
109   #define PTBPUE5 ((struct __hc08_bits *)(&PTBPUE))->bit5
110   #define PTBPUE6 ((struct __hc08_bits *)(&PTBPUE))->bit6
111   #define PTBPUE7 ((struct __hc08_bits *)(&PTBPUE))->bit7
112 
113 _VOLDATA _UINT8 __at 0x1a KBSCR;   /* Keyboard Status and Control Register */
114   #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0
115   #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1
116   #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2
117   #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3
118 
119 _VOLDATA _UINT8 __at 0x1b KBIER;   /* Keyboard Interrupt Enable Register */
120   #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0
121   #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1
122   #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2
123   #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3
124   #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4
125   #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5
126   #define AWUIE ((struct __hc08_bits *)(&KBIER))->bit6
127 
128 _VOLDATA _UINT8 __at 0x1d INTSCR;  /* IRQ Status and Control Register */
129   #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0
130   #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1
131   #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2
132   #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3
133 
134 _VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */
135 /* CONFIG2 is one-time writeable, so can't use bitfields */
136 
137 _VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */
138 /* CONFIG1 is one-time writeable, so can't use bitfields */
139 
140 _VOLDATA _UINT8 __at 0x20 TSC;     /* TIM Status and Control */
141   #define PS0 ((struct __hc08_bits *)(&TSC))->bit0
142   #define PS1 ((struct __hc08_bits *)(&TSC))->bit1
143   #define PS2 ((struct __hc08_bits *)(&TSC))->bit2
144   #define TRST ((struct __hc08_bits *)(&TSC))->bit4
145   #define TSTOP ((struct __hc08_bits *)(&TSC))->bit5
146   #define TOIE ((struct __hc08_bits *)(&TSC))->bit6
147   #define TOF ((struct __hc08_bits *)(&TSC))->bit7
148 
149 _VOLDATA _UINT8 __at 0x21 TCNTH;   /* TIM Counter Register High */
150 _VOLDATA _UINT8 __at 0x22 TCNTL;   /* TIM Counter Register Low */
151 _VOLDATA _UINT16 __at 0x21 TCNT;   /* TIM Counter High & Low Registers */
152 
153 _VOLDATA _UINT8 __at 0x23 TMODH;   /* TIM Counter Modulo Register High */
154 _VOLDATA _UINT8 __at 0x24 TMODL;   /* TIM Counter Modulo Register Low */
155 _VOLDATA _UINT16 __at 0x23 TMOD;   /* TIM Counter Modulo High & Low Registers */
156 
157 _VOLDATA _UINT8 __at 0x25 TSC0;    /* TIM Channel 0 Status and Control Register */
158   #define CH0MAX ((struct __hc08_bits *)(&TSC0))->bit0
159   #define TOV0 ((struct __hc08_bits *)(&TSC0))->bit1
160   #define ELS0A ((struct __hc08_bits *)(&TSC0))->bit2
161   #define ELS0B ((struct __hc08_bits *)(&TSC0))->bit3
162   #define MS0A ((struct __hc08_bits *)(&TSC0))->bit4
163   #define MS0B ((struct __hc08_bits *)(&TSC0))->bit5
164   #define CH0IE ((struct __hc08_bits *)(&TSC0))->bit6
165   #define CH0F ((struct __hc08_bits *)(&TSC0))->bit7
166 
167 _VOLDATA _UINT8 __at 0x26 TCH0H;   /* TIM Channel 0 Register High */
168 _VOLDATA _UINT8 __at 0x27 TCH0L;   /* TIM Channel 0 Register Low */
169 _VOLDATA _UINT16 __at 0x26 TCH0;   /* TIM Channel 0 High & Low Registers */
170 
171 _VOLDATA _UINT8 __at 0x28 TSC1;    /* TIM Channel 1 Status and Control Register */
172   #define CH1MAX ((struct __hc08_bits *)(&TSC1))->bit0
173   #define TOV1 ((struct __hc08_bits *)(&TSC1))->bit1
174   #define ELS1A ((struct __hc08_bits *)(&TSC1))->bit2
175   #define ELS1B ((struct __hc08_bits *)(&TSC1))->bit3
176   #define MS1A ((struct __hc08_bits *)(&TSC1))->bit4
177   #define MS1B ((struct __hc08_bits *)(&TSC1))->bit5
178   #define CH1IE ((struct __hc08_bits *)(&TSC1))->bit6
179   #define CH1F ((struct __hc08_bits *)(&TSC1))->bit7
180 
181 _VOLDATA _UINT8 __at 0x29 TCH1H;   /* TIM Channel 1 Register High */
182 _VOLDATA _UINT8 __at 0x2a TCH1L;   /* TIM Channel 1 Register Low */
183 _VOLDATA _UINT16 __at 0x29 TCH1;   /* TIM Channel 1 High & Low Registers */
184 
185 _VOLDATA _UINT8 __at 0x36 OSCSTAT; /* Oscillator Status Register */
186   #define ECGST ((struct __hc08_bits *)(&OSCSTAT))->bit0
187   #define ECGON ((struct __hc08_bits *)(&OSCSTAT))->bit1
188 
189 _VOLDATA _UINT8 __at 0x38 OSCTRIM; /* Oscillator Trim Register */
190 
191 _VOLDATA _UINT8 __at 0x3c ADSCR;   /* ADC Status and Control Register */
192   #define CH0 ((struct __hc08_bits *)(&ADSCR))->bit0
193   #define CH1 ((struct __hc08_bits *)(&ADSCR))->bit1
194   #define CH2 ((struct __hc08_bits *)(&ADSCR))->bit2
195   #define CH3 ((struct __hc08_bits *)(&ADSCR))->bit3
196   #define CH4 ((struct __hc08_bits *)(&ADSCR))->bit4
197   #define ADC0 ((struct __hc08_bits *)(&ADSCR))->bit5
198   #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6
199   #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7
200 
201 _VOLDATA _UINT8 __at 0x3e ADR;     /* ADC Data Register */
202 
203 _VOLDATA _UINT8 __at 0x3f ADICLK;  /* ADS Input Clock Register */
204   #define ADIV0 ((struct __hc08_bits *)(&ADICLK))->bit5
205   #define ADIV1 ((struct __hc08_bits *)(&ADICLK))->bit6
206   #define ADIV2 ((struct __hc08_bits *)(&ADICLK))->bit7
207 
208 _VOLXDATA _UINT8 __at 0xfe00 BSR;     /* Break Status Register */
209   #define SBSW ((struct __hc08_bits *)(&BSR))->bit1
210 
211 _VOLXDATA _UINT8 __at 0xfe01 SRSR;    /* SIM Reset Status Register */
212   #define LVI ((struct __hc08_bits *)(&SRSR))->bit1
213   #define MODRST ((struct __hc08_bits *)(&SRSR))->bit2
214   #define ILAD ((struct __hc08_bits *)(&SRSR))->bit3
215   #define ILOP ((struct __hc08_bits *)(&SRSR))->bit4
216   #define COP ((struct __hc08_bits *)(&SRSR))->bit5
217   #define PIN ((struct __hc08_bits *)(&SRSR))->bit6
218   #define POR ((struct __hc08_bits *)(&SRSR))->bit7
219 
220 _VOLXDATA _UINT8 __at 0xfe02 BRKAR;   /* Break Auxilliary Register */
221   #define BDCOP ((struct __hc08_bits *)(&BRKAR))->bit0
222 
223 _VOLXDATA _UINT8 __at 0xfe03 BFCF;    /* Break Flag Control Register */
224   #define BFCF ((struct __hc08_bits *)(&BFCF))->bit7
225 
226 _VOLXDATA _UINT8 __at 0xfe04 INT1;    /* Interrupt Status Register 1 */
227   #define IF1 ((struct __hc08_bits *)(&INT1))->bit2
228   #define IF3 ((struct __hc08_bits *)(&INT1))->bit4
229   #define IF4 ((struct __hc08_bits *)(&INT1))->bit5
230   #define IF5 ((struct __hc08_bits *)(&INT1))->bit6
231 
232 _VOLXDATA _UINT8 __at 0xfe05 INT2;    /* Interrupt Status Register 2 */
233   #define IF14 ((struct __hc08_bits *)(&INT2))->bit7
234 
235 _VOLXDATA _UINT8 __at 0xfe06 INT3;    /* Interrupt Status Register 3 */
236   #define IF15 ((struct __hc08_bits *)(&INT3))->bit0
237 
238 _VOLXDATA _UINT8 __at 0xfe08 FLCR;    /* FLASH Control Register */
239   #define PGM ((struct __hc08_bits *)(&FLCR))->bit0
240   #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1
241   #define MASS ((struct __hc08_bits *)(&FLCR))->bit2
242   #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3
243 
244 _VOLXDATA _UINT8 __at 0xfe09 BRKH;    /* Break Address High Register */
245 _VOLXDATA _UINT8 __at 0xfe0a BRKL;    /* Break Address Low Register */
246 _VOLXDATA _UINT16 __at 0xfe09 BRK;    /* Break Address High & Low Registers */
247 
248 _VOLXDATA _UINT8 __at 0xfe0b BRKSCR;  /* Break Status and Control Register */
249   #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6
250   #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7
251 
252 _VOLXDATA _UINT8 __at 0xfe0c LVISR;   /* LVI Status Register */
253   #define LVIOUT ((struct __hc08_bits *)(&LVISR))->bit7
254 
255 _VOLXDATA _UINT8 __at 0xffbe FLBPR;   /* FLASH Block Protect Register */
256 _VOLXDATA _UINT8 __at 0xffc0 OSCTRIMVAL; /* Oscillator Trim Value */
257 _VOLXDATA _UINT8 __at 0xffff COPCTL;  /* COP Control Register */
258 
259 
260 #endif
261 
262