1 /* 2 * This declarations of the PIC16F1454 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16F1454_H__ 26 #define __PIC16F1454_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF0_ADDR 0x0000 37 #define INDF1_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR0_ADDR 0x0004 41 #define FSR0L_ADDR 0x0004 42 #define FSR0H_ADDR 0x0005 43 #define FSR1_ADDR 0x0006 44 #define FSR1L_ADDR 0x0006 45 #define FSR1H_ADDR 0x0007 46 #define BSR_ADDR 0x0008 47 #define WREG_ADDR 0x0009 48 #define PCLATH_ADDR 0x000A 49 #define INTCON_ADDR 0x000B 50 #define PORTA_ADDR 0x000C 51 #define PORTC_ADDR 0x000E 52 #define PIR1_ADDR 0x0011 53 #define PIR2_ADDR 0x0012 54 #define TMR0_ADDR 0x0015 55 #define TMR1_ADDR 0x0016 56 #define TMR1L_ADDR 0x0016 57 #define TMR1H_ADDR 0x0017 58 #define T1CON_ADDR 0x0018 59 #define T1GCON_ADDR 0x0019 60 #define TMR2_ADDR 0x001A 61 #define PR2_ADDR 0x001B 62 #define T2CON_ADDR 0x001C 63 #define TRISA_ADDR 0x008C 64 #define TRISC_ADDR 0x008E 65 #define PIE1_ADDR 0x0091 66 #define PIE2_ADDR 0x0092 67 #define OPTION_REG_ADDR 0x0095 68 #define PCON_ADDR 0x0096 69 #define WDTCON_ADDR 0x0097 70 #define OSCTUNE_ADDR 0x0098 71 #define OSCCON_ADDR 0x0099 72 #define OSCSTAT_ADDR 0x009A 73 #define LATA_ADDR 0x010C 74 #define LATC_ADDR 0x010E 75 #define BORCON_ADDR 0x0116 76 #define FVRCON_ADDR 0x0117 77 #define APFCON_ADDR 0x011D 78 #define ANSELA_ADDR 0x018C 79 #define ANSELC_ADDR 0x018E 80 #define PMADR_ADDR 0x0191 81 #define PMADRL_ADDR 0x0191 82 #define PMADRH_ADDR 0x0192 83 #define PMDAT_ADDR 0x0193 84 #define PMDATL_ADDR 0x0193 85 #define PMDATH_ADDR 0x0194 86 #define PMCON1_ADDR 0x0195 87 #define PMCON2_ADDR 0x0196 88 #define VREGCON_ADDR 0x0197 89 #define RCREG_ADDR 0x0199 90 #define TXREG_ADDR 0x019A 91 #define SPBRG_ADDR 0x019B 92 #define SPBRGL_ADDR 0x019B 93 #define SPBRGH_ADDR 0x019C 94 #define RCSTA_ADDR 0x019D 95 #define TXSTA_ADDR 0x019E 96 #define BAUDCON_ADDR 0x019F 97 #define WPUA_ADDR 0x020C 98 #define SSP1BUF_ADDR 0x0211 99 #define SSPBUF_ADDR 0x0211 100 #define SSP1ADD_ADDR 0x0212 101 #define SSPADD_ADDR 0x0212 102 #define SSP1MSK_ADDR 0x0213 103 #define SSPMSK_ADDR 0x0213 104 #define SSP1STAT_ADDR 0x0214 105 #define SSPSTAT_ADDR 0x0214 106 #define SSP1CON1_ADDR 0x0215 107 #define SSPCON_ADDR 0x0215 108 #define SSPCON1_ADDR 0x0215 109 #define SSP1CON2_ADDR 0x0216 110 #define SSPCON2_ADDR 0x0216 111 #define SSP1CON3_ADDR 0x0217 112 #define SSPCON3_ADDR 0x0217 113 #define IOCAP_ADDR 0x0391 114 #define IOCAN_ADDR 0x0392 115 #define IOCAF_ADDR 0x0393 116 #define CLKRCON_ADDR 0x039A 117 #define ACTCON_ADDR 0x039B 118 #define PWM1DCL_ADDR 0x0611 119 #define PWM1DCH_ADDR 0x0612 120 #define PWM1CON_ADDR 0x0613 121 #define PWM1CON0_ADDR 0x0613 122 #define PWM2DCL_ADDR 0x0614 123 #define PWM2DCH_ADDR 0x0615 124 #define PWM2CON_ADDR 0x0616 125 #define PWM2CON0_ADDR 0x0616 126 #define UCON_ADDR 0x0E8E 127 #define USTAT_ADDR 0x0E8F 128 #define UIR_ADDR 0x0E90 129 #define UCFG_ADDR 0x0E91 130 #define UIE_ADDR 0x0E92 131 #define UEIR_ADDR 0x0E93 132 #define UFRM_ADDR 0x0E94 133 #define UFRMH_ADDR 0x0E94 134 #define UFRML_ADDR 0x0E95 135 #define UADDR_ADDR 0x0E96 136 #define UEIE_ADDR 0x0E97 137 #define UEP0_ADDR 0x0E98 138 #define UEP1_ADDR 0x0E99 139 #define UEP2_ADDR 0x0E9A 140 #define UEP3_ADDR 0x0E9B 141 #define UEP4_ADDR 0x0E9C 142 #define UEP5_ADDR 0x0E9D 143 #define UEP6_ADDR 0x0E9E 144 #define UEP7_ADDR 0x0E9F 145 #define STATUS_SHAD_ADDR 0x0FE4 146 #define WREG_SHAD_ADDR 0x0FE5 147 #define BSR_SHAD_ADDR 0x0FE6 148 #define PCLATH_SHAD_ADDR 0x0FE7 149 #define FSR0L_SHAD_ADDR 0x0FE8 150 #define FSR0H_SHAD_ADDR 0x0FE9 151 #define FSR1L_SHAD_ADDR 0x0FEA 152 #define FSR1H_SHAD_ADDR 0x0FEB 153 #define STKPTR_ADDR 0x0FED 154 #define TOSL_ADDR 0x0FEE 155 #define TOSH_ADDR 0x0FEF 156 157 #endif // #ifndef NO_ADDR_DEFINES 158 159 //============================================================================== 160 // 161 // Register Definitions 162 // 163 //============================================================================== 164 165 extern __at(0x0000) __sfr INDF0; 166 extern __at(0x0001) __sfr INDF1; 167 extern __at(0x0002) __sfr PCL; 168 169 //============================================================================== 170 // STATUS Bits 171 172 extern __at(0x0003) __sfr STATUS; 173 174 typedef struct 175 { 176 unsigned C : 1; 177 unsigned DC : 1; 178 unsigned Z : 1; 179 unsigned NOT_PD : 1; 180 unsigned NOT_TO : 1; 181 unsigned : 1; 182 unsigned : 1; 183 unsigned : 1; 184 } __STATUSbits_t; 185 186 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 187 188 #define _C 0x01 189 #define _DC 0x02 190 #define _Z 0x04 191 #define _NOT_PD 0x08 192 #define _NOT_TO 0x10 193 194 //============================================================================== 195 196 extern __at(0x0004) __sfr FSR0; 197 extern __at(0x0004) __sfr FSR0L; 198 extern __at(0x0005) __sfr FSR0H; 199 extern __at(0x0006) __sfr FSR1; 200 extern __at(0x0006) __sfr FSR1L; 201 extern __at(0x0007) __sfr FSR1H; 202 203 //============================================================================== 204 // BSR Bits 205 206 extern __at(0x0008) __sfr BSR; 207 208 typedef union 209 { 210 struct 211 { 212 unsigned BSR0 : 1; 213 unsigned BSR1 : 1; 214 unsigned BSR2 : 1; 215 unsigned BSR3 : 1; 216 unsigned BSR4 : 1; 217 unsigned : 1; 218 unsigned : 1; 219 unsigned : 1; 220 }; 221 222 struct 223 { 224 unsigned BSR : 5; 225 unsigned : 3; 226 }; 227 } __BSRbits_t; 228 229 extern __at(0x0008) volatile __BSRbits_t BSRbits; 230 231 #define _BSR0 0x01 232 #define _BSR1 0x02 233 #define _BSR2 0x04 234 #define _BSR3 0x08 235 #define _BSR4 0x10 236 237 //============================================================================== 238 239 extern __at(0x0009) __sfr WREG; 240 extern __at(0x000A) __sfr PCLATH; 241 242 //============================================================================== 243 // INTCON Bits 244 245 extern __at(0x000B) __sfr INTCON; 246 247 typedef union 248 { 249 struct 250 { 251 unsigned IOCIF : 1; 252 unsigned INTF : 1; 253 unsigned TMR0IF : 1; 254 unsigned IOCIE : 1; 255 unsigned INTE : 1; 256 unsigned TMR0IE : 1; 257 unsigned PEIE : 1; 258 unsigned GIE : 1; 259 }; 260 261 struct 262 { 263 unsigned : 1; 264 unsigned : 1; 265 unsigned T0IF : 1; 266 unsigned : 1; 267 unsigned : 1; 268 unsigned T0IE : 1; 269 unsigned : 1; 270 unsigned : 1; 271 }; 272 } __INTCONbits_t; 273 274 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 275 276 #define _IOCIF 0x01 277 #define _INTF 0x02 278 #define _TMR0IF 0x04 279 #define _T0IF 0x04 280 #define _IOCIE 0x08 281 #define _INTE 0x10 282 #define _TMR0IE 0x20 283 #define _T0IE 0x20 284 #define _PEIE 0x40 285 #define _GIE 0x80 286 287 //============================================================================== 288 289 290 //============================================================================== 291 // PORTA Bits 292 293 extern __at(0x000C) __sfr PORTA; 294 295 typedef struct 296 { 297 unsigned RA0 : 1; 298 unsigned RA1 : 1; 299 unsigned : 1; 300 unsigned RA3 : 1; 301 unsigned RA4 : 1; 302 unsigned RA5 : 1; 303 unsigned : 1; 304 unsigned : 1; 305 } __PORTAbits_t; 306 307 extern __at(0x000C) volatile __PORTAbits_t PORTAbits; 308 309 #define _RA0 0x01 310 #define _RA1 0x02 311 #define _RA3 0x08 312 #define _RA4 0x10 313 #define _RA5 0x20 314 315 //============================================================================== 316 317 318 //============================================================================== 319 // PORTC Bits 320 321 extern __at(0x000E) __sfr PORTC; 322 323 typedef union 324 { 325 struct 326 { 327 unsigned RC0 : 1; 328 unsigned RC1 : 1; 329 unsigned RC2 : 1; 330 unsigned RC3 : 1; 331 unsigned RC4 : 1; 332 unsigned RC5 : 1; 333 unsigned : 1; 334 unsigned : 1; 335 }; 336 337 struct 338 { 339 unsigned RC : 6; 340 unsigned : 2; 341 }; 342 } __PORTCbits_t; 343 344 extern __at(0x000E) volatile __PORTCbits_t PORTCbits; 345 346 #define _RC0 0x01 347 #define _RC1 0x02 348 #define _RC2 0x04 349 #define _RC3 0x08 350 #define _RC4 0x10 351 #define _RC5 0x20 352 353 //============================================================================== 354 355 356 //============================================================================== 357 // PIR1 Bits 358 359 extern __at(0x0011) __sfr PIR1; 360 361 typedef struct 362 { 363 unsigned TMR1IF : 1; 364 unsigned TMR2IF : 1; 365 unsigned : 1; 366 unsigned SSP1IF : 1; 367 unsigned TXIF : 1; 368 unsigned RCIF : 1; 369 unsigned : 1; 370 unsigned TMR1GIF : 1; 371 } __PIR1bits_t; 372 373 extern __at(0x0011) volatile __PIR1bits_t PIR1bits; 374 375 #define _TMR1IF 0x01 376 #define _TMR2IF 0x02 377 #define _SSP1IF 0x08 378 #define _TXIF 0x10 379 #define _RCIF 0x20 380 #define _TMR1GIF 0x80 381 382 //============================================================================== 383 384 385 //============================================================================== 386 // PIR2 Bits 387 388 extern __at(0x0012) __sfr PIR2; 389 390 typedef struct 391 { 392 unsigned : 1; 393 unsigned ACTIF : 1; 394 unsigned USBIF : 1; 395 unsigned BCL1IF : 1; 396 unsigned : 1; 397 unsigned : 1; 398 unsigned : 1; 399 unsigned OSFIF : 1; 400 } __PIR2bits_t; 401 402 extern __at(0x0012) volatile __PIR2bits_t PIR2bits; 403 404 #define _ACTIF 0x02 405 #define _USBIF 0x04 406 #define _BCL1IF 0x08 407 #define _OSFIF 0x80 408 409 //============================================================================== 410 411 extern __at(0x0015) __sfr TMR0; 412 extern __at(0x0016) __sfr TMR1; 413 extern __at(0x0016) __sfr TMR1L; 414 extern __at(0x0017) __sfr TMR1H; 415 416 //============================================================================== 417 // T1CON Bits 418 419 extern __at(0x0018) __sfr T1CON; 420 421 typedef union 422 { 423 struct 424 { 425 unsigned TMR1ON : 1; 426 unsigned : 1; 427 unsigned NOT_T1SYNC : 1; 428 unsigned T1OSCEN : 1; 429 unsigned T1CKPS0 : 1; 430 unsigned T1CKPS1 : 1; 431 unsigned TMR1CS0 : 1; 432 unsigned TMR1CS1 : 1; 433 }; 434 435 struct 436 { 437 unsigned : 4; 438 unsigned T1CKPS : 2; 439 unsigned : 2; 440 }; 441 442 struct 443 { 444 unsigned : 6; 445 unsigned TMR1CS : 2; 446 }; 447 } __T1CONbits_t; 448 449 extern __at(0x0018) volatile __T1CONbits_t T1CONbits; 450 451 #define _TMR1ON 0x01 452 #define _NOT_T1SYNC 0x04 453 #define _T1OSCEN 0x08 454 #define _T1CKPS0 0x10 455 #define _T1CKPS1 0x20 456 #define _TMR1CS0 0x40 457 #define _TMR1CS1 0x80 458 459 //============================================================================== 460 461 462 //============================================================================== 463 // T1GCON Bits 464 465 extern __at(0x0019) __sfr T1GCON; 466 467 typedef union 468 { 469 struct 470 { 471 unsigned T1GSS0 : 1; 472 unsigned T1GSS1 : 1; 473 unsigned T1GVAL : 1; 474 unsigned T1GGO_NOT_DONE : 1; 475 unsigned T1GSPM : 1; 476 unsigned T1GTM : 1; 477 unsigned T1GPOL : 1; 478 unsigned TMR1GE : 1; 479 }; 480 481 struct 482 { 483 unsigned T1GSS : 2; 484 unsigned : 6; 485 }; 486 } __T1GCONbits_t; 487 488 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 489 490 #define _T1GSS0 0x01 491 #define _T1GSS1 0x02 492 #define _T1GVAL 0x04 493 #define _T1GGO_NOT_DONE 0x08 494 #define _T1GSPM 0x10 495 #define _T1GTM 0x20 496 #define _T1GPOL 0x40 497 #define _TMR1GE 0x80 498 499 //============================================================================== 500 501 extern __at(0x001A) __sfr TMR2; 502 extern __at(0x001B) __sfr PR2; 503 504 //============================================================================== 505 // T2CON Bits 506 507 extern __at(0x001C) __sfr T2CON; 508 509 typedef union 510 { 511 struct 512 { 513 unsigned T2CKPS0 : 1; 514 unsigned T2CKPS1 : 1; 515 unsigned TMR2ON : 1; 516 unsigned T2OUTPS0 : 1; 517 unsigned T2OUTPS1 : 1; 518 unsigned T2OUTPS2 : 1; 519 unsigned T2OUTPS3 : 1; 520 unsigned : 1; 521 }; 522 523 struct 524 { 525 unsigned T2CKPS : 2; 526 unsigned : 6; 527 }; 528 529 struct 530 { 531 unsigned : 3; 532 unsigned T2OUTPS : 4; 533 unsigned : 1; 534 }; 535 } __T2CONbits_t; 536 537 extern __at(0x001C) volatile __T2CONbits_t T2CONbits; 538 539 #define _T2CKPS0 0x01 540 #define _T2CKPS1 0x02 541 #define _TMR2ON 0x04 542 #define _T2OUTPS0 0x08 543 #define _T2OUTPS1 0x10 544 #define _T2OUTPS2 0x20 545 #define _T2OUTPS3 0x40 546 547 //============================================================================== 548 549 550 //============================================================================== 551 // TRISA Bits 552 553 extern __at(0x008C) __sfr TRISA; 554 555 typedef struct 556 { 557 unsigned : 1; 558 unsigned : 1; 559 unsigned : 1; 560 unsigned : 1; 561 unsigned TRISA4 : 1; 562 unsigned TRISA5 : 1; 563 unsigned : 1; 564 unsigned : 1; 565 } __TRISAbits_t; 566 567 extern __at(0x008C) volatile __TRISAbits_t TRISAbits; 568 569 #define _TRISA4 0x10 570 #define _TRISA5 0x20 571 572 //============================================================================== 573 574 575 //============================================================================== 576 // TRISC Bits 577 578 extern __at(0x008E) __sfr TRISC; 579 580 typedef union 581 { 582 struct 583 { 584 unsigned TRISC0 : 1; 585 unsigned TRISC1 : 1; 586 unsigned TRISC2 : 1; 587 unsigned TRISC3 : 1; 588 unsigned TRISC4 : 1; 589 unsigned TRISC5 : 1; 590 unsigned : 1; 591 unsigned : 1; 592 }; 593 594 struct 595 { 596 unsigned TRISC : 6; 597 unsigned : 2; 598 }; 599 } __TRISCbits_t; 600 601 extern __at(0x008E) volatile __TRISCbits_t TRISCbits; 602 603 #define _TRISC0 0x01 604 #define _TRISC1 0x02 605 #define _TRISC2 0x04 606 #define _TRISC3 0x08 607 #define _TRISC4 0x10 608 #define _TRISC5 0x20 609 610 //============================================================================== 611 612 613 //============================================================================== 614 // PIE1 Bits 615 616 extern __at(0x0091) __sfr PIE1; 617 618 typedef struct 619 { 620 unsigned TMR1IE : 1; 621 unsigned TMR2IE : 1; 622 unsigned : 1; 623 unsigned SSP1IE : 1; 624 unsigned TXIE : 1; 625 unsigned RCIE : 1; 626 unsigned : 1; 627 unsigned TMR1GIE : 1; 628 } __PIE1bits_t; 629 630 extern __at(0x0091) volatile __PIE1bits_t PIE1bits; 631 632 #define _TMR1IE 0x01 633 #define _TMR2IE 0x02 634 #define _SSP1IE 0x08 635 #define _TXIE 0x10 636 #define _RCIE 0x20 637 #define _TMR1GIE 0x80 638 639 //============================================================================== 640 641 642 //============================================================================== 643 // PIE2 Bits 644 645 extern __at(0x0092) __sfr PIE2; 646 647 typedef struct 648 { 649 unsigned : 1; 650 unsigned ACTIE : 1; 651 unsigned USBIE : 1; 652 unsigned BCL1IE : 1; 653 unsigned : 1; 654 unsigned : 1; 655 unsigned : 1; 656 unsigned OSFIE : 1; 657 } __PIE2bits_t; 658 659 extern __at(0x0092) volatile __PIE2bits_t PIE2bits; 660 661 #define _ACTIE 0x02 662 #define _USBIE 0x04 663 #define _BCL1IE 0x08 664 #define _OSFIE 0x80 665 666 //============================================================================== 667 668 669 //============================================================================== 670 // OPTION_REG Bits 671 672 extern __at(0x0095) __sfr OPTION_REG; 673 674 typedef union 675 { 676 struct 677 { 678 unsigned PS0 : 1; 679 unsigned PS1 : 1; 680 unsigned PS2 : 1; 681 unsigned PSA : 1; 682 unsigned TMR0SE : 1; 683 unsigned TMR0CS : 1; 684 unsigned INTEDG : 1; 685 unsigned NOT_WPUEN : 1; 686 }; 687 688 struct 689 { 690 unsigned : 1; 691 unsigned : 1; 692 unsigned : 1; 693 unsigned : 1; 694 unsigned T0SE : 1; 695 unsigned T0CS : 1; 696 unsigned : 1; 697 unsigned : 1; 698 }; 699 700 struct 701 { 702 unsigned PS : 3; 703 unsigned : 5; 704 }; 705 } __OPTION_REGbits_t; 706 707 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 708 709 #define _PS0 0x01 710 #define _PS1 0x02 711 #define _PS2 0x04 712 #define _PSA 0x08 713 #define _TMR0SE 0x10 714 #define _T0SE 0x10 715 #define _TMR0CS 0x20 716 #define _T0CS 0x20 717 #define _INTEDG 0x40 718 #define _NOT_WPUEN 0x80 719 720 //============================================================================== 721 722 723 //============================================================================== 724 // PCON Bits 725 726 extern __at(0x0096) __sfr PCON; 727 728 typedef struct 729 { 730 unsigned NOT_BOR : 1; 731 unsigned NOT_POR : 1; 732 unsigned NOT_RI : 1; 733 unsigned NOT_RMCLR : 1; 734 unsigned NOT_RWDT : 1; 735 unsigned : 1; 736 unsigned STKUNF : 1; 737 unsigned STKOVF : 1; 738 } __PCONbits_t; 739 740 extern __at(0x0096) volatile __PCONbits_t PCONbits; 741 742 #define _NOT_BOR 0x01 743 #define _NOT_POR 0x02 744 #define _NOT_RI 0x04 745 #define _NOT_RMCLR 0x08 746 #define _NOT_RWDT 0x10 747 #define _STKUNF 0x40 748 #define _STKOVF 0x80 749 750 //============================================================================== 751 752 753 //============================================================================== 754 // WDTCON Bits 755 756 extern __at(0x0097) __sfr WDTCON; 757 758 typedef union 759 { 760 struct 761 { 762 unsigned SWDTEN : 1; 763 unsigned WDTPS0 : 1; 764 unsigned WDTPS1 : 1; 765 unsigned WDTPS2 : 1; 766 unsigned WDTPS3 : 1; 767 unsigned WDTPS4 : 1; 768 unsigned : 1; 769 unsigned : 1; 770 }; 771 772 struct 773 { 774 unsigned : 1; 775 unsigned WDTPS : 5; 776 unsigned : 2; 777 }; 778 } __WDTCONbits_t; 779 780 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 781 782 #define _SWDTEN 0x01 783 #define _WDTPS0 0x02 784 #define _WDTPS1 0x04 785 #define _WDTPS2 0x08 786 #define _WDTPS3 0x10 787 #define _WDTPS4 0x20 788 789 //============================================================================== 790 791 792 //============================================================================== 793 // OSCTUNE Bits 794 795 extern __at(0x0098) __sfr OSCTUNE; 796 797 typedef union 798 { 799 struct 800 { 801 unsigned TUN0 : 1; 802 unsigned TUN1 : 1; 803 unsigned TUN2 : 1; 804 unsigned TUN3 : 1; 805 unsigned TUN4 : 1; 806 unsigned TUN5 : 1; 807 unsigned TUN6 : 1; 808 unsigned : 1; 809 }; 810 811 struct 812 { 813 unsigned TUN : 7; 814 unsigned : 1; 815 }; 816 } __OSCTUNEbits_t; 817 818 extern __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 819 820 #define _TUN0 0x01 821 #define _TUN1 0x02 822 #define _TUN2 0x04 823 #define _TUN3 0x08 824 #define _TUN4 0x10 825 #define _TUN5 0x20 826 #define _TUN6 0x40 827 828 //============================================================================== 829 830 831 //============================================================================== 832 // OSCCON Bits 833 834 extern __at(0x0099) __sfr OSCCON; 835 836 typedef union 837 { 838 struct 839 { 840 unsigned SCS0 : 1; 841 unsigned SCS1 : 1; 842 unsigned IRCF0 : 1; 843 unsigned IRCF1 : 1; 844 unsigned IRCF2 : 1; 845 unsigned IRCF3 : 1; 846 unsigned SPLLMULT : 1; 847 unsigned SPLLEN : 1; 848 }; 849 850 struct 851 { 852 unsigned SCS : 2; 853 unsigned : 6; 854 }; 855 856 struct 857 { 858 unsigned : 2; 859 unsigned IRCF : 4; 860 unsigned : 2; 861 }; 862 } __OSCCONbits_t; 863 864 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 865 866 #define _SCS0 0x01 867 #define _SCS1 0x02 868 #define _IRCF0 0x04 869 #define _IRCF1 0x08 870 #define _IRCF2 0x10 871 #define _IRCF3 0x20 872 #define _SPLLMULT 0x40 873 #define _SPLLEN 0x80 874 875 //============================================================================== 876 877 878 //============================================================================== 879 // OSCSTAT Bits 880 881 extern __at(0x009A) __sfr OSCSTAT; 882 883 typedef struct 884 { 885 unsigned HFIOFS : 1; 886 unsigned LFIOFR : 1; 887 unsigned : 1; 888 unsigned : 1; 889 unsigned HFIOFR : 1; 890 unsigned OSTS : 1; 891 unsigned PLLRDY : 1; 892 unsigned SOSCR : 1; 893 } __OSCSTATbits_t; 894 895 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 896 897 #define _HFIOFS 0x01 898 #define _LFIOFR 0x02 899 #define _HFIOFR 0x10 900 #define _OSTS 0x20 901 #define _PLLRDY 0x40 902 #define _SOSCR 0x80 903 904 //============================================================================== 905 906 907 //============================================================================== 908 // LATA Bits 909 910 extern __at(0x010C) __sfr LATA; 911 912 typedef struct 913 { 914 unsigned : 1; 915 unsigned : 1; 916 unsigned : 1; 917 unsigned : 1; 918 unsigned LATA4 : 1; 919 unsigned LATA5 : 1; 920 unsigned : 1; 921 unsigned : 1; 922 } __LATAbits_t; 923 924 extern __at(0x010C) volatile __LATAbits_t LATAbits; 925 926 #define _LATA4 0x10 927 #define _LATA5 0x20 928 929 //============================================================================== 930 931 932 //============================================================================== 933 // LATC Bits 934 935 extern __at(0x010E) __sfr LATC; 936 937 typedef union 938 { 939 struct 940 { 941 unsigned LATC0 : 1; 942 unsigned LATC1 : 1; 943 unsigned LATC2 : 1; 944 unsigned LATC3 : 1; 945 unsigned LATC4 : 1; 946 unsigned LATC5 : 1; 947 unsigned : 1; 948 unsigned : 1; 949 }; 950 951 struct 952 { 953 unsigned LATC : 6; 954 unsigned : 2; 955 }; 956 } __LATCbits_t; 957 958 extern __at(0x010E) volatile __LATCbits_t LATCbits; 959 960 #define _LATC0 0x01 961 #define _LATC1 0x02 962 #define _LATC2 0x04 963 #define _LATC3 0x08 964 #define _LATC4 0x10 965 #define _LATC5 0x20 966 967 //============================================================================== 968 969 970 //============================================================================== 971 // BORCON Bits 972 973 extern __at(0x0116) __sfr BORCON; 974 975 typedef struct 976 { 977 unsigned BORRDY : 1; 978 unsigned : 1; 979 unsigned : 1; 980 unsigned : 1; 981 unsigned : 1; 982 unsigned : 1; 983 unsigned BORFS : 1; 984 unsigned SBOREN : 1; 985 } __BORCONbits_t; 986 987 extern __at(0x0116) volatile __BORCONbits_t BORCONbits; 988 989 #define _BORRDY 0x01 990 #define _BORFS 0x40 991 #define _SBOREN 0x80 992 993 //============================================================================== 994 995 996 //============================================================================== 997 // FVRCON Bits 998 999 extern __at(0x0117) __sfr FVRCON; 1000 1001 typedef struct 1002 { 1003 unsigned : 1; 1004 unsigned : 1; 1005 unsigned : 1; 1006 unsigned : 1; 1007 unsigned : 1; 1008 unsigned : 1; 1009 unsigned FVRRDY : 1; 1010 unsigned FVREN : 1; 1011 } __FVRCONbits_t; 1012 1013 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 1014 1015 #define _FVRRDY 0x40 1016 #define _FVREN 0x80 1017 1018 //============================================================================== 1019 1020 1021 //============================================================================== 1022 // APFCON Bits 1023 1024 extern __at(0x011D) __sfr APFCON; 1025 1026 typedef struct 1027 { 1028 unsigned : 1; 1029 unsigned : 1; 1030 unsigned P2SEL : 1; 1031 unsigned T1GSEL : 1; 1032 unsigned : 1; 1033 unsigned SSSEL : 1; 1034 unsigned SDOSEL : 1; 1035 unsigned CLKRSEL : 1; 1036 } __APFCONbits_t; 1037 1038 extern __at(0x011D) volatile __APFCONbits_t APFCONbits; 1039 1040 #define _P2SEL 0x04 1041 #define _T1GSEL 0x08 1042 #define _SSSEL 0x20 1043 #define _SDOSEL 0x40 1044 #define _CLKRSEL 0x80 1045 1046 //============================================================================== 1047 1048 1049 //============================================================================== 1050 // ANSELA Bits 1051 1052 extern __at(0x018C) __sfr ANSELA; 1053 1054 typedef struct 1055 { 1056 unsigned : 1; 1057 unsigned : 1; 1058 unsigned : 1; 1059 unsigned : 1; 1060 unsigned : 1; 1061 unsigned ANSA4 : 1; 1062 unsigned : 1; 1063 unsigned : 1; 1064 } __ANSELAbits_t; 1065 1066 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 1067 1068 #define _ANSA4 0x20 1069 1070 //============================================================================== 1071 1072 1073 //============================================================================== 1074 // ANSELC Bits 1075 1076 extern __at(0x018E) __sfr ANSELC; 1077 1078 typedef union 1079 { 1080 struct 1081 { 1082 unsigned ANSC0 : 1; 1083 unsigned ANSC1 : 1; 1084 unsigned ANSC2 : 1; 1085 unsigned ANSC3 : 1; 1086 unsigned : 1; 1087 unsigned : 1; 1088 unsigned : 1; 1089 unsigned : 1; 1090 }; 1091 1092 struct 1093 { 1094 unsigned ANSC : 4; 1095 unsigned : 4; 1096 }; 1097 } __ANSELCbits_t; 1098 1099 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 1100 1101 #define _ANSC0 0x01 1102 #define _ANSC1 0x02 1103 #define _ANSC2 0x04 1104 #define _ANSC3 0x08 1105 1106 //============================================================================== 1107 1108 extern __at(0x0191) __sfr PMADR; 1109 extern __at(0x0191) __sfr PMADRL; 1110 extern __at(0x0192) __sfr PMADRH; 1111 extern __at(0x0193) __sfr PMDAT; 1112 extern __at(0x0193) __sfr PMDATL; 1113 extern __at(0x0194) __sfr PMDATH; 1114 1115 //============================================================================== 1116 // PMCON1 Bits 1117 1118 extern __at(0x0195) __sfr PMCON1; 1119 1120 typedef struct 1121 { 1122 unsigned RD : 1; 1123 unsigned WR : 1; 1124 unsigned WREN : 1; 1125 unsigned WRERR : 1; 1126 unsigned FREE : 1; 1127 unsigned LWLO : 1; 1128 unsigned CFGS : 1; 1129 unsigned : 1; 1130 } __PMCON1bits_t; 1131 1132 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 1133 1134 #define _RD 0x01 1135 #define _WR 0x02 1136 #define _WREN 0x04 1137 #define _WRERR 0x08 1138 #define _FREE 0x10 1139 #define _LWLO 0x20 1140 #define _CFGS 0x40 1141 1142 //============================================================================== 1143 1144 extern __at(0x0196) __sfr PMCON2; 1145 1146 //============================================================================== 1147 // VREGCON Bits 1148 1149 extern __at(0x0197) __sfr VREGCON; 1150 1151 typedef union 1152 { 1153 struct 1154 { 1155 unsigned VREGPM0 : 1; 1156 unsigned VREGPM1 : 1; 1157 unsigned : 1; 1158 unsigned : 1; 1159 unsigned : 1; 1160 unsigned : 1; 1161 unsigned : 1; 1162 unsigned : 1; 1163 }; 1164 1165 struct 1166 { 1167 unsigned VREGPM : 2; 1168 unsigned : 6; 1169 }; 1170 } __VREGCONbits_t; 1171 1172 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits; 1173 1174 #define _VREGPM0 0x01 1175 #define _VREGPM1 0x02 1176 1177 //============================================================================== 1178 1179 extern __at(0x0199) __sfr RCREG; 1180 extern __at(0x019A) __sfr TXREG; 1181 extern __at(0x019B) __sfr SPBRG; 1182 extern __at(0x019B) __sfr SPBRGL; 1183 extern __at(0x019C) __sfr SPBRGH; 1184 1185 //============================================================================== 1186 // RCSTA Bits 1187 1188 extern __at(0x019D) __sfr RCSTA; 1189 1190 typedef struct 1191 { 1192 unsigned RX9D : 1; 1193 unsigned OERR : 1; 1194 unsigned FERR : 1; 1195 unsigned ADDEN : 1; 1196 unsigned CREN : 1; 1197 unsigned SREN : 1; 1198 unsigned RX9 : 1; 1199 unsigned SPEN : 1; 1200 } __RCSTAbits_t; 1201 1202 extern __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 1203 1204 #define _RX9D 0x01 1205 #define _OERR 0x02 1206 #define _FERR 0x04 1207 #define _ADDEN 0x08 1208 #define _CREN 0x10 1209 #define _SREN 0x20 1210 #define _RX9 0x40 1211 #define _SPEN 0x80 1212 1213 //============================================================================== 1214 1215 1216 //============================================================================== 1217 // TXSTA Bits 1218 1219 extern __at(0x019E) __sfr TXSTA; 1220 1221 typedef struct 1222 { 1223 unsigned TX9D : 1; 1224 unsigned TRMT : 1; 1225 unsigned BRGH : 1; 1226 unsigned SENDB : 1; 1227 unsigned SYNC : 1; 1228 unsigned TXEN : 1; 1229 unsigned TX9 : 1; 1230 unsigned CSRC : 1; 1231 } __TXSTAbits_t; 1232 1233 extern __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 1234 1235 #define _TX9D 0x01 1236 #define _TRMT 0x02 1237 #define _BRGH 0x04 1238 #define _SENDB 0x08 1239 #define _SYNC 0x10 1240 #define _TXEN 0x20 1241 #define _TX9 0x40 1242 #define _CSRC 0x80 1243 1244 //============================================================================== 1245 1246 1247 //============================================================================== 1248 // BAUDCON Bits 1249 1250 extern __at(0x019F) __sfr BAUDCON; 1251 1252 typedef struct 1253 { 1254 unsigned ABDEN : 1; 1255 unsigned WUE : 1; 1256 unsigned : 1; 1257 unsigned BRG16 : 1; 1258 unsigned SCKP : 1; 1259 unsigned : 1; 1260 unsigned RCIDL : 1; 1261 unsigned ABDOVF : 1; 1262 } __BAUDCONbits_t; 1263 1264 extern __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 1265 1266 #define _ABDEN 0x01 1267 #define _WUE 0x02 1268 #define _BRG16 0x08 1269 #define _SCKP 0x10 1270 #define _RCIDL 0x40 1271 #define _ABDOVF 0x80 1272 1273 //============================================================================== 1274 1275 1276 //============================================================================== 1277 // WPUA Bits 1278 1279 extern __at(0x020C) __sfr WPUA; 1280 1281 typedef struct 1282 { 1283 unsigned : 1; 1284 unsigned : 1; 1285 unsigned : 1; 1286 unsigned WPUA3 : 1; 1287 unsigned WPUA4 : 1; 1288 unsigned WPUA5 : 1; 1289 unsigned : 1; 1290 unsigned : 1; 1291 } __WPUAbits_t; 1292 1293 extern __at(0x020C) volatile __WPUAbits_t WPUAbits; 1294 1295 #define _WPUA3 0x08 1296 #define _WPUA4 0x10 1297 #define _WPUA5 0x20 1298 1299 //============================================================================== 1300 1301 extern __at(0x0211) __sfr SSP1BUF; 1302 extern __at(0x0211) __sfr SSPBUF; 1303 extern __at(0x0212) __sfr SSP1ADD; 1304 extern __at(0x0212) __sfr SSPADD; 1305 extern __at(0x0213) __sfr SSP1MSK; 1306 extern __at(0x0213) __sfr SSPMSK; 1307 1308 //============================================================================== 1309 // SSP1STAT Bits 1310 1311 extern __at(0x0214) __sfr SSP1STAT; 1312 1313 typedef struct 1314 { 1315 unsigned BF : 1; 1316 unsigned UA : 1; 1317 unsigned R_NOT_W : 1; 1318 unsigned S : 1; 1319 unsigned P : 1; 1320 unsigned D_NOT_A : 1; 1321 unsigned CKE : 1; 1322 unsigned SMP : 1; 1323 } __SSP1STATbits_t; 1324 1325 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 1326 1327 #define _BF 0x01 1328 #define _UA 0x02 1329 #define _R_NOT_W 0x04 1330 #define _S 0x08 1331 #define _P 0x10 1332 #define _D_NOT_A 0x20 1333 #define _CKE 0x40 1334 #define _SMP 0x80 1335 1336 //============================================================================== 1337 1338 1339 //============================================================================== 1340 // SSPSTAT Bits 1341 1342 extern __at(0x0214) __sfr SSPSTAT; 1343 1344 typedef struct 1345 { 1346 unsigned BF : 1; 1347 unsigned UA : 1; 1348 unsigned R_NOT_W : 1; 1349 unsigned S : 1; 1350 unsigned P : 1; 1351 unsigned D_NOT_A : 1; 1352 unsigned CKE : 1; 1353 unsigned SMP : 1; 1354 } __SSPSTATbits_t; 1355 1356 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 1357 1358 #define _SSPSTAT_BF 0x01 1359 #define _SSPSTAT_UA 0x02 1360 #define _SSPSTAT_R_NOT_W 0x04 1361 #define _SSPSTAT_S 0x08 1362 #define _SSPSTAT_P 0x10 1363 #define _SSPSTAT_D_NOT_A 0x20 1364 #define _SSPSTAT_CKE 0x40 1365 #define _SSPSTAT_SMP 0x80 1366 1367 //============================================================================== 1368 1369 1370 //============================================================================== 1371 // SSP1CON1 Bits 1372 1373 extern __at(0x0215) __sfr SSP1CON1; 1374 1375 typedef union 1376 { 1377 struct 1378 { 1379 unsigned SSP1M0 : 1; 1380 unsigned SSP1M1 : 1; 1381 unsigned SSP1M2 : 1; 1382 unsigned SSP1M3 : 1; 1383 unsigned CKP : 1; 1384 unsigned SSPEN : 1; 1385 unsigned SSPOV : 1; 1386 unsigned WCOL : 1; 1387 }; 1388 1389 struct 1390 { 1391 unsigned : 1; 1392 unsigned : 1; 1393 unsigned : 1; 1394 unsigned : 1; 1395 unsigned : 1; 1396 unsigned SSP1EN : 1; 1397 unsigned SSP1OV : 1; 1398 unsigned : 1; 1399 }; 1400 1401 struct 1402 { 1403 unsigned SSP1M : 4; 1404 unsigned : 4; 1405 }; 1406 } __SSP1CON1bits_t; 1407 1408 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 1409 1410 #define _SSP1M0 0x01 1411 #define _SSP1M1 0x02 1412 #define _SSP1M2 0x04 1413 #define _SSP1M3 0x08 1414 #define _CKP 0x10 1415 #define _SSPEN 0x20 1416 #define _SSP1EN 0x20 1417 #define _SSPOV 0x40 1418 #define _SSP1OV 0x40 1419 #define _WCOL 0x80 1420 1421 //============================================================================== 1422 1423 1424 //============================================================================== 1425 // SSPCON Bits 1426 1427 extern __at(0x0215) __sfr SSPCON; 1428 1429 typedef union 1430 { 1431 struct 1432 { 1433 unsigned SSP1M0 : 1; 1434 unsigned SSP1M1 : 1; 1435 unsigned SSP1M2 : 1; 1436 unsigned SSP1M3 : 1; 1437 unsigned CKP : 1; 1438 unsigned SSPEN : 1; 1439 unsigned SSPOV : 1; 1440 unsigned WCOL : 1; 1441 }; 1442 1443 struct 1444 { 1445 unsigned : 1; 1446 unsigned : 1; 1447 unsigned : 1; 1448 unsigned : 1; 1449 unsigned : 1; 1450 unsigned SSP1EN : 1; 1451 unsigned SSP1OV : 1; 1452 unsigned : 1; 1453 }; 1454 1455 struct 1456 { 1457 unsigned SSP1M : 4; 1458 unsigned : 4; 1459 }; 1460 } __SSPCONbits_t; 1461 1462 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 1463 1464 #define _SSPCON_SSP1M0 0x01 1465 #define _SSPCON_SSP1M1 0x02 1466 #define _SSPCON_SSP1M2 0x04 1467 #define _SSPCON_SSP1M3 0x08 1468 #define _SSPCON_CKP 0x10 1469 #define _SSPCON_SSPEN 0x20 1470 #define _SSPCON_SSP1EN 0x20 1471 #define _SSPCON_SSPOV 0x40 1472 #define _SSPCON_SSP1OV 0x40 1473 #define _SSPCON_WCOL 0x80 1474 1475 //============================================================================== 1476 1477 1478 //============================================================================== 1479 // SSPCON1 Bits 1480 1481 extern __at(0x0215) __sfr SSPCON1; 1482 1483 typedef union 1484 { 1485 struct 1486 { 1487 unsigned SSP1M0 : 1; 1488 unsigned SSP1M1 : 1; 1489 unsigned SSP1M2 : 1; 1490 unsigned SSP1M3 : 1; 1491 unsigned CKP : 1; 1492 unsigned SSPEN : 1; 1493 unsigned SSPOV : 1; 1494 unsigned WCOL : 1; 1495 }; 1496 1497 struct 1498 { 1499 unsigned : 1; 1500 unsigned : 1; 1501 unsigned : 1; 1502 unsigned : 1; 1503 unsigned : 1; 1504 unsigned SSP1EN : 1; 1505 unsigned SSP1OV : 1; 1506 unsigned : 1; 1507 }; 1508 1509 struct 1510 { 1511 unsigned SSP1M : 4; 1512 unsigned : 4; 1513 }; 1514 } __SSPCON1bits_t; 1515 1516 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 1517 1518 #define _SSPCON1_SSP1M0 0x01 1519 #define _SSPCON1_SSP1M1 0x02 1520 #define _SSPCON1_SSP1M2 0x04 1521 #define _SSPCON1_SSP1M3 0x08 1522 #define _SSPCON1_CKP 0x10 1523 #define _SSPCON1_SSPEN 0x20 1524 #define _SSPCON1_SSP1EN 0x20 1525 #define _SSPCON1_SSPOV 0x40 1526 #define _SSPCON1_SSP1OV 0x40 1527 #define _SSPCON1_WCOL 0x80 1528 1529 //============================================================================== 1530 1531 1532 //============================================================================== 1533 // SSP1CON2 Bits 1534 1535 extern __at(0x0216) __sfr SSP1CON2; 1536 1537 typedef struct 1538 { 1539 unsigned SEN : 1; 1540 unsigned RSEN : 1; 1541 unsigned PEN : 1; 1542 unsigned RCEN : 1; 1543 unsigned ACKEN : 1; 1544 unsigned ACKDT : 1; 1545 unsigned ACKSTAT : 1; 1546 unsigned GCEN : 1; 1547 } __SSP1CON2bits_t; 1548 1549 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 1550 1551 #define _SEN 0x01 1552 #define _RSEN 0x02 1553 #define _PEN 0x04 1554 #define _RCEN 0x08 1555 #define _ACKEN 0x10 1556 #define _ACKDT 0x20 1557 #define _ACKSTAT 0x40 1558 #define _GCEN 0x80 1559 1560 //============================================================================== 1561 1562 1563 //============================================================================== 1564 // SSPCON2 Bits 1565 1566 extern __at(0x0216) __sfr SSPCON2; 1567 1568 typedef struct 1569 { 1570 unsigned SEN : 1; 1571 unsigned RSEN : 1; 1572 unsigned PEN : 1; 1573 unsigned RCEN : 1; 1574 unsigned ACKEN : 1; 1575 unsigned ACKDT : 1; 1576 unsigned ACKSTAT : 1; 1577 unsigned GCEN : 1; 1578 } __SSPCON2bits_t; 1579 1580 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 1581 1582 #define _SSPCON2_SEN 0x01 1583 #define _SSPCON2_RSEN 0x02 1584 #define _SSPCON2_PEN 0x04 1585 #define _SSPCON2_RCEN 0x08 1586 #define _SSPCON2_ACKEN 0x10 1587 #define _SSPCON2_ACKDT 0x20 1588 #define _SSPCON2_ACKSTAT 0x40 1589 #define _SSPCON2_GCEN 0x80 1590 1591 //============================================================================== 1592 1593 1594 //============================================================================== 1595 // SSP1CON3 Bits 1596 1597 extern __at(0x0217) __sfr SSP1CON3; 1598 1599 typedef struct 1600 { 1601 unsigned DHEN : 1; 1602 unsigned AHEN : 1; 1603 unsigned SBCDE : 1; 1604 unsigned SDAHT : 1; 1605 unsigned BOEN : 1; 1606 unsigned SCIE : 1; 1607 unsigned PCIE : 1; 1608 unsigned ACKTIM : 1; 1609 } __SSP1CON3bits_t; 1610 1611 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 1612 1613 #define _DHEN 0x01 1614 #define _AHEN 0x02 1615 #define _SBCDE 0x04 1616 #define _SDAHT 0x08 1617 #define _BOEN 0x10 1618 #define _SCIE 0x20 1619 #define _PCIE 0x40 1620 #define _ACKTIM 0x80 1621 1622 //============================================================================== 1623 1624 1625 //============================================================================== 1626 // SSPCON3 Bits 1627 1628 extern __at(0x0217) __sfr SSPCON3; 1629 1630 typedef struct 1631 { 1632 unsigned DHEN : 1; 1633 unsigned AHEN : 1; 1634 unsigned SBCDE : 1; 1635 unsigned SDAHT : 1; 1636 unsigned BOEN : 1; 1637 unsigned SCIE : 1; 1638 unsigned PCIE : 1; 1639 unsigned ACKTIM : 1; 1640 } __SSPCON3bits_t; 1641 1642 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 1643 1644 #define _SSPCON3_DHEN 0x01 1645 #define _SSPCON3_AHEN 0x02 1646 #define _SSPCON3_SBCDE 0x04 1647 #define _SSPCON3_SDAHT 0x08 1648 #define _SSPCON3_BOEN 0x10 1649 #define _SSPCON3_SCIE 0x20 1650 #define _SSPCON3_PCIE 0x40 1651 #define _SSPCON3_ACKTIM 0x80 1652 1653 //============================================================================== 1654 1655 1656 //============================================================================== 1657 // IOCAP Bits 1658 1659 extern __at(0x0391) __sfr IOCAP; 1660 1661 typedef struct 1662 { 1663 unsigned IOCAP0 : 1; 1664 unsigned IOCAP1 : 1; 1665 unsigned : 1; 1666 unsigned IOCAP3 : 1; 1667 unsigned IOCAP4 : 1; 1668 unsigned IOCAP5 : 1; 1669 unsigned : 1; 1670 unsigned : 1; 1671 } __IOCAPbits_t; 1672 1673 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 1674 1675 #define _IOCAP0 0x01 1676 #define _IOCAP1 0x02 1677 #define _IOCAP3 0x08 1678 #define _IOCAP4 0x10 1679 #define _IOCAP5 0x20 1680 1681 //============================================================================== 1682 1683 1684 //============================================================================== 1685 // IOCAN Bits 1686 1687 extern __at(0x0392) __sfr IOCAN; 1688 1689 typedef struct 1690 { 1691 unsigned IOCAN0 : 1; 1692 unsigned IOCAN1 : 1; 1693 unsigned : 1; 1694 unsigned IOCAN3 : 1; 1695 unsigned IOCAN4 : 1; 1696 unsigned IOCAN5 : 1; 1697 unsigned : 1; 1698 unsigned : 1; 1699 } __IOCANbits_t; 1700 1701 extern __at(0x0392) volatile __IOCANbits_t IOCANbits; 1702 1703 #define _IOCAN0 0x01 1704 #define _IOCAN1 0x02 1705 #define _IOCAN3 0x08 1706 #define _IOCAN4 0x10 1707 #define _IOCAN5 0x20 1708 1709 //============================================================================== 1710 1711 1712 //============================================================================== 1713 // IOCAF Bits 1714 1715 extern __at(0x0393) __sfr IOCAF; 1716 1717 typedef struct 1718 { 1719 unsigned IOCAF0 : 1; 1720 unsigned IOCAF1 : 1; 1721 unsigned : 1; 1722 unsigned IOCAF3 : 1; 1723 unsigned IOCAF4 : 1; 1724 unsigned IOCAF5 : 1; 1725 unsigned : 1; 1726 unsigned : 1; 1727 } __IOCAFbits_t; 1728 1729 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 1730 1731 #define _IOCAF0 0x01 1732 #define _IOCAF1 0x02 1733 #define _IOCAF3 0x08 1734 #define _IOCAF4 0x10 1735 #define _IOCAF5 0x20 1736 1737 //============================================================================== 1738 1739 1740 //============================================================================== 1741 // CLKRCON Bits 1742 1743 extern __at(0x039A) __sfr CLKRCON; 1744 1745 typedef union 1746 { 1747 struct 1748 { 1749 unsigned CLKRDIV0 : 1; 1750 unsigned CLKRDIV1 : 1; 1751 unsigned CLKRDIV2 : 1; 1752 unsigned CLKRCD0 : 1; 1753 unsigned CLKRCD1 : 1; 1754 unsigned CLKRSLR : 1; 1755 unsigned CLKROE : 1; 1756 unsigned CLKREN : 1; 1757 }; 1758 1759 struct 1760 { 1761 unsigned CLKRDIV : 3; 1762 unsigned : 5; 1763 }; 1764 1765 struct 1766 { 1767 unsigned : 3; 1768 unsigned CLKRCD : 2; 1769 unsigned : 3; 1770 }; 1771 } __CLKRCONbits_t; 1772 1773 extern __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits; 1774 1775 #define _CLKRDIV0 0x01 1776 #define _CLKRDIV1 0x02 1777 #define _CLKRDIV2 0x04 1778 #define _CLKRCD0 0x08 1779 #define _CLKRCD1 0x10 1780 #define _CLKRSLR 0x20 1781 #define _CLKROE 0x40 1782 #define _CLKREN 0x80 1783 1784 //============================================================================== 1785 1786 1787 //============================================================================== 1788 // ACTCON Bits 1789 1790 extern __at(0x039B) __sfr ACTCON; 1791 1792 typedef struct 1793 { 1794 unsigned : 1; 1795 unsigned ACTORS : 1; 1796 unsigned : 1; 1797 unsigned ACTLOCK : 1; 1798 unsigned ACTSRC : 1; 1799 unsigned : 1; 1800 unsigned ACTUD : 1; 1801 unsigned ACTEN : 1; 1802 } __ACTCONbits_t; 1803 1804 extern __at(0x039B) volatile __ACTCONbits_t ACTCONbits; 1805 1806 #define _ACTORS 0x02 1807 #define _ACTLOCK 0x08 1808 #define _ACTSRC 0x10 1809 #define _ACTUD 0x40 1810 #define _ACTEN 0x80 1811 1812 //============================================================================== 1813 1814 1815 //============================================================================== 1816 // PWM1DCL Bits 1817 1818 extern __at(0x0611) __sfr PWM1DCL; 1819 1820 typedef union 1821 { 1822 struct 1823 { 1824 unsigned : 1; 1825 unsigned : 1; 1826 unsigned : 1; 1827 unsigned : 1; 1828 unsigned : 1; 1829 unsigned : 1; 1830 unsigned PWM1DCL0 : 1; 1831 unsigned PWM1DCL1 : 1; 1832 }; 1833 1834 struct 1835 { 1836 unsigned : 6; 1837 unsigned PWM1DCL : 2; 1838 }; 1839 } __PWM1DCLbits_t; 1840 1841 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits; 1842 1843 #define _PWM1DCL0 0x40 1844 #define _PWM1DCL1 0x80 1845 1846 //============================================================================== 1847 1848 1849 //============================================================================== 1850 // PWM1DCH Bits 1851 1852 extern __at(0x0612) __sfr PWM1DCH; 1853 1854 typedef struct 1855 { 1856 unsigned PWM1DCH0 : 1; 1857 unsigned PWM1DCH1 : 1; 1858 unsigned PWM1DCH2 : 1; 1859 unsigned PWM1DCH3 : 1; 1860 unsigned PWM1DCH4 : 1; 1861 unsigned PWM1DCH5 : 1; 1862 unsigned PWM1DCH6 : 1; 1863 unsigned PWM1DCH7 : 1; 1864 } __PWM1DCHbits_t; 1865 1866 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits; 1867 1868 #define _PWM1DCH0 0x01 1869 #define _PWM1DCH1 0x02 1870 #define _PWM1DCH2 0x04 1871 #define _PWM1DCH3 0x08 1872 #define _PWM1DCH4 0x10 1873 #define _PWM1DCH5 0x20 1874 #define _PWM1DCH6 0x40 1875 #define _PWM1DCH7 0x80 1876 1877 //============================================================================== 1878 1879 1880 //============================================================================== 1881 // PWM1CON Bits 1882 1883 extern __at(0x0613) __sfr PWM1CON; 1884 1885 typedef struct 1886 { 1887 unsigned : 1; 1888 unsigned : 1; 1889 unsigned : 1; 1890 unsigned : 1; 1891 unsigned PWM1POL : 1; 1892 unsigned PWM1OUT : 1; 1893 unsigned PWM1OE : 1; 1894 unsigned PWM1EN : 1; 1895 } __PWM1CONbits_t; 1896 1897 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits; 1898 1899 #define _PWM1POL 0x10 1900 #define _PWM1OUT 0x20 1901 #define _PWM1OE 0x40 1902 #define _PWM1EN 0x80 1903 1904 //============================================================================== 1905 1906 1907 //============================================================================== 1908 // PWM1CON0 Bits 1909 1910 extern __at(0x0613) __sfr PWM1CON0; 1911 1912 typedef struct 1913 { 1914 unsigned : 1; 1915 unsigned : 1; 1916 unsigned : 1; 1917 unsigned : 1; 1918 unsigned PWM1POL : 1; 1919 unsigned PWM1OUT : 1; 1920 unsigned PWM1OE : 1; 1921 unsigned PWM1EN : 1; 1922 } __PWM1CON0bits_t; 1923 1924 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits; 1925 1926 #define _PWM1CON0_PWM1POL 0x10 1927 #define _PWM1CON0_PWM1OUT 0x20 1928 #define _PWM1CON0_PWM1OE 0x40 1929 #define _PWM1CON0_PWM1EN 0x80 1930 1931 //============================================================================== 1932 1933 1934 //============================================================================== 1935 // PWM2DCL Bits 1936 1937 extern __at(0x0614) __sfr PWM2DCL; 1938 1939 typedef union 1940 { 1941 struct 1942 { 1943 unsigned : 1; 1944 unsigned : 1; 1945 unsigned : 1; 1946 unsigned : 1; 1947 unsigned : 1; 1948 unsigned : 1; 1949 unsigned PWM2DCL0 : 1; 1950 unsigned PWM2DCL1 : 1; 1951 }; 1952 1953 struct 1954 { 1955 unsigned : 6; 1956 unsigned PWM2DCL : 2; 1957 }; 1958 } __PWM2DCLbits_t; 1959 1960 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits; 1961 1962 #define _PWM2DCL0 0x40 1963 #define _PWM2DCL1 0x80 1964 1965 //============================================================================== 1966 1967 1968 //============================================================================== 1969 // PWM2DCH Bits 1970 1971 extern __at(0x0615) __sfr PWM2DCH; 1972 1973 typedef struct 1974 { 1975 unsigned PWM2DCH0 : 1; 1976 unsigned PWM2DCH1 : 1; 1977 unsigned PWM2DCH2 : 1; 1978 unsigned PWM2DCH3 : 1; 1979 unsigned PWM2DCH4 : 1; 1980 unsigned PWM2DCH5 : 1; 1981 unsigned PWM2DCH6 : 1; 1982 unsigned PWM2DCH7 : 1; 1983 } __PWM2DCHbits_t; 1984 1985 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits; 1986 1987 #define _PWM2DCH0 0x01 1988 #define _PWM2DCH1 0x02 1989 #define _PWM2DCH2 0x04 1990 #define _PWM2DCH3 0x08 1991 #define _PWM2DCH4 0x10 1992 #define _PWM2DCH5 0x20 1993 #define _PWM2DCH6 0x40 1994 #define _PWM2DCH7 0x80 1995 1996 //============================================================================== 1997 1998 1999 //============================================================================== 2000 // PWM2CON Bits 2001 2002 extern __at(0x0616) __sfr PWM2CON; 2003 2004 typedef struct 2005 { 2006 unsigned : 1; 2007 unsigned : 1; 2008 unsigned : 1; 2009 unsigned : 1; 2010 unsigned PWM2POL : 1; 2011 unsigned PWM2OUT : 1; 2012 unsigned PWM2OE : 1; 2013 unsigned PWM2EN : 1; 2014 } __PWM2CONbits_t; 2015 2016 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits; 2017 2018 #define _PWM2POL 0x10 2019 #define _PWM2OUT 0x20 2020 #define _PWM2OE 0x40 2021 #define _PWM2EN 0x80 2022 2023 //============================================================================== 2024 2025 2026 //============================================================================== 2027 // PWM2CON0 Bits 2028 2029 extern __at(0x0616) __sfr PWM2CON0; 2030 2031 typedef struct 2032 { 2033 unsigned : 1; 2034 unsigned : 1; 2035 unsigned : 1; 2036 unsigned : 1; 2037 unsigned PWM2POL : 1; 2038 unsigned PWM2OUT : 1; 2039 unsigned PWM2OE : 1; 2040 unsigned PWM2EN : 1; 2041 } __PWM2CON0bits_t; 2042 2043 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits; 2044 2045 #define _PWM2CON0_PWM2POL 0x10 2046 #define _PWM2CON0_PWM2OUT 0x20 2047 #define _PWM2CON0_PWM2OE 0x40 2048 #define _PWM2CON0_PWM2EN 0x80 2049 2050 //============================================================================== 2051 2052 2053 //============================================================================== 2054 // UCON Bits 2055 2056 extern __at(0x0E8E) __sfr UCON; 2057 2058 typedef struct 2059 { 2060 unsigned : 1; 2061 unsigned SUSPND : 1; 2062 unsigned RESUME : 1; 2063 unsigned USBEN : 1; 2064 unsigned PKTDIS : 1; 2065 unsigned SE0 : 1; 2066 unsigned PPBRST : 1; 2067 unsigned : 1; 2068 } __UCONbits_t; 2069 2070 extern __at(0x0E8E) volatile __UCONbits_t UCONbits; 2071 2072 #define _SUSPND 0x02 2073 #define _RESUME 0x04 2074 #define _USBEN 0x08 2075 #define _PKTDIS 0x10 2076 #define _SE0 0x20 2077 #define _PPBRST 0x40 2078 2079 //============================================================================== 2080 2081 2082 //============================================================================== 2083 // USTAT Bits 2084 2085 extern __at(0x0E8F) __sfr USTAT; 2086 2087 typedef union 2088 { 2089 struct 2090 { 2091 unsigned : 1; 2092 unsigned PPBI : 1; 2093 unsigned DIR : 1; 2094 unsigned ENDP0 : 1; 2095 unsigned ENDP1 : 1; 2096 unsigned ENDP2 : 1; 2097 unsigned ENDP3 : 1; 2098 unsigned : 1; 2099 }; 2100 2101 struct 2102 { 2103 unsigned : 3; 2104 unsigned ENDP : 4; 2105 unsigned : 1; 2106 }; 2107 } __USTATbits_t; 2108 2109 extern __at(0x0E8F) volatile __USTATbits_t USTATbits; 2110 2111 #define _PPBI 0x02 2112 #define _DIR 0x04 2113 #define _ENDP0 0x08 2114 #define _ENDP1 0x10 2115 #define _ENDP2 0x20 2116 #define _ENDP3 0x40 2117 2118 //============================================================================== 2119 2120 2121 //============================================================================== 2122 // UIR Bits 2123 2124 extern __at(0x0E90) __sfr UIR; 2125 2126 typedef struct 2127 { 2128 unsigned URSTIF : 1; 2129 unsigned UERRIF : 1; 2130 unsigned ACTVIF : 1; 2131 unsigned TRNIF : 1; 2132 unsigned IDLEIF : 1; 2133 unsigned STALLIF : 1; 2134 unsigned SOFIF : 1; 2135 unsigned : 1; 2136 } __UIRbits_t; 2137 2138 extern __at(0x0E90) volatile __UIRbits_t UIRbits; 2139 2140 #define _URSTIF 0x01 2141 #define _UERRIF 0x02 2142 #define _ACTVIF 0x04 2143 #define _TRNIF 0x08 2144 #define _IDLEIF 0x10 2145 #define _STALLIF 0x20 2146 #define _SOFIF 0x40 2147 2148 //============================================================================== 2149 2150 2151 //============================================================================== 2152 // UCFG Bits 2153 2154 extern __at(0x0E91) __sfr UCFG; 2155 2156 typedef union 2157 { 2158 struct 2159 { 2160 unsigned PPB0 : 1; 2161 unsigned PPB1 : 1; 2162 unsigned FSEN : 1; 2163 unsigned : 1; 2164 unsigned UPUEN : 1; 2165 unsigned : 1; 2166 unsigned : 1; 2167 unsigned UTEYE : 1; 2168 }; 2169 2170 struct 2171 { 2172 unsigned PPB : 2; 2173 unsigned : 6; 2174 }; 2175 } __UCFGbits_t; 2176 2177 extern __at(0x0E91) volatile __UCFGbits_t UCFGbits; 2178 2179 #define _PPB0 0x01 2180 #define _PPB1 0x02 2181 #define _FSEN 0x04 2182 #define _UPUEN 0x10 2183 #define _UTEYE 0x80 2184 2185 //============================================================================== 2186 2187 2188 //============================================================================== 2189 // UIE Bits 2190 2191 extern __at(0x0E92) __sfr UIE; 2192 2193 typedef struct 2194 { 2195 unsigned URSTIE : 1; 2196 unsigned UERRIE : 1; 2197 unsigned ACTVIE : 1; 2198 unsigned TRNIE : 1; 2199 unsigned IDLEIE : 1; 2200 unsigned STALLIE : 1; 2201 unsigned SOFIE : 1; 2202 unsigned : 1; 2203 } __UIEbits_t; 2204 2205 extern __at(0x0E92) volatile __UIEbits_t UIEbits; 2206 2207 #define _URSTIE 0x01 2208 #define _UERRIE 0x02 2209 #define _ACTVIE 0x04 2210 #define _TRNIE 0x08 2211 #define _IDLEIE 0x10 2212 #define _STALLIE 0x20 2213 #define _SOFIE 0x40 2214 2215 //============================================================================== 2216 2217 2218 //============================================================================== 2219 // UEIR Bits 2220 2221 extern __at(0x0E93) __sfr UEIR; 2222 2223 typedef struct 2224 { 2225 unsigned PIDEF : 1; 2226 unsigned CRC5EF : 1; 2227 unsigned CRC16EF : 1; 2228 unsigned DFN8EF : 1; 2229 unsigned BTOEF : 1; 2230 unsigned : 1; 2231 unsigned : 1; 2232 unsigned BTSEF : 1; 2233 } __UEIRbits_t; 2234 2235 extern __at(0x0E93) volatile __UEIRbits_t UEIRbits; 2236 2237 #define _PIDEF 0x01 2238 #define _CRC5EF 0x02 2239 #define _CRC16EF 0x04 2240 #define _DFN8EF 0x08 2241 #define _BTOEF 0x10 2242 #define _BTSEF 0x80 2243 2244 //============================================================================== 2245 2246 extern __at(0x0E94) __sfr UFRM; 2247 2248 //============================================================================== 2249 // UFRMH Bits 2250 2251 extern __at(0x0E94) __sfr UFRMH; 2252 2253 typedef struct 2254 { 2255 unsigned FRM8 : 1; 2256 unsigned FRM9 : 1; 2257 unsigned FRM10 : 1; 2258 unsigned : 1; 2259 unsigned : 1; 2260 unsigned : 1; 2261 unsigned : 1; 2262 unsigned : 1; 2263 } __UFRMHbits_t; 2264 2265 extern __at(0x0E94) volatile __UFRMHbits_t UFRMHbits; 2266 2267 #define _FRM8 0x01 2268 #define _FRM9 0x02 2269 #define _FRM10 0x04 2270 2271 //============================================================================== 2272 2273 2274 //============================================================================== 2275 // UFRML Bits 2276 2277 extern __at(0x0E95) __sfr UFRML; 2278 2279 typedef struct 2280 { 2281 unsigned FRM0 : 1; 2282 unsigned FRM1 : 1; 2283 unsigned FRM2 : 1; 2284 unsigned FRM3 : 1; 2285 unsigned FRM4 : 1; 2286 unsigned FRM5 : 1; 2287 unsigned FRM6 : 1; 2288 unsigned FRM7 : 1; 2289 } __UFRMLbits_t; 2290 2291 extern __at(0x0E95) volatile __UFRMLbits_t UFRMLbits; 2292 2293 #define _FRM0 0x01 2294 #define _FRM1 0x02 2295 #define _FRM2 0x04 2296 #define _FRM3 0x08 2297 #define _FRM4 0x10 2298 #define _FRM5 0x20 2299 #define _FRM6 0x40 2300 #define _FRM7 0x80 2301 2302 //============================================================================== 2303 2304 2305 //============================================================================== 2306 // UADDR Bits 2307 2308 extern __at(0x0E96) __sfr UADDR; 2309 2310 typedef union 2311 { 2312 struct 2313 { 2314 unsigned ADDR0 : 1; 2315 unsigned ADDR1 : 1; 2316 unsigned ADDR2 : 1; 2317 unsigned ADDR3 : 1; 2318 unsigned ADDR4 : 1; 2319 unsigned ADDR5 : 1; 2320 unsigned ADDR6 : 1; 2321 unsigned : 1; 2322 }; 2323 2324 struct 2325 { 2326 unsigned ADDR : 7; 2327 unsigned : 1; 2328 }; 2329 } __UADDRbits_t; 2330 2331 extern __at(0x0E96) volatile __UADDRbits_t UADDRbits; 2332 2333 #define _ADDR0 0x01 2334 #define _ADDR1 0x02 2335 #define _ADDR2 0x04 2336 #define _ADDR3 0x08 2337 #define _ADDR4 0x10 2338 #define _ADDR5 0x20 2339 #define _ADDR6 0x40 2340 2341 //============================================================================== 2342 2343 2344 //============================================================================== 2345 // UEIE Bits 2346 2347 extern __at(0x0E97) __sfr UEIE; 2348 2349 typedef struct 2350 { 2351 unsigned PIDEE : 1; 2352 unsigned CRC5EE : 1; 2353 unsigned CRC16EE : 1; 2354 unsigned DFN8EE : 1; 2355 unsigned BTOEE : 1; 2356 unsigned : 1; 2357 unsigned : 1; 2358 unsigned BTSEE : 1; 2359 } __UEIEbits_t; 2360 2361 extern __at(0x0E97) volatile __UEIEbits_t UEIEbits; 2362 2363 #define _PIDEE 0x01 2364 #define _CRC5EE 0x02 2365 #define _CRC16EE 0x04 2366 #define _DFN8EE 0x08 2367 #define _BTOEE 0x10 2368 #define _BTSEE 0x80 2369 2370 //============================================================================== 2371 2372 2373 //============================================================================== 2374 // UEP0 Bits 2375 2376 extern __at(0x0E98) __sfr UEP0; 2377 2378 typedef struct 2379 { 2380 unsigned EPSTALL : 1; 2381 unsigned EPINEN : 1; 2382 unsigned EPOUTEN : 1; 2383 unsigned EPCONDIS : 1; 2384 unsigned EPHSHK : 1; 2385 unsigned : 1; 2386 unsigned : 1; 2387 unsigned : 1; 2388 } __UEP0bits_t; 2389 2390 extern __at(0x0E98) volatile __UEP0bits_t UEP0bits; 2391 2392 #define _EPSTALL 0x01 2393 #define _EPINEN 0x02 2394 #define _EPOUTEN 0x04 2395 #define _EPCONDIS 0x08 2396 #define _EPHSHK 0x10 2397 2398 //============================================================================== 2399 2400 2401 //============================================================================== 2402 // UEP1 Bits 2403 2404 extern __at(0x0E99) __sfr UEP1; 2405 2406 typedef struct 2407 { 2408 unsigned EPSTALL : 1; 2409 unsigned EPINEN : 1; 2410 unsigned EPOUTEN : 1; 2411 unsigned EPCONDIS : 1; 2412 unsigned EPHSHK : 1; 2413 unsigned : 1; 2414 unsigned : 1; 2415 unsigned : 1; 2416 } __UEP1bits_t; 2417 2418 extern __at(0x0E99) volatile __UEP1bits_t UEP1bits; 2419 2420 #define _UEP1_EPSTALL 0x01 2421 #define _UEP1_EPINEN 0x02 2422 #define _UEP1_EPOUTEN 0x04 2423 #define _UEP1_EPCONDIS 0x08 2424 #define _UEP1_EPHSHK 0x10 2425 2426 //============================================================================== 2427 2428 2429 //============================================================================== 2430 // UEP2 Bits 2431 2432 extern __at(0x0E9A) __sfr UEP2; 2433 2434 typedef struct 2435 { 2436 unsigned EPSTALL : 1; 2437 unsigned EPINEN : 1; 2438 unsigned EPOUTEN : 1; 2439 unsigned EPCONDIS : 1; 2440 unsigned EPHSHK : 1; 2441 unsigned : 1; 2442 unsigned : 1; 2443 unsigned : 1; 2444 } __UEP2bits_t; 2445 2446 extern __at(0x0E9A) volatile __UEP2bits_t UEP2bits; 2447 2448 #define _UEP2_EPSTALL 0x01 2449 #define _UEP2_EPINEN 0x02 2450 #define _UEP2_EPOUTEN 0x04 2451 #define _UEP2_EPCONDIS 0x08 2452 #define _UEP2_EPHSHK 0x10 2453 2454 //============================================================================== 2455 2456 2457 //============================================================================== 2458 // UEP3 Bits 2459 2460 extern __at(0x0E9B) __sfr UEP3; 2461 2462 typedef struct 2463 { 2464 unsigned EPSTALL : 1; 2465 unsigned EPINEN : 1; 2466 unsigned EPOUTEN : 1; 2467 unsigned EPCONDIS : 1; 2468 unsigned EPHSHK : 1; 2469 unsigned : 1; 2470 unsigned : 1; 2471 unsigned : 1; 2472 } __UEP3bits_t; 2473 2474 extern __at(0x0E9B) volatile __UEP3bits_t UEP3bits; 2475 2476 #define _UEP3_EPSTALL 0x01 2477 #define _UEP3_EPINEN 0x02 2478 #define _UEP3_EPOUTEN 0x04 2479 #define _UEP3_EPCONDIS 0x08 2480 #define _UEP3_EPHSHK 0x10 2481 2482 //============================================================================== 2483 2484 2485 //============================================================================== 2486 // UEP4 Bits 2487 2488 extern __at(0x0E9C) __sfr UEP4; 2489 2490 typedef struct 2491 { 2492 unsigned EPSTALL : 1; 2493 unsigned EPINEN : 1; 2494 unsigned EPOUTEN : 1; 2495 unsigned EPCONDIS : 1; 2496 unsigned EPHSHK : 1; 2497 unsigned : 1; 2498 unsigned : 1; 2499 unsigned : 1; 2500 } __UEP4bits_t; 2501 2502 extern __at(0x0E9C) volatile __UEP4bits_t UEP4bits; 2503 2504 #define _UEP4_EPSTALL 0x01 2505 #define _UEP4_EPINEN 0x02 2506 #define _UEP4_EPOUTEN 0x04 2507 #define _UEP4_EPCONDIS 0x08 2508 #define _UEP4_EPHSHK 0x10 2509 2510 //============================================================================== 2511 2512 2513 //============================================================================== 2514 // UEP5 Bits 2515 2516 extern __at(0x0E9D) __sfr UEP5; 2517 2518 typedef struct 2519 { 2520 unsigned EPSTALL : 1; 2521 unsigned EPINEN : 1; 2522 unsigned EPOUTEN : 1; 2523 unsigned EPCONDIS : 1; 2524 unsigned EPHSHK : 1; 2525 unsigned : 1; 2526 unsigned : 1; 2527 unsigned : 1; 2528 } __UEP5bits_t; 2529 2530 extern __at(0x0E9D) volatile __UEP5bits_t UEP5bits; 2531 2532 #define _UEP5_EPSTALL 0x01 2533 #define _UEP5_EPINEN 0x02 2534 #define _UEP5_EPOUTEN 0x04 2535 #define _UEP5_EPCONDIS 0x08 2536 #define _UEP5_EPHSHK 0x10 2537 2538 //============================================================================== 2539 2540 2541 //============================================================================== 2542 // UEP6 Bits 2543 2544 extern __at(0x0E9E) __sfr UEP6; 2545 2546 typedef struct 2547 { 2548 unsigned EPSTALL : 1; 2549 unsigned EPINEN : 1; 2550 unsigned EPOUTEN : 1; 2551 unsigned EPCONDIS : 1; 2552 unsigned EPHSHK : 1; 2553 unsigned : 1; 2554 unsigned : 1; 2555 unsigned : 1; 2556 } __UEP6bits_t; 2557 2558 extern __at(0x0E9E) volatile __UEP6bits_t UEP6bits; 2559 2560 #define _UEP6_EPSTALL 0x01 2561 #define _UEP6_EPINEN 0x02 2562 #define _UEP6_EPOUTEN 0x04 2563 #define _UEP6_EPCONDIS 0x08 2564 #define _UEP6_EPHSHK 0x10 2565 2566 //============================================================================== 2567 2568 2569 //============================================================================== 2570 // UEP7 Bits 2571 2572 extern __at(0x0E9F) __sfr UEP7; 2573 2574 typedef struct 2575 { 2576 unsigned EPSTALL : 1; 2577 unsigned EPINEN : 1; 2578 unsigned EPOUTEN : 1; 2579 unsigned EPCONDIS : 1; 2580 unsigned EPHSHK : 1; 2581 unsigned : 1; 2582 unsigned : 1; 2583 unsigned : 1; 2584 } __UEP7bits_t; 2585 2586 extern __at(0x0E9F) volatile __UEP7bits_t UEP7bits; 2587 2588 #define _UEP7_EPSTALL 0x01 2589 #define _UEP7_EPINEN 0x02 2590 #define _UEP7_EPOUTEN 0x04 2591 #define _UEP7_EPCONDIS 0x08 2592 #define _UEP7_EPHSHK 0x10 2593 2594 //============================================================================== 2595 2596 2597 //============================================================================== 2598 // STATUS_SHAD Bits 2599 2600 extern __at(0x0FE4) __sfr STATUS_SHAD; 2601 2602 typedef struct 2603 { 2604 unsigned C : 1; 2605 unsigned DC : 1; 2606 unsigned Z : 1; 2607 unsigned : 1; 2608 unsigned : 1; 2609 unsigned : 1; 2610 unsigned : 1; 2611 unsigned : 1; 2612 } __STATUS_SHADbits_t; 2613 2614 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 2615 2616 #define _STATUS_SHAD_C 0x01 2617 #define _STATUS_SHAD_DC 0x02 2618 #define _STATUS_SHAD_Z 0x04 2619 2620 //============================================================================== 2621 2622 extern __at(0x0FE5) __sfr WREG_SHAD; 2623 extern __at(0x0FE6) __sfr BSR_SHAD; 2624 extern __at(0x0FE7) __sfr PCLATH_SHAD; 2625 extern __at(0x0FE8) __sfr FSR0L_SHAD; 2626 extern __at(0x0FE9) __sfr FSR0H_SHAD; 2627 extern __at(0x0FEA) __sfr FSR1L_SHAD; 2628 extern __at(0x0FEB) __sfr FSR1H_SHAD; 2629 extern __at(0x0FED) __sfr STKPTR; 2630 extern __at(0x0FEE) __sfr TOSL; 2631 extern __at(0x0FEF) __sfr TOSH; 2632 2633 //============================================================================== 2634 // 2635 // Configuration Bits 2636 // 2637 //============================================================================== 2638 2639 #define _CONFIG1 0x8007 2640 #define _CONFIG2 0x8008 2641 2642 //----------------------------- CONFIG1 Options ------------------------------- 2643 2644 #define _FOSC_LP 0x3FF8 // LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins. 2645 #define _FOSC_XT 0x3FF9 // XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins. 2646 #define _FOSC_HS 0x3FFA // HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins. 2647 #define _FOSC_EXTRC 0x3FFB // EXTRC oscillator: External RC circuit connected to CLKIN pin. 2648 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin. 2649 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pins. 2650 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pins. 2651 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pins. 2652 #define _WDTE_OFF 0x3FE7 // WDT disabled. 2653 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register. 2654 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep. 2655 #define _WDTE_ON 0x3FFF // WDT enabled. 2656 #define _PWRTE_ON 0x3FDF // PWRT enabled. 2657 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 2658 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input. 2659 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR. 2660 #define _CP_ON 0x3F7F // Program memory code protection is enabled. 2661 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 2662 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled. 2663 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register. 2664 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep. 2665 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled. 2666 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin. 2667 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin. 2668 #define _IESO_OFF 0x2FFF // Internal/External Switchover Mode is disabled. 2669 #define _IESO_ON 0x3FFF // Internal/External Switchover Mode is enabled. 2670 #define _FCMEN_OFF 0x1FFF // Fail-Safe Clock Monitor is disabled. 2671 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor is enabled. 2672 2673 //----------------------------- CONFIG2 Options ------------------------------- 2674 2675 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by PMCON control. 2676 #define _WRT_HALF 0x3FFD // 000h to 0FFFh write protected, 1000h to 1FFFh may be modified by PMCON control. 2677 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by PMCON control. 2678 #define _WRT_OFF 0x3FFF // Write protection off. 2679 #define _CPUDIV_NOCLKDIV 0x3FCF // NO CPU system divide. 2680 #define _CPUDIV_CLKDIV2 0x3FDF // CPU system clock divided by 2. 2681 #define _CPUDIV_CLKDIV3 0x3FEF // CPU system clock divided by 3. 2682 #define _CPUDIV_CLKDIV6 0x3FFF // CPU system clock divided by 6. 2683 #define _USBLSCLK_24MHz 0x3FBF // System clock expects 24 MHz, FS/LS USB CLKENs divide-by is set to 4. 2684 #define _USBLSCLK_48MHz 0x3FFF // System clock expects 48 MHz, FS/LS USB CLKENs divide-by is set to 8. 2685 #define _PLLMULT_4x 0x3F7F // 4x Output Frequency Selected. 2686 #define _PLLMULT_3x 0x3FFF // 3x Output Frequency Selected. 2687 #define _PLLEN_DISABLED 0x3EFF // 3x or 4x PLL Disabled. 2688 #define _PLLEN_ENABLED 0x3FFF // 3x or 4x PLL Enabled. 2689 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset. 2690 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset. 2691 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected. 2692 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 2693 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled. 2694 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled. 2695 #define _DEBUG_ON 0x2FFF // In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger. 2696 #define _DEBUG_OFF 0x3FFF // In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins. 2697 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming. 2698 #define _LVP_ON 0x3FFF // Low-voltage programming enabled. 2699 2700 //============================================================================== 2701 2702 #define _DEVID1 0x8006 2703 2704 #define _IDLOC0 0x8000 2705 #define _IDLOC1 0x8001 2706 #define _IDLOC2 0x8002 2707 #define _IDLOC3 0x8003 2708 2709 //============================================================================== 2710 2711 #ifndef NO_BIT_DEFINES 2712 2713 #define ACTORS ACTCONbits.ACTORS // bit 1 2714 #define ACTLOCK ACTCONbits.ACTLOCK // bit 3 2715 #define ACTSRC ACTCONbits.ACTSRC // bit 4 2716 #define ACTUD ACTCONbits.ACTUD // bit 6 2717 #define ACTEN ACTCONbits.ACTEN // bit 7 2718 2719 #define ANSA4 ANSELAbits.ANSA4 // bit 5 2720 2721 #define ANSC0 ANSELCbits.ANSC0 // bit 0 2722 #define ANSC1 ANSELCbits.ANSC1 // bit 1 2723 #define ANSC2 ANSELCbits.ANSC2 // bit 2 2724 #define ANSC3 ANSELCbits.ANSC3 // bit 3 2725 2726 #define P2SEL APFCONbits.P2SEL // bit 2 2727 #define T1GSEL APFCONbits.T1GSEL // bit 3 2728 #define SSSEL APFCONbits.SSSEL // bit 5 2729 #define SDOSEL APFCONbits.SDOSEL // bit 6 2730 #define CLKRSEL APFCONbits.CLKRSEL // bit 7 2731 2732 #define ABDEN BAUDCONbits.ABDEN // bit 0 2733 #define WUE BAUDCONbits.WUE // bit 1 2734 #define BRG16 BAUDCONbits.BRG16 // bit 3 2735 #define SCKP BAUDCONbits.SCKP // bit 4 2736 #define RCIDL BAUDCONbits.RCIDL // bit 6 2737 #define ABDOVF BAUDCONbits.ABDOVF // bit 7 2738 2739 #define BORRDY BORCONbits.BORRDY // bit 0 2740 #define BORFS BORCONbits.BORFS // bit 6 2741 #define SBOREN BORCONbits.SBOREN // bit 7 2742 2743 #define BSR0 BSRbits.BSR0 // bit 0 2744 #define BSR1 BSRbits.BSR1 // bit 1 2745 #define BSR2 BSRbits.BSR2 // bit 2 2746 #define BSR3 BSRbits.BSR3 // bit 3 2747 #define BSR4 BSRbits.BSR4 // bit 4 2748 2749 #define CLKRDIV0 CLKRCONbits.CLKRDIV0 // bit 0 2750 #define CLKRDIV1 CLKRCONbits.CLKRDIV1 // bit 1 2751 #define CLKRDIV2 CLKRCONbits.CLKRDIV2 // bit 2 2752 #define CLKRCD0 CLKRCONbits.CLKRCD0 // bit 3 2753 #define CLKRCD1 CLKRCONbits.CLKRCD1 // bit 4 2754 #define CLKRSLR CLKRCONbits.CLKRSLR // bit 5 2755 #define CLKROE CLKRCONbits.CLKROE // bit 6 2756 #define CLKREN CLKRCONbits.CLKREN // bit 7 2757 2758 #define FVRRDY FVRCONbits.FVRRDY // bit 6 2759 #define FVREN FVRCONbits.FVREN // bit 7 2760 2761 #define IOCIF INTCONbits.IOCIF // bit 0 2762 #define INTF INTCONbits.INTF // bit 1 2763 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 2764 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 2765 #define IOCIE INTCONbits.IOCIE // bit 3 2766 #define INTE INTCONbits.INTE // bit 4 2767 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 2768 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 2769 #define PEIE INTCONbits.PEIE // bit 6 2770 #define GIE INTCONbits.GIE // bit 7 2771 2772 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0 2773 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1 2774 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3 2775 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4 2776 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5 2777 2778 #define IOCAN0 IOCANbits.IOCAN0 // bit 0 2779 #define IOCAN1 IOCANbits.IOCAN1 // bit 1 2780 #define IOCAN3 IOCANbits.IOCAN3 // bit 3 2781 #define IOCAN4 IOCANbits.IOCAN4 // bit 4 2782 #define IOCAN5 IOCANbits.IOCAN5 // bit 5 2783 2784 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0 2785 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1 2786 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3 2787 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4 2788 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5 2789 2790 #define LATA4 LATAbits.LATA4 // bit 4 2791 #define LATA5 LATAbits.LATA5 // bit 5 2792 2793 #define LATC0 LATCbits.LATC0 // bit 0 2794 #define LATC1 LATCbits.LATC1 // bit 1 2795 #define LATC2 LATCbits.LATC2 // bit 2 2796 #define LATC3 LATCbits.LATC3 // bit 3 2797 #define LATC4 LATCbits.LATC4 // bit 4 2798 #define LATC5 LATCbits.LATC5 // bit 5 2799 2800 #define PS0 OPTION_REGbits.PS0 // bit 0 2801 #define PS1 OPTION_REGbits.PS1 // bit 1 2802 #define PS2 OPTION_REGbits.PS2 // bit 2 2803 #define PSA OPTION_REGbits.PSA // bit 3 2804 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits 2805 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits 2806 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits 2807 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits 2808 #define INTEDG OPTION_REGbits.INTEDG // bit 6 2809 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7 2810 2811 #define SCS0 OSCCONbits.SCS0 // bit 0 2812 #define SCS1 OSCCONbits.SCS1 // bit 1 2813 #define IRCF0 OSCCONbits.IRCF0 // bit 2 2814 #define IRCF1 OSCCONbits.IRCF1 // bit 3 2815 #define IRCF2 OSCCONbits.IRCF2 // bit 4 2816 #define IRCF3 OSCCONbits.IRCF3 // bit 5 2817 #define SPLLMULT OSCCONbits.SPLLMULT // bit 6 2818 #define SPLLEN OSCCONbits.SPLLEN // bit 7 2819 2820 #define HFIOFS OSCSTATbits.HFIOFS // bit 0 2821 #define LFIOFR OSCSTATbits.LFIOFR // bit 1 2822 #define HFIOFR OSCSTATbits.HFIOFR // bit 4 2823 #define OSTS OSCSTATbits.OSTS // bit 5 2824 #define PLLRDY OSCSTATbits.PLLRDY // bit 6 2825 #define SOSCR OSCSTATbits.SOSCR // bit 7 2826 2827 #define TUN0 OSCTUNEbits.TUN0 // bit 0 2828 #define TUN1 OSCTUNEbits.TUN1 // bit 1 2829 #define TUN2 OSCTUNEbits.TUN2 // bit 2 2830 #define TUN3 OSCTUNEbits.TUN3 // bit 3 2831 #define TUN4 OSCTUNEbits.TUN4 // bit 4 2832 #define TUN5 OSCTUNEbits.TUN5 // bit 5 2833 #define TUN6 OSCTUNEbits.TUN6 // bit 6 2834 2835 #define NOT_BOR PCONbits.NOT_BOR // bit 0 2836 #define NOT_POR PCONbits.NOT_POR // bit 1 2837 #define NOT_RI PCONbits.NOT_RI // bit 2 2838 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3 2839 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4 2840 #define STKUNF PCONbits.STKUNF // bit 6 2841 #define STKOVF PCONbits.STKOVF // bit 7 2842 2843 #define TMR1IE PIE1bits.TMR1IE // bit 0 2844 #define TMR2IE PIE1bits.TMR2IE // bit 1 2845 #define SSP1IE PIE1bits.SSP1IE // bit 3 2846 #define TXIE PIE1bits.TXIE // bit 4 2847 #define RCIE PIE1bits.RCIE // bit 5 2848 #define TMR1GIE PIE1bits.TMR1GIE // bit 7 2849 2850 #define ACTIE PIE2bits.ACTIE // bit 1 2851 #define USBIE PIE2bits.USBIE // bit 2 2852 #define BCL1IE PIE2bits.BCL1IE // bit 3 2853 #define OSFIE PIE2bits.OSFIE // bit 7 2854 2855 #define TMR1IF PIR1bits.TMR1IF // bit 0 2856 #define TMR2IF PIR1bits.TMR2IF // bit 1 2857 #define SSP1IF PIR1bits.SSP1IF // bit 3 2858 #define TXIF PIR1bits.TXIF // bit 4 2859 #define RCIF PIR1bits.RCIF // bit 5 2860 #define TMR1GIF PIR1bits.TMR1GIF // bit 7 2861 2862 #define ACTIF PIR2bits.ACTIF // bit 1 2863 #define USBIF PIR2bits.USBIF // bit 2 2864 #define BCL1IF PIR2bits.BCL1IF // bit 3 2865 #define OSFIF PIR2bits.OSFIF // bit 7 2866 2867 #define RD PMCON1bits.RD // bit 0 2868 #define WR PMCON1bits.WR // bit 1 2869 #define WREN PMCON1bits.WREN // bit 2 2870 #define WRERR PMCON1bits.WRERR // bit 3 2871 #define FREE PMCON1bits.FREE // bit 4 2872 #define LWLO PMCON1bits.LWLO // bit 5 2873 #define CFGS PMCON1bits.CFGS // bit 6 2874 2875 #define RA0 PORTAbits.RA0 // bit 0 2876 #define RA1 PORTAbits.RA1 // bit 1 2877 #define RA3 PORTAbits.RA3 // bit 3 2878 #define RA4 PORTAbits.RA4 // bit 4 2879 #define RA5 PORTAbits.RA5 // bit 5 2880 2881 #define RC0 PORTCbits.RC0 // bit 0 2882 #define RC1 PORTCbits.RC1 // bit 1 2883 #define RC2 PORTCbits.RC2 // bit 2 2884 #define RC3 PORTCbits.RC3 // bit 3 2885 #define RC4 PORTCbits.RC4 // bit 4 2886 #define RC5 PORTCbits.RC5 // bit 5 2887 2888 #define PWM1POL PWM1CONbits.PWM1POL // bit 4 2889 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5 2890 #define PWM1OE PWM1CONbits.PWM1OE // bit 6 2891 #define PWM1EN PWM1CONbits.PWM1EN // bit 7 2892 2893 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0 2894 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1 2895 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2 2896 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3 2897 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4 2898 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5 2899 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6 2900 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7 2901 2902 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6 2903 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7 2904 2905 #define PWM2POL PWM2CONbits.PWM2POL // bit 4 2906 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5 2907 #define PWM2OE PWM2CONbits.PWM2OE // bit 6 2908 #define PWM2EN PWM2CONbits.PWM2EN // bit 7 2909 2910 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0 2911 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1 2912 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2 2913 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3 2914 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4 2915 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5 2916 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6 2917 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7 2918 2919 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6 2920 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7 2921 2922 #define RX9D RCSTAbits.RX9D // bit 0 2923 #define OERR RCSTAbits.OERR // bit 1 2924 #define FERR RCSTAbits.FERR // bit 2 2925 #define ADDEN RCSTAbits.ADDEN // bit 3 2926 #define CREN RCSTAbits.CREN // bit 4 2927 #define SREN RCSTAbits.SREN // bit 5 2928 #define RX9 RCSTAbits.RX9 // bit 6 2929 #define SPEN RCSTAbits.SPEN // bit 7 2930 2931 #define SSP1M0 SSP1CON1bits.SSP1M0 // bit 0 2932 #define SSP1M1 SSP1CON1bits.SSP1M1 // bit 1 2933 #define SSP1M2 SSP1CON1bits.SSP1M2 // bit 2 2934 #define SSP1M3 SSP1CON1bits.SSP1M3 // bit 3 2935 #define CKP SSP1CON1bits.CKP // bit 4 2936 #define SSPEN SSP1CON1bits.SSPEN // bit 5, shadows bit in SSP1CON1bits 2937 #define SSP1EN SSP1CON1bits.SSP1EN // bit 5, shadows bit in SSP1CON1bits 2938 #define SSPOV SSP1CON1bits.SSPOV // bit 6, shadows bit in SSP1CON1bits 2939 #define SSP1OV SSP1CON1bits.SSP1OV // bit 6, shadows bit in SSP1CON1bits 2940 #define WCOL SSP1CON1bits.WCOL // bit 7 2941 2942 #define SEN SSP1CON2bits.SEN // bit 0 2943 #define RSEN SSP1CON2bits.RSEN // bit 1 2944 #define PEN SSP1CON2bits.PEN // bit 2 2945 #define RCEN SSP1CON2bits.RCEN // bit 3 2946 #define ACKEN SSP1CON2bits.ACKEN // bit 4 2947 #define ACKDT SSP1CON2bits.ACKDT // bit 5 2948 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6 2949 #define GCEN SSP1CON2bits.GCEN // bit 7 2950 2951 #define DHEN SSP1CON3bits.DHEN // bit 0 2952 #define AHEN SSP1CON3bits.AHEN // bit 1 2953 #define SBCDE SSP1CON3bits.SBCDE // bit 2 2954 #define SDAHT SSP1CON3bits.SDAHT // bit 3 2955 #define BOEN SSP1CON3bits.BOEN // bit 4 2956 #define SCIE SSP1CON3bits.SCIE // bit 5 2957 #define PCIE SSP1CON3bits.PCIE // bit 6 2958 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7 2959 2960 #define BF SSP1STATbits.BF // bit 0 2961 #define UA SSP1STATbits.UA // bit 1 2962 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2 2963 #define S SSP1STATbits.S // bit 3 2964 #define P SSP1STATbits.P // bit 4 2965 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5 2966 #define CKE SSP1STATbits.CKE // bit 6 2967 #define SMP SSP1STATbits.SMP // bit 7 2968 2969 #define C STATUSbits.C // bit 0 2970 #define DC STATUSbits.DC // bit 1 2971 #define Z STATUSbits.Z // bit 2 2972 #define NOT_PD STATUSbits.NOT_PD // bit 3 2973 #define NOT_TO STATUSbits.NOT_TO // bit 4 2974 2975 #define TMR1ON T1CONbits.TMR1ON // bit 0 2976 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 2977 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 2978 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 2979 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 2980 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6 2981 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7 2982 2983 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0 2984 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1 2985 #define T1GVAL T1GCONbits.T1GVAL // bit 2 2986 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3 2987 #define T1GSPM T1GCONbits.T1GSPM // bit 4 2988 #define T1GTM T1GCONbits.T1GTM // bit 5 2989 #define T1GPOL T1GCONbits.T1GPOL // bit 6 2990 #define TMR1GE T1GCONbits.TMR1GE // bit 7 2991 2992 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 2993 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 2994 #define TMR2ON T2CONbits.TMR2ON // bit 2 2995 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3 2996 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4 2997 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5 2998 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6 2999 3000 #define TRISA4 TRISAbits.TRISA4 // bit 4 3001 #define TRISA5 TRISAbits.TRISA5 // bit 5 3002 3003 #define TRISC0 TRISCbits.TRISC0 // bit 0 3004 #define TRISC1 TRISCbits.TRISC1 // bit 1 3005 #define TRISC2 TRISCbits.TRISC2 // bit 2 3006 #define TRISC3 TRISCbits.TRISC3 // bit 3 3007 #define TRISC4 TRISCbits.TRISC4 // bit 4 3008 #define TRISC5 TRISCbits.TRISC5 // bit 5 3009 3010 #define TX9D TXSTAbits.TX9D // bit 0 3011 #define TRMT TXSTAbits.TRMT // bit 1 3012 #define BRGH TXSTAbits.BRGH // bit 2 3013 #define SENDB TXSTAbits.SENDB // bit 3 3014 #define SYNC TXSTAbits.SYNC // bit 4 3015 #define TXEN TXSTAbits.TXEN // bit 5 3016 #define TX9 TXSTAbits.TX9 // bit 6 3017 #define CSRC TXSTAbits.CSRC // bit 7 3018 3019 #define ADDR0 UADDRbits.ADDR0 // bit 0 3020 #define ADDR1 UADDRbits.ADDR1 // bit 1 3021 #define ADDR2 UADDRbits.ADDR2 // bit 2 3022 #define ADDR3 UADDRbits.ADDR3 // bit 3 3023 #define ADDR4 UADDRbits.ADDR4 // bit 4 3024 #define ADDR5 UADDRbits.ADDR5 // bit 5 3025 #define ADDR6 UADDRbits.ADDR6 // bit 6 3026 3027 #define PPB0 UCFGbits.PPB0 // bit 0 3028 #define PPB1 UCFGbits.PPB1 // bit 1 3029 #define FSEN UCFGbits.FSEN // bit 2 3030 #define UPUEN UCFGbits.UPUEN // bit 4 3031 #define UTEYE UCFGbits.UTEYE // bit 7 3032 3033 #define SUSPND UCONbits.SUSPND // bit 1 3034 #define RESUME UCONbits.RESUME // bit 2 3035 #define USBEN UCONbits.USBEN // bit 3 3036 #define PKTDIS UCONbits.PKTDIS // bit 4 3037 #define SE0 UCONbits.SE0 // bit 5 3038 #define PPBRST UCONbits.PPBRST // bit 6 3039 3040 #define PIDEE UEIEbits.PIDEE // bit 0 3041 #define CRC5EE UEIEbits.CRC5EE // bit 1 3042 #define CRC16EE UEIEbits.CRC16EE // bit 2 3043 #define DFN8EE UEIEbits.DFN8EE // bit 3 3044 #define BTOEE UEIEbits.BTOEE // bit 4 3045 #define BTSEE UEIEbits.BTSEE // bit 7 3046 3047 #define PIDEF UEIRbits.PIDEF // bit 0 3048 #define CRC5EF UEIRbits.CRC5EF // bit 1 3049 #define CRC16EF UEIRbits.CRC16EF // bit 2 3050 #define DFN8EF UEIRbits.DFN8EF // bit 3 3051 #define BTOEF UEIRbits.BTOEF // bit 4 3052 #define BTSEF UEIRbits.BTSEF // bit 7 3053 3054 #define EPSTALL UEP0bits.EPSTALL // bit 0 3055 #define EPINEN UEP0bits.EPINEN // bit 1 3056 #define EPOUTEN UEP0bits.EPOUTEN // bit 2 3057 #define EPCONDIS UEP0bits.EPCONDIS // bit 3 3058 #define EPHSHK UEP0bits.EPHSHK // bit 4 3059 3060 #define FRM8 UFRMHbits.FRM8 // bit 0 3061 #define FRM9 UFRMHbits.FRM9 // bit 1 3062 #define FRM10 UFRMHbits.FRM10 // bit 2 3063 3064 #define FRM0 UFRMLbits.FRM0 // bit 0 3065 #define FRM1 UFRMLbits.FRM1 // bit 1 3066 #define FRM2 UFRMLbits.FRM2 // bit 2 3067 #define FRM3 UFRMLbits.FRM3 // bit 3 3068 #define FRM4 UFRMLbits.FRM4 // bit 4 3069 #define FRM5 UFRMLbits.FRM5 // bit 5 3070 #define FRM6 UFRMLbits.FRM6 // bit 6 3071 #define FRM7 UFRMLbits.FRM7 // bit 7 3072 3073 #define URSTIE UIEbits.URSTIE // bit 0 3074 #define UERRIE UIEbits.UERRIE // bit 1 3075 #define ACTVIE UIEbits.ACTVIE // bit 2 3076 #define TRNIE UIEbits.TRNIE // bit 3 3077 #define IDLEIE UIEbits.IDLEIE // bit 4 3078 #define STALLIE UIEbits.STALLIE // bit 5 3079 #define SOFIE UIEbits.SOFIE // bit 6 3080 3081 #define URSTIF UIRbits.URSTIF // bit 0 3082 #define UERRIF UIRbits.UERRIF // bit 1 3083 #define ACTVIF UIRbits.ACTVIF // bit 2 3084 #define TRNIF UIRbits.TRNIF // bit 3 3085 #define IDLEIF UIRbits.IDLEIF // bit 4 3086 #define STALLIF UIRbits.STALLIF // bit 5 3087 #define SOFIF UIRbits.SOFIF // bit 6 3088 3089 #define PPBI USTATbits.PPBI // bit 1 3090 #define DIR USTATbits.DIR // bit 2 3091 #define ENDP0 USTATbits.ENDP0 // bit 3 3092 #define ENDP1 USTATbits.ENDP1 // bit 4 3093 #define ENDP2 USTATbits.ENDP2 // bit 5 3094 #define ENDP3 USTATbits.ENDP3 // bit 6 3095 3096 #define VREGPM0 VREGCONbits.VREGPM0 // bit 0 3097 #define VREGPM1 VREGCONbits.VREGPM1 // bit 1 3098 3099 #define SWDTEN WDTCONbits.SWDTEN // bit 0 3100 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 3101 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 3102 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 3103 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 3104 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5 3105 3106 #define WPUA3 WPUAbits.WPUA3 // bit 3 3107 #define WPUA4 WPUAbits.WPUA4 // bit 4 3108 #define WPUA5 WPUAbits.WPUA5 // bit 5 3109 3110 #endif // #ifndef NO_BIT_DEFINES 3111 3112 #endif // #ifndef __PIC16F1454_H__ 3113