1 /* 2 * This declarations of the PIC16F1503 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:05 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16F1503_H__ 26 #define __PIC16F1503_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF0_ADDR 0x0000 37 #define INDF1_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR0_ADDR 0x0004 41 #define FSR0L_ADDR 0x0004 42 #define FSR0H_ADDR 0x0005 43 #define FSR1_ADDR 0x0006 44 #define FSR1L_ADDR 0x0006 45 #define FSR1H_ADDR 0x0007 46 #define BSR_ADDR 0x0008 47 #define WREG_ADDR 0x0009 48 #define PCLATH_ADDR 0x000A 49 #define INTCON_ADDR 0x000B 50 #define PORTA_ADDR 0x000C 51 #define PORTC_ADDR 0x000E 52 #define PIR1_ADDR 0x0011 53 #define PIR2_ADDR 0x0012 54 #define PIR3_ADDR 0x0013 55 #define TMR0_ADDR 0x0015 56 #define TMR1_ADDR 0x0016 57 #define TMR1L_ADDR 0x0016 58 #define TMR1H_ADDR 0x0017 59 #define T1CON_ADDR 0x0018 60 #define T1GCON_ADDR 0x0019 61 #define TMR2_ADDR 0x001A 62 #define PR2_ADDR 0x001B 63 #define T2CON_ADDR 0x001C 64 #define TRISA_ADDR 0x008C 65 #define TRISC_ADDR 0x008E 66 #define PIE1_ADDR 0x0091 67 #define PIE2_ADDR 0x0092 68 #define PIE3_ADDR 0x0093 69 #define OPTION_REG_ADDR 0x0095 70 #define PCON_ADDR 0x0096 71 #define WDTCON_ADDR 0x0097 72 #define OSCCON_ADDR 0x0099 73 #define OSCSTAT_ADDR 0x009A 74 #define ADRES_ADDR 0x009B 75 #define ADRESL_ADDR 0x009B 76 #define ADRESH_ADDR 0x009C 77 #define ADCON0_ADDR 0x009D 78 #define ADCON1_ADDR 0x009E 79 #define ADCON2_ADDR 0x009F 80 #define LATA_ADDR 0x010C 81 #define LATC_ADDR 0x010E 82 #define CM1CON0_ADDR 0x0111 83 #define CM1CON1_ADDR 0x0112 84 #define CM2CON0_ADDR 0x0113 85 #define CM2CON1_ADDR 0x0114 86 #define CMOUT_ADDR 0x0115 87 #define BORCON_ADDR 0x0116 88 #define FVRCON_ADDR 0x0117 89 #define DACCON0_ADDR 0x0118 90 #define DACCON1_ADDR 0x0119 91 #define APFCON_ADDR 0x011D 92 #define ANSELA_ADDR 0x018C 93 #define ANSELC_ADDR 0x018E 94 #define PMADR_ADDR 0x0191 95 #define PMADRL_ADDR 0x0191 96 #define PMADRH_ADDR 0x0192 97 #define PMDAT_ADDR 0x0193 98 #define PMDATL_ADDR 0x0193 99 #define PMDATH_ADDR 0x0194 100 #define PMCON1_ADDR 0x0195 101 #define PMCON2_ADDR 0x0196 102 #define VREGCON_ADDR 0x0197 103 #define WPUA_ADDR 0x020C 104 #define SSP1BUF_ADDR 0x0211 105 #define SSPBUF_ADDR 0x0211 106 #define SSP1ADD_ADDR 0x0212 107 #define SSPADD_ADDR 0x0212 108 #define SSP1MSK_ADDR 0x0213 109 #define SSPMSK_ADDR 0x0213 110 #define SSP1STAT_ADDR 0x0214 111 #define SSPSTAT_ADDR 0x0214 112 #define SSP1CON1_ADDR 0x0215 113 #define SSPCON_ADDR 0x0215 114 #define SSPCON1_ADDR 0x0215 115 #define SSP1CON2_ADDR 0x0216 116 #define SSPCON2_ADDR 0x0216 117 #define SSP1CON3_ADDR 0x0217 118 #define SSPCON3_ADDR 0x0217 119 #define IOCAP_ADDR 0x0391 120 #define IOCAN_ADDR 0x0392 121 #define IOCAF_ADDR 0x0393 122 #define NCO1ACC_ADDR 0x0498 123 #define NCO1ACCL_ADDR 0x0498 124 #define NCO1ACCH_ADDR 0x0499 125 #define NCO1ACCU_ADDR 0x049A 126 #define NCO1INC_ADDR 0x049B 127 #define NCO1INCL_ADDR 0x049B 128 #define NCO1INCH_ADDR 0x049C 129 #define NCO1INCU_ADDR 0x049D 130 #define NCO1CON_ADDR 0x049E 131 #define NCO1CLK_ADDR 0x049F 132 #define PWM1DCL_ADDR 0x0611 133 #define PWM1DCH_ADDR 0x0612 134 #define PWM1CON_ADDR 0x0613 135 #define PWM1CON0_ADDR 0x0613 136 #define PWM2DCL_ADDR 0x0614 137 #define PWM2DCH_ADDR 0x0615 138 #define PWM2CON_ADDR 0x0616 139 #define PWM2CON0_ADDR 0x0616 140 #define PWM3DCL_ADDR 0x0617 141 #define PWM3DCH_ADDR 0x0618 142 #define PWM3CON_ADDR 0x0619 143 #define PWM3CON0_ADDR 0x0619 144 #define PWM4DCL_ADDR 0x061A 145 #define PWM4DCH_ADDR 0x061B 146 #define PWM4CON_ADDR 0x061C 147 #define PWM4CON0_ADDR 0x061C 148 #define CWG1DBR_ADDR 0x0691 149 #define CWG1DBF_ADDR 0x0692 150 #define CWG1CON0_ADDR 0x0693 151 #define CWG1CON1_ADDR 0x0694 152 #define CWG1CON2_ADDR 0x0695 153 #define CLCDATA_ADDR 0x0F0F 154 #define CLC1CON_ADDR 0x0F10 155 #define CLC1POL_ADDR 0x0F11 156 #define CLC1SEL0_ADDR 0x0F12 157 #define CLC1SEL1_ADDR 0x0F13 158 #define CLC1GLS0_ADDR 0x0F14 159 #define CLC1GLS1_ADDR 0x0F15 160 #define CLC1GLS2_ADDR 0x0F16 161 #define CLC1GLS3_ADDR 0x0F17 162 #define CLC2CON_ADDR 0x0F18 163 #define CLC2POL_ADDR 0x0F19 164 #define CLC2SEL0_ADDR 0x0F1A 165 #define CLC2SEL1_ADDR 0x0F1B 166 #define CLC2GLS0_ADDR 0x0F1C 167 #define CLC2GLS1_ADDR 0x0F1D 168 #define CLC2GLS2_ADDR 0x0F1E 169 #define CLC2GLS3_ADDR 0x0F1F 170 #define BSR_ICDSHAD_ADDR 0x0FE3 171 #define STATUS_SHAD_ADDR 0x0FE4 172 #define WREG_SHAD_ADDR 0x0FE5 173 #define BSR_SHAD_ADDR 0x0FE6 174 #define PCLATH_SHAD_ADDR 0x0FE7 175 #define FSR0L_SHAD_ADDR 0x0FE8 176 #define FSR0H_SHAD_ADDR 0x0FE9 177 #define FSR1L_SHAD_ADDR 0x0FEA 178 #define FSR1H_SHAD_ADDR 0x0FEB 179 #define STKPTR_ADDR 0x0FED 180 #define TOSL_ADDR 0x0FEE 181 #define TOSH_ADDR 0x0FEF 182 183 #endif // #ifndef NO_ADDR_DEFINES 184 185 //============================================================================== 186 // 187 // Register Definitions 188 // 189 //============================================================================== 190 191 extern __at(0x0000) __sfr INDF0; 192 extern __at(0x0001) __sfr INDF1; 193 extern __at(0x0002) __sfr PCL; 194 195 //============================================================================== 196 // STATUS Bits 197 198 extern __at(0x0003) __sfr STATUS; 199 200 typedef struct 201 { 202 unsigned C : 1; 203 unsigned DC : 1; 204 unsigned Z : 1; 205 unsigned NOT_PD : 1; 206 unsigned NOT_TO : 1; 207 unsigned : 1; 208 unsigned : 1; 209 unsigned : 1; 210 } __STATUSbits_t; 211 212 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 213 214 #define _C 0x01 215 #define _DC 0x02 216 #define _Z 0x04 217 #define _NOT_PD 0x08 218 #define _NOT_TO 0x10 219 220 //============================================================================== 221 222 extern __at(0x0004) __sfr FSR0; 223 extern __at(0x0004) __sfr FSR0L; 224 extern __at(0x0005) __sfr FSR0H; 225 extern __at(0x0006) __sfr FSR1; 226 extern __at(0x0006) __sfr FSR1L; 227 extern __at(0x0007) __sfr FSR1H; 228 229 //============================================================================== 230 // BSR Bits 231 232 extern __at(0x0008) __sfr BSR; 233 234 typedef union 235 { 236 struct 237 { 238 unsigned BSR0 : 1; 239 unsigned BSR1 : 1; 240 unsigned BSR2 : 1; 241 unsigned BSR3 : 1; 242 unsigned BSR4 : 1; 243 unsigned : 1; 244 unsigned : 1; 245 unsigned : 1; 246 }; 247 248 struct 249 { 250 unsigned BSR : 5; 251 unsigned : 3; 252 }; 253 } __BSRbits_t; 254 255 extern __at(0x0008) volatile __BSRbits_t BSRbits; 256 257 #define _BSR0 0x01 258 #define _BSR1 0x02 259 #define _BSR2 0x04 260 #define _BSR3 0x08 261 #define _BSR4 0x10 262 263 //============================================================================== 264 265 extern __at(0x0009) __sfr WREG; 266 extern __at(0x000A) __sfr PCLATH; 267 268 //============================================================================== 269 // INTCON Bits 270 271 extern __at(0x000B) __sfr INTCON; 272 273 typedef union 274 { 275 struct 276 { 277 unsigned IOCIF : 1; 278 unsigned INTF : 1; 279 unsigned TMR0IF : 1; 280 unsigned IOCIE : 1; 281 unsigned INTE : 1; 282 unsigned TMR0IE : 1; 283 unsigned PEIE : 1; 284 unsigned GIE : 1; 285 }; 286 287 struct 288 { 289 unsigned : 1; 290 unsigned : 1; 291 unsigned T0IF : 1; 292 unsigned : 1; 293 unsigned : 1; 294 unsigned T0IE : 1; 295 unsigned : 1; 296 unsigned : 1; 297 }; 298 } __INTCONbits_t; 299 300 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 301 302 #define _IOCIF 0x01 303 #define _INTF 0x02 304 #define _TMR0IF 0x04 305 #define _T0IF 0x04 306 #define _IOCIE 0x08 307 #define _INTE 0x10 308 #define _TMR0IE 0x20 309 #define _T0IE 0x20 310 #define _PEIE 0x40 311 #define _GIE 0x80 312 313 //============================================================================== 314 315 316 //============================================================================== 317 // PORTA Bits 318 319 extern __at(0x000C) __sfr PORTA; 320 321 typedef union 322 { 323 struct 324 { 325 unsigned RA0 : 1; 326 unsigned RA1 : 1; 327 unsigned RA2 : 1; 328 unsigned RA3 : 1; 329 unsigned RA4 : 1; 330 unsigned RA5 : 1; 331 unsigned : 1; 332 unsigned : 1; 333 }; 334 335 struct 336 { 337 unsigned RA : 6; 338 unsigned : 2; 339 }; 340 } __PORTAbits_t; 341 342 extern __at(0x000C) volatile __PORTAbits_t PORTAbits; 343 344 #define _RA0 0x01 345 #define _RA1 0x02 346 #define _RA2 0x04 347 #define _RA3 0x08 348 #define _RA4 0x10 349 #define _RA5 0x20 350 351 //============================================================================== 352 353 354 //============================================================================== 355 // PORTC Bits 356 357 extern __at(0x000E) __sfr PORTC; 358 359 typedef union 360 { 361 struct 362 { 363 unsigned RC0 : 1; 364 unsigned RC1 : 1; 365 unsigned RC2 : 1; 366 unsigned RC3 : 1; 367 unsigned RC4 : 1; 368 unsigned RC5 : 1; 369 unsigned : 1; 370 unsigned : 1; 371 }; 372 373 struct 374 { 375 unsigned RC : 6; 376 unsigned : 2; 377 }; 378 } __PORTCbits_t; 379 380 extern __at(0x000E) volatile __PORTCbits_t PORTCbits; 381 382 #define _RC0 0x01 383 #define _RC1 0x02 384 #define _RC2 0x04 385 #define _RC3 0x08 386 #define _RC4 0x10 387 #define _RC5 0x20 388 389 //============================================================================== 390 391 392 //============================================================================== 393 // PIR1 Bits 394 395 extern __at(0x0011) __sfr PIR1; 396 397 typedef struct 398 { 399 unsigned TMR1IF : 1; 400 unsigned TMR2IF : 1; 401 unsigned : 1; 402 unsigned SSP1IF : 1; 403 unsigned : 1; 404 unsigned : 1; 405 unsigned ADIF : 1; 406 unsigned TMR1GIF : 1; 407 } __PIR1bits_t; 408 409 extern __at(0x0011) volatile __PIR1bits_t PIR1bits; 410 411 #define _TMR1IF 0x01 412 #define _TMR2IF 0x02 413 #define _SSP1IF 0x08 414 #define _ADIF 0x40 415 #define _TMR1GIF 0x80 416 417 //============================================================================== 418 419 420 //============================================================================== 421 // PIR2 Bits 422 423 extern __at(0x0012) __sfr PIR2; 424 425 typedef struct 426 { 427 unsigned : 1; 428 unsigned : 1; 429 unsigned NCO1IF : 1; 430 unsigned BCL1IF : 1; 431 unsigned : 1; 432 unsigned C1IF : 1; 433 unsigned C2IF : 1; 434 unsigned : 1; 435 } __PIR2bits_t; 436 437 extern __at(0x0012) volatile __PIR2bits_t PIR2bits; 438 439 #define _NCO1IF 0x04 440 #define _BCL1IF 0x08 441 #define _C1IF 0x20 442 #define _C2IF 0x40 443 444 //============================================================================== 445 446 447 //============================================================================== 448 // PIR3 Bits 449 450 extern __at(0x0013) __sfr PIR3; 451 452 typedef struct 453 { 454 unsigned CLC1IF : 1; 455 unsigned CLC2IF : 1; 456 unsigned : 1; 457 unsigned : 1; 458 unsigned : 1; 459 unsigned : 1; 460 unsigned : 1; 461 unsigned : 1; 462 } __PIR3bits_t; 463 464 extern __at(0x0013) volatile __PIR3bits_t PIR3bits; 465 466 #define _CLC1IF 0x01 467 #define _CLC2IF 0x02 468 469 //============================================================================== 470 471 extern __at(0x0015) __sfr TMR0; 472 extern __at(0x0016) __sfr TMR1; 473 extern __at(0x0016) __sfr TMR1L; 474 extern __at(0x0017) __sfr TMR1H; 475 476 //============================================================================== 477 // T1CON Bits 478 479 extern __at(0x0018) __sfr T1CON; 480 481 typedef union 482 { 483 struct 484 { 485 unsigned TMR1ON : 1; 486 unsigned : 1; 487 unsigned NOT_T1SYNC : 1; 488 unsigned T1OSCEN : 1; 489 unsigned T1CKPS0 : 1; 490 unsigned T1CKPS1 : 1; 491 unsigned TMR1CS0 : 1; 492 unsigned TMR1CS1 : 1; 493 }; 494 495 struct 496 { 497 unsigned : 4; 498 unsigned T1CKPS : 2; 499 unsigned : 2; 500 }; 501 502 struct 503 { 504 unsigned : 6; 505 unsigned TMR1CS : 2; 506 }; 507 } __T1CONbits_t; 508 509 extern __at(0x0018) volatile __T1CONbits_t T1CONbits; 510 511 #define _TMR1ON 0x01 512 #define _NOT_T1SYNC 0x04 513 #define _T1OSCEN 0x08 514 #define _T1CKPS0 0x10 515 #define _T1CKPS1 0x20 516 #define _TMR1CS0 0x40 517 #define _TMR1CS1 0x80 518 519 //============================================================================== 520 521 522 //============================================================================== 523 // T1GCON Bits 524 525 extern __at(0x0019) __sfr T1GCON; 526 527 typedef union 528 { 529 struct 530 { 531 unsigned T1GSS0 : 1; 532 unsigned T1GSS1 : 1; 533 unsigned T1GVAL : 1; 534 unsigned T1GGO_NOT_DONE : 1; 535 unsigned T1GSPM : 1; 536 unsigned T1GTM : 1; 537 unsigned T1GPOL : 1; 538 unsigned TMR1GE : 1; 539 }; 540 541 struct 542 { 543 unsigned T1GSS : 2; 544 unsigned : 6; 545 }; 546 } __T1GCONbits_t; 547 548 extern __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 549 550 #define _T1GSS0 0x01 551 #define _T1GSS1 0x02 552 #define _T1GVAL 0x04 553 #define _T1GGO_NOT_DONE 0x08 554 #define _T1GSPM 0x10 555 #define _T1GTM 0x20 556 #define _T1GPOL 0x40 557 #define _TMR1GE 0x80 558 559 //============================================================================== 560 561 extern __at(0x001A) __sfr TMR2; 562 extern __at(0x001B) __sfr PR2; 563 564 //============================================================================== 565 // T2CON Bits 566 567 extern __at(0x001C) __sfr T2CON; 568 569 typedef union 570 { 571 struct 572 { 573 unsigned T2CKPS0 : 1; 574 unsigned T2CKPS1 : 1; 575 unsigned TMR2ON : 1; 576 unsigned T2OUTPS0 : 1; 577 unsigned T2OUTPS1 : 1; 578 unsigned T2OUTPS2 : 1; 579 unsigned T2OUTPS3 : 1; 580 unsigned : 1; 581 }; 582 583 struct 584 { 585 unsigned T2CKPS : 2; 586 unsigned : 6; 587 }; 588 589 struct 590 { 591 unsigned : 3; 592 unsigned T2OUTPS : 4; 593 unsigned : 1; 594 }; 595 } __T2CONbits_t; 596 597 extern __at(0x001C) volatile __T2CONbits_t T2CONbits; 598 599 #define _T2CKPS0 0x01 600 #define _T2CKPS1 0x02 601 #define _TMR2ON 0x04 602 #define _T2OUTPS0 0x08 603 #define _T2OUTPS1 0x10 604 #define _T2OUTPS2 0x20 605 #define _T2OUTPS3 0x40 606 607 //============================================================================== 608 609 610 //============================================================================== 611 // TRISA Bits 612 613 extern __at(0x008C) __sfr TRISA; 614 615 typedef union 616 { 617 struct 618 { 619 unsigned TRISA0 : 1; 620 unsigned TRISA1 : 1; 621 unsigned TRISA2 : 1; 622 unsigned TRISA3 : 1; 623 unsigned TRISA4 : 1; 624 unsigned TRISA5 : 1; 625 unsigned : 1; 626 unsigned : 1; 627 }; 628 629 struct 630 { 631 unsigned TRISA : 6; 632 unsigned : 2; 633 }; 634 } __TRISAbits_t; 635 636 extern __at(0x008C) volatile __TRISAbits_t TRISAbits; 637 638 #define _TRISA0 0x01 639 #define _TRISA1 0x02 640 #define _TRISA2 0x04 641 #define _TRISA3 0x08 642 #define _TRISA4 0x10 643 #define _TRISA5 0x20 644 645 //============================================================================== 646 647 648 //============================================================================== 649 // TRISC Bits 650 651 extern __at(0x008E) __sfr TRISC; 652 653 typedef union 654 { 655 struct 656 { 657 unsigned TRISC0 : 1; 658 unsigned TRISC1 : 1; 659 unsigned TRISC2 : 1; 660 unsigned TRISC3 : 1; 661 unsigned TRISC4 : 1; 662 unsigned TRISC5 : 1; 663 unsigned : 1; 664 unsigned : 1; 665 }; 666 667 struct 668 { 669 unsigned TRISC : 6; 670 unsigned : 2; 671 }; 672 } __TRISCbits_t; 673 674 extern __at(0x008E) volatile __TRISCbits_t TRISCbits; 675 676 #define _TRISC0 0x01 677 #define _TRISC1 0x02 678 #define _TRISC2 0x04 679 #define _TRISC3 0x08 680 #define _TRISC4 0x10 681 #define _TRISC5 0x20 682 683 //============================================================================== 684 685 686 //============================================================================== 687 // PIE1 Bits 688 689 extern __at(0x0091) __sfr PIE1; 690 691 typedef struct 692 { 693 unsigned TMR1IE : 1; 694 unsigned TMR2IE : 1; 695 unsigned : 1; 696 unsigned SSP1IE : 1; 697 unsigned : 1; 698 unsigned : 1; 699 unsigned ADIE : 1; 700 unsigned TMR1GIE : 1; 701 } __PIE1bits_t; 702 703 extern __at(0x0091) volatile __PIE1bits_t PIE1bits; 704 705 #define _TMR1IE 0x01 706 #define _TMR2IE 0x02 707 #define _SSP1IE 0x08 708 #define _ADIE 0x40 709 #define _TMR1GIE 0x80 710 711 //============================================================================== 712 713 714 //============================================================================== 715 // PIE2 Bits 716 717 extern __at(0x0092) __sfr PIE2; 718 719 typedef struct 720 { 721 unsigned : 1; 722 unsigned : 1; 723 unsigned NCO1IE : 1; 724 unsigned BCL1IE : 1; 725 unsigned : 1; 726 unsigned C1IE : 1; 727 unsigned C2IE : 1; 728 unsigned : 1; 729 } __PIE2bits_t; 730 731 extern __at(0x0092) volatile __PIE2bits_t PIE2bits; 732 733 #define _NCO1IE 0x04 734 #define _BCL1IE 0x08 735 #define _C1IE 0x20 736 #define _C2IE 0x40 737 738 //============================================================================== 739 740 741 //============================================================================== 742 // PIE3 Bits 743 744 extern __at(0x0093) __sfr PIE3; 745 746 typedef struct 747 { 748 unsigned CLC1IE : 1; 749 unsigned CLC2IE : 1; 750 unsigned : 1; 751 unsigned : 1; 752 unsigned : 1; 753 unsigned : 1; 754 unsigned : 1; 755 unsigned : 1; 756 } __PIE3bits_t; 757 758 extern __at(0x0093) volatile __PIE3bits_t PIE3bits; 759 760 #define _CLC1IE 0x01 761 #define _CLC2IE 0x02 762 763 //============================================================================== 764 765 766 //============================================================================== 767 // OPTION_REG Bits 768 769 extern __at(0x0095) __sfr OPTION_REG; 770 771 typedef union 772 { 773 struct 774 { 775 unsigned PS0 : 1; 776 unsigned PS1 : 1; 777 unsigned PS2 : 1; 778 unsigned PSA : 1; 779 unsigned TMR0SE : 1; 780 unsigned TMR0CS : 1; 781 unsigned INTEDG : 1; 782 unsigned NOT_WPUEN : 1; 783 }; 784 785 struct 786 { 787 unsigned : 1; 788 unsigned : 1; 789 unsigned : 1; 790 unsigned : 1; 791 unsigned T0SE : 1; 792 unsigned T0CS : 1; 793 unsigned : 1; 794 unsigned : 1; 795 }; 796 797 struct 798 { 799 unsigned PS : 3; 800 unsigned : 5; 801 }; 802 } __OPTION_REGbits_t; 803 804 extern __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 805 806 #define _PS0 0x01 807 #define _PS1 0x02 808 #define _PS2 0x04 809 #define _PSA 0x08 810 #define _TMR0SE 0x10 811 #define _T0SE 0x10 812 #define _TMR0CS 0x20 813 #define _T0CS 0x20 814 #define _INTEDG 0x40 815 #define _NOT_WPUEN 0x80 816 817 //============================================================================== 818 819 820 //============================================================================== 821 // PCON Bits 822 823 extern __at(0x0096) __sfr PCON; 824 825 typedef struct 826 { 827 unsigned NOT_BOR : 1; 828 unsigned NOT_POR : 1; 829 unsigned NOT_RI : 1; 830 unsigned NOT_RMCLR : 1; 831 unsigned NOT_RWDT : 1; 832 unsigned : 1; 833 unsigned STKUNF : 1; 834 unsigned STKOVF : 1; 835 } __PCONbits_t; 836 837 extern __at(0x0096) volatile __PCONbits_t PCONbits; 838 839 #define _NOT_BOR 0x01 840 #define _NOT_POR 0x02 841 #define _NOT_RI 0x04 842 #define _NOT_RMCLR 0x08 843 #define _NOT_RWDT 0x10 844 #define _STKUNF 0x40 845 #define _STKOVF 0x80 846 847 //============================================================================== 848 849 850 //============================================================================== 851 // WDTCON Bits 852 853 extern __at(0x0097) __sfr WDTCON; 854 855 typedef union 856 { 857 struct 858 { 859 unsigned SWDTEN : 1; 860 unsigned WDTPS0 : 1; 861 unsigned WDTPS1 : 1; 862 unsigned WDTPS2 : 1; 863 unsigned WDTPS3 : 1; 864 unsigned WDTPS4 : 1; 865 unsigned : 1; 866 unsigned : 1; 867 }; 868 869 struct 870 { 871 unsigned : 1; 872 unsigned WDTPS : 5; 873 unsigned : 2; 874 }; 875 } __WDTCONbits_t; 876 877 extern __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 878 879 #define _SWDTEN 0x01 880 #define _WDTPS0 0x02 881 #define _WDTPS1 0x04 882 #define _WDTPS2 0x08 883 #define _WDTPS3 0x10 884 #define _WDTPS4 0x20 885 886 //============================================================================== 887 888 889 //============================================================================== 890 // OSCCON Bits 891 892 extern __at(0x0099) __sfr OSCCON; 893 894 typedef union 895 { 896 struct 897 { 898 unsigned SCS0 : 1; 899 unsigned SCS1 : 1; 900 unsigned : 1; 901 unsigned IRCF0 : 1; 902 unsigned IRCF1 : 1; 903 unsigned IRCF2 : 1; 904 unsigned IRCF3 : 1; 905 unsigned : 1; 906 }; 907 908 struct 909 { 910 unsigned SCS : 2; 911 unsigned : 6; 912 }; 913 914 struct 915 { 916 unsigned : 3; 917 unsigned IRCF : 4; 918 unsigned : 1; 919 }; 920 } __OSCCONbits_t; 921 922 extern __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 923 924 #define _SCS0 0x01 925 #define _SCS1 0x02 926 #define _IRCF0 0x08 927 #define _IRCF1 0x10 928 #define _IRCF2 0x20 929 #define _IRCF3 0x40 930 931 //============================================================================== 932 933 934 //============================================================================== 935 // OSCSTAT Bits 936 937 extern __at(0x009A) __sfr OSCSTAT; 938 939 typedef struct 940 { 941 unsigned HFIOFS : 1; 942 unsigned LFIOFR : 1; 943 unsigned : 1; 944 unsigned : 1; 945 unsigned HFIOFR : 1; 946 unsigned : 1; 947 unsigned : 1; 948 unsigned : 1; 949 } __OSCSTATbits_t; 950 951 extern __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 952 953 #define _HFIOFS 0x01 954 #define _LFIOFR 0x02 955 #define _HFIOFR 0x10 956 957 //============================================================================== 958 959 extern __at(0x009B) __sfr ADRES; 960 extern __at(0x009B) __sfr ADRESL; 961 extern __at(0x009C) __sfr ADRESH; 962 963 //============================================================================== 964 // ADCON0 Bits 965 966 extern __at(0x009D) __sfr ADCON0; 967 968 typedef union 969 { 970 struct 971 { 972 unsigned ADON : 1; 973 unsigned GO_NOT_DONE : 1; 974 unsigned CHS0 : 1; 975 unsigned CHS1 : 1; 976 unsigned CHS2 : 1; 977 unsigned CHS3 : 1; 978 unsigned CHS4 : 1; 979 unsigned : 1; 980 }; 981 982 struct 983 { 984 unsigned : 1; 985 unsigned ADGO : 1; 986 unsigned : 1; 987 unsigned : 1; 988 unsigned : 1; 989 unsigned : 1; 990 unsigned : 1; 991 unsigned : 1; 992 }; 993 994 struct 995 { 996 unsigned : 1; 997 unsigned GO : 1; 998 unsigned : 1; 999 unsigned : 1; 1000 unsigned : 1; 1001 unsigned : 1; 1002 unsigned : 1; 1003 unsigned : 1; 1004 }; 1005 1006 struct 1007 { 1008 unsigned : 2; 1009 unsigned CHS : 5; 1010 unsigned : 1; 1011 }; 1012 } __ADCON0bits_t; 1013 1014 extern __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 1015 1016 #define _ADON 0x01 1017 #define _GO_NOT_DONE 0x02 1018 #define _ADGO 0x02 1019 #define _GO 0x02 1020 #define _CHS0 0x04 1021 #define _CHS1 0x08 1022 #define _CHS2 0x10 1023 #define _CHS3 0x20 1024 #define _CHS4 0x40 1025 1026 //============================================================================== 1027 1028 1029 //============================================================================== 1030 // ADCON1 Bits 1031 1032 extern __at(0x009E) __sfr ADCON1; 1033 1034 typedef union 1035 { 1036 struct 1037 { 1038 unsigned ADPREF0 : 1; 1039 unsigned ADPREF1 : 1; 1040 unsigned : 1; 1041 unsigned : 1; 1042 unsigned ADCS0 : 1; 1043 unsigned ADCS1 : 1; 1044 unsigned ADCS2 : 1; 1045 unsigned ADFM : 1; 1046 }; 1047 1048 struct 1049 { 1050 unsigned ADPREF : 2; 1051 unsigned : 6; 1052 }; 1053 1054 struct 1055 { 1056 unsigned : 4; 1057 unsigned ADCS : 3; 1058 unsigned : 1; 1059 }; 1060 } __ADCON1bits_t; 1061 1062 extern __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 1063 1064 #define _ADPREF0 0x01 1065 #define _ADPREF1 0x02 1066 #define _ADCS0 0x10 1067 #define _ADCS1 0x20 1068 #define _ADCS2 0x40 1069 #define _ADFM 0x80 1070 1071 //============================================================================== 1072 1073 1074 //============================================================================== 1075 // ADCON2 Bits 1076 1077 extern __at(0x009F) __sfr ADCON2; 1078 1079 typedef union 1080 { 1081 struct 1082 { 1083 unsigned : 1; 1084 unsigned : 1; 1085 unsigned : 1; 1086 unsigned : 1; 1087 unsigned TRIGSEL0 : 1; 1088 unsigned TRIGSEL1 : 1; 1089 unsigned TRIGSEL2 : 1; 1090 unsigned TRIGSEL3 : 1; 1091 }; 1092 1093 struct 1094 { 1095 unsigned : 4; 1096 unsigned TRIGSEL : 4; 1097 }; 1098 } __ADCON2bits_t; 1099 1100 extern __at(0x009F) volatile __ADCON2bits_t ADCON2bits; 1101 1102 #define _TRIGSEL0 0x10 1103 #define _TRIGSEL1 0x20 1104 #define _TRIGSEL2 0x40 1105 #define _TRIGSEL3 0x80 1106 1107 //============================================================================== 1108 1109 1110 //============================================================================== 1111 // LATA Bits 1112 1113 extern __at(0x010C) __sfr LATA; 1114 1115 typedef struct 1116 { 1117 unsigned LATA0 : 1; 1118 unsigned LATA1 : 1; 1119 unsigned LATA2 : 1; 1120 unsigned : 1; 1121 unsigned LATA4 : 1; 1122 unsigned LATA5 : 1; 1123 unsigned : 1; 1124 unsigned : 1; 1125 } __LATAbits_t; 1126 1127 extern __at(0x010C) volatile __LATAbits_t LATAbits; 1128 1129 #define _LATA0 0x01 1130 #define _LATA1 0x02 1131 #define _LATA2 0x04 1132 #define _LATA4 0x10 1133 #define _LATA5 0x20 1134 1135 //============================================================================== 1136 1137 1138 //============================================================================== 1139 // LATC Bits 1140 1141 extern __at(0x010E) __sfr LATC; 1142 1143 typedef union 1144 { 1145 struct 1146 { 1147 unsigned LATC0 : 1; 1148 unsigned LATC1 : 1; 1149 unsigned LATC2 : 1; 1150 unsigned LATC3 : 1; 1151 unsigned LATC4 : 1; 1152 unsigned LATC5 : 1; 1153 unsigned : 1; 1154 unsigned : 1; 1155 }; 1156 1157 struct 1158 { 1159 unsigned LATC : 6; 1160 unsigned : 2; 1161 }; 1162 } __LATCbits_t; 1163 1164 extern __at(0x010E) volatile __LATCbits_t LATCbits; 1165 1166 #define _LATC0 0x01 1167 #define _LATC1 0x02 1168 #define _LATC2 0x04 1169 #define _LATC3 0x08 1170 #define _LATC4 0x10 1171 #define _LATC5 0x20 1172 1173 //============================================================================== 1174 1175 1176 //============================================================================== 1177 // CM1CON0 Bits 1178 1179 extern __at(0x0111) __sfr CM1CON0; 1180 1181 typedef struct 1182 { 1183 unsigned C1SYNC : 1; 1184 unsigned C1HYS : 1; 1185 unsigned C1SP : 1; 1186 unsigned : 1; 1187 unsigned C1POL : 1; 1188 unsigned C1OE : 1; 1189 unsigned C1OUT : 1; 1190 unsigned C1ON : 1; 1191 } __CM1CON0bits_t; 1192 1193 extern __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 1194 1195 #define _C1SYNC 0x01 1196 #define _C1HYS 0x02 1197 #define _C1SP 0x04 1198 #define _C1POL 0x10 1199 #define _C1OE 0x20 1200 #define _C1OUT 0x40 1201 #define _C1ON 0x80 1202 1203 //============================================================================== 1204 1205 1206 //============================================================================== 1207 // CM1CON1 Bits 1208 1209 extern __at(0x0112) __sfr CM1CON1; 1210 1211 typedef union 1212 { 1213 struct 1214 { 1215 unsigned C1NCH0 : 1; 1216 unsigned C1NCH1 : 1; 1217 unsigned C1NCH2 : 1; 1218 unsigned : 1; 1219 unsigned C1PCH0 : 1; 1220 unsigned C1PCH1 : 1; 1221 unsigned C1INTN : 1; 1222 unsigned C1INTP : 1; 1223 }; 1224 1225 struct 1226 { 1227 unsigned C1NCH : 3; 1228 unsigned : 5; 1229 }; 1230 1231 struct 1232 { 1233 unsigned : 4; 1234 unsigned C1PCH : 2; 1235 unsigned : 2; 1236 }; 1237 } __CM1CON1bits_t; 1238 1239 extern __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 1240 1241 #define _C1NCH0 0x01 1242 #define _C1NCH1 0x02 1243 #define _C1NCH2 0x04 1244 #define _C1PCH0 0x10 1245 #define _C1PCH1 0x20 1246 #define _C1INTN 0x40 1247 #define _C1INTP 0x80 1248 1249 //============================================================================== 1250 1251 1252 //============================================================================== 1253 // CM2CON0 Bits 1254 1255 extern __at(0x0113) __sfr CM2CON0; 1256 1257 typedef struct 1258 { 1259 unsigned C2SYNC : 1; 1260 unsigned C2HYS : 1; 1261 unsigned C2SP : 1; 1262 unsigned : 1; 1263 unsigned C2POL : 1; 1264 unsigned C2OE : 1; 1265 unsigned C2OUT : 1; 1266 unsigned C2ON : 1; 1267 } __CM2CON0bits_t; 1268 1269 extern __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits; 1270 1271 #define _C2SYNC 0x01 1272 #define _C2HYS 0x02 1273 #define _C2SP 0x04 1274 #define _C2POL 0x10 1275 #define _C2OE 0x20 1276 #define _C2OUT 0x40 1277 #define _C2ON 0x80 1278 1279 //============================================================================== 1280 1281 1282 //============================================================================== 1283 // CM2CON1 Bits 1284 1285 extern __at(0x0114) __sfr CM2CON1; 1286 1287 typedef union 1288 { 1289 struct 1290 { 1291 unsigned C2NCH0 : 1; 1292 unsigned C2NCH1 : 1; 1293 unsigned C2NCH2 : 1; 1294 unsigned : 1; 1295 unsigned C2PCH0 : 1; 1296 unsigned C2PCH1 : 1; 1297 unsigned C2INTN : 1; 1298 unsigned C2INTP : 1; 1299 }; 1300 1301 struct 1302 { 1303 unsigned C2NCH : 3; 1304 unsigned : 5; 1305 }; 1306 1307 struct 1308 { 1309 unsigned : 4; 1310 unsigned C2PCH : 2; 1311 unsigned : 2; 1312 }; 1313 } __CM2CON1bits_t; 1314 1315 extern __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits; 1316 1317 #define _C2NCH0 0x01 1318 #define _C2NCH1 0x02 1319 #define _C2NCH2 0x04 1320 #define _C2PCH0 0x10 1321 #define _C2PCH1 0x20 1322 #define _C2INTN 0x40 1323 #define _C2INTP 0x80 1324 1325 //============================================================================== 1326 1327 1328 //============================================================================== 1329 // CMOUT Bits 1330 1331 extern __at(0x0115) __sfr CMOUT; 1332 1333 typedef struct 1334 { 1335 unsigned MC1OUT : 1; 1336 unsigned MC2OUT : 1; 1337 unsigned : 1; 1338 unsigned : 1; 1339 unsigned : 1; 1340 unsigned : 1; 1341 unsigned : 1; 1342 unsigned : 1; 1343 } __CMOUTbits_t; 1344 1345 extern __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 1346 1347 #define _MC1OUT 0x01 1348 #define _MC2OUT 0x02 1349 1350 //============================================================================== 1351 1352 1353 //============================================================================== 1354 // BORCON Bits 1355 1356 extern __at(0x0116) __sfr BORCON; 1357 1358 typedef struct 1359 { 1360 unsigned BORRDY : 1; 1361 unsigned : 1; 1362 unsigned : 1; 1363 unsigned : 1; 1364 unsigned : 1; 1365 unsigned : 1; 1366 unsigned BORFS : 1; 1367 unsigned SBOREN : 1; 1368 } __BORCONbits_t; 1369 1370 extern __at(0x0116) volatile __BORCONbits_t BORCONbits; 1371 1372 #define _BORRDY 0x01 1373 #define _BORFS 0x40 1374 #define _SBOREN 0x80 1375 1376 //============================================================================== 1377 1378 1379 //============================================================================== 1380 // FVRCON Bits 1381 1382 extern __at(0x0117) __sfr FVRCON; 1383 1384 typedef union 1385 { 1386 struct 1387 { 1388 unsigned ADFVR0 : 1; 1389 unsigned ADFVR1 : 1; 1390 unsigned CDAFVR0 : 1; 1391 unsigned CDAFVR1 : 1; 1392 unsigned TSRNG : 1; 1393 unsigned TSEN : 1; 1394 unsigned FVRRDY : 1; 1395 unsigned FVREN : 1; 1396 }; 1397 1398 struct 1399 { 1400 unsigned ADFVR : 2; 1401 unsigned : 6; 1402 }; 1403 1404 struct 1405 { 1406 unsigned : 2; 1407 unsigned CDAFVR : 2; 1408 unsigned : 4; 1409 }; 1410 } __FVRCONbits_t; 1411 1412 extern __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 1413 1414 #define _ADFVR0 0x01 1415 #define _ADFVR1 0x02 1416 #define _CDAFVR0 0x04 1417 #define _CDAFVR1 0x08 1418 #define _TSRNG 0x10 1419 #define _TSEN 0x20 1420 #define _FVRRDY 0x40 1421 #define _FVREN 0x80 1422 1423 //============================================================================== 1424 1425 1426 //============================================================================== 1427 // DACCON0 Bits 1428 1429 extern __at(0x0118) __sfr DACCON0; 1430 1431 typedef struct 1432 { 1433 unsigned : 1; 1434 unsigned : 1; 1435 unsigned DACPSS : 1; 1436 unsigned : 1; 1437 unsigned DACOE2 : 1; 1438 unsigned DACOE1 : 1; 1439 unsigned : 1; 1440 unsigned DACEN : 1; 1441 } __DACCON0bits_t; 1442 1443 extern __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 1444 1445 #define _DACPSS 0x04 1446 #define _DACOE2 0x10 1447 #define _DACOE1 0x20 1448 #define _DACEN 0x80 1449 1450 //============================================================================== 1451 1452 1453 //============================================================================== 1454 // DACCON1 Bits 1455 1456 extern __at(0x0119) __sfr DACCON1; 1457 1458 typedef union 1459 { 1460 struct 1461 { 1462 unsigned DACR0 : 1; 1463 unsigned DACR1 : 1; 1464 unsigned DACR2 : 1; 1465 unsigned DACR3 : 1; 1466 unsigned DACR4 : 1; 1467 unsigned : 1; 1468 unsigned : 1; 1469 unsigned : 1; 1470 }; 1471 1472 struct 1473 { 1474 unsigned DACR : 5; 1475 unsigned : 3; 1476 }; 1477 } __DACCON1bits_t; 1478 1479 extern __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 1480 1481 #define _DACR0 0x01 1482 #define _DACR1 0x02 1483 #define _DACR2 0x04 1484 #define _DACR3 0x08 1485 #define _DACR4 0x10 1486 1487 //============================================================================== 1488 1489 1490 //============================================================================== 1491 // APFCON Bits 1492 1493 extern __at(0x011D) __sfr APFCON; 1494 1495 typedef struct 1496 { 1497 unsigned NCO1SEL : 1; 1498 unsigned CLC1SEL : 1; 1499 unsigned : 1; 1500 unsigned T1GSEL : 1; 1501 unsigned SSSEL : 1; 1502 unsigned SDOSEL : 1; 1503 unsigned : 1; 1504 unsigned : 1; 1505 } __APFCONbits_t; 1506 1507 extern __at(0x011D) volatile __APFCONbits_t APFCONbits; 1508 1509 #define _NCO1SEL 0x01 1510 #define _CLC1SEL 0x02 1511 #define _T1GSEL 0x08 1512 #define _SSSEL 0x10 1513 #define _SDOSEL 0x20 1514 1515 //============================================================================== 1516 1517 1518 //============================================================================== 1519 // ANSELA Bits 1520 1521 extern __at(0x018C) __sfr ANSELA; 1522 1523 typedef struct 1524 { 1525 unsigned ANSA0 : 1; 1526 unsigned ANSA1 : 1; 1527 unsigned ANSA2 : 1; 1528 unsigned : 1; 1529 unsigned ANSA4 : 1; 1530 unsigned : 1; 1531 unsigned : 1; 1532 unsigned : 1; 1533 } __ANSELAbits_t; 1534 1535 extern __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 1536 1537 #define _ANSA0 0x01 1538 #define _ANSA1 0x02 1539 #define _ANSA2 0x04 1540 #define _ANSA4 0x10 1541 1542 //============================================================================== 1543 1544 1545 //============================================================================== 1546 // ANSELC Bits 1547 1548 extern __at(0x018E) __sfr ANSELC; 1549 1550 typedef union 1551 { 1552 struct 1553 { 1554 unsigned ANSC0 : 1; 1555 unsigned ANSC1 : 1; 1556 unsigned ANSC2 : 1; 1557 unsigned ANSC3 : 1; 1558 unsigned : 1; 1559 unsigned : 1; 1560 unsigned : 1; 1561 unsigned : 1; 1562 }; 1563 1564 struct 1565 { 1566 unsigned ANSC : 4; 1567 unsigned : 4; 1568 }; 1569 } __ANSELCbits_t; 1570 1571 extern __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 1572 1573 #define _ANSC0 0x01 1574 #define _ANSC1 0x02 1575 #define _ANSC2 0x04 1576 #define _ANSC3 0x08 1577 1578 //============================================================================== 1579 1580 extern __at(0x0191) __sfr PMADR; 1581 extern __at(0x0191) __sfr PMADRL; 1582 extern __at(0x0192) __sfr PMADRH; 1583 extern __at(0x0193) __sfr PMDAT; 1584 extern __at(0x0193) __sfr PMDATL; 1585 extern __at(0x0194) __sfr PMDATH; 1586 1587 //============================================================================== 1588 // PMCON1 Bits 1589 1590 extern __at(0x0195) __sfr PMCON1; 1591 1592 typedef struct 1593 { 1594 unsigned RD : 1; 1595 unsigned WR : 1; 1596 unsigned WREN : 1; 1597 unsigned WRERR : 1; 1598 unsigned FREE : 1; 1599 unsigned LWLO : 1; 1600 unsigned CFGS : 1; 1601 unsigned : 1; 1602 } __PMCON1bits_t; 1603 1604 extern __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 1605 1606 #define _RD 0x01 1607 #define _WR 0x02 1608 #define _WREN 0x04 1609 #define _WRERR 0x08 1610 #define _FREE 0x10 1611 #define _LWLO 0x20 1612 #define _CFGS 0x40 1613 1614 //============================================================================== 1615 1616 extern __at(0x0196) __sfr PMCON2; 1617 1618 //============================================================================== 1619 // VREGCON Bits 1620 1621 extern __at(0x0197) __sfr VREGCON; 1622 1623 typedef struct 1624 { 1625 unsigned : 1; 1626 unsigned VREGPM : 1; 1627 unsigned : 1; 1628 unsigned : 1; 1629 unsigned : 1; 1630 unsigned : 1; 1631 unsigned : 1; 1632 unsigned : 1; 1633 } __VREGCONbits_t; 1634 1635 extern __at(0x0197) volatile __VREGCONbits_t VREGCONbits; 1636 1637 #define _VREGPM 0x02 1638 1639 //============================================================================== 1640 1641 1642 //============================================================================== 1643 // WPUA Bits 1644 1645 extern __at(0x020C) __sfr WPUA; 1646 1647 typedef union 1648 { 1649 struct 1650 { 1651 unsigned WPUA0 : 1; 1652 unsigned WPUA1 : 1; 1653 unsigned WPUA2 : 1; 1654 unsigned WPUA3 : 1; 1655 unsigned WPUA4 : 1; 1656 unsigned WPUA5 : 1; 1657 unsigned : 1; 1658 unsigned : 1; 1659 }; 1660 1661 struct 1662 { 1663 unsigned WPUA : 6; 1664 unsigned : 2; 1665 }; 1666 } __WPUAbits_t; 1667 1668 extern __at(0x020C) volatile __WPUAbits_t WPUAbits; 1669 1670 #define _WPUA0 0x01 1671 #define _WPUA1 0x02 1672 #define _WPUA2 0x04 1673 #define _WPUA3 0x08 1674 #define _WPUA4 0x10 1675 #define _WPUA5 0x20 1676 1677 //============================================================================== 1678 1679 extern __at(0x0211) __sfr SSP1BUF; 1680 extern __at(0x0211) __sfr SSPBUF; 1681 extern __at(0x0212) __sfr SSP1ADD; 1682 extern __at(0x0212) __sfr SSPADD; 1683 extern __at(0x0213) __sfr SSP1MSK; 1684 extern __at(0x0213) __sfr SSPMSK; 1685 1686 //============================================================================== 1687 // SSP1STAT Bits 1688 1689 extern __at(0x0214) __sfr SSP1STAT; 1690 1691 typedef struct 1692 { 1693 unsigned BF : 1; 1694 unsigned UA : 1; 1695 unsigned R_NOT_W : 1; 1696 unsigned S : 1; 1697 unsigned P : 1; 1698 unsigned D_NOT_A : 1; 1699 unsigned CKE : 1; 1700 unsigned SMP : 1; 1701 } __SSP1STATbits_t; 1702 1703 extern __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 1704 1705 #define _BF 0x01 1706 #define _UA 0x02 1707 #define _R_NOT_W 0x04 1708 #define _S 0x08 1709 #define _P 0x10 1710 #define _D_NOT_A 0x20 1711 #define _CKE 0x40 1712 #define _SMP 0x80 1713 1714 //============================================================================== 1715 1716 1717 //============================================================================== 1718 // SSPSTAT Bits 1719 1720 extern __at(0x0214) __sfr SSPSTAT; 1721 1722 typedef struct 1723 { 1724 unsigned BF : 1; 1725 unsigned UA : 1; 1726 unsigned R_NOT_W : 1; 1727 unsigned S : 1; 1728 unsigned P : 1; 1729 unsigned D_NOT_A : 1; 1730 unsigned CKE : 1; 1731 unsigned SMP : 1; 1732 } __SSPSTATbits_t; 1733 1734 extern __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 1735 1736 #define _SSPSTAT_BF 0x01 1737 #define _SSPSTAT_UA 0x02 1738 #define _SSPSTAT_R_NOT_W 0x04 1739 #define _SSPSTAT_S 0x08 1740 #define _SSPSTAT_P 0x10 1741 #define _SSPSTAT_D_NOT_A 0x20 1742 #define _SSPSTAT_CKE 0x40 1743 #define _SSPSTAT_SMP 0x80 1744 1745 //============================================================================== 1746 1747 1748 //============================================================================== 1749 // SSP1CON1 Bits 1750 1751 extern __at(0x0215) __sfr SSP1CON1; 1752 1753 typedef union 1754 { 1755 struct 1756 { 1757 unsigned SSPM0 : 1; 1758 unsigned SSPM1 : 1; 1759 unsigned SSPM2 : 1; 1760 unsigned SSPM3 : 1; 1761 unsigned CKP : 1; 1762 unsigned SSPEN : 1; 1763 unsigned SSPOV : 1; 1764 unsigned WCOL : 1; 1765 }; 1766 1767 struct 1768 { 1769 unsigned SSPM : 4; 1770 unsigned : 4; 1771 }; 1772 } __SSP1CON1bits_t; 1773 1774 extern __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 1775 1776 #define _SSPM0 0x01 1777 #define _SSPM1 0x02 1778 #define _SSPM2 0x04 1779 #define _SSPM3 0x08 1780 #define _CKP 0x10 1781 #define _SSPEN 0x20 1782 #define _SSPOV 0x40 1783 #define _WCOL 0x80 1784 1785 //============================================================================== 1786 1787 1788 //============================================================================== 1789 // SSPCON Bits 1790 1791 extern __at(0x0215) __sfr SSPCON; 1792 1793 typedef union 1794 { 1795 struct 1796 { 1797 unsigned SSPM0 : 1; 1798 unsigned SSPM1 : 1; 1799 unsigned SSPM2 : 1; 1800 unsigned SSPM3 : 1; 1801 unsigned CKP : 1; 1802 unsigned SSPEN : 1; 1803 unsigned SSPOV : 1; 1804 unsigned WCOL : 1; 1805 }; 1806 1807 struct 1808 { 1809 unsigned SSPM : 4; 1810 unsigned : 4; 1811 }; 1812 } __SSPCONbits_t; 1813 1814 extern __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 1815 1816 #define _SSPCON_SSPM0 0x01 1817 #define _SSPCON_SSPM1 0x02 1818 #define _SSPCON_SSPM2 0x04 1819 #define _SSPCON_SSPM3 0x08 1820 #define _SSPCON_CKP 0x10 1821 #define _SSPCON_SSPEN 0x20 1822 #define _SSPCON_SSPOV 0x40 1823 #define _SSPCON_WCOL 0x80 1824 1825 //============================================================================== 1826 1827 1828 //============================================================================== 1829 // SSPCON1 Bits 1830 1831 extern __at(0x0215) __sfr SSPCON1; 1832 1833 typedef union 1834 { 1835 struct 1836 { 1837 unsigned SSPM0 : 1; 1838 unsigned SSPM1 : 1; 1839 unsigned SSPM2 : 1; 1840 unsigned SSPM3 : 1; 1841 unsigned CKP : 1; 1842 unsigned SSPEN : 1; 1843 unsigned SSPOV : 1; 1844 unsigned WCOL : 1; 1845 }; 1846 1847 struct 1848 { 1849 unsigned SSPM : 4; 1850 unsigned : 4; 1851 }; 1852 } __SSPCON1bits_t; 1853 1854 extern __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 1855 1856 #define _SSPCON1_SSPM0 0x01 1857 #define _SSPCON1_SSPM1 0x02 1858 #define _SSPCON1_SSPM2 0x04 1859 #define _SSPCON1_SSPM3 0x08 1860 #define _SSPCON1_CKP 0x10 1861 #define _SSPCON1_SSPEN 0x20 1862 #define _SSPCON1_SSPOV 0x40 1863 #define _SSPCON1_WCOL 0x80 1864 1865 //============================================================================== 1866 1867 1868 //============================================================================== 1869 // SSP1CON2 Bits 1870 1871 extern __at(0x0216) __sfr SSP1CON2; 1872 1873 typedef struct 1874 { 1875 unsigned SEN : 1; 1876 unsigned RSEN : 1; 1877 unsigned PEN : 1; 1878 unsigned RCEN : 1; 1879 unsigned ACKEN : 1; 1880 unsigned ACKDT : 1; 1881 unsigned ACKSTAT : 1; 1882 unsigned GCEN : 1; 1883 } __SSP1CON2bits_t; 1884 1885 extern __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 1886 1887 #define _SEN 0x01 1888 #define _RSEN 0x02 1889 #define _PEN 0x04 1890 #define _RCEN 0x08 1891 #define _ACKEN 0x10 1892 #define _ACKDT 0x20 1893 #define _ACKSTAT 0x40 1894 #define _GCEN 0x80 1895 1896 //============================================================================== 1897 1898 1899 //============================================================================== 1900 // SSPCON2 Bits 1901 1902 extern __at(0x0216) __sfr SSPCON2; 1903 1904 typedef struct 1905 { 1906 unsigned SEN : 1; 1907 unsigned RSEN : 1; 1908 unsigned PEN : 1; 1909 unsigned RCEN : 1; 1910 unsigned ACKEN : 1; 1911 unsigned ACKDT : 1; 1912 unsigned ACKSTAT : 1; 1913 unsigned GCEN : 1; 1914 } __SSPCON2bits_t; 1915 1916 extern __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 1917 1918 #define _SSPCON2_SEN 0x01 1919 #define _SSPCON2_RSEN 0x02 1920 #define _SSPCON2_PEN 0x04 1921 #define _SSPCON2_RCEN 0x08 1922 #define _SSPCON2_ACKEN 0x10 1923 #define _SSPCON2_ACKDT 0x20 1924 #define _SSPCON2_ACKSTAT 0x40 1925 #define _SSPCON2_GCEN 0x80 1926 1927 //============================================================================== 1928 1929 1930 //============================================================================== 1931 // SSP1CON3 Bits 1932 1933 extern __at(0x0217) __sfr SSP1CON3; 1934 1935 typedef struct 1936 { 1937 unsigned DHEN : 1; 1938 unsigned AHEN : 1; 1939 unsigned SBCDE : 1; 1940 unsigned SDAHT : 1; 1941 unsigned BOEN : 1; 1942 unsigned SCIE : 1; 1943 unsigned PCIE : 1; 1944 unsigned ACKTIM : 1; 1945 } __SSP1CON3bits_t; 1946 1947 extern __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 1948 1949 #define _DHEN 0x01 1950 #define _AHEN 0x02 1951 #define _SBCDE 0x04 1952 #define _SDAHT 0x08 1953 #define _BOEN 0x10 1954 #define _SCIE 0x20 1955 #define _PCIE 0x40 1956 #define _ACKTIM 0x80 1957 1958 //============================================================================== 1959 1960 1961 //============================================================================== 1962 // SSPCON3 Bits 1963 1964 extern __at(0x0217) __sfr SSPCON3; 1965 1966 typedef struct 1967 { 1968 unsigned DHEN : 1; 1969 unsigned AHEN : 1; 1970 unsigned SBCDE : 1; 1971 unsigned SDAHT : 1; 1972 unsigned BOEN : 1; 1973 unsigned SCIE : 1; 1974 unsigned PCIE : 1; 1975 unsigned ACKTIM : 1; 1976 } __SSPCON3bits_t; 1977 1978 extern __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 1979 1980 #define _SSPCON3_DHEN 0x01 1981 #define _SSPCON3_AHEN 0x02 1982 #define _SSPCON3_SBCDE 0x04 1983 #define _SSPCON3_SDAHT 0x08 1984 #define _SSPCON3_BOEN 0x10 1985 #define _SSPCON3_SCIE 0x20 1986 #define _SSPCON3_PCIE 0x40 1987 #define _SSPCON3_ACKTIM 0x80 1988 1989 //============================================================================== 1990 1991 1992 //============================================================================== 1993 // IOCAP Bits 1994 1995 extern __at(0x0391) __sfr IOCAP; 1996 1997 typedef union 1998 { 1999 struct 2000 { 2001 unsigned IOCAP0 : 1; 2002 unsigned IOCAP1 : 1; 2003 unsigned IOCAP2 : 1; 2004 unsigned IOCAP3 : 1; 2005 unsigned IOCAP4 : 1; 2006 unsigned IOCAP5 : 1; 2007 unsigned : 1; 2008 unsigned : 1; 2009 }; 2010 2011 struct 2012 { 2013 unsigned IOCAP : 6; 2014 unsigned : 2; 2015 }; 2016 } __IOCAPbits_t; 2017 2018 extern __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 2019 2020 #define _IOCAP0 0x01 2021 #define _IOCAP1 0x02 2022 #define _IOCAP2 0x04 2023 #define _IOCAP3 0x08 2024 #define _IOCAP4 0x10 2025 #define _IOCAP5 0x20 2026 2027 //============================================================================== 2028 2029 2030 //============================================================================== 2031 // IOCAN Bits 2032 2033 extern __at(0x0392) __sfr IOCAN; 2034 2035 typedef union 2036 { 2037 struct 2038 { 2039 unsigned IOCAN0 : 1; 2040 unsigned IOCAN1 : 1; 2041 unsigned IOCAN2 : 1; 2042 unsigned IOCAN3 : 1; 2043 unsigned IOCAN4 : 1; 2044 unsigned IOCAN5 : 1; 2045 unsigned : 1; 2046 unsigned : 1; 2047 }; 2048 2049 struct 2050 { 2051 unsigned IOCAN : 6; 2052 unsigned : 2; 2053 }; 2054 } __IOCANbits_t; 2055 2056 extern __at(0x0392) volatile __IOCANbits_t IOCANbits; 2057 2058 #define _IOCAN0 0x01 2059 #define _IOCAN1 0x02 2060 #define _IOCAN2 0x04 2061 #define _IOCAN3 0x08 2062 #define _IOCAN4 0x10 2063 #define _IOCAN5 0x20 2064 2065 //============================================================================== 2066 2067 2068 //============================================================================== 2069 // IOCAF Bits 2070 2071 extern __at(0x0393) __sfr IOCAF; 2072 2073 typedef union 2074 { 2075 struct 2076 { 2077 unsigned IOCAF0 : 1; 2078 unsigned IOCAF1 : 1; 2079 unsigned IOCAF2 : 1; 2080 unsigned IOCAF3 : 1; 2081 unsigned IOCAF4 : 1; 2082 unsigned IOCAF5 : 1; 2083 unsigned : 1; 2084 unsigned : 1; 2085 }; 2086 2087 struct 2088 { 2089 unsigned IOCAF : 6; 2090 unsigned : 2; 2091 }; 2092 } __IOCAFbits_t; 2093 2094 extern __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 2095 2096 #define _IOCAF0 0x01 2097 #define _IOCAF1 0x02 2098 #define _IOCAF2 0x04 2099 #define _IOCAF3 0x08 2100 #define _IOCAF4 0x10 2101 #define _IOCAF5 0x20 2102 2103 //============================================================================== 2104 2105 extern __at(0x0498) __sfr NCO1ACC; 2106 2107 //============================================================================== 2108 // NCO1ACCL Bits 2109 2110 extern __at(0x0498) __sfr NCO1ACCL; 2111 2112 typedef struct 2113 { 2114 unsigned NCO1ACC0 : 1; 2115 unsigned NCO1ACC1 : 1; 2116 unsigned NCO1ACC2 : 1; 2117 unsigned NCO1ACC3 : 1; 2118 unsigned NCO1ACC4 : 1; 2119 unsigned NCO1ACC5 : 1; 2120 unsigned NCO1ACC6 : 1; 2121 unsigned NCO1ACC7 : 1; 2122 } __NCO1ACCLbits_t; 2123 2124 extern __at(0x0498) volatile __NCO1ACCLbits_t NCO1ACCLbits; 2125 2126 #define _NCO1ACC0 0x01 2127 #define _NCO1ACC1 0x02 2128 #define _NCO1ACC2 0x04 2129 #define _NCO1ACC3 0x08 2130 #define _NCO1ACC4 0x10 2131 #define _NCO1ACC5 0x20 2132 #define _NCO1ACC6 0x40 2133 #define _NCO1ACC7 0x80 2134 2135 //============================================================================== 2136 2137 2138 //============================================================================== 2139 // NCO1ACCH Bits 2140 2141 extern __at(0x0499) __sfr NCO1ACCH; 2142 2143 typedef struct 2144 { 2145 unsigned NCO1ACC8 : 1; 2146 unsigned NCO1ACC9 : 1; 2147 unsigned NCO1ACC10 : 1; 2148 unsigned NCO1ACC11 : 1; 2149 unsigned NCO1ACC12 : 1; 2150 unsigned NCO1ACC13 : 1; 2151 unsigned NCO1ACC14 : 1; 2152 unsigned NCO1ACC15 : 1; 2153 } __NCO1ACCHbits_t; 2154 2155 extern __at(0x0499) volatile __NCO1ACCHbits_t NCO1ACCHbits; 2156 2157 #define _NCO1ACC8 0x01 2158 #define _NCO1ACC9 0x02 2159 #define _NCO1ACC10 0x04 2160 #define _NCO1ACC11 0x08 2161 #define _NCO1ACC12 0x10 2162 #define _NCO1ACC13 0x20 2163 #define _NCO1ACC14 0x40 2164 #define _NCO1ACC15 0x80 2165 2166 //============================================================================== 2167 2168 2169 //============================================================================== 2170 // NCO1ACCU Bits 2171 2172 extern __at(0x049A) __sfr NCO1ACCU; 2173 2174 typedef struct 2175 { 2176 unsigned NCO1ACC16 : 1; 2177 unsigned NCO1ACC17 : 1; 2178 unsigned NCO1ACC18 : 1; 2179 unsigned NCO1ACC19 : 1; 2180 unsigned : 1; 2181 unsigned : 1; 2182 unsigned : 1; 2183 unsigned : 1; 2184 } __NCO1ACCUbits_t; 2185 2186 extern __at(0x049A) volatile __NCO1ACCUbits_t NCO1ACCUbits; 2187 2188 #define _NCO1ACC16 0x01 2189 #define _NCO1ACC17 0x02 2190 #define _NCO1ACC18 0x04 2191 #define _NCO1ACC19 0x08 2192 2193 //============================================================================== 2194 2195 extern __at(0x049B) __sfr NCO1INC; 2196 2197 //============================================================================== 2198 // NCO1INCL Bits 2199 2200 extern __at(0x049B) __sfr NCO1INCL; 2201 2202 typedef struct 2203 { 2204 unsigned NCO1INC0 : 1; 2205 unsigned NCO1INC1 : 1; 2206 unsigned NCO1INC2 : 1; 2207 unsigned NCO1INC3 : 1; 2208 unsigned NCO1INC4 : 1; 2209 unsigned NCO1INC5 : 1; 2210 unsigned NCO1INC6 : 1; 2211 unsigned NCO1INC7 : 1; 2212 } __NCO1INCLbits_t; 2213 2214 extern __at(0x049B) volatile __NCO1INCLbits_t NCO1INCLbits; 2215 2216 #define _NCO1INC0 0x01 2217 #define _NCO1INC1 0x02 2218 #define _NCO1INC2 0x04 2219 #define _NCO1INC3 0x08 2220 #define _NCO1INC4 0x10 2221 #define _NCO1INC5 0x20 2222 #define _NCO1INC6 0x40 2223 #define _NCO1INC7 0x80 2224 2225 //============================================================================== 2226 2227 2228 //============================================================================== 2229 // NCO1INCH Bits 2230 2231 extern __at(0x049C) __sfr NCO1INCH; 2232 2233 typedef struct 2234 { 2235 unsigned NCO1INC8 : 1; 2236 unsigned NCO1INC9 : 1; 2237 unsigned NCO1INC10 : 1; 2238 unsigned NCO1INC11 : 1; 2239 unsigned NCO1INC12 : 1; 2240 unsigned NCO1INC13 : 1; 2241 unsigned NCO1INC14 : 1; 2242 unsigned NCO1INC15 : 1; 2243 } __NCO1INCHbits_t; 2244 2245 extern __at(0x049C) volatile __NCO1INCHbits_t NCO1INCHbits; 2246 2247 #define _NCO1INC8 0x01 2248 #define _NCO1INC9 0x02 2249 #define _NCO1INC10 0x04 2250 #define _NCO1INC11 0x08 2251 #define _NCO1INC12 0x10 2252 #define _NCO1INC13 0x20 2253 #define _NCO1INC14 0x40 2254 #define _NCO1INC15 0x80 2255 2256 //============================================================================== 2257 2258 extern __at(0x049D) __sfr NCO1INCU; 2259 2260 //============================================================================== 2261 // NCO1CON Bits 2262 2263 extern __at(0x049E) __sfr NCO1CON; 2264 2265 typedef struct 2266 { 2267 unsigned N1PFM : 1; 2268 unsigned : 1; 2269 unsigned : 1; 2270 unsigned : 1; 2271 unsigned N1POL : 1; 2272 unsigned N1OUT : 1; 2273 unsigned N1OE : 1; 2274 unsigned N1EN : 1; 2275 } __NCO1CONbits_t; 2276 2277 extern __at(0x049E) volatile __NCO1CONbits_t NCO1CONbits; 2278 2279 #define _N1PFM 0x01 2280 #define _N1POL 0x10 2281 #define _N1OUT 0x20 2282 #define _N1OE 0x40 2283 #define _N1EN 0x80 2284 2285 //============================================================================== 2286 2287 2288 //============================================================================== 2289 // NCO1CLK Bits 2290 2291 extern __at(0x049F) __sfr NCO1CLK; 2292 2293 typedef union 2294 { 2295 struct 2296 { 2297 unsigned N1CKS0 : 1; 2298 unsigned N1CKS1 : 1; 2299 unsigned : 1; 2300 unsigned : 1; 2301 unsigned : 1; 2302 unsigned N1PWS0 : 1; 2303 unsigned N1PWS1 : 1; 2304 unsigned N1PWS2 : 1; 2305 }; 2306 2307 struct 2308 { 2309 unsigned N1CKS : 2; 2310 unsigned : 6; 2311 }; 2312 2313 struct 2314 { 2315 unsigned : 5; 2316 unsigned N1PWS : 3; 2317 }; 2318 } __NCO1CLKbits_t; 2319 2320 extern __at(0x049F) volatile __NCO1CLKbits_t NCO1CLKbits; 2321 2322 #define _N1CKS0 0x01 2323 #define _N1CKS1 0x02 2324 #define _N1PWS0 0x20 2325 #define _N1PWS1 0x40 2326 #define _N1PWS2 0x80 2327 2328 //============================================================================== 2329 2330 2331 //============================================================================== 2332 // PWM1DCL Bits 2333 2334 extern __at(0x0611) __sfr PWM1DCL; 2335 2336 typedef union 2337 { 2338 struct 2339 { 2340 unsigned : 1; 2341 unsigned : 1; 2342 unsigned : 1; 2343 unsigned : 1; 2344 unsigned : 1; 2345 unsigned : 1; 2346 unsigned PWM1DCL0 : 1; 2347 unsigned PWM1DCL1 : 1; 2348 }; 2349 2350 struct 2351 { 2352 unsigned : 6; 2353 unsigned PWM1DCL : 2; 2354 }; 2355 } __PWM1DCLbits_t; 2356 2357 extern __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits; 2358 2359 #define _PWM1DCL0 0x40 2360 #define _PWM1DCL1 0x80 2361 2362 //============================================================================== 2363 2364 2365 //============================================================================== 2366 // PWM1DCH Bits 2367 2368 extern __at(0x0612) __sfr PWM1DCH; 2369 2370 typedef struct 2371 { 2372 unsigned PWM1DCH0 : 1; 2373 unsigned PWM1DCH1 : 1; 2374 unsigned PWM1DCH2 : 1; 2375 unsigned PWM1DCH3 : 1; 2376 unsigned PWM1DCH4 : 1; 2377 unsigned PWM1DCH5 : 1; 2378 unsigned PWM1DCH6 : 1; 2379 unsigned PWM1DCH7 : 1; 2380 } __PWM1DCHbits_t; 2381 2382 extern __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits; 2383 2384 #define _PWM1DCH0 0x01 2385 #define _PWM1DCH1 0x02 2386 #define _PWM1DCH2 0x04 2387 #define _PWM1DCH3 0x08 2388 #define _PWM1DCH4 0x10 2389 #define _PWM1DCH5 0x20 2390 #define _PWM1DCH6 0x40 2391 #define _PWM1DCH7 0x80 2392 2393 //============================================================================== 2394 2395 2396 //============================================================================== 2397 // PWM1CON Bits 2398 2399 extern __at(0x0613) __sfr PWM1CON; 2400 2401 typedef struct 2402 { 2403 unsigned : 1; 2404 unsigned : 1; 2405 unsigned : 1; 2406 unsigned : 1; 2407 unsigned PWM1POL : 1; 2408 unsigned PWM1OUT : 1; 2409 unsigned PWM1OE : 1; 2410 unsigned PWM1EN : 1; 2411 } __PWM1CONbits_t; 2412 2413 extern __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits; 2414 2415 #define _PWM1POL 0x10 2416 #define _PWM1OUT 0x20 2417 #define _PWM1OE 0x40 2418 #define _PWM1EN 0x80 2419 2420 //============================================================================== 2421 2422 2423 //============================================================================== 2424 // PWM1CON0 Bits 2425 2426 extern __at(0x0613) __sfr PWM1CON0; 2427 2428 typedef struct 2429 { 2430 unsigned : 1; 2431 unsigned : 1; 2432 unsigned : 1; 2433 unsigned : 1; 2434 unsigned PWM1POL : 1; 2435 unsigned PWM1OUT : 1; 2436 unsigned PWM1OE : 1; 2437 unsigned PWM1EN : 1; 2438 } __PWM1CON0bits_t; 2439 2440 extern __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits; 2441 2442 #define _PWM1CON0_PWM1POL 0x10 2443 #define _PWM1CON0_PWM1OUT 0x20 2444 #define _PWM1CON0_PWM1OE 0x40 2445 #define _PWM1CON0_PWM1EN 0x80 2446 2447 //============================================================================== 2448 2449 2450 //============================================================================== 2451 // PWM2DCL Bits 2452 2453 extern __at(0x0614) __sfr PWM2DCL; 2454 2455 typedef union 2456 { 2457 struct 2458 { 2459 unsigned : 1; 2460 unsigned : 1; 2461 unsigned : 1; 2462 unsigned : 1; 2463 unsigned : 1; 2464 unsigned : 1; 2465 unsigned PWM2DCL0 : 1; 2466 unsigned PWM2DCL1 : 1; 2467 }; 2468 2469 struct 2470 { 2471 unsigned : 6; 2472 unsigned PWM2DCL : 2; 2473 }; 2474 } __PWM2DCLbits_t; 2475 2476 extern __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits; 2477 2478 #define _PWM2DCL0 0x40 2479 #define _PWM2DCL1 0x80 2480 2481 //============================================================================== 2482 2483 2484 //============================================================================== 2485 // PWM2DCH Bits 2486 2487 extern __at(0x0615) __sfr PWM2DCH; 2488 2489 typedef struct 2490 { 2491 unsigned PWM2DCH0 : 1; 2492 unsigned PWM2DCH1 : 1; 2493 unsigned PWM2DCH2 : 1; 2494 unsigned PWM2DCH3 : 1; 2495 unsigned PWM2DCH4 : 1; 2496 unsigned PWM2DCH5 : 1; 2497 unsigned PWM2DCH6 : 1; 2498 unsigned PWM2DCH7 : 1; 2499 } __PWM2DCHbits_t; 2500 2501 extern __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits; 2502 2503 #define _PWM2DCH0 0x01 2504 #define _PWM2DCH1 0x02 2505 #define _PWM2DCH2 0x04 2506 #define _PWM2DCH3 0x08 2507 #define _PWM2DCH4 0x10 2508 #define _PWM2DCH5 0x20 2509 #define _PWM2DCH6 0x40 2510 #define _PWM2DCH7 0x80 2511 2512 //============================================================================== 2513 2514 2515 //============================================================================== 2516 // PWM2CON Bits 2517 2518 extern __at(0x0616) __sfr PWM2CON; 2519 2520 typedef struct 2521 { 2522 unsigned : 1; 2523 unsigned : 1; 2524 unsigned : 1; 2525 unsigned : 1; 2526 unsigned PWM2POL : 1; 2527 unsigned PWM2OUT : 1; 2528 unsigned PWM2OE : 1; 2529 unsigned PWM2EN : 1; 2530 } __PWM2CONbits_t; 2531 2532 extern __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits; 2533 2534 #define _PWM2POL 0x10 2535 #define _PWM2OUT 0x20 2536 #define _PWM2OE 0x40 2537 #define _PWM2EN 0x80 2538 2539 //============================================================================== 2540 2541 2542 //============================================================================== 2543 // PWM2CON0 Bits 2544 2545 extern __at(0x0616) __sfr PWM2CON0; 2546 2547 typedef struct 2548 { 2549 unsigned : 1; 2550 unsigned : 1; 2551 unsigned : 1; 2552 unsigned : 1; 2553 unsigned PWM2POL : 1; 2554 unsigned PWM2OUT : 1; 2555 unsigned PWM2OE : 1; 2556 unsigned PWM2EN : 1; 2557 } __PWM2CON0bits_t; 2558 2559 extern __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits; 2560 2561 #define _PWM2CON0_PWM2POL 0x10 2562 #define _PWM2CON0_PWM2OUT 0x20 2563 #define _PWM2CON0_PWM2OE 0x40 2564 #define _PWM2CON0_PWM2EN 0x80 2565 2566 //============================================================================== 2567 2568 2569 //============================================================================== 2570 // PWM3DCL Bits 2571 2572 extern __at(0x0617) __sfr PWM3DCL; 2573 2574 typedef union 2575 { 2576 struct 2577 { 2578 unsigned : 1; 2579 unsigned : 1; 2580 unsigned : 1; 2581 unsigned : 1; 2582 unsigned : 1; 2583 unsigned : 1; 2584 unsigned PWM3DCL0 : 1; 2585 unsigned PWM3DCL1 : 1; 2586 }; 2587 2588 struct 2589 { 2590 unsigned : 6; 2591 unsigned PWM3DCL : 2; 2592 }; 2593 } __PWM3DCLbits_t; 2594 2595 extern __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits; 2596 2597 #define _PWM3DCL0 0x40 2598 #define _PWM3DCL1 0x80 2599 2600 //============================================================================== 2601 2602 2603 //============================================================================== 2604 // PWM3DCH Bits 2605 2606 extern __at(0x0618) __sfr PWM3DCH; 2607 2608 typedef struct 2609 { 2610 unsigned PWM3DCH0 : 1; 2611 unsigned PWM3DCH1 : 1; 2612 unsigned PWM3DCH2 : 1; 2613 unsigned PWM3DCH3 : 1; 2614 unsigned PWM3DCH4 : 1; 2615 unsigned PWM3DCH5 : 1; 2616 unsigned PWM3DCH6 : 1; 2617 unsigned PWM3DCH7 : 1; 2618 } __PWM3DCHbits_t; 2619 2620 extern __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits; 2621 2622 #define _PWM3DCH0 0x01 2623 #define _PWM3DCH1 0x02 2624 #define _PWM3DCH2 0x04 2625 #define _PWM3DCH3 0x08 2626 #define _PWM3DCH4 0x10 2627 #define _PWM3DCH5 0x20 2628 #define _PWM3DCH6 0x40 2629 #define _PWM3DCH7 0x80 2630 2631 //============================================================================== 2632 2633 2634 //============================================================================== 2635 // PWM3CON Bits 2636 2637 extern __at(0x0619) __sfr PWM3CON; 2638 2639 typedef struct 2640 { 2641 unsigned : 1; 2642 unsigned : 1; 2643 unsigned : 1; 2644 unsigned : 1; 2645 unsigned PWM3POL : 1; 2646 unsigned PWM3OUT : 1; 2647 unsigned PWM3OE : 1; 2648 unsigned PWM3EN : 1; 2649 } __PWM3CONbits_t; 2650 2651 extern __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits; 2652 2653 #define _PWM3POL 0x10 2654 #define _PWM3OUT 0x20 2655 #define _PWM3OE 0x40 2656 #define _PWM3EN 0x80 2657 2658 //============================================================================== 2659 2660 2661 //============================================================================== 2662 // PWM3CON0 Bits 2663 2664 extern __at(0x0619) __sfr PWM3CON0; 2665 2666 typedef struct 2667 { 2668 unsigned : 1; 2669 unsigned : 1; 2670 unsigned : 1; 2671 unsigned : 1; 2672 unsigned PWM3POL : 1; 2673 unsigned PWM3OUT : 1; 2674 unsigned PWM3OE : 1; 2675 unsigned PWM3EN : 1; 2676 } __PWM3CON0bits_t; 2677 2678 extern __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits; 2679 2680 #define _PWM3CON0_PWM3POL 0x10 2681 #define _PWM3CON0_PWM3OUT 0x20 2682 #define _PWM3CON0_PWM3OE 0x40 2683 #define _PWM3CON0_PWM3EN 0x80 2684 2685 //============================================================================== 2686 2687 2688 //============================================================================== 2689 // PWM4DCL Bits 2690 2691 extern __at(0x061A) __sfr PWM4DCL; 2692 2693 typedef union 2694 { 2695 struct 2696 { 2697 unsigned : 1; 2698 unsigned : 1; 2699 unsigned : 1; 2700 unsigned : 1; 2701 unsigned : 1; 2702 unsigned : 1; 2703 unsigned PWM4DCL0 : 1; 2704 unsigned PWM4DCL1 : 1; 2705 }; 2706 2707 struct 2708 { 2709 unsigned : 6; 2710 unsigned PWM4DCL : 2; 2711 }; 2712 } __PWM4DCLbits_t; 2713 2714 extern __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits; 2715 2716 #define _PWM4DCL0 0x40 2717 #define _PWM4DCL1 0x80 2718 2719 //============================================================================== 2720 2721 2722 //============================================================================== 2723 // PWM4DCH Bits 2724 2725 extern __at(0x061B) __sfr PWM4DCH; 2726 2727 typedef struct 2728 { 2729 unsigned PWM4DCH0 : 1; 2730 unsigned PWM4DCH1 : 1; 2731 unsigned PWM4DCH2 : 1; 2732 unsigned PWM4DCH3 : 1; 2733 unsigned PWM4DCH4 : 1; 2734 unsigned PWM4DCH5 : 1; 2735 unsigned PWM4DCH6 : 1; 2736 unsigned PWM4DCH7 : 1; 2737 } __PWM4DCHbits_t; 2738 2739 extern __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits; 2740 2741 #define _PWM4DCH0 0x01 2742 #define _PWM4DCH1 0x02 2743 #define _PWM4DCH2 0x04 2744 #define _PWM4DCH3 0x08 2745 #define _PWM4DCH4 0x10 2746 #define _PWM4DCH5 0x20 2747 #define _PWM4DCH6 0x40 2748 #define _PWM4DCH7 0x80 2749 2750 //============================================================================== 2751 2752 2753 //============================================================================== 2754 // PWM4CON Bits 2755 2756 extern __at(0x061C) __sfr PWM4CON; 2757 2758 typedef struct 2759 { 2760 unsigned : 1; 2761 unsigned : 1; 2762 unsigned : 1; 2763 unsigned : 1; 2764 unsigned PWM4POL : 1; 2765 unsigned PWM4OUT : 1; 2766 unsigned PWM4OE : 1; 2767 unsigned PWM4EN : 1; 2768 } __PWM4CONbits_t; 2769 2770 extern __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits; 2771 2772 #define _PWM4POL 0x10 2773 #define _PWM4OUT 0x20 2774 #define _PWM4OE 0x40 2775 #define _PWM4EN 0x80 2776 2777 //============================================================================== 2778 2779 2780 //============================================================================== 2781 // PWM4CON0 Bits 2782 2783 extern __at(0x061C) __sfr PWM4CON0; 2784 2785 typedef struct 2786 { 2787 unsigned : 1; 2788 unsigned : 1; 2789 unsigned : 1; 2790 unsigned : 1; 2791 unsigned PWM4POL : 1; 2792 unsigned PWM4OUT : 1; 2793 unsigned PWM4OE : 1; 2794 unsigned PWM4EN : 1; 2795 } __PWM4CON0bits_t; 2796 2797 extern __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits; 2798 2799 #define _PWM4CON0_PWM4POL 0x10 2800 #define _PWM4CON0_PWM4OUT 0x20 2801 #define _PWM4CON0_PWM4OE 0x40 2802 #define _PWM4CON0_PWM4EN 0x80 2803 2804 //============================================================================== 2805 2806 2807 //============================================================================== 2808 // CWG1DBR Bits 2809 2810 extern __at(0x0691) __sfr CWG1DBR; 2811 2812 typedef union 2813 { 2814 struct 2815 { 2816 unsigned CWG1DBR0 : 1; 2817 unsigned CWG1DBR1 : 1; 2818 unsigned CWG1DBR2 : 1; 2819 unsigned CWG1DBR3 : 1; 2820 unsigned CWG1DBR4 : 1; 2821 unsigned CWG1DBR5 : 1; 2822 unsigned : 1; 2823 unsigned : 1; 2824 }; 2825 2826 struct 2827 { 2828 unsigned CWG1DBR : 6; 2829 unsigned : 2; 2830 }; 2831 } __CWG1DBRbits_t; 2832 2833 extern __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits; 2834 2835 #define _CWG1DBR0 0x01 2836 #define _CWG1DBR1 0x02 2837 #define _CWG1DBR2 0x04 2838 #define _CWG1DBR3 0x08 2839 #define _CWG1DBR4 0x10 2840 #define _CWG1DBR5 0x20 2841 2842 //============================================================================== 2843 2844 2845 //============================================================================== 2846 // CWG1DBF Bits 2847 2848 extern __at(0x0692) __sfr CWG1DBF; 2849 2850 typedef union 2851 { 2852 struct 2853 { 2854 unsigned CWG1DBF0 : 1; 2855 unsigned CWG1DBF1 : 1; 2856 unsigned CWG1DBF2 : 1; 2857 unsigned CWG1DBF3 : 1; 2858 unsigned CWG1DBF4 : 1; 2859 unsigned CWG1DBF5 : 1; 2860 unsigned : 1; 2861 unsigned : 1; 2862 }; 2863 2864 struct 2865 { 2866 unsigned CWG1DBF : 6; 2867 unsigned : 2; 2868 }; 2869 } __CWG1DBFbits_t; 2870 2871 extern __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits; 2872 2873 #define _CWG1DBF0 0x01 2874 #define _CWG1DBF1 0x02 2875 #define _CWG1DBF2 0x04 2876 #define _CWG1DBF3 0x08 2877 #define _CWG1DBF4 0x10 2878 #define _CWG1DBF5 0x20 2879 2880 //============================================================================== 2881 2882 2883 //============================================================================== 2884 // CWG1CON0 Bits 2885 2886 extern __at(0x0693) __sfr CWG1CON0; 2887 2888 typedef struct 2889 { 2890 unsigned G1CS0 : 1; 2891 unsigned : 1; 2892 unsigned : 1; 2893 unsigned G1POLA : 1; 2894 unsigned G1POLB : 1; 2895 unsigned G1OEA : 1; 2896 unsigned G1OEB : 1; 2897 unsigned G1EN : 1; 2898 } __CWG1CON0bits_t; 2899 2900 extern __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits; 2901 2902 #define _G1CS0 0x01 2903 #define _G1POLA 0x08 2904 #define _G1POLB 0x10 2905 #define _G1OEA 0x20 2906 #define _G1OEB 0x40 2907 #define _G1EN 0x80 2908 2909 //============================================================================== 2910 2911 2912 //============================================================================== 2913 // CWG1CON1 Bits 2914 2915 extern __at(0x0694) __sfr CWG1CON1; 2916 2917 typedef union 2918 { 2919 struct 2920 { 2921 unsigned G1IS0 : 1; 2922 unsigned G1IS1 : 1; 2923 unsigned G1IS2 : 1; 2924 unsigned : 1; 2925 unsigned G1ASDLA0 : 1; 2926 unsigned G1ASDLA1 : 1; 2927 unsigned G1ASDLB0 : 1; 2928 unsigned G1ASDLB1 : 1; 2929 }; 2930 2931 struct 2932 { 2933 unsigned G1IS : 3; 2934 unsigned : 5; 2935 }; 2936 2937 struct 2938 { 2939 unsigned : 4; 2940 unsigned G1ASDLA : 2; 2941 unsigned : 2; 2942 }; 2943 2944 struct 2945 { 2946 unsigned : 6; 2947 unsigned G1ASDLB : 2; 2948 }; 2949 } __CWG1CON1bits_t; 2950 2951 extern __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits; 2952 2953 #define _G1IS0 0x01 2954 #define _G1IS1 0x02 2955 #define _G1IS2 0x04 2956 #define _G1ASDLA0 0x10 2957 #define _G1ASDLA1 0x20 2958 #define _G1ASDLB0 0x40 2959 #define _G1ASDLB1 0x80 2960 2961 //============================================================================== 2962 2963 2964 //============================================================================== 2965 // CWG1CON2 Bits 2966 2967 extern __at(0x0695) __sfr CWG1CON2; 2968 2969 typedef struct 2970 { 2971 unsigned G1ASDSCLC2 : 1; 2972 unsigned G1ASDSFLT : 1; 2973 unsigned G1ASDSC1 : 1; 2974 unsigned G1ASDSC2 : 1; 2975 unsigned : 1; 2976 unsigned : 1; 2977 unsigned G1ARSEN : 1; 2978 unsigned G1ASE : 1; 2979 } __CWG1CON2bits_t; 2980 2981 extern __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits; 2982 2983 #define _G1ASDSCLC2 0x01 2984 #define _G1ASDSFLT 0x02 2985 #define _G1ASDSC1 0x04 2986 #define _G1ASDSC2 0x08 2987 #define _G1ARSEN 0x40 2988 #define _G1ASE 0x80 2989 2990 //============================================================================== 2991 2992 2993 //============================================================================== 2994 // CLCDATA Bits 2995 2996 extern __at(0x0F0F) __sfr CLCDATA; 2997 2998 typedef struct 2999 { 3000 unsigned MCLC1OUT : 1; 3001 unsigned MCLC2OUT : 1; 3002 unsigned : 1; 3003 unsigned : 1; 3004 unsigned : 1; 3005 unsigned : 1; 3006 unsigned : 1; 3007 unsigned : 1; 3008 } __CLCDATAbits_t; 3009 3010 extern __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits; 3011 3012 #define _MCLC1OUT 0x01 3013 #define _MCLC2OUT 0x02 3014 3015 //============================================================================== 3016 3017 3018 //============================================================================== 3019 // CLC1CON Bits 3020 3021 extern __at(0x0F10) __sfr CLC1CON; 3022 3023 typedef union 3024 { 3025 struct 3026 { 3027 unsigned LC1MODE0 : 1; 3028 unsigned LC1MODE1 : 1; 3029 unsigned LC1MODE2 : 1; 3030 unsigned LC1INTN : 1; 3031 unsigned LC1INTP : 1; 3032 unsigned LC1OUT : 1; 3033 unsigned LC1OE : 1; 3034 unsigned LC1EN : 1; 3035 }; 3036 3037 struct 3038 { 3039 unsigned LCMODE0 : 1; 3040 unsigned LCMODE1 : 1; 3041 unsigned LCMODE2 : 1; 3042 unsigned LCINTN : 1; 3043 unsigned LCINTP : 1; 3044 unsigned LCOUT : 1; 3045 unsigned LCOE : 1; 3046 unsigned LCEN : 1; 3047 }; 3048 3049 struct 3050 { 3051 unsigned LC1MODE : 3; 3052 unsigned : 5; 3053 }; 3054 3055 struct 3056 { 3057 unsigned LCMODE : 3; 3058 unsigned : 5; 3059 }; 3060 } __CLC1CONbits_t; 3061 3062 extern __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits; 3063 3064 #define _LC1MODE0 0x01 3065 #define _LCMODE0 0x01 3066 #define _LC1MODE1 0x02 3067 #define _LCMODE1 0x02 3068 #define _LC1MODE2 0x04 3069 #define _LCMODE2 0x04 3070 #define _LC1INTN 0x08 3071 #define _LCINTN 0x08 3072 #define _LC1INTP 0x10 3073 #define _LCINTP 0x10 3074 #define _LC1OUT 0x20 3075 #define _LCOUT 0x20 3076 #define _LC1OE 0x40 3077 #define _LCOE 0x40 3078 #define _LC1EN 0x80 3079 #define _LCEN 0x80 3080 3081 //============================================================================== 3082 3083 3084 //============================================================================== 3085 // CLC1POL Bits 3086 3087 extern __at(0x0F11) __sfr CLC1POL; 3088 3089 typedef union 3090 { 3091 struct 3092 { 3093 unsigned LC1G1POL : 1; 3094 unsigned LC1G2POL : 1; 3095 unsigned LC1G3POL : 1; 3096 unsigned LC1G4POL : 1; 3097 unsigned : 1; 3098 unsigned : 1; 3099 unsigned : 1; 3100 unsigned LC1POL : 1; 3101 }; 3102 3103 struct 3104 { 3105 unsigned G1POL : 1; 3106 unsigned G2POL : 1; 3107 unsigned G3POL : 1; 3108 unsigned G4POL : 1; 3109 unsigned : 1; 3110 unsigned : 1; 3111 unsigned : 1; 3112 unsigned POL : 1; 3113 }; 3114 } __CLC1POLbits_t; 3115 3116 extern __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits; 3117 3118 #define _LC1G1POL 0x01 3119 #define _G1POL 0x01 3120 #define _LC1G2POL 0x02 3121 #define _G2POL 0x02 3122 #define _LC1G3POL 0x04 3123 #define _G3POL 0x04 3124 #define _LC1G4POL 0x08 3125 #define _G4POL 0x08 3126 #define _LC1POL 0x80 3127 #define _POL 0x80 3128 3129 //============================================================================== 3130 3131 3132 //============================================================================== 3133 // CLC1SEL0 Bits 3134 3135 extern __at(0x0F12) __sfr CLC1SEL0; 3136 3137 typedef union 3138 { 3139 struct 3140 { 3141 unsigned LC1D1S0 : 1; 3142 unsigned LC1D1S1 : 1; 3143 unsigned LC1D1S2 : 1; 3144 unsigned : 1; 3145 unsigned LC1D2S0 : 1; 3146 unsigned LC1D2S1 : 1; 3147 unsigned LC1D2S2 : 1; 3148 unsigned : 1; 3149 }; 3150 3151 struct 3152 { 3153 unsigned D1S0 : 1; 3154 unsigned D1S1 : 1; 3155 unsigned D1S2 : 1; 3156 unsigned : 1; 3157 unsigned D2S0 : 1; 3158 unsigned D2S1 : 1; 3159 unsigned D2S2 : 1; 3160 unsigned : 1; 3161 }; 3162 3163 struct 3164 { 3165 unsigned D1S : 3; 3166 unsigned : 5; 3167 }; 3168 3169 struct 3170 { 3171 unsigned LC1D1S : 3; 3172 unsigned : 5; 3173 }; 3174 3175 struct 3176 { 3177 unsigned : 4; 3178 unsigned D2S : 3; 3179 unsigned : 1; 3180 }; 3181 3182 struct 3183 { 3184 unsigned : 4; 3185 unsigned LC1D2S : 3; 3186 unsigned : 1; 3187 }; 3188 } __CLC1SEL0bits_t; 3189 3190 extern __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits; 3191 3192 #define _LC1D1S0 0x01 3193 #define _D1S0 0x01 3194 #define _LC1D1S1 0x02 3195 #define _D1S1 0x02 3196 #define _LC1D1S2 0x04 3197 #define _D1S2 0x04 3198 #define _LC1D2S0 0x10 3199 #define _D2S0 0x10 3200 #define _LC1D2S1 0x20 3201 #define _D2S1 0x20 3202 #define _LC1D2S2 0x40 3203 #define _D2S2 0x40 3204 3205 //============================================================================== 3206 3207 3208 //============================================================================== 3209 // CLC1SEL1 Bits 3210 3211 extern __at(0x0F13) __sfr CLC1SEL1; 3212 3213 typedef union 3214 { 3215 struct 3216 { 3217 unsigned LC1D3S0 : 1; 3218 unsigned LC1D3S1 : 1; 3219 unsigned LC1D3S2 : 1; 3220 unsigned : 1; 3221 unsigned LC1D4S0 : 1; 3222 unsigned LC1D4S1 : 1; 3223 unsigned LC1D4S2 : 1; 3224 unsigned : 1; 3225 }; 3226 3227 struct 3228 { 3229 unsigned D3S0 : 1; 3230 unsigned D3S1 : 1; 3231 unsigned D3S2 : 1; 3232 unsigned : 1; 3233 unsigned D4S0 : 1; 3234 unsigned D4S1 : 1; 3235 unsigned D4S2 : 1; 3236 unsigned : 1; 3237 }; 3238 3239 struct 3240 { 3241 unsigned D3S : 3; 3242 unsigned : 5; 3243 }; 3244 3245 struct 3246 { 3247 unsigned LC1D3S : 3; 3248 unsigned : 5; 3249 }; 3250 3251 struct 3252 { 3253 unsigned : 4; 3254 unsigned LC1D4S : 3; 3255 unsigned : 1; 3256 }; 3257 3258 struct 3259 { 3260 unsigned : 4; 3261 unsigned D4S : 3; 3262 unsigned : 1; 3263 }; 3264 } __CLC1SEL1bits_t; 3265 3266 extern __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits; 3267 3268 #define _LC1D3S0 0x01 3269 #define _D3S0 0x01 3270 #define _LC1D3S1 0x02 3271 #define _D3S1 0x02 3272 #define _LC1D3S2 0x04 3273 #define _D3S2 0x04 3274 #define _LC1D4S0 0x10 3275 #define _D4S0 0x10 3276 #define _LC1D4S1 0x20 3277 #define _D4S1 0x20 3278 #define _LC1D4S2 0x40 3279 #define _D4S2 0x40 3280 3281 //============================================================================== 3282 3283 3284 //============================================================================== 3285 // CLC1GLS0 Bits 3286 3287 extern __at(0x0F14) __sfr CLC1GLS0; 3288 3289 typedef union 3290 { 3291 struct 3292 { 3293 unsigned LC1G1D1N : 1; 3294 unsigned LC1G1D1T : 1; 3295 unsigned LC1G1D2N : 1; 3296 unsigned LC1G1D2T : 1; 3297 unsigned LC1G1D3N : 1; 3298 unsigned LC1G1D3T : 1; 3299 unsigned LC1G1D4N : 1; 3300 unsigned LC1G1D4T : 1; 3301 }; 3302 3303 struct 3304 { 3305 unsigned D1N : 1; 3306 unsigned D1T : 1; 3307 unsigned D2N : 1; 3308 unsigned D2T : 1; 3309 unsigned D3N : 1; 3310 unsigned D3T : 1; 3311 unsigned D4N : 1; 3312 unsigned D4T : 1; 3313 }; 3314 } __CLC1GLS0bits_t; 3315 3316 extern __at(0x0F14) volatile __CLC1GLS0bits_t CLC1GLS0bits; 3317 3318 #define _LC1G1D1N 0x01 3319 #define _D1N 0x01 3320 #define _LC1G1D1T 0x02 3321 #define _D1T 0x02 3322 #define _LC1G1D2N 0x04 3323 #define _D2N 0x04 3324 #define _LC1G1D2T 0x08 3325 #define _D2T 0x08 3326 #define _LC1G1D3N 0x10 3327 #define _D3N 0x10 3328 #define _LC1G1D3T 0x20 3329 #define _D3T 0x20 3330 #define _LC1G1D4N 0x40 3331 #define _D4N 0x40 3332 #define _LC1G1D4T 0x80 3333 #define _D4T 0x80 3334 3335 //============================================================================== 3336 3337 3338 //============================================================================== 3339 // CLC1GLS1 Bits 3340 3341 extern __at(0x0F15) __sfr CLC1GLS1; 3342 3343 typedef union 3344 { 3345 struct 3346 { 3347 unsigned LC1G2D1N : 1; 3348 unsigned LC1G2D1T : 1; 3349 unsigned LC1G2D2N : 1; 3350 unsigned LC1G2D2T : 1; 3351 unsigned LC1G2D3N : 1; 3352 unsigned LC1G2D3T : 1; 3353 unsigned LC1G2D4N : 1; 3354 unsigned LC1G2D4T : 1; 3355 }; 3356 3357 struct 3358 { 3359 unsigned D1N : 1; 3360 unsigned D1T : 1; 3361 unsigned D2N : 1; 3362 unsigned D2T : 1; 3363 unsigned D3N : 1; 3364 unsigned D3T : 1; 3365 unsigned D4N : 1; 3366 unsigned D4T : 1; 3367 }; 3368 } __CLC1GLS1bits_t; 3369 3370 extern __at(0x0F15) volatile __CLC1GLS1bits_t CLC1GLS1bits; 3371 3372 #define _CLC1GLS1_LC1G2D1N 0x01 3373 #define _CLC1GLS1_D1N 0x01 3374 #define _CLC1GLS1_LC1G2D1T 0x02 3375 #define _CLC1GLS1_D1T 0x02 3376 #define _CLC1GLS1_LC1G2D2N 0x04 3377 #define _CLC1GLS1_D2N 0x04 3378 #define _CLC1GLS1_LC1G2D2T 0x08 3379 #define _CLC1GLS1_D2T 0x08 3380 #define _CLC1GLS1_LC1G2D3N 0x10 3381 #define _CLC1GLS1_D3N 0x10 3382 #define _CLC1GLS1_LC1G2D3T 0x20 3383 #define _CLC1GLS1_D3T 0x20 3384 #define _CLC1GLS1_LC1G2D4N 0x40 3385 #define _CLC1GLS1_D4N 0x40 3386 #define _CLC1GLS1_LC1G2D4T 0x80 3387 #define _CLC1GLS1_D4T 0x80 3388 3389 //============================================================================== 3390 3391 3392 //============================================================================== 3393 // CLC1GLS2 Bits 3394 3395 extern __at(0x0F16) __sfr CLC1GLS2; 3396 3397 typedef union 3398 { 3399 struct 3400 { 3401 unsigned LC1G3D1N : 1; 3402 unsigned LC1G3D1T : 1; 3403 unsigned LC1G3D2N : 1; 3404 unsigned LC1G3D2T : 1; 3405 unsigned LC1G3D3N : 1; 3406 unsigned LC1G3D3T : 1; 3407 unsigned LC1G3D4N : 1; 3408 unsigned LC1G3D4T : 1; 3409 }; 3410 3411 struct 3412 { 3413 unsigned D1N : 1; 3414 unsigned D1T : 1; 3415 unsigned D2N : 1; 3416 unsigned D2T : 1; 3417 unsigned D3N : 1; 3418 unsigned D3T : 1; 3419 unsigned D4N : 1; 3420 unsigned D4T : 1; 3421 }; 3422 } __CLC1GLS2bits_t; 3423 3424 extern __at(0x0F16) volatile __CLC1GLS2bits_t CLC1GLS2bits; 3425 3426 #define _CLC1GLS2_LC1G3D1N 0x01 3427 #define _CLC1GLS2_D1N 0x01 3428 #define _CLC1GLS2_LC1G3D1T 0x02 3429 #define _CLC1GLS2_D1T 0x02 3430 #define _CLC1GLS2_LC1G3D2N 0x04 3431 #define _CLC1GLS2_D2N 0x04 3432 #define _CLC1GLS2_LC1G3D2T 0x08 3433 #define _CLC1GLS2_D2T 0x08 3434 #define _CLC1GLS2_LC1G3D3N 0x10 3435 #define _CLC1GLS2_D3N 0x10 3436 #define _CLC1GLS2_LC1G3D3T 0x20 3437 #define _CLC1GLS2_D3T 0x20 3438 #define _CLC1GLS2_LC1G3D4N 0x40 3439 #define _CLC1GLS2_D4N 0x40 3440 #define _CLC1GLS2_LC1G3D4T 0x80 3441 #define _CLC1GLS2_D4T 0x80 3442 3443 //============================================================================== 3444 3445 3446 //============================================================================== 3447 // CLC1GLS3 Bits 3448 3449 extern __at(0x0F17) __sfr CLC1GLS3; 3450 3451 typedef union 3452 { 3453 struct 3454 { 3455 unsigned LC1G4D1N : 1; 3456 unsigned LC1G4D1T : 1; 3457 unsigned LC1G4D2N : 1; 3458 unsigned LC1G4D2T : 1; 3459 unsigned LC1G4D3N : 1; 3460 unsigned LC1G4D3T : 1; 3461 unsigned LC1G4D4N : 1; 3462 unsigned LC1G4D4T : 1; 3463 }; 3464 3465 struct 3466 { 3467 unsigned G4D1N : 1; 3468 unsigned G4D1T : 1; 3469 unsigned G4D2N : 1; 3470 unsigned G4D2T : 1; 3471 unsigned G4D3N : 1; 3472 unsigned G4D3T : 1; 3473 unsigned G4D4N : 1; 3474 unsigned G4D4T : 1; 3475 }; 3476 } __CLC1GLS3bits_t; 3477 3478 extern __at(0x0F17) volatile __CLC1GLS3bits_t CLC1GLS3bits; 3479 3480 #define _LC1G4D1N 0x01 3481 #define _G4D1N 0x01 3482 #define _LC1G4D1T 0x02 3483 #define _G4D1T 0x02 3484 #define _LC1G4D2N 0x04 3485 #define _G4D2N 0x04 3486 #define _LC1G4D2T 0x08 3487 #define _G4D2T 0x08 3488 #define _LC1G4D3N 0x10 3489 #define _G4D3N 0x10 3490 #define _LC1G4D3T 0x20 3491 #define _G4D3T 0x20 3492 #define _LC1G4D4N 0x40 3493 #define _G4D4N 0x40 3494 #define _LC1G4D4T 0x80 3495 #define _G4D4T 0x80 3496 3497 //============================================================================== 3498 3499 3500 //============================================================================== 3501 // CLC2CON Bits 3502 3503 extern __at(0x0F18) __sfr CLC2CON; 3504 3505 typedef union 3506 { 3507 struct 3508 { 3509 unsigned LC2MODE0 : 1; 3510 unsigned LC2MODE1 : 1; 3511 unsigned LC2MODE2 : 1; 3512 unsigned LC2INTN : 1; 3513 unsigned LC2INTP : 1; 3514 unsigned LC2OUT : 1; 3515 unsigned LC2OE : 1; 3516 unsigned LC2EN : 1; 3517 }; 3518 3519 struct 3520 { 3521 unsigned LCMODE0 : 1; 3522 unsigned LCMODE1 : 1; 3523 unsigned LCMODE2 : 1; 3524 unsigned LCINTN : 1; 3525 unsigned LCINTP : 1; 3526 unsigned LCOUT : 1; 3527 unsigned LCOE : 1; 3528 unsigned LCEN : 1; 3529 }; 3530 3531 struct 3532 { 3533 unsigned LC2MODE : 3; 3534 unsigned : 5; 3535 }; 3536 3537 struct 3538 { 3539 unsigned LCMODE : 3; 3540 unsigned : 5; 3541 }; 3542 } __CLC2CONbits_t; 3543 3544 extern __at(0x0F18) volatile __CLC2CONbits_t CLC2CONbits; 3545 3546 #define _CLC2CON_LC2MODE0 0x01 3547 #define _CLC2CON_LCMODE0 0x01 3548 #define _CLC2CON_LC2MODE1 0x02 3549 #define _CLC2CON_LCMODE1 0x02 3550 #define _CLC2CON_LC2MODE2 0x04 3551 #define _CLC2CON_LCMODE2 0x04 3552 #define _CLC2CON_LC2INTN 0x08 3553 #define _CLC2CON_LCINTN 0x08 3554 #define _CLC2CON_LC2INTP 0x10 3555 #define _CLC2CON_LCINTP 0x10 3556 #define _CLC2CON_LC2OUT 0x20 3557 #define _CLC2CON_LCOUT 0x20 3558 #define _CLC2CON_LC2OE 0x40 3559 #define _CLC2CON_LCOE 0x40 3560 #define _CLC2CON_LC2EN 0x80 3561 #define _CLC2CON_LCEN 0x80 3562 3563 //============================================================================== 3564 3565 3566 //============================================================================== 3567 // CLC2POL Bits 3568 3569 extern __at(0x0F19) __sfr CLC2POL; 3570 3571 typedef union 3572 { 3573 struct 3574 { 3575 unsigned LC2G1POL : 1; 3576 unsigned LC2G2POL : 1; 3577 unsigned LC2G3POL : 1; 3578 unsigned LC2G4POL : 1; 3579 unsigned : 1; 3580 unsigned : 1; 3581 unsigned : 1; 3582 unsigned LC2POL : 1; 3583 }; 3584 3585 struct 3586 { 3587 unsigned G1POL : 1; 3588 unsigned G2POL : 1; 3589 unsigned G3POL : 1; 3590 unsigned G4POL : 1; 3591 unsigned : 1; 3592 unsigned : 1; 3593 unsigned : 1; 3594 unsigned POL : 1; 3595 }; 3596 } __CLC2POLbits_t; 3597 3598 extern __at(0x0F19) volatile __CLC2POLbits_t CLC2POLbits; 3599 3600 #define _CLC2POL_LC2G1POL 0x01 3601 #define _CLC2POL_G1POL 0x01 3602 #define _CLC2POL_LC2G2POL 0x02 3603 #define _CLC2POL_G2POL 0x02 3604 #define _CLC2POL_LC2G3POL 0x04 3605 #define _CLC2POL_G3POL 0x04 3606 #define _CLC2POL_LC2G4POL 0x08 3607 #define _CLC2POL_G4POL 0x08 3608 #define _CLC2POL_LC2POL 0x80 3609 #define _CLC2POL_POL 0x80 3610 3611 //============================================================================== 3612 3613 3614 //============================================================================== 3615 // CLC2SEL0 Bits 3616 3617 extern __at(0x0F1A) __sfr CLC2SEL0; 3618 3619 typedef union 3620 { 3621 struct 3622 { 3623 unsigned LC2D1S0 : 1; 3624 unsigned LC2D1S1 : 1; 3625 unsigned LC2D1S2 : 1; 3626 unsigned : 1; 3627 unsigned LC2D2S0 : 1; 3628 unsigned LC2D2S1 : 1; 3629 unsigned LC2D2S2 : 1; 3630 unsigned : 1; 3631 }; 3632 3633 struct 3634 { 3635 unsigned D1S0 : 1; 3636 unsigned D1S1 : 1; 3637 unsigned D1S2 : 1; 3638 unsigned : 1; 3639 unsigned D2S0 : 1; 3640 unsigned D2S1 : 1; 3641 unsigned D2S2 : 1; 3642 unsigned : 1; 3643 }; 3644 3645 struct 3646 { 3647 unsigned LC2D1S : 3; 3648 unsigned : 5; 3649 }; 3650 3651 struct 3652 { 3653 unsigned D1S : 3; 3654 unsigned : 5; 3655 }; 3656 3657 struct 3658 { 3659 unsigned : 4; 3660 unsigned D2S : 3; 3661 unsigned : 1; 3662 }; 3663 3664 struct 3665 { 3666 unsigned : 4; 3667 unsigned LC2D2S : 3; 3668 unsigned : 1; 3669 }; 3670 } __CLC2SEL0bits_t; 3671 3672 extern __at(0x0F1A) volatile __CLC2SEL0bits_t CLC2SEL0bits; 3673 3674 #define _CLC2SEL0_LC2D1S0 0x01 3675 #define _CLC2SEL0_D1S0 0x01 3676 #define _CLC2SEL0_LC2D1S1 0x02 3677 #define _CLC2SEL0_D1S1 0x02 3678 #define _CLC2SEL0_LC2D1S2 0x04 3679 #define _CLC2SEL0_D1S2 0x04 3680 #define _CLC2SEL0_LC2D2S0 0x10 3681 #define _CLC2SEL0_D2S0 0x10 3682 #define _CLC2SEL0_LC2D2S1 0x20 3683 #define _CLC2SEL0_D2S1 0x20 3684 #define _CLC2SEL0_LC2D2S2 0x40 3685 #define _CLC2SEL0_D2S2 0x40 3686 3687 //============================================================================== 3688 3689 3690 //============================================================================== 3691 // CLC2SEL1 Bits 3692 3693 extern __at(0x0F1B) __sfr CLC2SEL1; 3694 3695 typedef union 3696 { 3697 struct 3698 { 3699 unsigned LC2D3S0 : 1; 3700 unsigned LC2D3S1 : 1; 3701 unsigned LC2D3S2 : 1; 3702 unsigned : 1; 3703 unsigned LC2D4S0 : 1; 3704 unsigned LC2D4S1 : 1; 3705 unsigned LC2D4S2 : 1; 3706 unsigned : 1; 3707 }; 3708 3709 struct 3710 { 3711 unsigned D3S0 : 1; 3712 unsigned D3S1 : 1; 3713 unsigned D3S2 : 1; 3714 unsigned : 1; 3715 unsigned D4S0 : 1; 3716 unsigned D4S1 : 1; 3717 unsigned D4S2 : 1; 3718 unsigned : 1; 3719 }; 3720 3721 struct 3722 { 3723 unsigned D3S : 3; 3724 unsigned : 5; 3725 }; 3726 3727 struct 3728 { 3729 unsigned LC2D3S : 3; 3730 unsigned : 5; 3731 }; 3732 3733 struct 3734 { 3735 unsigned : 4; 3736 unsigned D4S : 3; 3737 unsigned : 1; 3738 }; 3739 3740 struct 3741 { 3742 unsigned : 4; 3743 unsigned LC2D4S : 3; 3744 unsigned : 1; 3745 }; 3746 } __CLC2SEL1bits_t; 3747 3748 extern __at(0x0F1B) volatile __CLC2SEL1bits_t CLC2SEL1bits; 3749 3750 #define _CLC2SEL1_LC2D3S0 0x01 3751 #define _CLC2SEL1_D3S0 0x01 3752 #define _CLC2SEL1_LC2D3S1 0x02 3753 #define _CLC2SEL1_D3S1 0x02 3754 #define _CLC2SEL1_LC2D3S2 0x04 3755 #define _CLC2SEL1_D3S2 0x04 3756 #define _CLC2SEL1_LC2D4S0 0x10 3757 #define _CLC2SEL1_D4S0 0x10 3758 #define _CLC2SEL1_LC2D4S1 0x20 3759 #define _CLC2SEL1_D4S1 0x20 3760 #define _CLC2SEL1_LC2D4S2 0x40 3761 #define _CLC2SEL1_D4S2 0x40 3762 3763 //============================================================================== 3764 3765 3766 //============================================================================== 3767 // CLC2GLS0 Bits 3768 3769 extern __at(0x0F1C) __sfr CLC2GLS0; 3770 3771 typedef union 3772 { 3773 struct 3774 { 3775 unsigned LC2G1D1N : 1; 3776 unsigned LC2G1D1T : 1; 3777 unsigned LC2G1D2N : 1; 3778 unsigned LC2G1D2T : 1; 3779 unsigned LC2G1D3N : 1; 3780 unsigned LC2G1D3T : 1; 3781 unsigned LC2G1D4N : 1; 3782 unsigned LC2G1D4T : 1; 3783 }; 3784 3785 struct 3786 { 3787 unsigned D1N : 1; 3788 unsigned D1T : 1; 3789 unsigned D2N : 1; 3790 unsigned D2T : 1; 3791 unsigned D3N : 1; 3792 unsigned D3T : 1; 3793 unsigned D4N : 1; 3794 unsigned D4T : 1; 3795 }; 3796 } __CLC2GLS0bits_t; 3797 3798 extern __at(0x0F1C) volatile __CLC2GLS0bits_t CLC2GLS0bits; 3799 3800 #define _CLC2GLS0_LC2G1D1N 0x01 3801 #define _CLC2GLS0_D1N 0x01 3802 #define _CLC2GLS0_LC2G1D1T 0x02 3803 #define _CLC2GLS0_D1T 0x02 3804 #define _CLC2GLS0_LC2G1D2N 0x04 3805 #define _CLC2GLS0_D2N 0x04 3806 #define _CLC2GLS0_LC2G1D2T 0x08 3807 #define _CLC2GLS0_D2T 0x08 3808 #define _CLC2GLS0_LC2G1D3N 0x10 3809 #define _CLC2GLS0_D3N 0x10 3810 #define _CLC2GLS0_LC2G1D3T 0x20 3811 #define _CLC2GLS0_D3T 0x20 3812 #define _CLC2GLS0_LC2G1D4N 0x40 3813 #define _CLC2GLS0_D4N 0x40 3814 #define _CLC2GLS0_LC2G1D4T 0x80 3815 #define _CLC2GLS0_D4T 0x80 3816 3817 //============================================================================== 3818 3819 3820 //============================================================================== 3821 // CLC2GLS1 Bits 3822 3823 extern __at(0x0F1D) __sfr CLC2GLS1; 3824 3825 typedef union 3826 { 3827 struct 3828 { 3829 unsigned LC2G2D1N : 1; 3830 unsigned LC2G2D1T : 1; 3831 unsigned LC2G2D2N : 1; 3832 unsigned LC2G2D2T : 1; 3833 unsigned LC2G2D3N : 1; 3834 unsigned LC2G2D3T : 1; 3835 unsigned LC2G2D4N : 1; 3836 unsigned LC2G2D4T : 1; 3837 }; 3838 3839 struct 3840 { 3841 unsigned D1N : 1; 3842 unsigned D1T : 1; 3843 unsigned D2N : 1; 3844 unsigned D2T : 1; 3845 unsigned D3N : 1; 3846 unsigned D3T : 1; 3847 unsigned D4N : 1; 3848 unsigned D4T : 1; 3849 }; 3850 } __CLC2GLS1bits_t; 3851 3852 extern __at(0x0F1D) volatile __CLC2GLS1bits_t CLC2GLS1bits; 3853 3854 #define _CLC2GLS1_LC2G2D1N 0x01 3855 #define _CLC2GLS1_D1N 0x01 3856 #define _CLC2GLS1_LC2G2D1T 0x02 3857 #define _CLC2GLS1_D1T 0x02 3858 #define _CLC2GLS1_LC2G2D2N 0x04 3859 #define _CLC2GLS1_D2N 0x04 3860 #define _CLC2GLS1_LC2G2D2T 0x08 3861 #define _CLC2GLS1_D2T 0x08 3862 #define _CLC2GLS1_LC2G2D3N 0x10 3863 #define _CLC2GLS1_D3N 0x10 3864 #define _CLC2GLS1_LC2G2D3T 0x20 3865 #define _CLC2GLS1_D3T 0x20 3866 #define _CLC2GLS1_LC2G2D4N 0x40 3867 #define _CLC2GLS1_D4N 0x40 3868 #define _CLC2GLS1_LC2G2D4T 0x80 3869 #define _CLC2GLS1_D4T 0x80 3870 3871 //============================================================================== 3872 3873 3874 //============================================================================== 3875 // CLC2GLS2 Bits 3876 3877 extern __at(0x0F1E) __sfr CLC2GLS2; 3878 3879 typedef union 3880 { 3881 struct 3882 { 3883 unsigned LC2G3D1N : 1; 3884 unsigned LC2G3D1T : 1; 3885 unsigned LC2G3D2N : 1; 3886 unsigned LC2G3D2T : 1; 3887 unsigned LC2G3D3N : 1; 3888 unsigned LC2G3D3T : 1; 3889 unsigned LC2G3D4N : 1; 3890 unsigned LC2G3D4T : 1; 3891 }; 3892 3893 struct 3894 { 3895 unsigned D1N : 1; 3896 unsigned D1T : 1; 3897 unsigned D2N : 1; 3898 unsigned D2T : 1; 3899 unsigned D3N : 1; 3900 unsigned D3T : 1; 3901 unsigned D4N : 1; 3902 unsigned D4T : 1; 3903 }; 3904 } __CLC2GLS2bits_t; 3905 3906 extern __at(0x0F1E) volatile __CLC2GLS2bits_t CLC2GLS2bits; 3907 3908 #define _CLC2GLS2_LC2G3D1N 0x01 3909 #define _CLC2GLS2_D1N 0x01 3910 #define _CLC2GLS2_LC2G3D1T 0x02 3911 #define _CLC2GLS2_D1T 0x02 3912 #define _CLC2GLS2_LC2G3D2N 0x04 3913 #define _CLC2GLS2_D2N 0x04 3914 #define _CLC2GLS2_LC2G3D2T 0x08 3915 #define _CLC2GLS2_D2T 0x08 3916 #define _CLC2GLS2_LC2G3D3N 0x10 3917 #define _CLC2GLS2_D3N 0x10 3918 #define _CLC2GLS2_LC2G3D3T 0x20 3919 #define _CLC2GLS2_D3T 0x20 3920 #define _CLC2GLS2_LC2G3D4N 0x40 3921 #define _CLC2GLS2_D4N 0x40 3922 #define _CLC2GLS2_LC2G3D4T 0x80 3923 #define _CLC2GLS2_D4T 0x80 3924 3925 //============================================================================== 3926 3927 3928 //============================================================================== 3929 // CLC2GLS3 Bits 3930 3931 extern __at(0x0F1F) __sfr CLC2GLS3; 3932 3933 typedef union 3934 { 3935 struct 3936 { 3937 unsigned LC2G4D1N : 1; 3938 unsigned LC2G4D1T : 1; 3939 unsigned LC2G4D2N : 1; 3940 unsigned LC2G4D2T : 1; 3941 unsigned LC2G4D3N : 1; 3942 unsigned LC2G4D3T : 1; 3943 unsigned LC2G4D4N : 1; 3944 unsigned LC2G4D4T : 1; 3945 }; 3946 3947 struct 3948 { 3949 unsigned G4D1N : 1; 3950 unsigned G4D1T : 1; 3951 unsigned G4D2N : 1; 3952 unsigned G4D2T : 1; 3953 unsigned G4D3N : 1; 3954 unsigned G4D3T : 1; 3955 unsigned G4D4N : 1; 3956 unsigned G4D4T : 1; 3957 }; 3958 } __CLC2GLS3bits_t; 3959 3960 extern __at(0x0F1F) volatile __CLC2GLS3bits_t CLC2GLS3bits; 3961 3962 #define _CLC2GLS3_LC2G4D1N 0x01 3963 #define _CLC2GLS3_G4D1N 0x01 3964 #define _CLC2GLS3_LC2G4D1T 0x02 3965 #define _CLC2GLS3_G4D1T 0x02 3966 #define _CLC2GLS3_LC2G4D2N 0x04 3967 #define _CLC2GLS3_G4D2N 0x04 3968 #define _CLC2GLS3_LC2G4D2T 0x08 3969 #define _CLC2GLS3_G4D2T 0x08 3970 #define _CLC2GLS3_LC2G4D3N 0x10 3971 #define _CLC2GLS3_G4D3N 0x10 3972 #define _CLC2GLS3_LC2G4D3T 0x20 3973 #define _CLC2GLS3_G4D3T 0x20 3974 #define _CLC2GLS3_LC2G4D4N 0x40 3975 #define _CLC2GLS3_G4D4N 0x40 3976 #define _CLC2GLS3_LC2G4D4T 0x80 3977 #define _CLC2GLS3_G4D4T 0x80 3978 3979 //============================================================================== 3980 3981 extern __at(0x0FE3) __sfr BSR_ICDSHAD; 3982 3983 //============================================================================== 3984 // STATUS_SHAD Bits 3985 3986 extern __at(0x0FE4) __sfr STATUS_SHAD; 3987 3988 typedef struct 3989 { 3990 unsigned C_SHAD : 1; 3991 unsigned DC_SHAD : 1; 3992 unsigned Z_SHAD : 1; 3993 unsigned : 1; 3994 unsigned : 1; 3995 unsigned : 1; 3996 unsigned : 1; 3997 unsigned : 1; 3998 } __STATUS_SHADbits_t; 3999 4000 extern __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 4001 4002 #define _C_SHAD 0x01 4003 #define _DC_SHAD 0x02 4004 #define _Z_SHAD 0x04 4005 4006 //============================================================================== 4007 4008 extern __at(0x0FE5) __sfr WREG_SHAD; 4009 extern __at(0x0FE6) __sfr BSR_SHAD; 4010 extern __at(0x0FE7) __sfr PCLATH_SHAD; 4011 extern __at(0x0FE8) __sfr FSR0L_SHAD; 4012 extern __at(0x0FE9) __sfr FSR0H_SHAD; 4013 extern __at(0x0FEA) __sfr FSR1L_SHAD; 4014 extern __at(0x0FEB) __sfr FSR1H_SHAD; 4015 extern __at(0x0FED) __sfr STKPTR; 4016 extern __at(0x0FEE) __sfr TOSL; 4017 extern __at(0x0FEF) __sfr TOSH; 4018 4019 //============================================================================== 4020 // 4021 // Configuration Bits 4022 // 4023 //============================================================================== 4024 4025 #define _CONFIG1 0x8007 4026 #define _CONFIG2 0x8008 4027 4028 //----------------------------- CONFIG1 Options ------------------------------- 4029 4030 #define _FOSC_INTOSC 0x3FFC // INTOSC oscillator: I/O function on CLKIN pin. 4031 #define _FOSC_ECL 0x3FFD // ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin. 4032 #define _FOSC_ECM 0x3FFE // ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin. 4033 #define _FOSC_ECH 0x3FFF // ECH, External Clock, High Power Mode (4-20 MHz): device clock supplied to CLKIN pin. 4034 #define _WDTE_OFF 0x3FE7 // WDT disabled. 4035 #define _WDTE_SWDTEN 0x3FEF // WDT controlled by the SWDTEN bit in the WDTCON register. 4036 #define _WDTE_NSLEEP 0x3FF7 // WDT enabled while running and disabled in Sleep. 4037 #define _WDTE_ON 0x3FFF // WDT enabled. 4038 #define _PWRTE_ON 0x3FDF // PWRT enabled. 4039 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 4040 #define _MCLRE_OFF 0x3FBF // MCLR/VPP pin function is digital input. 4041 #define _MCLRE_ON 0x3FFF // MCLR/VPP pin function is MCLR. 4042 #define _CP_ON 0x3F7F // Program memory code protection is enabled. 4043 #define _CP_OFF 0x3FFF // Program memory code protection is disabled. 4044 #define _BOREN_OFF 0x39FF // Brown-out Reset disabled. 4045 #define _BOREN_SBODEN 0x3BFF // Brown-out Reset controlled by the SBOREN bit in the BORCON register. 4046 #define _BOREN_NSLEEP 0x3DFF // Brown-out Reset enabled while running and disabled in Sleep. 4047 #define _BOREN_ON 0x3FFF // Brown-out Reset enabled. 4048 #define _CLKOUTEN_ON 0x37FF // CLKOUT function is enabled on the CLKOUT pin. 4049 #define _CLKOUTEN_OFF 0x3FFF // CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin. 4050 4051 //----------------------------- CONFIG2 Options ------------------------------- 4052 4053 #define _WRT_ALL 0x3FFC // 000h to 1FFFh write protected, no addresses may be modified by EECON control. 4054 #define _WRT_HALF 0x3FFD // 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control. 4055 #define _WRT_BOOT 0x3FFE // 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control. 4056 #define _WRT_OFF 0x3FFF // Write protection off. 4057 #define _STVREN_OFF 0x3DFF // Stack Overflow or Underflow will not cause a Reset. 4058 #define _STVREN_ON 0x3FFF // Stack Overflow or Underflow will cause a Reset. 4059 #define _BORV_HI 0x3BFF // Brown-out Reset Voltage (Vbor), high trip point selected. 4060 #define _BORV_LO 0x3FFF // Brown-out Reset Voltage (Vbor), low trip point selected. 4061 #define _LPBOR_ON 0x37FF // Low-Power BOR is enabled. 4062 #define _LPBOR_OFF 0x3FFF // Low-Power BOR is disabled. 4063 #define _LVP_OFF 0x1FFF // High-voltage on MCLR/VPP must be used for programming. 4064 #define _LVP_ON 0x3FFF // Low-voltage programming enabled. 4065 4066 //============================================================================== 4067 4068 #define _DEVID1 0x8006 4069 4070 #define _IDLOC0 0x8000 4071 #define _IDLOC1 0x8001 4072 #define _IDLOC2 0x8002 4073 #define _IDLOC3 0x8003 4074 4075 //============================================================================== 4076 4077 #ifndef NO_BIT_DEFINES 4078 4079 #define ADON ADCON0bits.ADON // bit 0 4080 #define GO_NOT_DONE ADCON0bits.GO_NOT_DONE // bit 1, shadows bit in ADCON0bits 4081 #define ADGO ADCON0bits.ADGO // bit 1, shadows bit in ADCON0bits 4082 #define GO ADCON0bits.GO // bit 1, shadows bit in ADCON0bits 4083 #define CHS0 ADCON0bits.CHS0 // bit 2 4084 #define CHS1 ADCON0bits.CHS1 // bit 3 4085 #define CHS2 ADCON0bits.CHS2 // bit 4 4086 #define CHS3 ADCON0bits.CHS3 // bit 5 4087 #define CHS4 ADCON0bits.CHS4 // bit 6 4088 4089 #define ADPREF0 ADCON1bits.ADPREF0 // bit 0 4090 #define ADPREF1 ADCON1bits.ADPREF1 // bit 1 4091 #define ADCS0 ADCON1bits.ADCS0 // bit 4 4092 #define ADCS1 ADCON1bits.ADCS1 // bit 5 4093 #define ADCS2 ADCON1bits.ADCS2 // bit 6 4094 #define ADFM ADCON1bits.ADFM // bit 7 4095 4096 #define TRIGSEL0 ADCON2bits.TRIGSEL0 // bit 4 4097 #define TRIGSEL1 ADCON2bits.TRIGSEL1 // bit 5 4098 #define TRIGSEL2 ADCON2bits.TRIGSEL2 // bit 6 4099 #define TRIGSEL3 ADCON2bits.TRIGSEL3 // bit 7 4100 4101 #define ANSA0 ANSELAbits.ANSA0 // bit 0 4102 #define ANSA1 ANSELAbits.ANSA1 // bit 1 4103 #define ANSA2 ANSELAbits.ANSA2 // bit 2 4104 #define ANSA4 ANSELAbits.ANSA4 // bit 4 4105 4106 #define ANSC0 ANSELCbits.ANSC0 // bit 0 4107 #define ANSC1 ANSELCbits.ANSC1 // bit 1 4108 #define ANSC2 ANSELCbits.ANSC2 // bit 2 4109 #define ANSC3 ANSELCbits.ANSC3 // bit 3 4110 4111 #define NCO1SEL APFCONbits.NCO1SEL // bit 0 4112 #define CLC1SEL APFCONbits.CLC1SEL // bit 1 4113 #define T1GSEL APFCONbits.T1GSEL // bit 3 4114 #define SSSEL APFCONbits.SSSEL // bit 4 4115 #define SDOSEL APFCONbits.SDOSEL // bit 5 4116 4117 #define BORRDY BORCONbits.BORRDY // bit 0 4118 #define BORFS BORCONbits.BORFS // bit 6 4119 #define SBOREN BORCONbits.SBOREN // bit 7 4120 4121 #define BSR0 BSRbits.BSR0 // bit 0 4122 #define BSR1 BSRbits.BSR1 // bit 1 4123 #define BSR2 BSRbits.BSR2 // bit 2 4124 #define BSR3 BSRbits.BSR3 // bit 3 4125 #define BSR4 BSRbits.BSR4 // bit 4 4126 4127 #define LC1MODE0 CLC1CONbits.LC1MODE0 // bit 0, shadows bit in CLC1CONbits 4128 #define LCMODE0 CLC1CONbits.LCMODE0 // bit 0, shadows bit in CLC1CONbits 4129 #define LC1MODE1 CLC1CONbits.LC1MODE1 // bit 1, shadows bit in CLC1CONbits 4130 #define LCMODE1 CLC1CONbits.LCMODE1 // bit 1, shadows bit in CLC1CONbits 4131 #define LC1MODE2 CLC1CONbits.LC1MODE2 // bit 2, shadows bit in CLC1CONbits 4132 #define LCMODE2 CLC1CONbits.LCMODE2 // bit 2, shadows bit in CLC1CONbits 4133 #define LC1INTN CLC1CONbits.LC1INTN // bit 3, shadows bit in CLC1CONbits 4134 #define LCINTN CLC1CONbits.LCINTN // bit 3, shadows bit in CLC1CONbits 4135 #define LC1INTP CLC1CONbits.LC1INTP // bit 4, shadows bit in CLC1CONbits 4136 #define LCINTP CLC1CONbits.LCINTP // bit 4, shadows bit in CLC1CONbits 4137 #define LC1OUT CLC1CONbits.LC1OUT // bit 5, shadows bit in CLC1CONbits 4138 #define LCOUT CLC1CONbits.LCOUT // bit 5, shadows bit in CLC1CONbits 4139 #define LC1OE CLC1CONbits.LC1OE // bit 6, shadows bit in CLC1CONbits 4140 #define LCOE CLC1CONbits.LCOE // bit 6, shadows bit in CLC1CONbits 4141 #define LC1EN CLC1CONbits.LC1EN // bit 7, shadows bit in CLC1CONbits 4142 #define LCEN CLC1CONbits.LCEN // bit 7, shadows bit in CLC1CONbits 4143 4144 #define LC1G1D1N CLC1GLS0bits.LC1G1D1N // bit 0, shadows bit in CLC1GLS0bits 4145 #define D1N CLC1GLS0bits.D1N // bit 0, shadows bit in CLC1GLS0bits 4146 #define LC1G1D1T CLC1GLS0bits.LC1G1D1T // bit 1, shadows bit in CLC1GLS0bits 4147 #define D1T CLC1GLS0bits.D1T // bit 1, shadows bit in CLC1GLS0bits 4148 #define LC1G1D2N CLC1GLS0bits.LC1G1D2N // bit 2, shadows bit in CLC1GLS0bits 4149 #define D2N CLC1GLS0bits.D2N // bit 2, shadows bit in CLC1GLS0bits 4150 #define LC1G1D2T CLC1GLS0bits.LC1G1D2T // bit 3, shadows bit in CLC1GLS0bits 4151 #define D2T CLC1GLS0bits.D2T // bit 3, shadows bit in CLC1GLS0bits 4152 #define LC1G1D3N CLC1GLS0bits.LC1G1D3N // bit 4, shadows bit in CLC1GLS0bits 4153 #define D3N CLC1GLS0bits.D3N // bit 4, shadows bit in CLC1GLS0bits 4154 #define LC1G1D3T CLC1GLS0bits.LC1G1D3T // bit 5, shadows bit in CLC1GLS0bits 4155 #define D3T CLC1GLS0bits.D3T // bit 5, shadows bit in CLC1GLS0bits 4156 #define LC1G1D4N CLC1GLS0bits.LC1G1D4N // bit 6, shadows bit in CLC1GLS0bits 4157 #define D4N CLC1GLS0bits.D4N // bit 6, shadows bit in CLC1GLS0bits 4158 #define LC1G1D4T CLC1GLS0bits.LC1G1D4T // bit 7, shadows bit in CLC1GLS0bits 4159 #define D4T CLC1GLS0bits.D4T // bit 7, shadows bit in CLC1GLS0bits 4160 4161 #define LC1G4D1N CLC1GLS3bits.LC1G4D1N // bit 0, shadows bit in CLC1GLS3bits 4162 #define G4D1N CLC1GLS3bits.G4D1N // bit 0, shadows bit in CLC1GLS3bits 4163 #define LC1G4D1T CLC1GLS3bits.LC1G4D1T // bit 1, shadows bit in CLC1GLS3bits 4164 #define G4D1T CLC1GLS3bits.G4D1T // bit 1, shadows bit in CLC1GLS3bits 4165 #define LC1G4D2N CLC1GLS3bits.LC1G4D2N // bit 2, shadows bit in CLC1GLS3bits 4166 #define G4D2N CLC1GLS3bits.G4D2N // bit 2, shadows bit in CLC1GLS3bits 4167 #define LC1G4D2T CLC1GLS3bits.LC1G4D2T // bit 3, shadows bit in CLC1GLS3bits 4168 #define G4D2T CLC1GLS3bits.G4D2T // bit 3, shadows bit in CLC1GLS3bits 4169 #define LC1G4D3N CLC1GLS3bits.LC1G4D3N // bit 4, shadows bit in CLC1GLS3bits 4170 #define G4D3N CLC1GLS3bits.G4D3N // bit 4, shadows bit in CLC1GLS3bits 4171 #define LC1G4D3T CLC1GLS3bits.LC1G4D3T // bit 5, shadows bit in CLC1GLS3bits 4172 #define G4D3T CLC1GLS3bits.G4D3T // bit 5, shadows bit in CLC1GLS3bits 4173 #define LC1G4D4N CLC1GLS3bits.LC1G4D4N // bit 6, shadows bit in CLC1GLS3bits 4174 #define G4D4N CLC1GLS3bits.G4D4N // bit 6, shadows bit in CLC1GLS3bits 4175 #define LC1G4D4T CLC1GLS3bits.LC1G4D4T // bit 7, shadows bit in CLC1GLS3bits 4176 #define G4D4T CLC1GLS3bits.G4D4T // bit 7, shadows bit in CLC1GLS3bits 4177 4178 #define LC1G1POL CLC1POLbits.LC1G1POL // bit 0, shadows bit in CLC1POLbits 4179 #define G1POL CLC1POLbits.G1POL // bit 0, shadows bit in CLC1POLbits 4180 #define LC1G2POL CLC1POLbits.LC1G2POL // bit 1, shadows bit in CLC1POLbits 4181 #define G2POL CLC1POLbits.G2POL // bit 1, shadows bit in CLC1POLbits 4182 #define LC1G3POL CLC1POLbits.LC1G3POL // bit 2, shadows bit in CLC1POLbits 4183 #define G3POL CLC1POLbits.G3POL // bit 2, shadows bit in CLC1POLbits 4184 #define LC1G4POL CLC1POLbits.LC1G4POL // bit 3, shadows bit in CLC1POLbits 4185 #define G4POL CLC1POLbits.G4POL // bit 3, shadows bit in CLC1POLbits 4186 #define LC1POL CLC1POLbits.LC1POL // bit 7, shadows bit in CLC1POLbits 4187 #define POL CLC1POLbits.POL // bit 7, shadows bit in CLC1POLbits 4188 4189 #define LC1D1S0 CLC1SEL0bits.LC1D1S0 // bit 0, shadows bit in CLC1SEL0bits 4190 #define D1S0 CLC1SEL0bits.D1S0 // bit 0, shadows bit in CLC1SEL0bits 4191 #define LC1D1S1 CLC1SEL0bits.LC1D1S1 // bit 1, shadows bit in CLC1SEL0bits 4192 #define D1S1 CLC1SEL0bits.D1S1 // bit 1, shadows bit in CLC1SEL0bits 4193 #define LC1D1S2 CLC1SEL0bits.LC1D1S2 // bit 2, shadows bit in CLC1SEL0bits 4194 #define D1S2 CLC1SEL0bits.D1S2 // bit 2, shadows bit in CLC1SEL0bits 4195 #define LC1D2S0 CLC1SEL0bits.LC1D2S0 // bit 4, shadows bit in CLC1SEL0bits 4196 #define D2S0 CLC1SEL0bits.D2S0 // bit 4, shadows bit in CLC1SEL0bits 4197 #define LC1D2S1 CLC1SEL0bits.LC1D2S1 // bit 5, shadows bit in CLC1SEL0bits 4198 #define D2S1 CLC1SEL0bits.D2S1 // bit 5, shadows bit in CLC1SEL0bits 4199 #define LC1D2S2 CLC1SEL0bits.LC1D2S2 // bit 6, shadows bit in CLC1SEL0bits 4200 #define D2S2 CLC1SEL0bits.D2S2 // bit 6, shadows bit in CLC1SEL0bits 4201 4202 #define LC1D3S0 CLC1SEL1bits.LC1D3S0 // bit 0, shadows bit in CLC1SEL1bits 4203 #define D3S0 CLC1SEL1bits.D3S0 // bit 0, shadows bit in CLC1SEL1bits 4204 #define LC1D3S1 CLC1SEL1bits.LC1D3S1 // bit 1, shadows bit in CLC1SEL1bits 4205 #define D3S1 CLC1SEL1bits.D3S1 // bit 1, shadows bit in CLC1SEL1bits 4206 #define LC1D3S2 CLC1SEL1bits.LC1D3S2 // bit 2, shadows bit in CLC1SEL1bits 4207 #define D3S2 CLC1SEL1bits.D3S2 // bit 2, shadows bit in CLC1SEL1bits 4208 #define LC1D4S0 CLC1SEL1bits.LC1D4S0 // bit 4, shadows bit in CLC1SEL1bits 4209 #define D4S0 CLC1SEL1bits.D4S0 // bit 4, shadows bit in CLC1SEL1bits 4210 #define LC1D4S1 CLC1SEL1bits.LC1D4S1 // bit 5, shadows bit in CLC1SEL1bits 4211 #define D4S1 CLC1SEL1bits.D4S1 // bit 5, shadows bit in CLC1SEL1bits 4212 #define LC1D4S2 CLC1SEL1bits.LC1D4S2 // bit 6, shadows bit in CLC1SEL1bits 4213 #define D4S2 CLC1SEL1bits.D4S2 // bit 6, shadows bit in CLC1SEL1bits 4214 4215 #define MCLC1OUT CLCDATAbits.MCLC1OUT // bit 0 4216 #define MCLC2OUT CLCDATAbits.MCLC2OUT // bit 1 4217 4218 #define C1SYNC CM1CON0bits.C1SYNC // bit 0 4219 #define C1HYS CM1CON0bits.C1HYS // bit 1 4220 #define C1SP CM1CON0bits.C1SP // bit 2 4221 #define C1POL CM1CON0bits.C1POL // bit 4 4222 #define C1OE CM1CON0bits.C1OE // bit 5 4223 #define C1OUT CM1CON0bits.C1OUT // bit 6 4224 #define C1ON CM1CON0bits.C1ON // bit 7 4225 4226 #define C1NCH0 CM1CON1bits.C1NCH0 // bit 0 4227 #define C1NCH1 CM1CON1bits.C1NCH1 // bit 1 4228 #define C1NCH2 CM1CON1bits.C1NCH2 // bit 2 4229 #define C1PCH0 CM1CON1bits.C1PCH0 // bit 4 4230 #define C1PCH1 CM1CON1bits.C1PCH1 // bit 5 4231 #define C1INTN CM1CON1bits.C1INTN // bit 6 4232 #define C1INTP CM1CON1bits.C1INTP // bit 7 4233 4234 #define C2SYNC CM2CON0bits.C2SYNC // bit 0 4235 #define C2HYS CM2CON0bits.C2HYS // bit 1 4236 #define C2SP CM2CON0bits.C2SP // bit 2 4237 #define C2POL CM2CON0bits.C2POL // bit 4 4238 #define C2OE CM2CON0bits.C2OE // bit 5 4239 #define C2OUT CM2CON0bits.C2OUT // bit 6 4240 #define C2ON CM2CON0bits.C2ON // bit 7 4241 4242 #define C2NCH0 CM2CON1bits.C2NCH0 // bit 0 4243 #define C2NCH1 CM2CON1bits.C2NCH1 // bit 1 4244 #define C2NCH2 CM2CON1bits.C2NCH2 // bit 2 4245 #define C2PCH0 CM2CON1bits.C2PCH0 // bit 4 4246 #define C2PCH1 CM2CON1bits.C2PCH1 // bit 5 4247 #define C2INTN CM2CON1bits.C2INTN // bit 6 4248 #define C2INTP CM2CON1bits.C2INTP // bit 7 4249 4250 #define MC1OUT CMOUTbits.MC1OUT // bit 0 4251 #define MC2OUT CMOUTbits.MC2OUT // bit 1 4252 4253 #define G1CS0 CWG1CON0bits.G1CS0 // bit 0 4254 #define G1POLA CWG1CON0bits.G1POLA // bit 3 4255 #define G1POLB CWG1CON0bits.G1POLB // bit 4 4256 #define G1OEA CWG1CON0bits.G1OEA // bit 5 4257 #define G1OEB CWG1CON0bits.G1OEB // bit 6 4258 #define G1EN CWG1CON0bits.G1EN // bit 7 4259 4260 #define G1IS0 CWG1CON1bits.G1IS0 // bit 0 4261 #define G1IS1 CWG1CON1bits.G1IS1 // bit 1 4262 #define G1IS2 CWG1CON1bits.G1IS2 // bit 2 4263 #define G1ASDLA0 CWG1CON1bits.G1ASDLA0 // bit 4 4264 #define G1ASDLA1 CWG1CON1bits.G1ASDLA1 // bit 5 4265 #define G1ASDLB0 CWG1CON1bits.G1ASDLB0 // bit 6 4266 #define G1ASDLB1 CWG1CON1bits.G1ASDLB1 // bit 7 4267 4268 #define G1ASDSCLC2 CWG1CON2bits.G1ASDSCLC2 // bit 0 4269 #define G1ASDSFLT CWG1CON2bits.G1ASDSFLT // bit 1 4270 #define G1ASDSC1 CWG1CON2bits.G1ASDSC1 // bit 2 4271 #define G1ASDSC2 CWG1CON2bits.G1ASDSC2 // bit 3 4272 #define G1ARSEN CWG1CON2bits.G1ARSEN // bit 6 4273 #define G1ASE CWG1CON2bits.G1ASE // bit 7 4274 4275 #define CWG1DBF0 CWG1DBFbits.CWG1DBF0 // bit 0 4276 #define CWG1DBF1 CWG1DBFbits.CWG1DBF1 // bit 1 4277 #define CWG1DBF2 CWG1DBFbits.CWG1DBF2 // bit 2 4278 #define CWG1DBF3 CWG1DBFbits.CWG1DBF3 // bit 3 4279 #define CWG1DBF4 CWG1DBFbits.CWG1DBF4 // bit 4 4280 #define CWG1DBF5 CWG1DBFbits.CWG1DBF5 // bit 5 4281 4282 #define CWG1DBR0 CWG1DBRbits.CWG1DBR0 // bit 0 4283 #define CWG1DBR1 CWG1DBRbits.CWG1DBR1 // bit 1 4284 #define CWG1DBR2 CWG1DBRbits.CWG1DBR2 // bit 2 4285 #define CWG1DBR3 CWG1DBRbits.CWG1DBR3 // bit 3 4286 #define CWG1DBR4 CWG1DBRbits.CWG1DBR4 // bit 4 4287 #define CWG1DBR5 CWG1DBRbits.CWG1DBR5 // bit 5 4288 4289 #define DACPSS DACCON0bits.DACPSS // bit 2 4290 #define DACOE2 DACCON0bits.DACOE2 // bit 4 4291 #define DACOE1 DACCON0bits.DACOE1 // bit 5 4292 #define DACEN DACCON0bits.DACEN // bit 7 4293 4294 #define DACR0 DACCON1bits.DACR0 // bit 0 4295 #define DACR1 DACCON1bits.DACR1 // bit 1 4296 #define DACR2 DACCON1bits.DACR2 // bit 2 4297 #define DACR3 DACCON1bits.DACR3 // bit 3 4298 #define DACR4 DACCON1bits.DACR4 // bit 4 4299 4300 #define ADFVR0 FVRCONbits.ADFVR0 // bit 0 4301 #define ADFVR1 FVRCONbits.ADFVR1 // bit 1 4302 #define CDAFVR0 FVRCONbits.CDAFVR0 // bit 2 4303 #define CDAFVR1 FVRCONbits.CDAFVR1 // bit 3 4304 #define TSRNG FVRCONbits.TSRNG // bit 4 4305 #define TSEN FVRCONbits.TSEN // bit 5 4306 #define FVRRDY FVRCONbits.FVRRDY // bit 6 4307 #define FVREN FVRCONbits.FVREN // bit 7 4308 4309 #define IOCIF INTCONbits.IOCIF // bit 0 4310 #define INTF INTCONbits.INTF // bit 1 4311 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 4312 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 4313 #define IOCIE INTCONbits.IOCIE // bit 3 4314 #define INTE INTCONbits.INTE // bit 4 4315 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 4316 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 4317 #define PEIE INTCONbits.PEIE // bit 6 4318 #define GIE INTCONbits.GIE // bit 7 4319 4320 #define IOCAF0 IOCAFbits.IOCAF0 // bit 0 4321 #define IOCAF1 IOCAFbits.IOCAF1 // bit 1 4322 #define IOCAF2 IOCAFbits.IOCAF2 // bit 2 4323 #define IOCAF3 IOCAFbits.IOCAF3 // bit 3 4324 #define IOCAF4 IOCAFbits.IOCAF4 // bit 4 4325 #define IOCAF5 IOCAFbits.IOCAF5 // bit 5 4326 4327 #define IOCAN0 IOCANbits.IOCAN0 // bit 0 4328 #define IOCAN1 IOCANbits.IOCAN1 // bit 1 4329 #define IOCAN2 IOCANbits.IOCAN2 // bit 2 4330 #define IOCAN3 IOCANbits.IOCAN3 // bit 3 4331 #define IOCAN4 IOCANbits.IOCAN4 // bit 4 4332 #define IOCAN5 IOCANbits.IOCAN5 // bit 5 4333 4334 #define IOCAP0 IOCAPbits.IOCAP0 // bit 0 4335 #define IOCAP1 IOCAPbits.IOCAP1 // bit 1 4336 #define IOCAP2 IOCAPbits.IOCAP2 // bit 2 4337 #define IOCAP3 IOCAPbits.IOCAP3 // bit 3 4338 #define IOCAP4 IOCAPbits.IOCAP4 // bit 4 4339 #define IOCAP5 IOCAPbits.IOCAP5 // bit 5 4340 4341 #define LATA0 LATAbits.LATA0 // bit 0 4342 #define LATA1 LATAbits.LATA1 // bit 1 4343 #define LATA2 LATAbits.LATA2 // bit 2 4344 #define LATA4 LATAbits.LATA4 // bit 4 4345 #define LATA5 LATAbits.LATA5 // bit 5 4346 4347 #define LATC0 LATCbits.LATC0 // bit 0 4348 #define LATC1 LATCbits.LATC1 // bit 1 4349 #define LATC2 LATCbits.LATC2 // bit 2 4350 #define LATC3 LATCbits.LATC3 // bit 3 4351 #define LATC4 LATCbits.LATC4 // bit 4 4352 #define LATC5 LATCbits.LATC5 // bit 5 4353 4354 #define NCO1ACC8 NCO1ACCHbits.NCO1ACC8 // bit 0 4355 #define NCO1ACC9 NCO1ACCHbits.NCO1ACC9 // bit 1 4356 #define NCO1ACC10 NCO1ACCHbits.NCO1ACC10 // bit 2 4357 #define NCO1ACC11 NCO1ACCHbits.NCO1ACC11 // bit 3 4358 #define NCO1ACC12 NCO1ACCHbits.NCO1ACC12 // bit 4 4359 #define NCO1ACC13 NCO1ACCHbits.NCO1ACC13 // bit 5 4360 #define NCO1ACC14 NCO1ACCHbits.NCO1ACC14 // bit 6 4361 #define NCO1ACC15 NCO1ACCHbits.NCO1ACC15 // bit 7 4362 4363 #define NCO1ACC0 NCO1ACCLbits.NCO1ACC0 // bit 0 4364 #define NCO1ACC1 NCO1ACCLbits.NCO1ACC1 // bit 1 4365 #define NCO1ACC2 NCO1ACCLbits.NCO1ACC2 // bit 2 4366 #define NCO1ACC3 NCO1ACCLbits.NCO1ACC3 // bit 3 4367 #define NCO1ACC4 NCO1ACCLbits.NCO1ACC4 // bit 4 4368 #define NCO1ACC5 NCO1ACCLbits.NCO1ACC5 // bit 5 4369 #define NCO1ACC6 NCO1ACCLbits.NCO1ACC6 // bit 6 4370 #define NCO1ACC7 NCO1ACCLbits.NCO1ACC7 // bit 7 4371 4372 #define NCO1ACC16 NCO1ACCUbits.NCO1ACC16 // bit 0 4373 #define NCO1ACC17 NCO1ACCUbits.NCO1ACC17 // bit 1 4374 #define NCO1ACC18 NCO1ACCUbits.NCO1ACC18 // bit 2 4375 #define NCO1ACC19 NCO1ACCUbits.NCO1ACC19 // bit 3 4376 4377 #define N1CKS0 NCO1CLKbits.N1CKS0 // bit 0 4378 #define N1CKS1 NCO1CLKbits.N1CKS1 // bit 1 4379 #define N1PWS0 NCO1CLKbits.N1PWS0 // bit 5 4380 #define N1PWS1 NCO1CLKbits.N1PWS1 // bit 6 4381 #define N1PWS2 NCO1CLKbits.N1PWS2 // bit 7 4382 4383 #define N1PFM NCO1CONbits.N1PFM // bit 0 4384 #define N1POL NCO1CONbits.N1POL // bit 4 4385 #define N1OUT NCO1CONbits.N1OUT // bit 5 4386 #define N1OE NCO1CONbits.N1OE // bit 6 4387 #define N1EN NCO1CONbits.N1EN // bit 7 4388 4389 #define NCO1INC8 NCO1INCHbits.NCO1INC8 // bit 0 4390 #define NCO1INC9 NCO1INCHbits.NCO1INC9 // bit 1 4391 #define NCO1INC10 NCO1INCHbits.NCO1INC10 // bit 2 4392 #define NCO1INC11 NCO1INCHbits.NCO1INC11 // bit 3 4393 #define NCO1INC12 NCO1INCHbits.NCO1INC12 // bit 4 4394 #define NCO1INC13 NCO1INCHbits.NCO1INC13 // bit 5 4395 #define NCO1INC14 NCO1INCHbits.NCO1INC14 // bit 6 4396 #define NCO1INC15 NCO1INCHbits.NCO1INC15 // bit 7 4397 4398 #define NCO1INC0 NCO1INCLbits.NCO1INC0 // bit 0 4399 #define NCO1INC1 NCO1INCLbits.NCO1INC1 // bit 1 4400 #define NCO1INC2 NCO1INCLbits.NCO1INC2 // bit 2 4401 #define NCO1INC3 NCO1INCLbits.NCO1INC3 // bit 3 4402 #define NCO1INC4 NCO1INCLbits.NCO1INC4 // bit 4 4403 #define NCO1INC5 NCO1INCLbits.NCO1INC5 // bit 5 4404 #define NCO1INC6 NCO1INCLbits.NCO1INC6 // bit 6 4405 #define NCO1INC7 NCO1INCLbits.NCO1INC7 // bit 7 4406 4407 #define PS0 OPTION_REGbits.PS0 // bit 0 4408 #define PS1 OPTION_REGbits.PS1 // bit 1 4409 #define PS2 OPTION_REGbits.PS2 // bit 2 4410 #define PSA OPTION_REGbits.PSA // bit 3 4411 #define TMR0SE OPTION_REGbits.TMR0SE // bit 4, shadows bit in OPTION_REGbits 4412 #define T0SE OPTION_REGbits.T0SE // bit 4, shadows bit in OPTION_REGbits 4413 #define TMR0CS OPTION_REGbits.TMR0CS // bit 5, shadows bit in OPTION_REGbits 4414 #define T0CS OPTION_REGbits.T0CS // bit 5, shadows bit in OPTION_REGbits 4415 #define INTEDG OPTION_REGbits.INTEDG // bit 6 4416 #define NOT_WPUEN OPTION_REGbits.NOT_WPUEN // bit 7 4417 4418 #define SCS0 OSCCONbits.SCS0 // bit 0 4419 #define SCS1 OSCCONbits.SCS1 // bit 1 4420 #define IRCF0 OSCCONbits.IRCF0 // bit 3 4421 #define IRCF1 OSCCONbits.IRCF1 // bit 4 4422 #define IRCF2 OSCCONbits.IRCF2 // bit 5 4423 #define IRCF3 OSCCONbits.IRCF3 // bit 6 4424 4425 #define HFIOFS OSCSTATbits.HFIOFS // bit 0 4426 #define LFIOFR OSCSTATbits.LFIOFR // bit 1 4427 #define HFIOFR OSCSTATbits.HFIOFR // bit 4 4428 4429 #define NOT_BOR PCONbits.NOT_BOR // bit 0 4430 #define NOT_POR PCONbits.NOT_POR // bit 1 4431 #define NOT_RI PCONbits.NOT_RI // bit 2 4432 #define NOT_RMCLR PCONbits.NOT_RMCLR // bit 3 4433 #define NOT_RWDT PCONbits.NOT_RWDT // bit 4 4434 #define STKUNF PCONbits.STKUNF // bit 6 4435 #define STKOVF PCONbits.STKOVF // bit 7 4436 4437 #define TMR1IE PIE1bits.TMR1IE // bit 0 4438 #define TMR2IE PIE1bits.TMR2IE // bit 1 4439 #define SSP1IE PIE1bits.SSP1IE // bit 3 4440 #define ADIE PIE1bits.ADIE // bit 6 4441 #define TMR1GIE PIE1bits.TMR1GIE // bit 7 4442 4443 #define NCO1IE PIE2bits.NCO1IE // bit 2 4444 #define BCL1IE PIE2bits.BCL1IE // bit 3 4445 #define C1IE PIE2bits.C1IE // bit 5 4446 #define C2IE PIE2bits.C2IE // bit 6 4447 4448 #define CLC1IE PIE3bits.CLC1IE // bit 0 4449 #define CLC2IE PIE3bits.CLC2IE // bit 1 4450 4451 #define TMR1IF PIR1bits.TMR1IF // bit 0 4452 #define TMR2IF PIR1bits.TMR2IF // bit 1 4453 #define SSP1IF PIR1bits.SSP1IF // bit 3 4454 #define ADIF PIR1bits.ADIF // bit 6 4455 #define TMR1GIF PIR1bits.TMR1GIF // bit 7 4456 4457 #define NCO1IF PIR2bits.NCO1IF // bit 2 4458 #define BCL1IF PIR2bits.BCL1IF // bit 3 4459 #define C1IF PIR2bits.C1IF // bit 5 4460 #define C2IF PIR2bits.C2IF // bit 6 4461 4462 #define CLC1IF PIR3bits.CLC1IF // bit 0 4463 #define CLC2IF PIR3bits.CLC2IF // bit 1 4464 4465 #define RD PMCON1bits.RD // bit 0 4466 #define WR PMCON1bits.WR // bit 1 4467 #define WREN PMCON1bits.WREN // bit 2 4468 #define WRERR PMCON1bits.WRERR // bit 3 4469 #define FREE PMCON1bits.FREE // bit 4 4470 #define LWLO PMCON1bits.LWLO // bit 5 4471 #define CFGS PMCON1bits.CFGS // bit 6 4472 4473 #define RA0 PORTAbits.RA0 // bit 0 4474 #define RA1 PORTAbits.RA1 // bit 1 4475 #define RA2 PORTAbits.RA2 // bit 2 4476 #define RA3 PORTAbits.RA3 // bit 3 4477 #define RA4 PORTAbits.RA4 // bit 4 4478 #define RA5 PORTAbits.RA5 // bit 5 4479 4480 #define RC0 PORTCbits.RC0 // bit 0 4481 #define RC1 PORTCbits.RC1 // bit 1 4482 #define RC2 PORTCbits.RC2 // bit 2 4483 #define RC3 PORTCbits.RC3 // bit 3 4484 #define RC4 PORTCbits.RC4 // bit 4 4485 #define RC5 PORTCbits.RC5 // bit 5 4486 4487 #define PWM1POL PWM1CONbits.PWM1POL // bit 4 4488 #define PWM1OUT PWM1CONbits.PWM1OUT // bit 5 4489 #define PWM1OE PWM1CONbits.PWM1OE // bit 6 4490 #define PWM1EN PWM1CONbits.PWM1EN // bit 7 4491 4492 #define PWM1DCH0 PWM1DCHbits.PWM1DCH0 // bit 0 4493 #define PWM1DCH1 PWM1DCHbits.PWM1DCH1 // bit 1 4494 #define PWM1DCH2 PWM1DCHbits.PWM1DCH2 // bit 2 4495 #define PWM1DCH3 PWM1DCHbits.PWM1DCH3 // bit 3 4496 #define PWM1DCH4 PWM1DCHbits.PWM1DCH4 // bit 4 4497 #define PWM1DCH5 PWM1DCHbits.PWM1DCH5 // bit 5 4498 #define PWM1DCH6 PWM1DCHbits.PWM1DCH6 // bit 6 4499 #define PWM1DCH7 PWM1DCHbits.PWM1DCH7 // bit 7 4500 4501 #define PWM1DCL0 PWM1DCLbits.PWM1DCL0 // bit 6 4502 #define PWM1DCL1 PWM1DCLbits.PWM1DCL1 // bit 7 4503 4504 #define PWM2POL PWM2CONbits.PWM2POL // bit 4 4505 #define PWM2OUT PWM2CONbits.PWM2OUT // bit 5 4506 #define PWM2OE PWM2CONbits.PWM2OE // bit 6 4507 #define PWM2EN PWM2CONbits.PWM2EN // bit 7 4508 4509 #define PWM2DCH0 PWM2DCHbits.PWM2DCH0 // bit 0 4510 #define PWM2DCH1 PWM2DCHbits.PWM2DCH1 // bit 1 4511 #define PWM2DCH2 PWM2DCHbits.PWM2DCH2 // bit 2 4512 #define PWM2DCH3 PWM2DCHbits.PWM2DCH3 // bit 3 4513 #define PWM2DCH4 PWM2DCHbits.PWM2DCH4 // bit 4 4514 #define PWM2DCH5 PWM2DCHbits.PWM2DCH5 // bit 5 4515 #define PWM2DCH6 PWM2DCHbits.PWM2DCH6 // bit 6 4516 #define PWM2DCH7 PWM2DCHbits.PWM2DCH7 // bit 7 4517 4518 #define PWM2DCL0 PWM2DCLbits.PWM2DCL0 // bit 6 4519 #define PWM2DCL1 PWM2DCLbits.PWM2DCL1 // bit 7 4520 4521 #define PWM3POL PWM3CONbits.PWM3POL // bit 4 4522 #define PWM3OUT PWM3CONbits.PWM3OUT // bit 5 4523 #define PWM3OE PWM3CONbits.PWM3OE // bit 6 4524 #define PWM3EN PWM3CONbits.PWM3EN // bit 7 4525 4526 #define PWM3DCH0 PWM3DCHbits.PWM3DCH0 // bit 0 4527 #define PWM3DCH1 PWM3DCHbits.PWM3DCH1 // bit 1 4528 #define PWM3DCH2 PWM3DCHbits.PWM3DCH2 // bit 2 4529 #define PWM3DCH3 PWM3DCHbits.PWM3DCH3 // bit 3 4530 #define PWM3DCH4 PWM3DCHbits.PWM3DCH4 // bit 4 4531 #define PWM3DCH5 PWM3DCHbits.PWM3DCH5 // bit 5 4532 #define PWM3DCH6 PWM3DCHbits.PWM3DCH6 // bit 6 4533 #define PWM3DCH7 PWM3DCHbits.PWM3DCH7 // bit 7 4534 4535 #define PWM3DCL0 PWM3DCLbits.PWM3DCL0 // bit 6 4536 #define PWM3DCL1 PWM3DCLbits.PWM3DCL1 // bit 7 4537 4538 #define PWM4POL PWM4CONbits.PWM4POL // bit 4 4539 #define PWM4OUT PWM4CONbits.PWM4OUT // bit 5 4540 #define PWM4OE PWM4CONbits.PWM4OE // bit 6 4541 #define PWM4EN PWM4CONbits.PWM4EN // bit 7 4542 4543 #define PWM4DCH0 PWM4DCHbits.PWM4DCH0 // bit 0 4544 #define PWM4DCH1 PWM4DCHbits.PWM4DCH1 // bit 1 4545 #define PWM4DCH2 PWM4DCHbits.PWM4DCH2 // bit 2 4546 #define PWM4DCH3 PWM4DCHbits.PWM4DCH3 // bit 3 4547 #define PWM4DCH4 PWM4DCHbits.PWM4DCH4 // bit 4 4548 #define PWM4DCH5 PWM4DCHbits.PWM4DCH5 // bit 5 4549 #define PWM4DCH6 PWM4DCHbits.PWM4DCH6 // bit 6 4550 #define PWM4DCH7 PWM4DCHbits.PWM4DCH7 // bit 7 4551 4552 #define PWM4DCL0 PWM4DCLbits.PWM4DCL0 // bit 6 4553 #define PWM4DCL1 PWM4DCLbits.PWM4DCL1 // bit 7 4554 4555 #define SSPM0 SSP1CON1bits.SSPM0 // bit 0 4556 #define SSPM1 SSP1CON1bits.SSPM1 // bit 1 4557 #define SSPM2 SSP1CON1bits.SSPM2 // bit 2 4558 #define SSPM3 SSP1CON1bits.SSPM3 // bit 3 4559 #define CKP SSP1CON1bits.CKP // bit 4 4560 #define SSPEN SSP1CON1bits.SSPEN // bit 5 4561 #define SSPOV SSP1CON1bits.SSPOV // bit 6 4562 #define WCOL SSP1CON1bits.WCOL // bit 7 4563 4564 #define SEN SSP1CON2bits.SEN // bit 0 4565 #define RSEN SSP1CON2bits.RSEN // bit 1 4566 #define PEN SSP1CON2bits.PEN // bit 2 4567 #define RCEN SSP1CON2bits.RCEN // bit 3 4568 #define ACKEN SSP1CON2bits.ACKEN // bit 4 4569 #define ACKDT SSP1CON2bits.ACKDT // bit 5 4570 #define ACKSTAT SSP1CON2bits.ACKSTAT // bit 6 4571 #define GCEN SSP1CON2bits.GCEN // bit 7 4572 4573 #define DHEN SSP1CON3bits.DHEN // bit 0 4574 #define AHEN SSP1CON3bits.AHEN // bit 1 4575 #define SBCDE SSP1CON3bits.SBCDE // bit 2 4576 #define SDAHT SSP1CON3bits.SDAHT // bit 3 4577 #define BOEN SSP1CON3bits.BOEN // bit 4 4578 #define SCIE SSP1CON3bits.SCIE // bit 5 4579 #define PCIE SSP1CON3bits.PCIE // bit 6 4580 #define ACKTIM SSP1CON3bits.ACKTIM // bit 7 4581 4582 #define BF SSP1STATbits.BF // bit 0 4583 #define UA SSP1STATbits.UA // bit 1 4584 #define R_NOT_W SSP1STATbits.R_NOT_W // bit 2 4585 #define S SSP1STATbits.S // bit 3 4586 #define P SSP1STATbits.P // bit 4 4587 #define D_NOT_A SSP1STATbits.D_NOT_A // bit 5 4588 #define CKE SSP1STATbits.CKE // bit 6 4589 #define SMP SSP1STATbits.SMP // bit 7 4590 4591 #define C STATUSbits.C // bit 0 4592 #define DC STATUSbits.DC // bit 1 4593 #define Z STATUSbits.Z // bit 2 4594 #define NOT_PD STATUSbits.NOT_PD // bit 3 4595 #define NOT_TO STATUSbits.NOT_TO // bit 4 4596 4597 #define C_SHAD STATUS_SHADbits.C_SHAD // bit 0 4598 #define DC_SHAD STATUS_SHADbits.DC_SHAD // bit 1 4599 #define Z_SHAD STATUS_SHADbits.Z_SHAD // bit 2 4600 4601 #define TMR1ON T1CONbits.TMR1ON // bit 0 4602 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 4603 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 4604 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 4605 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 4606 #define TMR1CS0 T1CONbits.TMR1CS0 // bit 6 4607 #define TMR1CS1 T1CONbits.TMR1CS1 // bit 7 4608 4609 #define T1GSS0 T1GCONbits.T1GSS0 // bit 0 4610 #define T1GSS1 T1GCONbits.T1GSS1 // bit 1 4611 #define T1GVAL T1GCONbits.T1GVAL // bit 2 4612 #define T1GGO_NOT_DONE T1GCONbits.T1GGO_NOT_DONE // bit 3 4613 #define T1GSPM T1GCONbits.T1GSPM // bit 4 4614 #define T1GTM T1GCONbits.T1GTM // bit 5 4615 #define T1GPOL T1GCONbits.T1GPOL // bit 6 4616 #define TMR1GE T1GCONbits.TMR1GE // bit 7 4617 4618 #define T2CKPS0 T2CONbits.T2CKPS0 // bit 0 4619 #define T2CKPS1 T2CONbits.T2CKPS1 // bit 1 4620 #define TMR2ON T2CONbits.TMR2ON // bit 2 4621 #define T2OUTPS0 T2CONbits.T2OUTPS0 // bit 3 4622 #define T2OUTPS1 T2CONbits.T2OUTPS1 // bit 4 4623 #define T2OUTPS2 T2CONbits.T2OUTPS2 // bit 5 4624 #define T2OUTPS3 T2CONbits.T2OUTPS3 // bit 6 4625 4626 #define TRISA0 TRISAbits.TRISA0 // bit 0 4627 #define TRISA1 TRISAbits.TRISA1 // bit 1 4628 #define TRISA2 TRISAbits.TRISA2 // bit 2 4629 #define TRISA3 TRISAbits.TRISA3 // bit 3 4630 #define TRISA4 TRISAbits.TRISA4 // bit 4 4631 #define TRISA5 TRISAbits.TRISA5 // bit 5 4632 4633 #define TRISC0 TRISCbits.TRISC0 // bit 0 4634 #define TRISC1 TRISCbits.TRISC1 // bit 1 4635 #define TRISC2 TRISCbits.TRISC2 // bit 2 4636 #define TRISC3 TRISCbits.TRISC3 // bit 3 4637 #define TRISC4 TRISCbits.TRISC4 // bit 4 4638 #define TRISC5 TRISCbits.TRISC5 // bit 5 4639 4640 #define VREGPM VREGCONbits.VREGPM // bit 1 4641 4642 #define SWDTEN WDTCONbits.SWDTEN // bit 0 4643 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 4644 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 4645 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 4646 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 4647 #define WDTPS4 WDTCONbits.WDTPS4 // bit 5 4648 4649 #define WPUA0 WPUAbits.WPUA0 // bit 0 4650 #define WPUA1 WPUAbits.WPUA1 // bit 1 4651 #define WPUA2 WPUAbits.WPUA2 // bit 2 4652 #define WPUA3 WPUAbits.WPUA3 // bit 3 4653 #define WPUA4 WPUAbits.WPUA4 // bit 4 4654 #define WPUA5 WPUAbits.WPUA5 // bit 5 4655 4656 #endif // #ifndef NO_BIT_DEFINES 4657 4658 #endif // #ifndef __PIC16F1503_H__ 4659