1 /* 2 * This declarations of the PIC16F636 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:57 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16F636_H__ 26 #define __PIC16F636_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTC_ADDR 0x0007 43 #define PCLATH_ADDR 0x000A 44 #define INTCON_ADDR 0x000B 45 #define PIR1_ADDR 0x000C 46 #define TMR1_ADDR 0x000E 47 #define TMR1L_ADDR 0x000E 48 #define TMR1H_ADDR 0x000F 49 #define T1CON_ADDR 0x0010 50 #define WDTCON_ADDR 0x0018 51 #define CMCON0_ADDR 0x0019 52 #define CMCON1_ADDR 0x001A 53 #define OPTION_REG_ADDR 0x0081 54 #define TRISA_ADDR 0x0085 55 #define TRISC_ADDR 0x0087 56 #define PIE1_ADDR 0x008C 57 #define PCON_ADDR 0x008E 58 #define OSCCON_ADDR 0x008F 59 #define OSCTUNE_ADDR 0x0090 60 #define LVDCON_ADDR 0x0094 61 #define WPUDA_ADDR 0x0095 62 #define IOCA_ADDR 0x0096 63 #define WDA_ADDR 0x0097 64 #define VRCON_ADDR 0x0099 65 #define EEDAT_ADDR 0x009A 66 #define EEDATA_ADDR 0x009A 67 #define EEADR_ADDR 0x009B 68 #define EECON1_ADDR 0x009C 69 #define EECON2_ADDR 0x009D 70 #define CRCON_ADDR 0x0110 71 #define CRDAT0_ADDR 0x0111 72 #define CRDAT1_ADDR 0x0112 73 #define CRDAT2_ADDR 0x0113 74 #define CRDAT3_ADDR 0x0114 75 76 #endif // #ifndef NO_ADDR_DEFINES 77 78 //============================================================================== 79 // 80 // Register Definitions 81 // 82 //============================================================================== 83 84 extern __at(0x0000) __sfr INDF; 85 extern __at(0x0001) __sfr TMR0; 86 extern __at(0x0002) __sfr PCL; 87 88 //============================================================================== 89 // STATUS Bits 90 91 extern __at(0x0003) __sfr STATUS; 92 93 typedef union 94 { 95 struct 96 { 97 unsigned C : 1; 98 unsigned DC : 1; 99 unsigned Z : 1; 100 unsigned NOT_PD : 1; 101 unsigned NOT_TO : 1; 102 unsigned RP0 : 1; 103 unsigned RP1 : 1; 104 unsigned IRP : 1; 105 }; 106 107 struct 108 { 109 unsigned : 5; 110 unsigned RP : 2; 111 unsigned : 1; 112 }; 113 } __STATUSbits_t; 114 115 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 116 117 #define _C 0x01 118 #define _DC 0x02 119 #define _Z 0x04 120 #define _NOT_PD 0x08 121 #define _NOT_TO 0x10 122 #define _RP0 0x20 123 #define _RP1 0x40 124 #define _IRP 0x80 125 126 //============================================================================== 127 128 extern __at(0x0004) __sfr FSR; 129 130 //============================================================================== 131 // PORTA Bits 132 133 extern __at(0x0005) __sfr PORTA; 134 135 typedef union 136 { 137 struct 138 { 139 unsigned RA0 : 1; 140 unsigned RA1 : 1; 141 unsigned RA2 : 1; 142 unsigned RA3 : 1; 143 unsigned RA4 : 1; 144 unsigned RA5 : 1; 145 unsigned : 1; 146 unsigned : 1; 147 }; 148 149 struct 150 { 151 unsigned RA : 6; 152 unsigned : 2; 153 }; 154 } __PORTAbits_t; 155 156 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 157 158 #define _RA0 0x01 159 #define _RA1 0x02 160 #define _RA2 0x04 161 #define _RA3 0x08 162 #define _RA4 0x10 163 #define _RA5 0x20 164 165 //============================================================================== 166 167 168 //============================================================================== 169 // PORTC Bits 170 171 extern __at(0x0007) __sfr PORTC; 172 173 typedef union 174 { 175 struct 176 { 177 unsigned RC0 : 1; 178 unsigned RC1 : 1; 179 unsigned RC2 : 1; 180 unsigned RC3 : 1; 181 unsigned RC4 : 1; 182 unsigned RC5 : 1; 183 unsigned : 1; 184 unsigned : 1; 185 }; 186 187 struct 188 { 189 unsigned RC : 6; 190 unsigned : 2; 191 }; 192 } __PORTCbits_t; 193 194 extern __at(0x0007) volatile __PORTCbits_t PORTCbits; 195 196 #define _RC0 0x01 197 #define _RC1 0x02 198 #define _RC2 0x04 199 #define _RC3 0x08 200 #define _RC4 0x10 201 #define _RC5 0x20 202 203 //============================================================================== 204 205 extern __at(0x000A) __sfr PCLATH; 206 207 //============================================================================== 208 // INTCON Bits 209 210 extern __at(0x000B) __sfr INTCON; 211 212 typedef struct 213 { 214 unsigned RAIF : 1; 215 unsigned INTF : 1; 216 unsigned T0IF : 1; 217 unsigned RAIE : 1; 218 unsigned INTE : 1; 219 unsigned T0IE : 1; 220 unsigned PEIE : 1; 221 unsigned GIE : 1; 222 } __INTCONbits_t; 223 224 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 225 226 #define _RAIF 0x01 227 #define _INTF 0x02 228 #define _T0IF 0x04 229 #define _RAIE 0x08 230 #define _INTE 0x10 231 #define _T0IE 0x20 232 #define _PEIE 0x40 233 #define _GIE 0x80 234 235 //============================================================================== 236 237 238 //============================================================================== 239 // PIR1 Bits 240 241 extern __at(0x000C) __sfr PIR1; 242 243 typedef struct 244 { 245 unsigned TMR1IF : 1; 246 unsigned : 1; 247 unsigned OSFIF : 1; 248 unsigned C1IF : 1; 249 unsigned C2IF : 1; 250 unsigned CRIF : 1; 251 unsigned LVDIF : 1; 252 unsigned EEIF : 1; 253 } __PIR1bits_t; 254 255 extern __at(0x000C) volatile __PIR1bits_t PIR1bits; 256 257 #define _TMR1IF 0x01 258 #define _OSFIF 0x04 259 #define _C1IF 0x08 260 #define _C2IF 0x10 261 #define _CRIF 0x20 262 #define _LVDIF 0x40 263 #define _EEIF 0x80 264 265 //============================================================================== 266 267 extern __at(0x000E) __sfr TMR1; 268 extern __at(0x000E) __sfr TMR1L; 269 extern __at(0x000F) __sfr TMR1H; 270 271 //============================================================================== 272 // T1CON Bits 273 274 extern __at(0x0010) __sfr T1CON; 275 276 typedef union 277 { 278 struct 279 { 280 unsigned TMR1ON : 1; 281 unsigned TMR1CS : 1; 282 unsigned NOT_T1SYNC : 1; 283 unsigned T1OSCEN : 1; 284 unsigned T1CKPS0 : 1; 285 unsigned T1CKPS1 : 1; 286 unsigned TMR1GE : 1; 287 unsigned T1GINV : 1; 288 }; 289 290 struct 291 { 292 unsigned : 4; 293 unsigned T1CKPS : 2; 294 unsigned : 2; 295 }; 296 } __T1CONbits_t; 297 298 extern __at(0x0010) volatile __T1CONbits_t T1CONbits; 299 300 #define _TMR1ON 0x01 301 #define _TMR1CS 0x02 302 #define _NOT_T1SYNC 0x04 303 #define _T1OSCEN 0x08 304 #define _T1CKPS0 0x10 305 #define _T1CKPS1 0x20 306 #define _TMR1GE 0x40 307 #define _T1GINV 0x80 308 309 //============================================================================== 310 311 312 //============================================================================== 313 // WDTCON Bits 314 315 extern __at(0x0018) __sfr WDTCON; 316 317 typedef union 318 { 319 struct 320 { 321 unsigned SWDTEN : 1; 322 unsigned WDTPS0 : 1; 323 unsigned WDTPS1 : 1; 324 unsigned WDTPS2 : 1; 325 unsigned WDTPS3 : 1; 326 unsigned : 1; 327 unsigned : 1; 328 unsigned : 1; 329 }; 330 331 struct 332 { 333 unsigned : 1; 334 unsigned WDTPS : 4; 335 unsigned : 3; 336 }; 337 } __WDTCONbits_t; 338 339 extern __at(0x0018) volatile __WDTCONbits_t WDTCONbits; 340 341 #define _SWDTEN 0x01 342 #define _WDTPS0 0x02 343 #define _WDTPS1 0x04 344 #define _WDTPS2 0x08 345 #define _WDTPS3 0x10 346 347 //============================================================================== 348 349 350 //============================================================================== 351 // CMCON0 Bits 352 353 extern __at(0x0019) __sfr CMCON0; 354 355 typedef union 356 { 357 struct 358 { 359 unsigned CM0 : 1; 360 unsigned CM1 : 1; 361 unsigned CM2 : 1; 362 unsigned CIS : 1; 363 unsigned C1INV : 1; 364 unsigned C2INV : 1; 365 unsigned C1OUT : 1; 366 unsigned C2OUT : 1; 367 }; 368 369 struct 370 { 371 unsigned CM : 3; 372 unsigned : 5; 373 }; 374 } __CMCON0bits_t; 375 376 extern __at(0x0019) volatile __CMCON0bits_t CMCON0bits; 377 378 #define _CM0 0x01 379 #define _CM1 0x02 380 #define _CM2 0x04 381 #define _CIS 0x08 382 #define _C1INV 0x10 383 #define _C2INV 0x20 384 #define _C1OUT 0x40 385 #define _C2OUT 0x80 386 387 //============================================================================== 388 389 390 //============================================================================== 391 // CMCON1 Bits 392 393 extern __at(0x001A) __sfr CMCON1; 394 395 typedef struct 396 { 397 unsigned C2SYNC : 1; 398 unsigned T1GSS : 1; 399 unsigned : 1; 400 unsigned : 1; 401 unsigned : 1; 402 unsigned : 1; 403 unsigned : 1; 404 unsigned : 1; 405 } __CMCON1bits_t; 406 407 extern __at(0x001A) volatile __CMCON1bits_t CMCON1bits; 408 409 #define _C2SYNC 0x01 410 #define _T1GSS 0x02 411 412 //============================================================================== 413 414 415 //============================================================================== 416 // OPTION_REG Bits 417 418 extern __at(0x0081) __sfr OPTION_REG; 419 420 typedef union 421 { 422 struct 423 { 424 unsigned PS0 : 1; 425 unsigned PS1 : 1; 426 unsigned PS2 : 1; 427 unsigned PSA : 1; 428 unsigned T0SE : 1; 429 unsigned T0CS : 1; 430 unsigned INTEDG : 1; 431 unsigned NOT_RAPU : 1; 432 }; 433 434 struct 435 { 436 unsigned PS : 3; 437 unsigned : 5; 438 }; 439 } __OPTION_REGbits_t; 440 441 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 442 443 #define _PS0 0x01 444 #define _PS1 0x02 445 #define _PS2 0x04 446 #define _PSA 0x08 447 #define _T0SE 0x10 448 #define _T0CS 0x20 449 #define _INTEDG 0x40 450 #define _NOT_RAPU 0x80 451 452 //============================================================================== 453 454 455 //============================================================================== 456 // TRISA Bits 457 458 extern __at(0x0085) __sfr TRISA; 459 460 typedef union 461 { 462 struct 463 { 464 unsigned TRISA0 : 1; 465 unsigned TRISA1 : 1; 466 unsigned TRISA2 : 1; 467 unsigned TRISA3 : 1; 468 unsigned TRISA4 : 1; 469 unsigned TRISA5 : 1; 470 unsigned : 1; 471 unsigned : 1; 472 }; 473 474 struct 475 { 476 unsigned TRISA : 6; 477 unsigned : 2; 478 }; 479 } __TRISAbits_t; 480 481 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 482 483 #define _TRISA0 0x01 484 #define _TRISA1 0x02 485 #define _TRISA2 0x04 486 #define _TRISA3 0x08 487 #define _TRISA4 0x10 488 #define _TRISA5 0x20 489 490 //============================================================================== 491 492 493 //============================================================================== 494 // TRISC Bits 495 496 extern __at(0x0087) __sfr TRISC; 497 498 typedef union 499 { 500 struct 501 { 502 unsigned TRISC0 : 1; 503 unsigned TRISC1 : 1; 504 unsigned TRISC2 : 1; 505 unsigned TRISC3 : 1; 506 unsigned TRISC4 : 1; 507 unsigned TRISC5 : 1; 508 unsigned : 1; 509 unsigned : 1; 510 }; 511 512 struct 513 { 514 unsigned TRISC : 6; 515 unsigned : 2; 516 }; 517 } __TRISCbits_t; 518 519 extern __at(0x0087) volatile __TRISCbits_t TRISCbits; 520 521 #define _TRISC0 0x01 522 #define _TRISC1 0x02 523 #define _TRISC2 0x04 524 #define _TRISC3 0x08 525 #define _TRISC4 0x10 526 #define _TRISC5 0x20 527 528 //============================================================================== 529 530 531 //============================================================================== 532 // PIE1 Bits 533 534 extern __at(0x008C) __sfr PIE1; 535 536 typedef struct 537 { 538 unsigned TMR1IE : 1; 539 unsigned : 1; 540 unsigned OSFIE : 1; 541 unsigned C1IE : 1; 542 unsigned C2IE : 1; 543 unsigned CRIE : 1; 544 unsigned LVDIE : 1; 545 unsigned EEIE : 1; 546 } __PIE1bits_t; 547 548 extern __at(0x008C) volatile __PIE1bits_t PIE1bits; 549 550 #define _TMR1IE 0x01 551 #define _OSFIE 0x04 552 #define _C1IE 0x08 553 #define _C2IE 0x10 554 #define _CRIE 0x20 555 #define _LVDIE 0x40 556 #define _EEIE 0x80 557 558 //============================================================================== 559 560 561 //============================================================================== 562 // PCON Bits 563 564 extern __at(0x008E) __sfr PCON; 565 566 typedef union 567 { 568 struct 569 { 570 unsigned NOT_BOR : 1; 571 unsigned NOT_POR : 1; 572 unsigned : 1; 573 unsigned NOT_WUR : 1; 574 unsigned SBOREN : 1; 575 unsigned ULPWUE : 1; 576 unsigned : 1; 577 unsigned : 1; 578 }; 579 580 struct 581 { 582 unsigned NOT_BOD : 1; 583 unsigned : 1; 584 unsigned : 1; 585 unsigned : 1; 586 unsigned SBODEN : 1; 587 unsigned : 1; 588 unsigned : 1; 589 unsigned : 1; 590 }; 591 } __PCONbits_t; 592 593 extern __at(0x008E) volatile __PCONbits_t PCONbits; 594 595 #define _NOT_BOR 0x01 596 #define _NOT_BOD 0x01 597 #define _NOT_POR 0x02 598 #define _NOT_WUR 0x08 599 #define _SBOREN 0x10 600 #define _SBODEN 0x10 601 #define _ULPWUE 0x20 602 603 //============================================================================== 604 605 606 //============================================================================== 607 // OSCCON Bits 608 609 extern __at(0x008F) __sfr OSCCON; 610 611 typedef union 612 { 613 struct 614 { 615 unsigned SCS : 1; 616 unsigned LTS : 1; 617 unsigned HTS : 1; 618 unsigned OSTS : 1; 619 unsigned IRCF0 : 1; 620 unsigned IRCF1 : 1; 621 unsigned IRCF2 : 1; 622 unsigned : 1; 623 }; 624 625 struct 626 { 627 unsigned : 4; 628 unsigned IRCF : 3; 629 unsigned : 1; 630 }; 631 } __OSCCONbits_t; 632 633 extern __at(0x008F) volatile __OSCCONbits_t OSCCONbits; 634 635 #define _SCS 0x01 636 #define _LTS 0x02 637 #define _HTS 0x04 638 #define _OSTS 0x08 639 #define _IRCF0 0x10 640 #define _IRCF1 0x20 641 #define _IRCF2 0x40 642 643 //============================================================================== 644 645 646 //============================================================================== 647 // OSCTUNE Bits 648 649 extern __at(0x0090) __sfr OSCTUNE; 650 651 typedef union 652 { 653 struct 654 { 655 unsigned TUN0 : 1; 656 unsigned TUN1 : 1; 657 unsigned TUN2 : 1; 658 unsigned TUN3 : 1; 659 unsigned TUN4 : 1; 660 unsigned : 1; 661 unsigned : 1; 662 unsigned : 1; 663 }; 664 665 struct 666 { 667 unsigned TUN : 5; 668 unsigned : 3; 669 }; 670 } __OSCTUNEbits_t; 671 672 extern __at(0x0090) volatile __OSCTUNEbits_t OSCTUNEbits; 673 674 #define _TUN0 0x01 675 #define _TUN1 0x02 676 #define _TUN2 0x04 677 #define _TUN3 0x08 678 #define _TUN4 0x10 679 680 //============================================================================== 681 682 683 //============================================================================== 684 // LVDCON Bits 685 686 extern __at(0x0094) __sfr LVDCON; 687 688 typedef union 689 { 690 struct 691 { 692 unsigned LVDL0 : 1; 693 unsigned LVDL1 : 1; 694 unsigned LVDL2 : 1; 695 unsigned : 1; 696 unsigned LVDEN : 1; 697 unsigned IRVST : 1; 698 unsigned : 1; 699 unsigned : 1; 700 }; 701 702 struct 703 { 704 unsigned LVDL : 3; 705 unsigned : 5; 706 }; 707 } __LVDCONbits_t; 708 709 extern __at(0x0094) volatile __LVDCONbits_t LVDCONbits; 710 711 #define _LVDL0 0x01 712 #define _LVDL1 0x02 713 #define _LVDL2 0x04 714 #define _LVDEN 0x10 715 #define _IRVST 0x20 716 717 //============================================================================== 718 719 720 //============================================================================== 721 // WPUDA Bits 722 723 extern __at(0x0095) __sfr WPUDA; 724 725 typedef struct 726 { 727 unsigned WPUDA0 : 1; 728 unsigned WPUDA1 : 1; 729 unsigned WPUDA2 : 1; 730 unsigned : 1; 731 unsigned WPUDA4 : 1; 732 unsigned WPUDA5 : 1; 733 unsigned : 1; 734 unsigned : 1; 735 } __WPUDAbits_t; 736 737 extern __at(0x0095) volatile __WPUDAbits_t WPUDAbits; 738 739 #define _WPUDA0 0x01 740 #define _WPUDA1 0x02 741 #define _WPUDA2 0x04 742 #define _WPUDA4 0x10 743 #define _WPUDA5 0x20 744 745 //============================================================================== 746 747 748 //============================================================================== 749 // IOCA Bits 750 751 extern __at(0x0096) __sfr IOCA; 752 753 typedef union 754 { 755 struct 756 { 757 unsigned IOCA0 : 1; 758 unsigned IOCA1 : 1; 759 unsigned IOCA2 : 1; 760 unsigned IOCA3 : 1; 761 unsigned IOCA4 : 1; 762 unsigned IOCA5 : 1; 763 unsigned : 1; 764 unsigned : 1; 765 }; 766 767 struct 768 { 769 unsigned IOCA : 6; 770 unsigned : 2; 771 }; 772 } __IOCAbits_t; 773 774 extern __at(0x0096) volatile __IOCAbits_t IOCAbits; 775 776 #define _IOCA0 0x01 777 #define _IOCA1 0x02 778 #define _IOCA2 0x04 779 #define _IOCA3 0x08 780 #define _IOCA4 0x10 781 #define _IOCA5 0x20 782 783 //============================================================================== 784 785 786 //============================================================================== 787 // WDA Bits 788 789 extern __at(0x0097) __sfr WDA; 790 791 typedef struct 792 { 793 unsigned WDA0 : 1; 794 unsigned WDA1 : 1; 795 unsigned WDA2 : 1; 796 unsigned : 1; 797 unsigned WDA4 : 1; 798 unsigned WDA5 : 1; 799 unsigned : 1; 800 unsigned : 1; 801 } __WDAbits_t; 802 803 extern __at(0x0097) volatile __WDAbits_t WDAbits; 804 805 #define _WDA0 0x01 806 #define _WDA1 0x02 807 #define _WDA2 0x04 808 #define _WDA4 0x10 809 #define _WDA5 0x20 810 811 //============================================================================== 812 813 814 //============================================================================== 815 // VRCON Bits 816 817 extern __at(0x0099) __sfr VRCON; 818 819 typedef union 820 { 821 struct 822 { 823 unsigned VR0 : 1; 824 unsigned VR1 : 1; 825 unsigned VR2 : 1; 826 unsigned VR3 : 1; 827 unsigned : 1; 828 unsigned VRR : 1; 829 unsigned : 1; 830 unsigned VREN : 1; 831 }; 832 833 struct 834 { 835 unsigned VR : 4; 836 unsigned : 4; 837 }; 838 } __VRCONbits_t; 839 840 extern __at(0x0099) volatile __VRCONbits_t VRCONbits; 841 842 #define _VR0 0x01 843 #define _VR1 0x02 844 #define _VR2 0x04 845 #define _VR3 0x08 846 #define _VRR 0x20 847 #define _VREN 0x80 848 849 //============================================================================== 850 851 extern __at(0x009A) __sfr EEDAT; 852 extern __at(0x009A) __sfr EEDATA; 853 extern __at(0x009B) __sfr EEADR; 854 855 //============================================================================== 856 // EECON1 Bits 857 858 extern __at(0x009C) __sfr EECON1; 859 860 typedef struct 861 { 862 unsigned RD : 1; 863 unsigned WR : 1; 864 unsigned WREN : 1; 865 unsigned WRERR : 1; 866 unsigned : 1; 867 unsigned : 1; 868 unsigned : 1; 869 unsigned : 1; 870 } __EECON1bits_t; 871 872 extern __at(0x009C) volatile __EECON1bits_t EECON1bits; 873 874 #define _RD 0x01 875 #define _WR 0x02 876 #define _WREN 0x04 877 #define _WRERR 0x08 878 879 //============================================================================== 880 881 extern __at(0x009D) __sfr EECON2; 882 883 //============================================================================== 884 // CRCON Bits 885 886 extern __at(0x0110) __sfr CRCON; 887 888 typedef union 889 { 890 struct 891 { 892 unsigned CRREG0 : 1; 893 unsigned CRREG1 : 1; 894 unsigned : 1; 895 unsigned : 1; 896 unsigned : 1; 897 unsigned : 1; 898 unsigned ENC_NOT_DEC : 1; 899 unsigned GO_NOT_DONE : 1; 900 }; 901 902 struct 903 { 904 unsigned : 1; 905 unsigned : 1; 906 unsigned : 1; 907 unsigned : 1; 908 unsigned : 1; 909 unsigned : 1; 910 unsigned ENC_DEC : 1; 911 unsigned GO : 1; 912 }; 913 914 struct 915 { 916 unsigned CRREG : 2; 917 unsigned : 6; 918 }; 919 } __CRCONbits_t; 920 921 extern __at(0x0110) volatile __CRCONbits_t CRCONbits; 922 923 #define _CRREG0 0x01 924 #define _CRREG1 0x02 925 #define _ENC_NOT_DEC 0x40 926 #define _ENC_DEC 0x40 927 #define _GO_NOT_DONE 0x80 928 #define _GO 0x80 929 930 //============================================================================== 931 932 extern __at(0x0111) __sfr CRDAT0; 933 extern __at(0x0112) __sfr CRDAT1; 934 extern __at(0x0113) __sfr CRDAT2; 935 extern __at(0x0114) __sfr CRDAT3; 936 937 //============================================================================== 938 // 939 // Configuration Bits 940 // 941 //============================================================================== 942 943 #define _CONFIG 0x2007 944 945 //----------------------------- CONFIG Options ------------------------------- 946 947 #define _FOSC_LP 0x3FF8 // LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 948 #define _LP_OSC 0x3FF8 // LP oscillator: Low-power crystal on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 949 #define _FOSC_XT 0x3FF9 // XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 950 #define _XT_OSC 0x3FF9 // XT oscillator: Crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 951 #define _FOSC_HS 0x3FFA // HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 952 #define _HS_OSC 0x3FFA // HS oscillator: High-speed crystal/resonator on RA5/T1CKI/OSC1/CLKIN and RA4/T1G/OSC2/CLKOUT. 953 #define _FOSC_EC 0x3FFB // EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN. 954 #define _EC_OSC 0x3FFB // EC: I/O function on RA4/T1G/OSC2/CLKOUT, CLKIN on RA5/T1CKI/OSC1/CLKIN. 955 #define _FOSC_INTOSCIO 0x3FFC // INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN. 956 #define _INTRC_OSC_NOCLKOUT 0x3FFC // INTOSCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN. 957 #define _FOSC_INTOSCCLK 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN. 958 #define _INTRC_OSC_CLKOUT 0x3FFD // INTOSC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, I/O function on RA5/T1CKI/OSC1/CLKIN. 959 #define _FOSC_EXTRCIO 0x3FFE // RCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN. 960 #define _EXTRC_OSC_NOCLKOUT 0x3FFE // RCIO oscillator: I/O function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN. 961 #define _FOSC_EXTRCCLK 0x3FFF // RC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN. 962 #define _EXTRC_OSC_CLKOUT 0x3FFF // RC oscillator: CLKOUT function on RA4/T1G/OSC2/CLKOUT pin, RC on RA5/T1CKI/OSC1/CLKIN. 963 #define _WDTE_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register. 964 #define _WDT_OFF 0x3FF7 // WDT disabled and can be enabled by SWDTEN bit of the WDTCON register. 965 #define _WDTE_ON 0x3FFF // WDT enabled. 966 #define _WDT_ON 0x3FFF // WDT enabled. 967 #define _PWRTE_ON 0x3FEF // PWRT enabled. 968 #define _PWRTE_OFF 0x3FFF // PWRT disabled. 969 #define _MCLRE_OFF 0x3FDF // MCLR pin function is alternate function, MCLR function is internally disabled. 970 #define _MCLRE_ON 0x3FFF // MCLR pin is MCLR function and weak internal pull-up is enabled. 971 #define _CP_ON 0x3FBF // Program memory is external read and write-protected. 972 #define _CP_OFF 0x3FFF // Program memory is not code protected. 973 #define _CPD_ON 0x3F7F // Data memory is external read protected. 974 #define _CPD_OFF 0x3FFF // Data memory is not code protected. 975 #define _BOREN_OFF 0x3CFF // BOD and SBODEN disabled. 976 #define _BOD_OFF 0x3CFF // BOD and SBODEN disabled. 977 #define _BOREN_SBODEN 0x3DFF // SBODEN controls BOD function. 978 #define _BOD_SBODEN 0x3DFF // SBODEN controls BOD function. 979 #define _BOREN_NSLEEP 0x3EFF // BOD enabled while running and disabled in Sleep. SBODEN bit disabled. 980 #define _BOD_NSLEEP 0x3EFF // BOD enabled while running and disabled in Sleep. SBODEN bit disabled. 981 #define _BOREN_ON 0x3FFF // BOD enabled and SBOdEN bit disabled. 982 #define _BOD_ON 0x3FFF // BOD enabled and SBOdEN bit disabled. 983 #define _IESO_OFF 0x3BFF // Internal External Switchover mode disabled. 984 #define _IESO_ON 0x3FFF // Internal External Switchover mode enabled. 985 #define _FCMEN_OFF 0x37FF // Fail-Safe Clock Monitor disabled. 986 #define _FCMEN_ON 0x3FFF // Fail-Safe Clock Monitor enabled. 987 #define _WURE_ON 0x2FFF // Wake-up and Reset enabled. 988 #define _WUREN_ON 0x2FFF // Wake-up and Reset enabled. 989 #define _WURE_OFF 0x3FFF // Standard wake-up and continue enabled. 990 #define _WUREN_OFF 0x3FFF // Standard wake-up and continue enabled. 991 992 //============================================================================== 993 994 #define _DEVID1 0x2006 995 996 #define _IDLOC0 0x2000 997 #define _IDLOC1 0x2001 998 #define _IDLOC2 0x2002 999 #define _IDLOC3 0x2003 1000 1001 //============================================================================== 1002 1003 #ifndef NO_BIT_DEFINES 1004 1005 #define CM0 CMCON0bits.CM0 // bit 0 1006 #define CM1 CMCON0bits.CM1 // bit 1 1007 #define CM2 CMCON0bits.CM2 // bit 2 1008 #define CIS CMCON0bits.CIS // bit 3 1009 #define C1INV CMCON0bits.C1INV // bit 4 1010 #define C2INV CMCON0bits.C2INV // bit 5 1011 #define C1OUT CMCON0bits.C1OUT // bit 6 1012 #define C2OUT CMCON0bits.C2OUT // bit 7 1013 1014 #define C2SYNC CMCON1bits.C2SYNC // bit 0 1015 #define T1GSS CMCON1bits.T1GSS // bit 1 1016 1017 #define CRREG0 CRCONbits.CRREG0 // bit 0 1018 #define CRREG1 CRCONbits.CRREG1 // bit 1 1019 #define ENC_NOT_DEC CRCONbits.ENC_NOT_DEC // bit 6, shadows bit in CRCONbits 1020 #define ENC_DEC CRCONbits.ENC_DEC // bit 6, shadows bit in CRCONbits 1021 #define GO_NOT_DONE CRCONbits.GO_NOT_DONE // bit 7, shadows bit in CRCONbits 1022 #define GO CRCONbits.GO // bit 7, shadows bit in CRCONbits 1023 1024 #define RD EECON1bits.RD // bit 0 1025 #define WR EECON1bits.WR // bit 1 1026 #define WREN EECON1bits.WREN // bit 2 1027 #define WRERR EECON1bits.WRERR // bit 3 1028 1029 #define RAIF INTCONbits.RAIF // bit 0 1030 #define INTF INTCONbits.INTF // bit 1 1031 #define T0IF INTCONbits.T0IF // bit 2 1032 #define RAIE INTCONbits.RAIE // bit 3 1033 #define INTE INTCONbits.INTE // bit 4 1034 #define T0IE INTCONbits.T0IE // bit 5 1035 #define PEIE INTCONbits.PEIE // bit 6 1036 #define GIE INTCONbits.GIE // bit 7 1037 1038 #define IOCA0 IOCAbits.IOCA0 // bit 0 1039 #define IOCA1 IOCAbits.IOCA1 // bit 1 1040 #define IOCA2 IOCAbits.IOCA2 // bit 2 1041 #define IOCA3 IOCAbits.IOCA3 // bit 3 1042 #define IOCA4 IOCAbits.IOCA4 // bit 4 1043 #define IOCA5 IOCAbits.IOCA5 // bit 5 1044 1045 #define LVDL0 LVDCONbits.LVDL0 // bit 0 1046 #define LVDL1 LVDCONbits.LVDL1 // bit 1 1047 #define LVDL2 LVDCONbits.LVDL2 // bit 2 1048 #define LVDEN LVDCONbits.LVDEN // bit 4 1049 #define IRVST LVDCONbits.IRVST // bit 5 1050 1051 #define PS0 OPTION_REGbits.PS0 // bit 0 1052 #define PS1 OPTION_REGbits.PS1 // bit 1 1053 #define PS2 OPTION_REGbits.PS2 // bit 2 1054 #define PSA OPTION_REGbits.PSA // bit 3 1055 #define T0SE OPTION_REGbits.T0SE // bit 4 1056 #define T0CS OPTION_REGbits.T0CS // bit 5 1057 #define INTEDG OPTION_REGbits.INTEDG // bit 6 1058 #define NOT_RAPU OPTION_REGbits.NOT_RAPU // bit 7 1059 1060 #define SCS OSCCONbits.SCS // bit 0 1061 #define LTS OSCCONbits.LTS // bit 1 1062 #define HTS OSCCONbits.HTS // bit 2 1063 #define OSTS OSCCONbits.OSTS // bit 3 1064 #define IRCF0 OSCCONbits.IRCF0 // bit 4 1065 #define IRCF1 OSCCONbits.IRCF1 // bit 5 1066 #define IRCF2 OSCCONbits.IRCF2 // bit 6 1067 1068 #define TUN0 OSCTUNEbits.TUN0 // bit 0 1069 #define TUN1 OSCTUNEbits.TUN1 // bit 1 1070 #define TUN2 OSCTUNEbits.TUN2 // bit 2 1071 #define TUN3 OSCTUNEbits.TUN3 // bit 3 1072 #define TUN4 OSCTUNEbits.TUN4 // bit 4 1073 1074 #define NOT_BOR PCONbits.NOT_BOR // bit 0, shadows bit in PCONbits 1075 #define NOT_BOD PCONbits.NOT_BOD // bit 0, shadows bit in PCONbits 1076 #define NOT_POR PCONbits.NOT_POR // bit 1 1077 #define NOT_WUR PCONbits.NOT_WUR // bit 3 1078 #define SBOREN PCONbits.SBOREN // bit 4, shadows bit in PCONbits 1079 #define SBODEN PCONbits.SBODEN // bit 4, shadows bit in PCONbits 1080 #define ULPWUE PCONbits.ULPWUE // bit 5 1081 1082 #define TMR1IE PIE1bits.TMR1IE // bit 0 1083 #define OSFIE PIE1bits.OSFIE // bit 2 1084 #define C1IE PIE1bits.C1IE // bit 3 1085 #define C2IE PIE1bits.C2IE // bit 4 1086 #define CRIE PIE1bits.CRIE // bit 5 1087 #define LVDIE PIE1bits.LVDIE // bit 6 1088 #define EEIE PIE1bits.EEIE // bit 7 1089 1090 #define TMR1IF PIR1bits.TMR1IF // bit 0 1091 #define OSFIF PIR1bits.OSFIF // bit 2 1092 #define C1IF PIR1bits.C1IF // bit 3 1093 #define C2IF PIR1bits.C2IF // bit 4 1094 #define CRIF PIR1bits.CRIF // bit 5 1095 #define LVDIF PIR1bits.LVDIF // bit 6 1096 #define EEIF PIR1bits.EEIF // bit 7 1097 1098 #define RA0 PORTAbits.RA0 // bit 0 1099 #define RA1 PORTAbits.RA1 // bit 1 1100 #define RA2 PORTAbits.RA2 // bit 2 1101 #define RA3 PORTAbits.RA3 // bit 3 1102 #define RA4 PORTAbits.RA4 // bit 4 1103 #define RA5 PORTAbits.RA5 // bit 5 1104 1105 #define RC0 PORTCbits.RC0 // bit 0 1106 #define RC1 PORTCbits.RC1 // bit 1 1107 #define RC2 PORTCbits.RC2 // bit 2 1108 #define RC3 PORTCbits.RC3 // bit 3 1109 #define RC4 PORTCbits.RC4 // bit 4 1110 #define RC5 PORTCbits.RC5 // bit 5 1111 1112 #define C STATUSbits.C // bit 0 1113 #define DC STATUSbits.DC // bit 1 1114 #define Z STATUSbits.Z // bit 2 1115 #define NOT_PD STATUSbits.NOT_PD // bit 3 1116 #define NOT_TO STATUSbits.NOT_TO // bit 4 1117 #define RP0 STATUSbits.RP0 // bit 5 1118 #define RP1 STATUSbits.RP1 // bit 6 1119 #define IRP STATUSbits.IRP // bit 7 1120 1121 #define TMR1ON T1CONbits.TMR1ON // bit 0 1122 #define TMR1CS T1CONbits.TMR1CS // bit 1 1123 #define NOT_T1SYNC T1CONbits.NOT_T1SYNC // bit 2 1124 #define T1OSCEN T1CONbits.T1OSCEN // bit 3 1125 #define T1CKPS0 T1CONbits.T1CKPS0 // bit 4 1126 #define T1CKPS1 T1CONbits.T1CKPS1 // bit 5 1127 #define TMR1GE T1CONbits.TMR1GE // bit 6 1128 #define T1GINV T1CONbits.T1GINV // bit 7 1129 1130 #define TRISA0 TRISAbits.TRISA0 // bit 0 1131 #define TRISA1 TRISAbits.TRISA1 // bit 1 1132 #define TRISA2 TRISAbits.TRISA2 // bit 2 1133 #define TRISA3 TRISAbits.TRISA3 // bit 3 1134 #define TRISA4 TRISAbits.TRISA4 // bit 4 1135 #define TRISA5 TRISAbits.TRISA5 // bit 5 1136 1137 #define TRISC0 TRISCbits.TRISC0 // bit 0 1138 #define TRISC1 TRISCbits.TRISC1 // bit 1 1139 #define TRISC2 TRISCbits.TRISC2 // bit 2 1140 #define TRISC3 TRISCbits.TRISC3 // bit 3 1141 #define TRISC4 TRISCbits.TRISC4 // bit 4 1142 #define TRISC5 TRISCbits.TRISC5 // bit 5 1143 1144 #define VR0 VRCONbits.VR0 // bit 0 1145 #define VR1 VRCONbits.VR1 // bit 1 1146 #define VR2 VRCONbits.VR2 // bit 2 1147 #define VR3 VRCONbits.VR3 // bit 3 1148 #define VRR VRCONbits.VRR // bit 5 1149 #define VREN VRCONbits.VREN // bit 7 1150 1151 #define WDA0 WDAbits.WDA0 // bit 0 1152 #define WDA1 WDAbits.WDA1 // bit 1 1153 #define WDA2 WDAbits.WDA2 // bit 2 1154 #define WDA4 WDAbits.WDA4 // bit 4 1155 #define WDA5 WDAbits.WDA5 // bit 5 1156 1157 #define SWDTEN WDTCONbits.SWDTEN // bit 0 1158 #define WDTPS0 WDTCONbits.WDTPS0 // bit 1 1159 #define WDTPS1 WDTCONbits.WDTPS1 // bit 2 1160 #define WDTPS2 WDTCONbits.WDTPS2 // bit 3 1161 #define WDTPS3 WDTCONbits.WDTPS3 // bit 4 1162 1163 #define WPUDA0 WPUDAbits.WPUDA0 // bit 0 1164 #define WPUDA1 WPUDAbits.WPUDA1 // bit 1 1165 #define WPUDA2 WPUDAbits.WPUDA2 // bit 2 1166 #define WPUDA4 WPUDAbits.WPUDA4 // bit 4 1167 #define WPUDA5 WPUDAbits.WPUDA5 // bit 5 1168 1169 #endif // #ifndef NO_BIT_DEFINES 1170 1171 #endif // #ifndef __PIC16F636_H__ 1172