1 /*
2  * This definitions of the PIC16F1709 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:12 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #include <pic16f1709.h>
26 
27 //==============================================================================
28 
29 __at(0x0000) __sfr INDF0;
30 
31 __at(0x0001) __sfr INDF1;
32 
33 __at(0x0002) __sfr PCL;
34 
35 __at(0x0003) __sfr STATUS;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
37 
38 __at(0x0004) __sfr FSR0;
39 
40 __at(0x0004) __sfr FSR0L;
41 
42 __at(0x0005) __sfr FSR0H;
43 
44 __at(0x0006) __sfr FSR1;
45 
46 __at(0x0006) __sfr FSR1L;
47 
48 __at(0x0007) __sfr FSR1H;
49 
50 __at(0x0008) __sfr BSR;
51 __at(0x0008) volatile __BSRbits_t BSRbits;
52 
53 __at(0x0009) __sfr WREG;
54 
55 __at(0x000A) __sfr PCLATH;
56 
57 __at(0x000B) __sfr INTCON;
58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
59 
60 __at(0x000C) __sfr PORTA;
61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
62 
63 __at(0x000D) __sfr PORTB;
64 __at(0x000D) volatile __PORTBbits_t PORTBbits;
65 
66 __at(0x000E) __sfr PORTC;
67 __at(0x000E) volatile __PORTCbits_t PORTCbits;
68 
69 __at(0x0011) __sfr PIR1;
70 __at(0x0011) volatile __PIR1bits_t PIR1bits;
71 
72 __at(0x0012) __sfr PIR2;
73 __at(0x0012) volatile __PIR2bits_t PIR2bits;
74 
75 __at(0x0013) __sfr PIR3;
76 __at(0x0013) volatile __PIR3bits_t PIR3bits;
77 
78 __at(0x0015) __sfr TMR0;
79 
80 __at(0x0016) __sfr TMR1;
81 
82 __at(0x0016) __sfr TMR1L;
83 
84 __at(0x0017) __sfr TMR1H;
85 
86 __at(0x0018) __sfr T1CON;
87 __at(0x0018) volatile __T1CONbits_t T1CONbits;
88 
89 __at(0x0019) __sfr T1GCON;
90 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
91 
92 __at(0x001A) __sfr TMR2;
93 
94 __at(0x001B) __sfr PR2;
95 
96 __at(0x001C) __sfr T2CON;
97 __at(0x001C) volatile __T2CONbits_t T2CONbits;
98 
99 __at(0x008C) __sfr TRISA;
100 __at(0x008C) volatile __TRISAbits_t TRISAbits;
101 
102 __at(0x008D) __sfr TRISB;
103 __at(0x008D) volatile __TRISBbits_t TRISBbits;
104 
105 __at(0x008E) __sfr TRISC;
106 __at(0x008E) volatile __TRISCbits_t TRISCbits;
107 
108 __at(0x0091) __sfr PIE1;
109 __at(0x0091) volatile __PIE1bits_t PIE1bits;
110 
111 __at(0x0092) __sfr PIE2;
112 __at(0x0092) volatile __PIE2bits_t PIE2bits;
113 
114 __at(0x0093) __sfr PIE3;
115 __at(0x0093) volatile __PIE3bits_t PIE3bits;
116 
117 __at(0x0095) __sfr OPTION_REG;
118 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
119 
120 __at(0x0096) __sfr PCON;
121 __at(0x0096) volatile __PCONbits_t PCONbits;
122 
123 __at(0x0097) __sfr WDTCON;
124 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
125 
126 __at(0x0098) __sfr OSCTUNE;
127 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
128 
129 __at(0x0099) __sfr OSCCON;
130 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
131 
132 __at(0x009A) __sfr OSCSTAT;
133 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
134 
135 __at(0x009B) __sfr ADRES;
136 
137 __at(0x009B) __sfr ADRESL;
138 
139 __at(0x009C) __sfr ADRESH;
140 
141 __at(0x009D) __sfr ADCON0;
142 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
143 
144 __at(0x009E) __sfr ADCON1;
145 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
146 
147 __at(0x009F) __sfr ADCON2;
148 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
149 
150 __at(0x010C) __sfr LATA;
151 __at(0x010C) volatile __LATAbits_t LATAbits;
152 
153 __at(0x010D) __sfr LATB;
154 __at(0x010D) volatile __LATBbits_t LATBbits;
155 
156 __at(0x010E) __sfr LATC;
157 __at(0x010E) volatile __LATCbits_t LATCbits;
158 
159 __at(0x0111) __sfr CM1CON0;
160 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
161 
162 __at(0x0112) __sfr CM1CON1;
163 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
164 
165 __at(0x0113) __sfr CM2CON0;
166 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
167 
168 __at(0x0114) __sfr CM2CON1;
169 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
170 
171 __at(0x0115) __sfr CMOUT;
172 __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
173 
174 __at(0x0116) __sfr BORCON;
175 __at(0x0116) volatile __BORCONbits_t BORCONbits;
176 
177 __at(0x0117) __sfr FVRCON;
178 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
179 
180 __at(0x0118) __sfr DAC1CON0;
181 __at(0x0118) volatile __DAC1CON0bits_t DAC1CON0bits;
182 
183 __at(0x0119) __sfr DAC1CON1;
184 __at(0x0119) volatile __DAC1CON1bits_t DAC1CON1bits;
185 
186 __at(0x011C) __sfr ZCD1CON;
187 __at(0x011C) volatile __ZCD1CONbits_t ZCD1CONbits;
188 
189 __at(0x018C) __sfr ANSELA;
190 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
191 
192 __at(0x018D) __sfr ANSELB;
193 __at(0x018D) volatile __ANSELBbits_t ANSELBbits;
194 
195 __at(0x018E) __sfr ANSELC;
196 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
197 
198 __at(0x0191) __sfr PMADR;
199 
200 __at(0x0191) __sfr PMADRL;
201 
202 __at(0x0192) __sfr PMADRH;
203 
204 __at(0x0193) __sfr PMDAT;
205 
206 __at(0x0193) __sfr PMDATL;
207 
208 __at(0x0194) __sfr PMDATH;
209 
210 __at(0x0195) __sfr PMCON1;
211 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
212 
213 __at(0x0196) __sfr PMCON2;
214 
215 __at(0x0197) __sfr VREGCON;
216 __at(0x0197) volatile __VREGCONbits_t VREGCONbits;
217 
218 __at(0x0199) __sfr RC1REG;
219 
220 __at(0x0199) __sfr RCREG;
221 
222 __at(0x0199) __sfr RCREG1;
223 
224 __at(0x019A) __sfr TX1REG;
225 
226 __at(0x019A) __sfr TXREG;
227 
228 __at(0x019A) __sfr TXREG1;
229 
230 __at(0x019B) __sfr SP1BRG;
231 
232 __at(0x019B) __sfr SP1BRGL;
233 
234 __at(0x019B) __sfr SPBRG;
235 
236 __at(0x019B) __sfr SPBRG1;
237 
238 __at(0x019B) __sfr SPBRGL;
239 
240 __at(0x019C) __sfr SP1BRGH;
241 
242 __at(0x019C) __sfr SPBRGH;
243 
244 __at(0x019C) __sfr SPBRGH1;
245 
246 __at(0x019D) __sfr RC1STA;
247 __at(0x019D) volatile __RC1STAbits_t RC1STAbits;
248 
249 __at(0x019D) __sfr RCSTA;
250 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
251 
252 __at(0x019D) __sfr RCSTA1;
253 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits;
254 
255 __at(0x019E) __sfr TX1STA;
256 __at(0x019E) volatile __TX1STAbits_t TX1STAbits;
257 
258 __at(0x019E) __sfr TXSTA;
259 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
260 
261 __at(0x019E) __sfr TXSTA1;
262 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits;
263 
264 __at(0x019F) __sfr BAUD1CON;
265 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits;
266 
267 __at(0x019F) __sfr BAUDCON;
268 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
269 
270 __at(0x019F) __sfr BAUDCON1;
271 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits;
272 
273 __at(0x019F) __sfr BAUDCTL;
274 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits;
275 
276 __at(0x019F) __sfr BAUDCTL1;
277 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits;
278 
279 __at(0x020C) __sfr WPUA;
280 __at(0x020C) volatile __WPUAbits_t WPUAbits;
281 
282 __at(0x020D) __sfr WPUB;
283 __at(0x020D) volatile __WPUBbits_t WPUBbits;
284 
285 __at(0x020E) __sfr WPUC;
286 __at(0x020E) volatile __WPUCbits_t WPUCbits;
287 
288 __at(0x0211) __sfr SSP1BUF;
289 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits;
290 
291 __at(0x0211) __sfr SSPBUF;
292 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits;
293 
294 __at(0x0212) __sfr SSP1ADD;
295 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits;
296 
297 __at(0x0212) __sfr SSPADD;
298 __at(0x0212) volatile __SSPADDbits_t SSPADDbits;
299 
300 __at(0x0213) __sfr SSP1MSK;
301 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits;
302 
303 __at(0x0213) __sfr SSPMSK;
304 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits;
305 
306 __at(0x0214) __sfr SSP1STAT;
307 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
308 
309 __at(0x0214) __sfr SSPSTAT;
310 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
311 
312 __at(0x0215) __sfr SSP1CON;
313 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits;
314 
315 __at(0x0215) __sfr SSP1CON1;
316 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
317 
318 __at(0x0215) __sfr SSPCON;
319 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
320 
321 __at(0x0215) __sfr SSPCON1;
322 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
323 
324 __at(0x0216) __sfr SSP1CON2;
325 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
326 
327 __at(0x0216) __sfr SSPCON2;
328 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
329 
330 __at(0x0217) __sfr SSP1CON3;
331 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
332 
333 __at(0x0217) __sfr SSPCON3;
334 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
335 
336 __at(0x028C) __sfr ODCONA;
337 __at(0x028C) volatile __ODCONAbits_t ODCONAbits;
338 
339 __at(0x028D) __sfr ODCONB;
340 __at(0x028D) volatile __ODCONBbits_t ODCONBbits;
341 
342 __at(0x028E) __sfr ODCONC;
343 __at(0x028E) volatile __ODCONCbits_t ODCONCbits;
344 
345 __at(0x0291) __sfr CCPR1;
346 
347 __at(0x0291) __sfr CCPR1L;
348 
349 __at(0x0292) __sfr CCPR1H;
350 
351 __at(0x0293) __sfr CCP1CON;
352 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits;
353 
354 __at(0x0293) __sfr ECCP1CON;
355 __at(0x0293) volatile __ECCP1CONbits_t ECCP1CONbits;
356 
357 __at(0x0298) __sfr CCPR2;
358 
359 __at(0x0298) __sfr CCPR2L;
360 
361 __at(0x0299) __sfr CCPR2H;
362 
363 __at(0x029A) __sfr CCP2CON;
364 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits;
365 
366 __at(0x029A) __sfr ECCP2CON;
367 __at(0x029A) volatile __ECCP2CONbits_t ECCP2CONbits;
368 
369 __at(0x029E) __sfr CCPTMRS;
370 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits;
371 
372 __at(0x030C) __sfr SLRCONA;
373 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits;
374 
375 __at(0x030D) __sfr SLRCONB;
376 __at(0x030D) volatile __SLRCONBbits_t SLRCONBbits;
377 
378 __at(0x030E) __sfr SLRCONC;
379 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits;
380 
381 __at(0x038C) __sfr INLVLA;
382 __at(0x038C) volatile __INLVLAbits_t INLVLAbits;
383 
384 __at(0x038D) __sfr INLVLB;
385 __at(0x038D) volatile __INLVLBbits_t INLVLBbits;
386 
387 __at(0x038E) __sfr INLVLC;
388 __at(0x038E) volatile __INLVLCbits_t INLVLCbits;
389 
390 __at(0x0391) __sfr IOCAP;
391 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
392 
393 __at(0x0392) __sfr IOCAN;
394 __at(0x0392) volatile __IOCANbits_t IOCANbits;
395 
396 __at(0x0393) __sfr IOCAF;
397 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
398 
399 __at(0x0394) __sfr IOCBP;
400 __at(0x0394) volatile __IOCBPbits_t IOCBPbits;
401 
402 __at(0x0395) __sfr IOCBN;
403 __at(0x0395) volatile __IOCBNbits_t IOCBNbits;
404 
405 __at(0x0396) __sfr IOCBF;
406 __at(0x0396) volatile __IOCBFbits_t IOCBFbits;
407 
408 __at(0x0397) __sfr IOCCP;
409 __at(0x0397) volatile __IOCCPbits_t IOCCPbits;
410 
411 __at(0x0398) __sfr IOCCN;
412 __at(0x0398) volatile __IOCCNbits_t IOCCNbits;
413 
414 __at(0x0399) __sfr IOCCF;
415 __at(0x0399) volatile __IOCCFbits_t IOCCFbits;
416 
417 __at(0x0415) __sfr TMR4;
418 
419 __at(0x0416) __sfr PR4;
420 
421 __at(0x0417) __sfr T4CON;
422 __at(0x0417) volatile __T4CONbits_t T4CONbits;
423 
424 __at(0x041C) __sfr TMR6;
425 
426 __at(0x041D) __sfr PR6;
427 
428 __at(0x041E) __sfr T6CON;
429 __at(0x041E) volatile __T6CONbits_t T6CONbits;
430 
431 __at(0x0511) __sfr OPA1CON;
432 __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits;
433 
434 __at(0x0515) __sfr OPA2CON;
435 __at(0x0515) volatile __OPA2CONbits_t OPA2CONbits;
436 
437 __at(0x0617) __sfr PWM3DCL;
438 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits;
439 
440 __at(0x0618) __sfr PWM3DCH;
441 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits;
442 
443 __at(0x0619) __sfr PWM3CON;
444 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits;
445 
446 __at(0x0619) __sfr PWM3CON0;
447 __at(0x0619) volatile __PWM3CON0bits_t PWM3CON0bits;
448 
449 __at(0x061A) __sfr PWM4DCL;
450 __at(0x061A) volatile __PWM4DCLbits_t PWM4DCLbits;
451 
452 __at(0x061B) __sfr PWM4DCH;
453 __at(0x061B) volatile __PWM4DCHbits_t PWM4DCHbits;
454 
455 __at(0x061C) __sfr PWM4CON;
456 __at(0x061C) volatile __PWM4CONbits_t PWM4CONbits;
457 
458 __at(0x061C) __sfr PWM4CON0;
459 __at(0x061C) volatile __PWM4CON0bits_t PWM4CON0bits;
460 
461 __at(0x0691) __sfr COG1PHR;
462 __at(0x0691) volatile __COG1PHRbits_t COG1PHRbits;
463 
464 __at(0x0692) __sfr COG1PHF;
465 __at(0x0692) volatile __COG1PHFbits_t COG1PHFbits;
466 
467 __at(0x0693) __sfr COG1BLKR;
468 __at(0x0693) volatile __COG1BLKRbits_t COG1BLKRbits;
469 
470 __at(0x0694) __sfr COG1BLKF;
471 __at(0x0694) volatile __COG1BLKFbits_t COG1BLKFbits;
472 
473 __at(0x0695) __sfr COG1DBR;
474 __at(0x0695) volatile __COG1DBRbits_t COG1DBRbits;
475 
476 __at(0x0696) __sfr COG1DBF;
477 __at(0x0696) volatile __COG1DBFbits_t COG1DBFbits;
478 
479 __at(0x0697) __sfr COG1CON0;
480 __at(0x0697) volatile __COG1CON0bits_t COG1CON0bits;
481 
482 __at(0x0698) __sfr COG1CON1;
483 __at(0x0698) volatile __COG1CON1bits_t COG1CON1bits;
484 
485 __at(0x0699) __sfr COG1RIS;
486 __at(0x0699) volatile __COG1RISbits_t COG1RISbits;
487 
488 __at(0x069A) __sfr COG1RSIM;
489 __at(0x069A) volatile __COG1RSIMbits_t COG1RSIMbits;
490 
491 __at(0x069B) __sfr COG1FIS;
492 __at(0x069B) volatile __COG1FISbits_t COG1FISbits;
493 
494 __at(0x069C) __sfr COG1FSIM;
495 __at(0x069C) volatile __COG1FSIMbits_t COG1FSIMbits;
496 
497 __at(0x069D) __sfr COG1ASD0;
498 __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits;
499 
500 __at(0x069E) __sfr COG1ASD1;
501 __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits;
502 
503 __at(0x069F) __sfr COG1STR;
504 __at(0x069F) volatile __COG1STRbits_t COG1STRbits;
505 
506 __at(0x0E0F) __sfr PPSLOCK;
507 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits;
508 
509 __at(0x0E10) __sfr INTPPS;
510 
511 __at(0x0E11) __sfr T0CKIPPS;
512 
513 __at(0x0E12) __sfr T1CKIPPS;
514 
515 __at(0x0E13) __sfr T1GPPS;
516 
517 __at(0x0E14) __sfr CCP1PPS;
518 
519 __at(0x0E15) __sfr CCP2PPS;
520 
521 __at(0x0E17) __sfr COGINPPS;
522 
523 __at(0x0E20) __sfr SSPCLKPPS;
524 
525 __at(0x0E21) __sfr SSPDATPPS;
526 
527 __at(0x0E22) __sfr SSPSSPPS;
528 
529 __at(0x0E24) __sfr RXPPS;
530 
531 __at(0x0E25) __sfr CKPPS;
532 
533 __at(0x0E28) __sfr CLCIN0PPS;
534 
535 __at(0x0E29) __sfr CLCIN1PPS;
536 
537 __at(0x0E2A) __sfr CLCIN2PPS;
538 
539 __at(0x0E2B) __sfr CLCIN3PPS;
540 
541 __at(0x0E90) __sfr RA0PPS;
542 
543 __at(0x0E91) __sfr RA1PPS;
544 
545 __at(0x0E92) __sfr RA2PPS;
546 
547 __at(0x0E94) __sfr RA4PPS;
548 
549 __at(0x0E95) __sfr RA5PPS;
550 
551 __at(0x0E9C) __sfr RB4PPS;
552 
553 __at(0x0E9D) __sfr RB5PPS;
554 
555 __at(0x0E9E) __sfr RB6PPS;
556 
557 __at(0x0E9F) __sfr RB7PPS;
558 
559 __at(0x0EA0) __sfr RC0PPS;
560 
561 __at(0x0EA1) __sfr RC1PPS;
562 
563 __at(0x0EA2) __sfr RC2PPS;
564 
565 __at(0x0EA3) __sfr RC3PPS;
566 
567 __at(0x0EA4) __sfr RC4PPS;
568 
569 __at(0x0EA5) __sfr RC5PPS;
570 
571 __at(0x0EA6) __sfr RC6PPS;
572 
573 __at(0x0EA7) __sfr RC7PPS;
574 
575 __at(0x0F0F) __sfr CLCDATA;
576 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits;
577 
578 __at(0x0F10) __sfr CLC1CON;
579 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits;
580 
581 __at(0x0F11) __sfr CLC1POL;
582 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits;
583 
584 __at(0x0F12) __sfr CLC1SEL0;
585 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits;
586 
587 __at(0x0F13) __sfr CLC1SEL1;
588 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits;
589 
590 __at(0x0F14) __sfr CLC1SEL2;
591 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits;
592 
593 __at(0x0F15) __sfr CLC1SEL3;
594 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits;
595 
596 __at(0x0F16) __sfr CLC1GLS0;
597 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits;
598 
599 __at(0x0F17) __sfr CLC1GLS1;
600 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits;
601 
602 __at(0x0F18) __sfr CLC1GLS2;
603 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits;
604 
605 __at(0x0F19) __sfr CLC1GLS3;
606 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits;
607 
608 __at(0x0F1A) __sfr CLC2CON;
609 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits;
610 
611 __at(0x0F1B) __sfr CLC2POL;
612 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits;
613 
614 __at(0x0F1C) __sfr CLC2SEL0;
615 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits;
616 
617 __at(0x0F1D) __sfr CLC2SEL1;
618 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits;
619 
620 __at(0x0F1E) __sfr CLC2SEL2;
621 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits;
622 
623 __at(0x0F1F) __sfr CLC2SEL3;
624 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits;
625 
626 __at(0x0F20) __sfr CLC2GLS0;
627 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits;
628 
629 __at(0x0F21) __sfr CLC2GLS1;
630 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits;
631 
632 __at(0x0F22) __sfr CLC2GLS2;
633 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits;
634 
635 __at(0x0F23) __sfr CLC2GLS3;
636 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits;
637 
638 __at(0x0F24) __sfr CLC3CON;
639 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits;
640 
641 __at(0x0F25) __sfr CLC3POL;
642 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits;
643 
644 __at(0x0F26) __sfr CLC3SEL0;
645 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits;
646 
647 __at(0x0F27) __sfr CLC3SEL1;
648 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits;
649 
650 __at(0x0F28) __sfr CLC3SEL2;
651 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits;
652 
653 __at(0x0F29) __sfr CLC3SEL3;
654 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits;
655 
656 __at(0x0F2A) __sfr CLC3GLS0;
657 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits;
658 
659 __at(0x0F2B) __sfr CLC3GLS1;
660 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits;
661 
662 __at(0x0F2C) __sfr CLC3GLS2;
663 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits;
664 
665 __at(0x0F2D) __sfr CLC3GLS3;
666 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits;
667 
668 __at(0x0F9E) __sfr ICDBK0H;
669 __at(0x0F9E) volatile __ICDBK0Hbits_t ICDBK0Hbits;
670 
671 __at(0x0FE4) __sfr STATUS_SHAD;
672 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
673 
674 __at(0x0FE5) __sfr WREG_SHAD;
675 
676 __at(0x0FE6) __sfr BSR_SHAD;
677 
678 __at(0x0FE7) __sfr PCLATH_SHAD;
679 
680 __at(0x0FE8) __sfr FSR0L_SHAD;
681 
682 __at(0x0FE9) __sfr FSR0H_SHAD;
683 
684 __at(0x0FEA) __sfr FSR1L_SHAD;
685 
686 __at(0x0FEB) __sfr FSR1H_SHAD;
687 
688 __at(0x0FED) __sfr STKPTR;
689 
690 __at(0x0FEE) __sfr TOSL;
691 
692 __at(0x0FEF) __sfr TOSH;
693