1 /*
2  * This definitions of the PIC16LF1455 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:04 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #include <pic16lf1455.h>
26 
27 //==============================================================================
28 
29 __at(0x0000) __sfr INDF0;
30 
31 __at(0x0001) __sfr INDF1;
32 
33 __at(0x0002) __sfr PCL;
34 
35 __at(0x0003) __sfr STATUS;
36 __at(0x0003) volatile __STATUSbits_t STATUSbits;
37 
38 __at(0x0004) __sfr FSR0;
39 
40 __at(0x0004) __sfr FSR0L;
41 
42 __at(0x0005) __sfr FSR0H;
43 
44 __at(0x0006) __sfr FSR1;
45 
46 __at(0x0006) __sfr FSR1L;
47 
48 __at(0x0007) __sfr FSR1H;
49 
50 __at(0x0008) __sfr BSR;
51 __at(0x0008) volatile __BSRbits_t BSRbits;
52 
53 __at(0x0009) __sfr WREG;
54 
55 __at(0x000A) __sfr PCLATH;
56 
57 __at(0x000B) __sfr INTCON;
58 __at(0x000B) volatile __INTCONbits_t INTCONbits;
59 
60 __at(0x000C) __sfr PORTA;
61 __at(0x000C) volatile __PORTAbits_t PORTAbits;
62 
63 __at(0x000E) __sfr PORTC;
64 __at(0x000E) volatile __PORTCbits_t PORTCbits;
65 
66 __at(0x0011) __sfr PIR1;
67 __at(0x0011) volatile __PIR1bits_t PIR1bits;
68 
69 __at(0x0012) __sfr PIR2;
70 __at(0x0012) volatile __PIR2bits_t PIR2bits;
71 
72 __at(0x0015) __sfr TMR0;
73 
74 __at(0x0016) __sfr TMR1;
75 
76 __at(0x0016) __sfr TMR1L;
77 
78 __at(0x0017) __sfr TMR1H;
79 
80 __at(0x0018) __sfr T1CON;
81 __at(0x0018) volatile __T1CONbits_t T1CONbits;
82 
83 __at(0x0019) __sfr T1GCON;
84 __at(0x0019) volatile __T1GCONbits_t T1GCONbits;
85 
86 __at(0x001A) __sfr TMR2;
87 
88 __at(0x001B) __sfr PR2;
89 
90 __at(0x001C) __sfr T2CON;
91 __at(0x001C) volatile __T2CONbits_t T2CONbits;
92 
93 __at(0x008C) __sfr TRISA;
94 __at(0x008C) volatile __TRISAbits_t TRISAbits;
95 
96 __at(0x008E) __sfr TRISC;
97 __at(0x008E) volatile __TRISCbits_t TRISCbits;
98 
99 __at(0x0091) __sfr PIE1;
100 __at(0x0091) volatile __PIE1bits_t PIE1bits;
101 
102 __at(0x0092) __sfr PIE2;
103 __at(0x0092) volatile __PIE2bits_t PIE2bits;
104 
105 __at(0x0095) __sfr OPTION_REG;
106 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits;
107 
108 __at(0x0096) __sfr PCON;
109 __at(0x0096) volatile __PCONbits_t PCONbits;
110 
111 __at(0x0097) __sfr WDTCON;
112 __at(0x0097) volatile __WDTCONbits_t WDTCONbits;
113 
114 __at(0x0098) __sfr OSCTUNE;
115 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits;
116 
117 __at(0x0099) __sfr OSCCON;
118 __at(0x0099) volatile __OSCCONbits_t OSCCONbits;
119 
120 __at(0x009A) __sfr OSCSTAT;
121 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits;
122 
123 __at(0x009B) __sfr ADRES;
124 
125 __at(0x009B) __sfr ADRESL;
126 
127 __at(0x009C) __sfr ADRESH;
128 
129 __at(0x009D) __sfr ADCON0;
130 __at(0x009D) volatile __ADCON0bits_t ADCON0bits;
131 
132 __at(0x009E) __sfr ADCON1;
133 __at(0x009E) volatile __ADCON1bits_t ADCON1bits;
134 
135 __at(0x009F) __sfr ADCON2;
136 __at(0x009F) volatile __ADCON2bits_t ADCON2bits;
137 
138 __at(0x010C) __sfr LATA;
139 __at(0x010C) volatile __LATAbits_t LATAbits;
140 
141 __at(0x010E) __sfr LATC;
142 __at(0x010E) volatile __LATCbits_t LATCbits;
143 
144 __at(0x0111) __sfr CM1CON0;
145 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits;
146 
147 __at(0x0112) __sfr CM1CON1;
148 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits;
149 
150 __at(0x0113) __sfr CM2CON0;
151 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits;
152 
153 __at(0x0114) __sfr CM2CON1;
154 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits;
155 
156 __at(0x0115) __sfr CMOUT;
157 __at(0x0115) volatile __CMOUTbits_t CMOUTbits;
158 
159 __at(0x0116) __sfr BORCON;
160 __at(0x0116) volatile __BORCONbits_t BORCONbits;
161 
162 __at(0x0117) __sfr FVRCON;
163 __at(0x0117) volatile __FVRCONbits_t FVRCONbits;
164 
165 __at(0x0118) __sfr DACCON0;
166 __at(0x0118) volatile __DACCON0bits_t DACCON0bits;
167 
168 __at(0x0119) __sfr DACCON1;
169 __at(0x0119) volatile __DACCON1bits_t DACCON1bits;
170 
171 __at(0x011D) __sfr APFCON;
172 __at(0x011D) volatile __APFCONbits_t APFCONbits;
173 
174 __at(0x018C) __sfr ANSELA;
175 __at(0x018C) volatile __ANSELAbits_t ANSELAbits;
176 
177 __at(0x018E) __sfr ANSELC;
178 __at(0x018E) volatile __ANSELCbits_t ANSELCbits;
179 
180 __at(0x0191) __sfr PMADR;
181 
182 __at(0x0191) __sfr PMADRL;
183 
184 __at(0x0192) __sfr PMADRH;
185 
186 __at(0x0193) __sfr PMDAT;
187 
188 __at(0x0193) __sfr PMDATL;
189 
190 __at(0x0194) __sfr PMDATH;
191 
192 __at(0x0195) __sfr PMCON1;
193 __at(0x0195) volatile __PMCON1bits_t PMCON1bits;
194 
195 __at(0x0196) __sfr PMCON2;
196 
197 __at(0x0199) __sfr RCREG;
198 
199 __at(0x019A) __sfr TXREG;
200 
201 __at(0x019B) __sfr SPBRG;
202 
203 __at(0x019B) __sfr SPBRGL;
204 
205 __at(0x019C) __sfr SPBRGH;
206 
207 __at(0x019D) __sfr RCSTA;
208 __at(0x019D) volatile __RCSTAbits_t RCSTAbits;
209 
210 __at(0x019E) __sfr TXSTA;
211 __at(0x019E) volatile __TXSTAbits_t TXSTAbits;
212 
213 __at(0x019F) __sfr BAUDCON;
214 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits;
215 
216 __at(0x020C) __sfr WPUA;
217 __at(0x020C) volatile __WPUAbits_t WPUAbits;
218 
219 __at(0x0211) __sfr SSP1BUF;
220 
221 __at(0x0211) __sfr SSPBUF;
222 
223 __at(0x0212) __sfr SSP1ADD;
224 
225 __at(0x0212) __sfr SSPADD;
226 
227 __at(0x0213) __sfr SSP1MSK;
228 
229 __at(0x0213) __sfr SSPMSK;
230 
231 __at(0x0214) __sfr SSP1STAT;
232 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits;
233 
234 __at(0x0214) __sfr SSPSTAT;
235 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits;
236 
237 __at(0x0215) __sfr SSP1CON1;
238 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits;
239 
240 __at(0x0215) __sfr SSPCON;
241 __at(0x0215) volatile __SSPCONbits_t SSPCONbits;
242 
243 __at(0x0215) __sfr SSPCON1;
244 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits;
245 
246 __at(0x0216) __sfr SSP1CON2;
247 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits;
248 
249 __at(0x0216) __sfr SSPCON2;
250 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits;
251 
252 __at(0x0217) __sfr SSP1CON3;
253 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits;
254 
255 __at(0x0217) __sfr SSPCON3;
256 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits;
257 
258 __at(0x0391) __sfr IOCAP;
259 __at(0x0391) volatile __IOCAPbits_t IOCAPbits;
260 
261 __at(0x0392) __sfr IOCAN;
262 __at(0x0392) volatile __IOCANbits_t IOCANbits;
263 
264 __at(0x0393) __sfr IOCAF;
265 __at(0x0393) volatile __IOCAFbits_t IOCAFbits;
266 
267 __at(0x039A) __sfr CLKRCON;
268 __at(0x039A) volatile __CLKRCONbits_t CLKRCONbits;
269 
270 __at(0x039B) __sfr ACTCON;
271 __at(0x039B) volatile __ACTCONbits_t ACTCONbits;
272 
273 __at(0x0611) __sfr PWM1DCL;
274 __at(0x0611) volatile __PWM1DCLbits_t PWM1DCLbits;
275 
276 __at(0x0612) __sfr PWM1DCH;
277 __at(0x0612) volatile __PWM1DCHbits_t PWM1DCHbits;
278 
279 __at(0x0613) __sfr PWM1CON;
280 __at(0x0613) volatile __PWM1CONbits_t PWM1CONbits;
281 
282 __at(0x0613) __sfr PWM1CON0;
283 __at(0x0613) volatile __PWM1CON0bits_t PWM1CON0bits;
284 
285 __at(0x0614) __sfr PWM2DCL;
286 __at(0x0614) volatile __PWM2DCLbits_t PWM2DCLbits;
287 
288 __at(0x0615) __sfr PWM2DCH;
289 __at(0x0615) volatile __PWM2DCHbits_t PWM2DCHbits;
290 
291 __at(0x0616) __sfr PWM2CON;
292 __at(0x0616) volatile __PWM2CONbits_t PWM2CONbits;
293 
294 __at(0x0616) __sfr PWM2CON0;
295 __at(0x0616) volatile __PWM2CON0bits_t PWM2CON0bits;
296 
297 __at(0x0691) __sfr CWG1DBR;
298 __at(0x0691) volatile __CWG1DBRbits_t CWG1DBRbits;
299 
300 __at(0x0692) __sfr CWG1DBF;
301 __at(0x0692) volatile __CWG1DBFbits_t CWG1DBFbits;
302 
303 __at(0x0693) __sfr CWG1CON0;
304 __at(0x0693) volatile __CWG1CON0bits_t CWG1CON0bits;
305 
306 __at(0x0694) __sfr CWG1CON1;
307 __at(0x0694) volatile __CWG1CON1bits_t CWG1CON1bits;
308 
309 __at(0x0695) __sfr CWG1CON2;
310 __at(0x0695) volatile __CWG1CON2bits_t CWG1CON2bits;
311 
312 __at(0x0E8E) __sfr UCON;
313 __at(0x0E8E) volatile __UCONbits_t UCONbits;
314 
315 __at(0x0E8F) __sfr USTAT;
316 __at(0x0E8F) volatile __USTATbits_t USTATbits;
317 
318 __at(0x0E90) __sfr UIR;
319 __at(0x0E90) volatile __UIRbits_t UIRbits;
320 
321 __at(0x0E91) __sfr UCFG;
322 __at(0x0E91) volatile __UCFGbits_t UCFGbits;
323 
324 __at(0x0E92) __sfr UIE;
325 __at(0x0E92) volatile __UIEbits_t UIEbits;
326 
327 __at(0x0E93) __sfr UEIR;
328 __at(0x0E93) volatile __UEIRbits_t UEIRbits;
329 
330 __at(0x0E94) __sfr UFRM;
331 
332 __at(0x0E94) __sfr UFRMH;
333 __at(0x0E94) volatile __UFRMHbits_t UFRMHbits;
334 
335 __at(0x0E95) __sfr UFRML;
336 __at(0x0E95) volatile __UFRMLbits_t UFRMLbits;
337 
338 __at(0x0E96) __sfr UADDR;
339 __at(0x0E96) volatile __UADDRbits_t UADDRbits;
340 
341 __at(0x0E97) __sfr UEIE;
342 __at(0x0E97) volatile __UEIEbits_t UEIEbits;
343 
344 __at(0x0E98) __sfr UEP0;
345 __at(0x0E98) volatile __UEP0bits_t UEP0bits;
346 
347 __at(0x0E99) __sfr UEP1;
348 __at(0x0E99) volatile __UEP1bits_t UEP1bits;
349 
350 __at(0x0E9A) __sfr UEP2;
351 __at(0x0E9A) volatile __UEP2bits_t UEP2bits;
352 
353 __at(0x0E9B) __sfr UEP3;
354 __at(0x0E9B) volatile __UEP3bits_t UEP3bits;
355 
356 __at(0x0E9C) __sfr UEP4;
357 __at(0x0E9C) volatile __UEP4bits_t UEP4bits;
358 
359 __at(0x0E9D) __sfr UEP5;
360 __at(0x0E9D) volatile __UEP5bits_t UEP5bits;
361 
362 __at(0x0E9E) __sfr UEP6;
363 __at(0x0E9E) volatile __UEP6bits_t UEP6bits;
364 
365 __at(0x0E9F) __sfr UEP7;
366 __at(0x0E9F) volatile __UEP7bits_t UEP7bits;
367 
368 __at(0x0FE4) __sfr STATUS_SHAD;
369 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits;
370 
371 __at(0x0FE5) __sfr WREG_SHAD;
372 
373 __at(0x0FE6) __sfr BSR_SHAD;
374 
375 __at(0x0FE7) __sfr PCLATH_SHAD;
376 
377 __at(0x0FE8) __sfr FSR0L_SHAD;
378 
379 __at(0x0FE9) __sfr FSR0H_SHAD;
380 
381 __at(0x0FEA) __sfr FSR1L_SHAD;
382 
383 __at(0x0FEB) __sfr FSR1H_SHAD;
384 
385 __at(0x0FED) __sfr STKPTR;
386 
387 __at(0x0FEE) __sfr TOSL;
388 
389 __at(0x0FEF) __sfr TOSH;
390