1 /* 2 * This definitions of the PIC16LF1764 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:13 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic16lf1764.h> 26 27 //============================================================================== 28 29 __at(0x0000) __sfr INDF0; 30 31 __at(0x0001) __sfr INDF1; 32 33 __at(0x0002) __sfr PCL; 34 35 __at(0x0003) __sfr STATUS; 36 __at(0x0003) volatile __STATUSbits_t STATUSbits; 37 38 __at(0x0004) __sfr FSR0; 39 40 __at(0x0004) __sfr FSR0L; 41 42 __at(0x0005) __sfr FSR0H; 43 44 __at(0x0006) __sfr FSR1; 45 46 __at(0x0006) __sfr FSR1L; 47 48 __at(0x0007) __sfr FSR1H; 49 50 __at(0x0008) __sfr BSR; 51 __at(0x0008) volatile __BSRbits_t BSRbits; 52 53 __at(0x0009) __sfr WREG; 54 55 __at(0x000A) __sfr PCLATH; 56 57 __at(0x000B) __sfr INTCON; 58 __at(0x000B) volatile __INTCONbits_t INTCONbits; 59 60 __at(0x000C) __sfr PORTA; 61 __at(0x000C) volatile __PORTAbits_t PORTAbits; 62 63 __at(0x000E) __sfr PORTC; 64 __at(0x000E) volatile __PORTCbits_t PORTCbits; 65 66 __at(0x0011) __sfr PIR1; 67 __at(0x0011) volatile __PIR1bits_t PIR1bits; 68 69 __at(0x0012) __sfr PIR2; 70 __at(0x0012) volatile __PIR2bits_t PIR2bits; 71 72 __at(0x0013) __sfr PIR3; 73 __at(0x0013) volatile __PIR3bits_t PIR3bits; 74 75 __at(0x0014) __sfr PIR4; 76 __at(0x0014) volatile __PIR4bits_t PIR4bits; 77 78 __at(0x0015) __sfr TMR0; 79 80 __at(0x0016) __sfr TMR1; 81 82 __at(0x0016) __sfr TMR1L; 83 84 __at(0x0017) __sfr TMR1H; 85 86 __at(0x0018) __sfr T1CON; 87 __at(0x0018) volatile __T1CONbits_t T1CONbits; 88 89 __at(0x0019) __sfr T1GCON; 90 __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 91 92 __at(0x001A) __sfr T2TMR; 93 94 __at(0x001A) __sfr TMR2; 95 96 __at(0x001B) __sfr PR2; 97 98 __at(0x001B) __sfr T2PR; 99 100 __at(0x001C) __sfr T2CON; 101 __at(0x001C) volatile __T2CONbits_t T2CONbits; 102 103 __at(0x001D) __sfr T2HLT; 104 __at(0x001D) volatile __T2HLTbits_t T2HLTbits; 105 106 __at(0x001E) __sfr T2CLKCON; 107 __at(0x001E) volatile __T2CLKCONbits_t T2CLKCONbits; 108 109 __at(0x001F) __sfr T2RST; 110 __at(0x001F) volatile __T2RSTbits_t T2RSTbits; 111 112 __at(0x008C) __sfr TRISA; 113 __at(0x008C) volatile __TRISAbits_t TRISAbits; 114 115 __at(0x008E) __sfr TRISC; 116 __at(0x008E) volatile __TRISCbits_t TRISCbits; 117 118 __at(0x0091) __sfr PIE1; 119 __at(0x0091) volatile __PIE1bits_t PIE1bits; 120 121 __at(0x0092) __sfr PIE2; 122 __at(0x0092) volatile __PIE2bits_t PIE2bits; 123 124 __at(0x0093) __sfr PIE3; 125 __at(0x0093) volatile __PIE3bits_t PIE3bits; 126 127 __at(0x0094) __sfr PIE4; 128 __at(0x0094) volatile __PIE4bits_t PIE4bits; 129 130 __at(0x0095) __sfr OPTION_REG; 131 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 132 133 __at(0x0096) __sfr PCON; 134 __at(0x0096) volatile __PCONbits_t PCONbits; 135 136 __at(0x0097) __sfr WDTCON; 137 __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 138 139 __at(0x0098) __sfr OSCTUNE; 140 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 141 142 __at(0x0099) __sfr OSCCON; 143 __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 144 145 __at(0x009A) __sfr OSCSTAT; 146 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 147 148 __at(0x009B) __sfr ADRES; 149 150 __at(0x009B) __sfr ADRESL; 151 152 __at(0x009C) __sfr ADRESH; 153 154 __at(0x009D) __sfr ADCON0; 155 __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 156 157 __at(0x009E) __sfr ADCON1; 158 __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 159 160 __at(0x009F) __sfr ADCON2; 161 __at(0x009F) volatile __ADCON2bits_t ADCON2bits; 162 163 __at(0x010C) __sfr LATA; 164 __at(0x010C) volatile __LATAbits_t LATAbits; 165 166 __at(0x010E) __sfr LATC; 167 __at(0x010E) volatile __LATCbits_t LATCbits; 168 169 __at(0x010F) __sfr CMOUT; 170 __at(0x010F) volatile __CMOUTbits_t CMOUTbits; 171 172 __at(0x0110) __sfr CM1CON0; 173 __at(0x0110) volatile __CM1CON0bits_t CM1CON0bits; 174 175 __at(0x0111) __sfr CM1CON1; 176 __at(0x0111) volatile __CM1CON1bits_t CM1CON1bits; 177 178 __at(0x0112) __sfr CM1NSEL; 179 __at(0x0112) volatile __CM1NSELbits_t CM1NSELbits; 180 181 __at(0x0113) __sfr CM1PSEL; 182 __at(0x0113) volatile __CM1PSELbits_t CM1PSELbits; 183 184 __at(0x0114) __sfr CM2CON0; 185 __at(0x0114) volatile __CM2CON0bits_t CM2CON0bits; 186 187 __at(0x0115) __sfr CM2CON1; 188 __at(0x0115) volatile __CM2CON1bits_t CM2CON1bits; 189 190 __at(0x0116) __sfr CM2NSEL; 191 __at(0x0116) volatile __CM2NSELbits_t CM2NSELbits; 192 193 __at(0x0117) __sfr CM2PSEL; 194 __at(0x0117) volatile __CM2PSELbits_t CM2PSELbits; 195 196 __at(0x018C) __sfr ANSELA; 197 __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 198 199 __at(0x018E) __sfr ANSELC; 200 __at(0x018E) volatile __ANSELCbits_t ANSELCbits; 201 202 __at(0x0191) __sfr PMADR; 203 204 __at(0x0191) __sfr PMADRL; 205 206 __at(0x0192) __sfr PMADRH; 207 208 __at(0x0193) __sfr PMDAT; 209 210 __at(0x0193) __sfr PMDATL; 211 212 __at(0x0194) __sfr PMDATH; 213 214 __at(0x0195) __sfr PMCON1; 215 __at(0x0195) volatile __PMCON1bits_t PMCON1bits; 216 217 __at(0x0196) __sfr PMCON2; 218 219 __at(0x0199) __sfr RC1REG; 220 221 __at(0x0199) __sfr RCREG; 222 223 __at(0x0199) __sfr RCREG1; 224 225 __at(0x019A) __sfr TX1REG; 226 227 __at(0x019A) __sfr TXREG; 228 229 __at(0x019A) __sfr TXREG1; 230 231 __at(0x019B) __sfr SP1BRG; 232 233 __at(0x019B) __sfr SP1BRGL; 234 235 __at(0x019B) __sfr SPBRG; 236 237 __at(0x019B) __sfr SPBRG1; 238 239 __at(0x019B) __sfr SPBRGL; 240 241 __at(0x019C) __sfr SP1BRGH; 242 243 __at(0x019C) __sfr SPBRGH; 244 245 __at(0x019C) __sfr SPBRGH1; 246 247 __at(0x019D) __sfr RC1STA; 248 __at(0x019D) volatile __RC1STAbits_t RC1STAbits; 249 250 __at(0x019D) __sfr RCSTA; 251 __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 252 253 __at(0x019D) __sfr RCSTA1; 254 __at(0x019D) volatile __RCSTA1bits_t RCSTA1bits; 255 256 __at(0x019E) __sfr TX1STA; 257 __at(0x019E) volatile __TX1STAbits_t TX1STAbits; 258 259 __at(0x019E) __sfr TXSTA; 260 __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 261 262 __at(0x019E) __sfr TXSTA1; 263 __at(0x019E) volatile __TXSTA1bits_t TXSTA1bits; 264 265 __at(0x019F) __sfr BAUD1CON; 266 __at(0x019F) volatile __BAUD1CONbits_t BAUD1CONbits; 267 268 __at(0x019F) __sfr BAUDCON; 269 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 270 271 __at(0x019F) __sfr BAUDCON1; 272 __at(0x019F) volatile __BAUDCON1bits_t BAUDCON1bits; 273 274 __at(0x019F) __sfr BAUDCTL; 275 __at(0x019F) volatile __BAUDCTLbits_t BAUDCTLbits; 276 277 __at(0x019F) __sfr BAUDCTL1; 278 __at(0x019F) volatile __BAUDCTL1bits_t BAUDCTL1bits; 279 280 __at(0x020C) __sfr WPUA; 281 __at(0x020C) volatile __WPUAbits_t WPUAbits; 282 283 __at(0x020E) __sfr WPUC; 284 __at(0x020E) volatile __WPUCbits_t WPUCbits; 285 286 __at(0x0211) __sfr SSP1BUF; 287 __at(0x0211) volatile __SSP1BUFbits_t SSP1BUFbits; 288 289 __at(0x0211) __sfr SSPBUF; 290 __at(0x0211) volatile __SSPBUFbits_t SSPBUFbits; 291 292 __at(0x0212) __sfr SSP1ADD; 293 __at(0x0212) volatile __SSP1ADDbits_t SSP1ADDbits; 294 295 __at(0x0212) __sfr SSPADD; 296 __at(0x0212) volatile __SSPADDbits_t SSPADDbits; 297 298 __at(0x0213) __sfr SSP1MSK; 299 __at(0x0213) volatile __SSP1MSKbits_t SSP1MSKbits; 300 301 __at(0x0213) __sfr SSPMSK; 302 __at(0x0213) volatile __SSPMSKbits_t SSPMSKbits; 303 304 __at(0x0214) __sfr SSP1STAT; 305 __at(0x0214) volatile __SSP1STATbits_t SSP1STATbits; 306 307 __at(0x0214) __sfr SSPSTAT; 308 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 309 310 __at(0x0215) __sfr SSP1CON; 311 __at(0x0215) volatile __SSP1CONbits_t SSP1CONbits; 312 313 __at(0x0215) __sfr SSP1CON1; 314 __at(0x0215) volatile __SSP1CON1bits_t SSP1CON1bits; 315 316 __at(0x0215) __sfr SSPCON; 317 __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 318 319 __at(0x0215) __sfr SSPCON1; 320 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 321 322 __at(0x0216) __sfr SSP1CON2; 323 __at(0x0216) volatile __SSP1CON2bits_t SSP1CON2bits; 324 325 __at(0x0216) __sfr SSPCON2; 326 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 327 328 __at(0x0217) __sfr SSP1CON3; 329 __at(0x0217) volatile __SSP1CON3bits_t SSP1CON3bits; 330 331 __at(0x0217) __sfr SSPCON3; 332 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 333 334 __at(0x021D) __sfr BORCON; 335 __at(0x021D) volatile __BORCONbits_t BORCONbits; 336 337 __at(0x021E) __sfr FVRCON; 338 __at(0x021E) volatile __FVRCONbits_t FVRCONbits; 339 340 __at(0x021F) __sfr ZCD1CON; 341 __at(0x021F) volatile __ZCD1CONbits_t ZCD1CONbits; 342 343 __at(0x028C) __sfr ODCONA; 344 __at(0x028C) volatile __ODCONAbits_t ODCONAbits; 345 346 __at(0x028E) __sfr ODCONC; 347 __at(0x028E) volatile __ODCONCbits_t ODCONCbits; 348 349 __at(0x0291) __sfr CCPR1; 350 351 __at(0x0291) __sfr CCPR1L; 352 353 __at(0x0292) __sfr CCPR1H; 354 355 __at(0x0293) __sfr CCP1CON; 356 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 357 358 __at(0x0294) __sfr CCP1CAP; 359 __at(0x0294) volatile __CCP1CAPbits_t CCP1CAPbits; 360 361 __at(0x029E) __sfr CCPTMRS; 362 __at(0x029E) volatile __CCPTMRSbits_t CCPTMRSbits; 363 364 __at(0x030C) __sfr SLRCONA; 365 __at(0x030C) volatile __SLRCONAbits_t SLRCONAbits; 366 367 __at(0x030E) __sfr SLRCONC; 368 __at(0x030E) volatile __SLRCONCbits_t SLRCONCbits; 369 370 __at(0x038C) __sfr INLVLA; 371 __at(0x038C) volatile __INLVLAbits_t INLVLAbits; 372 373 __at(0x038E) __sfr INLVLC; 374 __at(0x038E) volatile __INLVLCbits_t INLVLCbits; 375 376 __at(0x0391) __sfr IOCAP; 377 __at(0x0391) volatile __IOCAPbits_t IOCAPbits; 378 379 __at(0x0392) __sfr IOCAN; 380 __at(0x0392) volatile __IOCANbits_t IOCANbits; 381 382 __at(0x0393) __sfr IOCAF; 383 __at(0x0393) volatile __IOCAFbits_t IOCAFbits; 384 385 __at(0x0397) __sfr IOCCP; 386 __at(0x0397) volatile __IOCCPbits_t IOCCPbits; 387 388 __at(0x0398) __sfr IOCCN; 389 __at(0x0398) volatile __IOCCNbits_t IOCCNbits; 390 391 __at(0x0399) __sfr IOCCF; 392 __at(0x0399) volatile __IOCCFbits_t IOCCFbits; 393 394 __at(0x039B) __sfr MD1CON0; 395 __at(0x039B) volatile __MD1CON0bits_t MD1CON0bits; 396 397 __at(0x039C) __sfr MD1CON1; 398 __at(0x039C) volatile __MD1CON1bits_t MD1CON1bits; 399 400 __at(0x039D) __sfr MD1SRC; 401 __at(0x039D) volatile __MD1SRCbits_t MD1SRCbits; 402 403 __at(0x039E) __sfr MD1CARL; 404 __at(0x039E) volatile __MD1CARLbits_t MD1CARLbits; 405 406 __at(0x039F) __sfr MD1CARH; 407 __at(0x039F) volatile __MD1CARHbits_t MD1CARHbits; 408 409 __at(0x040E) __sfr HIDRVC; 410 __at(0x040E) volatile __HIDRVCbits_t HIDRVCbits; 411 412 __at(0x0413) __sfr T4TMR; 413 414 __at(0x0413) __sfr TMR4; 415 416 __at(0x0414) __sfr PR4; 417 418 __at(0x0414) __sfr T4PR; 419 420 __at(0x0415) __sfr T4CON; 421 __at(0x0415) volatile __T4CONbits_t T4CONbits; 422 423 __at(0x0416) __sfr T4HLT; 424 __at(0x0416) volatile __T4HLTbits_t T4HLTbits; 425 426 __at(0x0417) __sfr T4CLKCON; 427 __at(0x0417) volatile __T4CLKCONbits_t T4CLKCONbits; 428 429 __at(0x0418) __sfr T4RST; 430 __at(0x0418) volatile __T4RSTbits_t T4RSTbits; 431 432 __at(0x041A) __sfr T6TMR; 433 434 __at(0x041A) __sfr TMR6; 435 436 __at(0x041B) __sfr PR6; 437 438 __at(0x041B) __sfr T6PR; 439 440 __at(0x041C) __sfr T6CON; 441 __at(0x041C) volatile __T6CONbits_t T6CONbits; 442 443 __at(0x041D) __sfr T6HLT; 444 __at(0x041D) volatile __T6HLTbits_t T6HLTbits; 445 446 __at(0x041E) __sfr T6CLKCON; 447 __at(0x041E) volatile __T6CLKCONbits_t T6CLKCONbits; 448 449 __at(0x041F) __sfr T6RST; 450 __at(0x041F) volatile __T6RSTbits_t T6RSTbits; 451 452 __at(0x0493) __sfr TMR3; 453 454 __at(0x0493) __sfr TMR3L; 455 456 __at(0x0494) __sfr TMR3H; 457 458 __at(0x0495) __sfr T3CON; 459 __at(0x0495) volatile __T3CONbits_t T3CONbits; 460 461 __at(0x0496) __sfr T3GCON; 462 __at(0x0496) volatile __T3GCONbits_t T3GCONbits; 463 464 __at(0x049A) __sfr TMR5; 465 466 __at(0x049A) __sfr TMR5L; 467 468 __at(0x049B) __sfr TMR5H; 469 470 __at(0x049C) __sfr T5CON; 471 __at(0x049C) volatile __T5CONbits_t T5CONbits; 472 473 __at(0x049D) __sfr T5GCON; 474 __at(0x049D) volatile __T5GCONbits_t T5GCONbits; 475 476 __at(0x050F) __sfr OPA1NCHS; 477 478 __at(0x0510) __sfr OPA1PCHS; 479 480 __at(0x0511) __sfr OPA1CON; 481 __at(0x0511) volatile __OPA1CONbits_t OPA1CONbits; 482 483 __at(0x0512) __sfr OPA1ORS; 484 485 __at(0x0590) __sfr DACLD; 486 __at(0x0590) volatile __DACLDbits_t DACLDbits; 487 488 __at(0x0591) __sfr DAC1CON0; 489 __at(0x0591) volatile __DAC1CON0bits_t DAC1CON0bits; 490 491 __at(0x0592) __sfr DAC1CON1; 492 __at(0x0592) volatile __DAC1CON1bits_t DAC1CON1bits; 493 494 __at(0x0592) __sfr DAC1REF; 495 496 __at(0x0592) __sfr DAC1REFL; 497 __at(0x0592) volatile __DAC1REFLbits_t DAC1REFLbits; 498 499 __at(0x0593) __sfr DAC1CON2; 500 __at(0x0593) volatile __DAC1CON2bits_t DAC1CON2bits; 501 502 __at(0x0593) __sfr DAC1REFH; 503 __at(0x0593) volatile __DAC1REFHbits_t DAC1REFHbits; 504 505 __at(0x0597) __sfr DAC3CON0; 506 __at(0x0597) volatile __DAC3CON0bits_t DAC3CON0bits; 507 508 __at(0x0598) __sfr DAC3CON1; 509 __at(0x0598) volatile __DAC3CON1bits_t DAC3CON1bits; 510 511 __at(0x0598) __sfr DAC3REF; 512 __at(0x0598) volatile __DAC3REFbits_t DAC3REFbits; 513 514 __at(0x0617) __sfr PWM3DCL; 515 __at(0x0617) volatile __PWM3DCLbits_t PWM3DCLbits; 516 517 __at(0x0618) __sfr PWM3DCH; 518 __at(0x0618) volatile __PWM3DCHbits_t PWM3DCHbits; 519 520 __at(0x0619) __sfr PWM3CON; 521 __at(0x0619) volatile __PWM3CONbits_t PWM3CONbits; 522 523 __at(0x068D) __sfr COG1PHR; 524 __at(0x068D) volatile __COG1PHRbits_t COG1PHRbits; 525 526 __at(0x068E) __sfr COG1PHF; 527 __at(0x068E) volatile __COG1PHFbits_t COG1PHFbits; 528 529 __at(0x068F) __sfr COG1BLKR; 530 __at(0x068F) volatile __COG1BLKRbits_t COG1BLKRbits; 531 532 __at(0x0690) __sfr COG1BLKF; 533 __at(0x0690) volatile __COG1BLKFbits_t COG1BLKFbits; 534 535 __at(0x0691) __sfr COG1DBR; 536 __at(0x0691) volatile __COG1DBRbits_t COG1DBRbits; 537 538 __at(0x0692) __sfr COG1DBF; 539 __at(0x0692) volatile __COG1DBFbits_t COG1DBFbits; 540 541 __at(0x0693) __sfr COG1CON0; 542 __at(0x0693) volatile __COG1CON0bits_t COG1CON0bits; 543 544 __at(0x0694) __sfr COG1CON1; 545 __at(0x0694) volatile __COG1CON1bits_t COG1CON1bits; 546 547 __at(0x0695) __sfr COG1RIS0; 548 __at(0x0695) volatile __COG1RIS0bits_t COG1RIS0bits; 549 550 __at(0x0696) __sfr COG1RIS1; 551 __at(0x0696) volatile __COG1RIS1bits_t COG1RIS1bits; 552 553 __at(0x0697) __sfr COG1RSIM0; 554 __at(0x0697) volatile __COG1RSIM0bits_t COG1RSIM0bits; 555 556 __at(0x0698) __sfr COG1RSIM1; 557 __at(0x0698) volatile __COG1RSIM1bits_t COG1RSIM1bits; 558 559 __at(0x0699) __sfr COG1FIS0; 560 __at(0x0699) volatile __COG1FIS0bits_t COG1FIS0bits; 561 562 __at(0x069A) __sfr COG1FIS1; 563 __at(0x069A) volatile __COG1FIS1bits_t COG1FIS1bits; 564 565 __at(0x069B) __sfr COG1FSIM0; 566 __at(0x069B) volatile __COG1FSIM0bits_t COG1FSIM0bits; 567 568 __at(0x069C) __sfr COG1FSIM1; 569 __at(0x069C) volatile __COG1FSIM1bits_t COG1FSIM1bits; 570 571 __at(0x069D) __sfr COG1ASD0; 572 __at(0x069D) volatile __COG1ASD0bits_t COG1ASD0bits; 573 574 __at(0x069E) __sfr COG1ASD1; 575 __at(0x069E) volatile __COG1ASD1bits_t COG1ASD1bits; 576 577 __at(0x069F) __sfr COG1STR; 578 __at(0x069F) volatile __COG1STRbits_t COG1STRbits; 579 580 __at(0x0794) __sfr PRG1RTSS; 581 __at(0x0794) volatile __PRG1RTSSbits_t PRG1RTSSbits; 582 583 __at(0x0795) __sfr PRG1FTSS; 584 __at(0x0795) volatile __PRG1FTSSbits_t PRG1FTSSbits; 585 586 __at(0x0796) __sfr PRG1INS; 587 __at(0x0796) volatile __PRG1INSbits_t PRG1INSbits; 588 589 __at(0x0797) __sfr PRG1CON0; 590 __at(0x0797) volatile __PRG1CON0bits_t PRG1CON0bits; 591 592 __at(0x0798) __sfr PRG1CON1; 593 __at(0x0798) volatile __PRG1CON1bits_t PRG1CON1bits; 594 595 __at(0x0799) __sfr PRG1CON2; 596 __at(0x0799) volatile __PRG1CON2bits_t PRG1CON2bits; 597 598 __at(0x0D8E) __sfr PWMEN; 599 __at(0x0D8E) volatile __PWMENbits_t PWMENbits; 600 601 __at(0x0D8F) __sfr PWMLD; 602 __at(0x0D8F) volatile __PWMLDbits_t PWMLDbits; 603 604 __at(0x0D90) __sfr PWMOUT; 605 __at(0x0D90) volatile __PWMOUTbits_t PWMOUTbits; 606 607 __at(0x0D91) __sfr PWM5PH; 608 609 __at(0x0D91) __sfr PWM5PHL; 610 __at(0x0D91) volatile __PWM5PHLbits_t PWM5PHLbits; 611 612 __at(0x0D92) __sfr PWM5PHH; 613 __at(0x0D92) volatile __PWM5PHHbits_t PWM5PHHbits; 614 615 __at(0x0D93) __sfr PWM5DC; 616 617 __at(0x0D93) __sfr PWM5DCL; 618 __at(0x0D93) volatile __PWM5DCLbits_t PWM5DCLbits; 619 620 __at(0x0D94) __sfr PWM5DCH; 621 __at(0x0D94) volatile __PWM5DCHbits_t PWM5DCHbits; 622 623 __at(0x0D95) __sfr PWM5PR; 624 625 __at(0x0D95) __sfr PWM5PRL; 626 __at(0x0D95) volatile __PWM5PRLbits_t PWM5PRLbits; 627 628 __at(0x0D96) __sfr PWM5PRH; 629 __at(0x0D96) volatile __PWM5PRHbits_t PWM5PRHbits; 630 631 __at(0x0D97) __sfr PWM5OF; 632 633 __at(0x0D97) __sfr PWM5OFL; 634 __at(0x0D97) volatile __PWM5OFLbits_t PWM5OFLbits; 635 636 __at(0x0D98) __sfr PWM5OFH; 637 __at(0x0D98) volatile __PWM5OFHbits_t PWM5OFHbits; 638 639 __at(0x0D99) __sfr PWM5TMR; 640 641 __at(0x0D99) __sfr PWM5TMRL; 642 __at(0x0D99) volatile __PWM5TMRLbits_t PWM5TMRLbits; 643 644 __at(0x0D9A) __sfr PWM5TMRH; 645 __at(0x0D9A) volatile __PWM5TMRHbits_t PWM5TMRHbits; 646 647 __at(0x0D9B) __sfr PWM5CON; 648 __at(0x0D9B) volatile __PWM5CONbits_t PWM5CONbits; 649 650 __at(0x0D9C) __sfr PWM5INTCON; 651 __at(0x0D9C) volatile __PWM5INTCONbits_t PWM5INTCONbits; 652 653 __at(0x0D9C) __sfr PWM5INTE; 654 __at(0x0D9C) volatile __PWM5INTEbits_t PWM5INTEbits; 655 656 __at(0x0D9D) __sfr PWM5INTF; 657 __at(0x0D9D) volatile __PWM5INTFbits_t PWM5INTFbits; 658 659 __at(0x0D9D) __sfr PWM5INTFLG; 660 __at(0x0D9D) volatile __PWM5INTFLGbits_t PWM5INTFLGbits; 661 662 __at(0x0D9E) __sfr PWM5CLKCON; 663 __at(0x0D9E) volatile __PWM5CLKCONbits_t PWM5CLKCONbits; 664 665 __at(0x0D9F) __sfr PWM5LDCON; 666 __at(0x0D9F) volatile __PWM5LDCONbits_t PWM5LDCONbits; 667 668 __at(0x0DA0) __sfr PWM5OFCON; 669 __at(0x0DA0) volatile __PWM5OFCONbits_t PWM5OFCONbits; 670 671 __at(0x0E0F) __sfr PPSLOCK; 672 __at(0x0E0F) volatile __PPSLOCKbits_t PPSLOCKbits; 673 674 __at(0x0E10) __sfr INTPPS; 675 676 __at(0x0E11) __sfr T0CKIPPS; 677 678 __at(0x0E12) __sfr T1CKIPPS; 679 680 __at(0x0E13) __sfr T1GPPS; 681 682 __at(0x0E14) __sfr CCP1PPS; 683 684 __at(0x0E16) __sfr COG1INPPS; 685 686 __at(0x0E19) __sfr T2CKIPPS; 687 688 __at(0x0E1A) __sfr T3CKIPPS; 689 690 __at(0x0E1B) __sfr T3GPPS; 691 692 __at(0x0E1C) __sfr T4CKIPPS; 693 694 __at(0x0E1D) __sfr T5CKIPPS; 695 696 __at(0x0E1E) __sfr T5GPPS; 697 698 __at(0x0E1F) __sfr T6CKIPPS; 699 700 __at(0x0E20) __sfr SSPCLKPPS; 701 702 __at(0x0E21) __sfr SSPDATPPS; 703 704 __at(0x0E22) __sfr SSPSSPPS; 705 706 __at(0x0E24) __sfr RXPPS; 707 708 __at(0x0E25) __sfr CKPPS; 709 710 __at(0x0E28) __sfr CLCIN0PPS; 711 712 __at(0x0E29) __sfr CLCIN1PPS; 713 714 __at(0x0E2A) __sfr CLCIN2PPS; 715 716 __at(0x0E2B) __sfr CLCIN3PPS; 717 718 __at(0x0E2C) __sfr PRG1RPPS; 719 720 __at(0x0E2D) __sfr PRG1FPPS; 721 722 __at(0x0E30) __sfr MD1CHPPS; 723 724 __at(0x0E31) __sfr MD1CLPPS; 725 726 __at(0x0E32) __sfr MD1MODPPS; 727 728 __at(0x0E90) __sfr RA0PPS; 729 730 __at(0x0E91) __sfr RA1PPS; 731 732 __at(0x0E92) __sfr RA2PPS; 733 734 __at(0x0E94) __sfr RA4PPS; 735 736 __at(0x0E95) __sfr RA5PPS; 737 738 __at(0x0EA0) __sfr RC0PPS; 739 740 __at(0x0EA1) __sfr RC1PPS; 741 742 __at(0x0EA2) __sfr RC2PPS; 743 744 __at(0x0EA3) __sfr RC3PPS; 745 746 __at(0x0EA4) __sfr RC4PPS; 747 748 __at(0x0EA5) __sfr RC5PPS; 749 750 __at(0x0F0F) __sfr CLCDATA; 751 __at(0x0F0F) volatile __CLCDATAbits_t CLCDATAbits; 752 753 __at(0x0F10) __sfr CLC1CON; 754 __at(0x0F10) volatile __CLC1CONbits_t CLC1CONbits; 755 756 __at(0x0F11) __sfr CLC1POL; 757 __at(0x0F11) volatile __CLC1POLbits_t CLC1POLbits; 758 759 __at(0x0F12) __sfr CLC1SEL0; 760 __at(0x0F12) volatile __CLC1SEL0bits_t CLC1SEL0bits; 761 762 __at(0x0F13) __sfr CLC1SEL1; 763 __at(0x0F13) volatile __CLC1SEL1bits_t CLC1SEL1bits; 764 765 __at(0x0F14) __sfr CLC1SEL2; 766 __at(0x0F14) volatile __CLC1SEL2bits_t CLC1SEL2bits; 767 768 __at(0x0F15) __sfr CLC1SEL3; 769 __at(0x0F15) volatile __CLC1SEL3bits_t CLC1SEL3bits; 770 771 __at(0x0F16) __sfr CLC1GLS0; 772 __at(0x0F16) volatile __CLC1GLS0bits_t CLC1GLS0bits; 773 774 __at(0x0F17) __sfr CLC1GLS1; 775 __at(0x0F17) volatile __CLC1GLS1bits_t CLC1GLS1bits; 776 777 __at(0x0F18) __sfr CLC1GLS2; 778 __at(0x0F18) volatile __CLC1GLS2bits_t CLC1GLS2bits; 779 780 __at(0x0F19) __sfr CLC1GLS3; 781 __at(0x0F19) volatile __CLC1GLS3bits_t CLC1GLS3bits; 782 783 __at(0x0F1A) __sfr CLC2CON; 784 __at(0x0F1A) volatile __CLC2CONbits_t CLC2CONbits; 785 786 __at(0x0F1B) __sfr CLC2POL; 787 __at(0x0F1B) volatile __CLC2POLbits_t CLC2POLbits; 788 789 __at(0x0F1C) __sfr CLC2SEL0; 790 __at(0x0F1C) volatile __CLC2SEL0bits_t CLC2SEL0bits; 791 792 __at(0x0F1D) __sfr CLC2SEL1; 793 __at(0x0F1D) volatile __CLC2SEL1bits_t CLC2SEL1bits; 794 795 __at(0x0F1E) __sfr CLC2SEL2; 796 __at(0x0F1E) volatile __CLC2SEL2bits_t CLC2SEL2bits; 797 798 __at(0x0F1F) __sfr CLC2SEL3; 799 __at(0x0F1F) volatile __CLC2SEL3bits_t CLC2SEL3bits; 800 801 __at(0x0F20) __sfr CLC2GLS0; 802 __at(0x0F20) volatile __CLC2GLS0bits_t CLC2GLS0bits; 803 804 __at(0x0F21) __sfr CLC2GLS1; 805 __at(0x0F21) volatile __CLC2GLS1bits_t CLC2GLS1bits; 806 807 __at(0x0F22) __sfr CLC2GLS2; 808 __at(0x0F22) volatile __CLC2GLS2bits_t CLC2GLS2bits; 809 810 __at(0x0F23) __sfr CLC2GLS3; 811 __at(0x0F23) volatile __CLC2GLS3bits_t CLC2GLS3bits; 812 813 __at(0x0F24) __sfr CLC3CON; 814 __at(0x0F24) volatile __CLC3CONbits_t CLC3CONbits; 815 816 __at(0x0F25) __sfr CLC3POL; 817 __at(0x0F25) volatile __CLC3POLbits_t CLC3POLbits; 818 819 __at(0x0F26) __sfr CLC3SEL0; 820 __at(0x0F26) volatile __CLC3SEL0bits_t CLC3SEL0bits; 821 822 __at(0x0F27) __sfr CLC3SEL1; 823 __at(0x0F27) volatile __CLC3SEL1bits_t CLC3SEL1bits; 824 825 __at(0x0F28) __sfr CLC3SEL2; 826 __at(0x0F28) volatile __CLC3SEL2bits_t CLC3SEL2bits; 827 828 __at(0x0F29) __sfr CLC3SEL3; 829 __at(0x0F29) volatile __CLC3SEL3bits_t CLC3SEL3bits; 830 831 __at(0x0F2A) __sfr CLC3GLS0; 832 __at(0x0F2A) volatile __CLC3GLS0bits_t CLC3GLS0bits; 833 834 __at(0x0F2B) __sfr CLC3GLS1; 835 __at(0x0F2B) volatile __CLC3GLS1bits_t CLC3GLS1bits; 836 837 __at(0x0F2C) __sfr CLC3GLS2; 838 __at(0x0F2C) volatile __CLC3GLS2bits_t CLC3GLS2bits; 839 840 __at(0x0F2D) __sfr CLC3GLS3; 841 __at(0x0F2D) volatile __CLC3GLS3bits_t CLC3GLS3bits; 842 843 __at(0x0FE4) __sfr STATUS_SHAD; 844 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 845 846 __at(0x0FE5) __sfr WREG_SHAD; 847 848 __at(0x0FE6) __sfr BSR_SHAD; 849 850 __at(0x0FE7) __sfr PCLATH_SHAD; 851 852 __at(0x0FE8) __sfr FSR0L_SHAD; 853 854 __at(0x0FE9) __sfr FSR0H_SHAD; 855 856 __at(0x0FEA) __sfr FSR1L_SHAD; 857 858 __at(0x0FEB) __sfr FSR1H_SHAD; 859 860 __at(0x0FED) __sfr STKPTR; 861 862 __at(0x0FEE) __sfr TOSL; 863 864 __at(0x0FEF) __sfr TOSH; 865