1 /* 2 * This definitions of the PIC16LF1936 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:22 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic16lf1936.h> 26 27 //============================================================================== 28 29 __at(0x0000) __sfr INDF0; 30 31 __at(0x0001) __sfr INDF1; 32 33 __at(0x0002) __sfr PCL; 34 35 __at(0x0003) __sfr STATUS; 36 __at(0x0003) volatile __STATUSbits_t STATUSbits; 37 38 __at(0x0004) __sfr FSR0; 39 40 __at(0x0004) __sfr FSR0L; 41 42 __at(0x0005) __sfr FSR0H; 43 44 __at(0x0006) __sfr FSR1; 45 46 __at(0x0006) __sfr FSR1L; 47 48 __at(0x0007) __sfr FSR1H; 49 50 __at(0x0008) __sfr BSR; 51 __at(0x0008) volatile __BSRbits_t BSRbits; 52 53 __at(0x0009) __sfr WREG; 54 55 __at(0x000A) __sfr PCLATH; 56 57 __at(0x000B) __sfr INTCON; 58 __at(0x000B) volatile __INTCONbits_t INTCONbits; 59 60 __at(0x000C) __sfr PORTA; 61 __at(0x000C) volatile __PORTAbits_t PORTAbits; 62 63 __at(0x000D) __sfr PORTB; 64 __at(0x000D) volatile __PORTBbits_t PORTBbits; 65 66 __at(0x000E) __sfr PORTC; 67 __at(0x000E) volatile __PORTCbits_t PORTCbits; 68 69 __at(0x0010) __sfr PORTE; 70 __at(0x0010) volatile __PORTEbits_t PORTEbits; 71 72 __at(0x0011) __sfr PIR1; 73 __at(0x0011) volatile __PIR1bits_t PIR1bits; 74 75 __at(0x0012) __sfr PIR2; 76 __at(0x0012) volatile __PIR2bits_t PIR2bits; 77 78 __at(0x0013) __sfr PIR3; 79 __at(0x0013) volatile __PIR3bits_t PIR3bits; 80 81 __at(0x0015) __sfr TMR0; 82 83 __at(0x0016) __sfr TMR1; 84 85 __at(0x0016) __sfr TMR1L; 86 87 __at(0x0017) __sfr TMR1H; 88 89 __at(0x0018) __sfr T1CON; 90 __at(0x0018) volatile __T1CONbits_t T1CONbits; 91 92 __at(0x0019) __sfr T1GCON; 93 __at(0x0019) volatile __T1GCONbits_t T1GCONbits; 94 95 __at(0x001A) __sfr TMR2; 96 97 __at(0x001B) __sfr PR2; 98 99 __at(0x001C) __sfr T2CON; 100 __at(0x001C) volatile __T2CONbits_t T2CONbits; 101 102 __at(0x001E) __sfr CPSCON0; 103 __at(0x001E) volatile __CPSCON0bits_t CPSCON0bits; 104 105 __at(0x001F) __sfr CPSCON1; 106 __at(0x001F) volatile __CPSCON1bits_t CPSCON1bits; 107 108 __at(0x008C) __sfr TRISA; 109 __at(0x008C) volatile __TRISAbits_t TRISAbits; 110 111 __at(0x008D) __sfr TRISB; 112 __at(0x008D) volatile __TRISBbits_t TRISBbits; 113 114 __at(0x008E) __sfr TRISC; 115 __at(0x008E) volatile __TRISCbits_t TRISCbits; 116 117 __at(0x0090) __sfr TRISE; 118 __at(0x0090) volatile __TRISEbits_t TRISEbits; 119 120 __at(0x0091) __sfr PIE1; 121 __at(0x0091) volatile __PIE1bits_t PIE1bits; 122 123 __at(0x0092) __sfr PIE2; 124 __at(0x0092) volatile __PIE2bits_t PIE2bits; 125 126 __at(0x0093) __sfr PIE3; 127 __at(0x0093) volatile __PIE3bits_t PIE3bits; 128 129 __at(0x0095) __sfr OPTION_REG; 130 __at(0x0095) volatile __OPTION_REGbits_t OPTION_REGbits; 131 132 __at(0x0096) __sfr PCON; 133 __at(0x0096) volatile __PCONbits_t PCONbits; 134 135 __at(0x0097) __sfr WDTCON; 136 __at(0x0097) volatile __WDTCONbits_t WDTCONbits; 137 138 __at(0x0098) __sfr OSCTUNE; 139 __at(0x0098) volatile __OSCTUNEbits_t OSCTUNEbits; 140 141 __at(0x0099) __sfr OSCCON; 142 __at(0x0099) volatile __OSCCONbits_t OSCCONbits; 143 144 __at(0x009A) __sfr OSCSTAT; 145 __at(0x009A) volatile __OSCSTATbits_t OSCSTATbits; 146 147 __at(0x009B) __sfr ADRES; 148 149 __at(0x009B) __sfr ADRESL; 150 151 __at(0x009C) __sfr ADRESH; 152 153 __at(0x009D) __sfr ADCON0; 154 __at(0x009D) volatile __ADCON0bits_t ADCON0bits; 155 156 __at(0x009E) __sfr ADCON1; 157 __at(0x009E) volatile __ADCON1bits_t ADCON1bits; 158 159 __at(0x010C) __sfr LATA; 160 __at(0x010C) volatile __LATAbits_t LATAbits; 161 162 __at(0x010D) __sfr LATB; 163 __at(0x010D) volatile __LATBbits_t LATBbits; 164 165 __at(0x010E) __sfr LATC; 166 __at(0x010E) volatile __LATCbits_t LATCbits; 167 168 __at(0x0110) __sfr LATE; 169 __at(0x0110) volatile __LATEbits_t LATEbits; 170 171 __at(0x0111) __sfr CM1CON0; 172 __at(0x0111) volatile __CM1CON0bits_t CM1CON0bits; 173 174 __at(0x0112) __sfr CM1CON1; 175 __at(0x0112) volatile __CM1CON1bits_t CM1CON1bits; 176 177 __at(0x0113) __sfr CM2CON0; 178 __at(0x0113) volatile __CM2CON0bits_t CM2CON0bits; 179 180 __at(0x0114) __sfr CM2CON1; 181 __at(0x0114) volatile __CM2CON1bits_t CM2CON1bits; 182 183 __at(0x0115) __sfr CMOUT; 184 __at(0x0115) volatile __CMOUTbits_t CMOUTbits; 185 186 __at(0x0116) __sfr BORCON; 187 __at(0x0116) volatile __BORCONbits_t BORCONbits; 188 189 __at(0x0117) __sfr FVRCON; 190 __at(0x0117) volatile __FVRCONbits_t FVRCONbits; 191 192 __at(0x0118) __sfr DACCON0; 193 __at(0x0118) volatile __DACCON0bits_t DACCON0bits; 194 195 __at(0x0119) __sfr DACCON1; 196 __at(0x0119) volatile __DACCON1bits_t DACCON1bits; 197 198 __at(0x011A) __sfr SRCON0; 199 __at(0x011A) volatile __SRCON0bits_t SRCON0bits; 200 201 __at(0x011B) __sfr SRCON1; 202 __at(0x011B) volatile __SRCON1bits_t SRCON1bits; 203 204 __at(0x011D) __sfr APFCON; 205 __at(0x011D) volatile __APFCONbits_t APFCONbits; 206 207 __at(0x018C) __sfr ANSELA; 208 __at(0x018C) volatile __ANSELAbits_t ANSELAbits; 209 210 __at(0x018D) __sfr ANSELB; 211 __at(0x018D) volatile __ANSELBbits_t ANSELBbits; 212 213 __at(0x0191) __sfr EEADR; 214 215 __at(0x0191) __sfr EEADRL; 216 217 __at(0x0192) __sfr EEADRH; 218 219 __at(0x0193) __sfr EEDAT; 220 221 __at(0x0193) __sfr EEDATL; 222 223 __at(0x0194) __sfr EEDATH; 224 225 __at(0x0195) __sfr EECON1; 226 __at(0x0195) volatile __EECON1bits_t EECON1bits; 227 228 __at(0x0196) __sfr EECON2; 229 230 __at(0x0199) __sfr RCREG; 231 232 __at(0x019A) __sfr TXREG; 233 234 __at(0x019B) __sfr SP1BRG; 235 236 __at(0x019B) __sfr SP1BRGL; 237 238 __at(0x019B) __sfr SPBRG; 239 240 __at(0x019B) __sfr SPBRGL; 241 242 __at(0x019C) __sfr SP1BRGH; 243 244 __at(0x019C) __sfr SPBRGH; 245 246 __at(0x019D) __sfr RCSTA; 247 __at(0x019D) volatile __RCSTAbits_t RCSTAbits; 248 249 __at(0x019E) __sfr TXSTA; 250 __at(0x019E) volatile __TXSTAbits_t TXSTAbits; 251 252 __at(0x019F) __sfr BAUDCON; 253 __at(0x019F) volatile __BAUDCONbits_t BAUDCONbits; 254 255 __at(0x020D) __sfr WPUB; 256 __at(0x020D) volatile __WPUBbits_t WPUBbits; 257 258 __at(0x0210) __sfr WPUE; 259 __at(0x0210) volatile __WPUEbits_t WPUEbits; 260 261 __at(0x0211) __sfr SSPBUF; 262 263 __at(0x0212) __sfr SSPADD; 264 265 __at(0x0213) __sfr SSPMSK; 266 267 __at(0x0214) __sfr SSPSTAT; 268 __at(0x0214) volatile __SSPSTATbits_t SSPSTATbits; 269 270 __at(0x0215) __sfr SSPCON; 271 __at(0x0215) volatile __SSPCONbits_t SSPCONbits; 272 273 __at(0x0215) __sfr SSPCON1; 274 __at(0x0215) volatile __SSPCON1bits_t SSPCON1bits; 275 276 __at(0x0216) __sfr SSPCON2; 277 __at(0x0216) volatile __SSPCON2bits_t SSPCON2bits; 278 279 __at(0x0217) __sfr SSPCON3; 280 __at(0x0217) volatile __SSPCON3bits_t SSPCON3bits; 281 282 __at(0x0291) __sfr CCPR1; 283 284 __at(0x0291) __sfr CCPR1L; 285 286 __at(0x0292) __sfr CCPR1H; 287 288 __at(0x0293) __sfr CCP1CON; 289 __at(0x0293) volatile __CCP1CONbits_t CCP1CONbits; 290 291 __at(0x0294) __sfr PWM1CON; 292 __at(0x0294) volatile __PWM1CONbits_t PWM1CONbits; 293 294 __at(0x0295) __sfr CCP1AS; 295 __at(0x0295) volatile __CCP1ASbits_t CCP1ASbits; 296 297 __at(0x0295) __sfr ECCP1AS; 298 __at(0x0295) volatile __ECCP1ASbits_t ECCP1ASbits; 299 300 __at(0x0296) __sfr PSTR1CON; 301 __at(0x0296) volatile __PSTR1CONbits_t PSTR1CONbits; 302 303 __at(0x0298) __sfr CCPR2; 304 305 __at(0x0298) __sfr CCPR2L; 306 307 __at(0x0299) __sfr CCPR2H; 308 309 __at(0x029A) __sfr CCP2CON; 310 __at(0x029A) volatile __CCP2CONbits_t CCP2CONbits; 311 312 __at(0x029B) __sfr PWM2CON; 313 __at(0x029B) volatile __PWM2CONbits_t PWM2CONbits; 314 315 __at(0x029C) __sfr CCP2AS; 316 __at(0x029C) volatile __CCP2ASbits_t CCP2ASbits; 317 318 __at(0x029C) __sfr ECCP2AS; 319 __at(0x029C) volatile __ECCP2ASbits_t ECCP2ASbits; 320 321 __at(0x029D) __sfr PSTR2CON; 322 __at(0x029D) volatile __PSTR2CONbits_t PSTR2CONbits; 323 324 __at(0x029E) __sfr CCPTMRS0; 325 __at(0x029E) volatile __CCPTMRS0bits_t CCPTMRS0bits; 326 327 __at(0x029F) __sfr CCPTMRS1; 328 __at(0x029F) volatile __CCPTMRS1bits_t CCPTMRS1bits; 329 330 __at(0x0311) __sfr CCPR3; 331 332 __at(0x0311) __sfr CCPR3L; 333 334 __at(0x0312) __sfr CCPR3H; 335 336 __at(0x0313) __sfr CCP3CON; 337 __at(0x0313) volatile __CCP3CONbits_t CCP3CONbits; 338 339 __at(0x0314) __sfr PWM3CON; 340 __at(0x0314) volatile __PWM3CONbits_t PWM3CONbits; 341 342 __at(0x0315) __sfr CCP3AS; 343 __at(0x0315) volatile __CCP3ASbits_t CCP3ASbits; 344 345 __at(0x0315) __sfr ECCP3AS; 346 __at(0x0315) volatile __ECCP3ASbits_t ECCP3ASbits; 347 348 __at(0x0316) __sfr PSTR3CON; 349 __at(0x0316) volatile __PSTR3CONbits_t PSTR3CONbits; 350 351 __at(0x0318) __sfr CCPR4; 352 353 __at(0x0318) __sfr CCPR4L; 354 355 __at(0x0319) __sfr CCPR4H; 356 357 __at(0x031A) __sfr CCP4CON; 358 __at(0x031A) volatile __CCP4CONbits_t CCP4CONbits; 359 360 __at(0x031C) __sfr CCPR5; 361 362 __at(0x031C) __sfr CCPR5L; 363 364 __at(0x031D) __sfr CCPR5H; 365 366 __at(0x031E) __sfr CCP5CON; 367 __at(0x031E) volatile __CCP5CONbits_t CCP5CONbits; 368 369 __at(0x0394) __sfr IOCBP; 370 __at(0x0394) volatile __IOCBPbits_t IOCBPbits; 371 372 __at(0x0395) __sfr IOCBN; 373 __at(0x0395) volatile __IOCBNbits_t IOCBNbits; 374 375 __at(0x0396) __sfr IOCBF; 376 __at(0x0396) volatile __IOCBFbits_t IOCBFbits; 377 378 __at(0x0415) __sfr TMR4; 379 380 __at(0x0416) __sfr PR4; 381 382 __at(0x0417) __sfr T4CON; 383 __at(0x0417) volatile __T4CONbits_t T4CONbits; 384 385 __at(0x041C) __sfr TMR6; 386 387 __at(0x041D) __sfr PR6; 388 389 __at(0x041E) __sfr T6CON; 390 __at(0x041E) volatile __T6CONbits_t T6CONbits; 391 392 __at(0x0791) __sfr LCDCON; 393 __at(0x0791) volatile __LCDCONbits_t LCDCONbits; 394 395 __at(0x0792) __sfr LCDPS; 396 __at(0x0792) volatile __LCDPSbits_t LCDPSbits; 397 398 __at(0x0793) __sfr LCDREF; 399 __at(0x0793) volatile __LCDREFbits_t LCDREFbits; 400 401 __at(0x0794) __sfr LCDCST; 402 __at(0x0794) volatile __LCDCSTbits_t LCDCSTbits; 403 404 __at(0x0795) __sfr LCDRL; 405 __at(0x0795) volatile __LCDRLbits_t LCDRLbits; 406 407 __at(0x0798) __sfr LCDSE0; 408 __at(0x0798) volatile __LCDSE0bits_t LCDSE0bits; 409 410 __at(0x0799) __sfr LCDSE1; 411 __at(0x0799) volatile __LCDSE1bits_t LCDSE1bits; 412 413 __at(0x07A0) __sfr LCDDATA0; 414 __at(0x07A0) volatile __LCDDATA0bits_t LCDDATA0bits; 415 416 __at(0x07A1) __sfr LCDDATA1; 417 __at(0x07A1) volatile __LCDDATA1bits_t LCDDATA1bits; 418 419 __at(0x07A3) __sfr LCDDATA3; 420 __at(0x07A3) volatile __LCDDATA3bits_t LCDDATA3bits; 421 422 __at(0x07A4) __sfr LCDDATA4; 423 __at(0x07A4) volatile __LCDDATA4bits_t LCDDATA4bits; 424 425 __at(0x07A6) __sfr LCDDATA6; 426 __at(0x07A6) volatile __LCDDATA6bits_t LCDDATA6bits; 427 428 __at(0x07A7) __sfr LCDDATA7; 429 __at(0x07A7) volatile __LCDDATA7bits_t LCDDATA7bits; 430 431 __at(0x07A9) __sfr LCDDATA9; 432 __at(0x07A9) volatile __LCDDATA9bits_t LCDDATA9bits; 433 434 __at(0x07AA) __sfr LCDDATA10; 435 __at(0x07AA) volatile __LCDDATA10bits_t LCDDATA10bits; 436 437 __at(0x0FE4) __sfr STATUS_SHAD; 438 __at(0x0FE4) volatile __STATUS_SHADbits_t STATUS_SHADbits; 439 440 __at(0x0FE5) __sfr WREG_SHAD; 441 442 __at(0x0FE6) __sfr BSR_SHAD; 443 444 __at(0x0FE7) __sfr PCLATH_SHAD; 445 446 __at(0x0FE8) __sfr FSR0L_SHAD; 447 448 __at(0x0FE9) __sfr FSR0H_SHAD; 449 450 __at(0x0FEA) __sfr FSR1L_SHAD; 451 452 __at(0x0FEB) __sfr FSR1H_SHAD; 453 454 __at(0x0FED) __sfr STKPTR; 455 456 __at(0x0FEE) __sfr TOSL; 457 458 __at(0x0FEF) __sfr TOSH; 459