1 /* 2 * This definitions of the PIC18F4685 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:48 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #include <pic18f4685.h> 26 27 //============================================================================== 28 29 __at(0x0D60) __sfr RXF6SIDH; 30 __at(0x0D60) volatile __RXF6SIDHbits_t RXF6SIDHbits; 31 32 __at(0x0D61) __sfr RXF6SIDL; 33 __at(0x0D61) volatile __RXF6SIDLbits_t RXF6SIDLbits; 34 35 __at(0x0D62) __sfr RXF6EIDH; 36 __at(0x0D62) volatile __RXF6EIDHbits_t RXF6EIDHbits; 37 38 __at(0x0D63) __sfr RXF6EIDL; 39 __at(0x0D63) volatile __RXF6EIDLbits_t RXF6EIDLbits; 40 41 __at(0x0D64) __sfr RXF7SIDH; 42 __at(0x0D64) volatile __RXF7SIDHbits_t RXF7SIDHbits; 43 44 __at(0x0D65) __sfr RXF7SIDL; 45 __at(0x0D65) volatile __RXF7SIDLbits_t RXF7SIDLbits; 46 47 __at(0x0D66) __sfr RXF7EIDH; 48 __at(0x0D66) volatile __RXF7EIDHbits_t RXF7EIDHbits; 49 50 __at(0x0D67) __sfr RXF7EIDL; 51 __at(0x0D67) volatile __RXF7EIDLbits_t RXF7EIDLbits; 52 53 __at(0x0D68) __sfr RXF8SIDH; 54 __at(0x0D68) volatile __RXF8SIDHbits_t RXF8SIDHbits; 55 56 __at(0x0D69) __sfr RXF8SIDL; 57 __at(0x0D69) volatile __RXF8SIDLbits_t RXF8SIDLbits; 58 59 __at(0x0D6A) __sfr RXF8EIDH; 60 __at(0x0D6A) volatile __RXF8EIDHbits_t RXF8EIDHbits; 61 62 __at(0x0D6B) __sfr RXF8EIDL; 63 __at(0x0D6B) volatile __RXF8EIDLbits_t RXF8EIDLbits; 64 65 __at(0x0D70) __sfr RXF9SIDH; 66 __at(0x0D70) volatile __RXF9SIDHbits_t RXF9SIDHbits; 67 68 __at(0x0D71) __sfr RXF9SIDL; 69 __at(0x0D71) volatile __RXF9SIDLbits_t RXF9SIDLbits; 70 71 __at(0x0D72) __sfr RXF9EIDH; 72 __at(0x0D72) volatile __RXF9EIDHbits_t RXF9EIDHbits; 73 74 __at(0x0D73) __sfr RXF9EIDL; 75 __at(0x0D73) volatile __RXF9EIDLbits_t RXF9EIDLbits; 76 77 __at(0x0D74) __sfr RXF10SIDH; 78 __at(0x0D74) volatile __RXF10SIDHbits_t RXF10SIDHbits; 79 80 __at(0x0D75) __sfr RXF10SIDL; 81 __at(0x0D75) volatile __RXF10SIDLbits_t RXF10SIDLbits; 82 83 __at(0x0D76) __sfr RXF10EIDH; 84 __at(0x0D76) volatile __RXF10EIDHbits_t RXF10EIDHbits; 85 86 __at(0x0D77) __sfr RXF10EIDL; 87 __at(0x0D77) volatile __RXF10EIDLbits_t RXF10EIDLbits; 88 89 __at(0x0D78) __sfr RXF11SIDH; 90 __at(0x0D78) volatile __RXF11SIDHbits_t RXF11SIDHbits; 91 92 __at(0x0D79) __sfr RXF11SIDL; 93 __at(0x0D79) volatile __RXF11SIDLbits_t RXF11SIDLbits; 94 95 __at(0x0D7A) __sfr RXF11EIDH; 96 __at(0x0D7A) volatile __RXF11EIDHbits_t RXF11EIDHbits; 97 98 __at(0x0D7B) __sfr RXF11EIDL; 99 __at(0x0D7B) volatile __RXF11EIDLbits_t RXF11EIDLbits; 100 101 __at(0x0D80) __sfr RXF12SIDH; 102 __at(0x0D80) volatile __RXF12SIDHbits_t RXF12SIDHbits; 103 104 __at(0x0D81) __sfr RXF12SIDL; 105 __at(0x0D81) volatile __RXF12SIDLbits_t RXF12SIDLbits; 106 107 __at(0x0D82) __sfr RXF12EIDH; 108 __at(0x0D82) volatile __RXF12EIDHbits_t RXF12EIDHbits; 109 110 __at(0x0D83) __sfr RXF12EIDL; 111 __at(0x0D83) volatile __RXF12EIDLbits_t RXF12EIDLbits; 112 113 __at(0x0D84) __sfr RXF13SIDH; 114 __at(0x0D84) volatile __RXF13SIDHbits_t RXF13SIDHbits; 115 116 __at(0x0D85) __sfr RXF13SIDL; 117 __at(0x0D85) volatile __RXF13SIDLbits_t RXF13SIDLbits; 118 119 __at(0x0D86) __sfr RXF13EIDH; 120 __at(0x0D86) volatile __RXF13EIDHbits_t RXF13EIDHbits; 121 122 __at(0x0D87) __sfr RXF13EIDL; 123 __at(0x0D87) volatile __RXF13EIDLbits_t RXF13EIDLbits; 124 125 __at(0x0D88) __sfr RXF14SIDH; 126 __at(0x0D88) volatile __RXF14SIDHbits_t RXF14SIDHbits; 127 128 __at(0x0D89) __sfr RXF14SIDL; 129 __at(0x0D89) volatile __RXF14SIDLbits_t RXF14SIDLbits; 130 131 __at(0x0D8A) __sfr RXF14EIDH; 132 __at(0x0D8A) volatile __RXF14EIDHbits_t RXF14EIDHbits; 133 134 __at(0x0D8B) __sfr RXF14EIDL; 135 __at(0x0D8B) volatile __RXF14EIDLbits_t RXF14EIDLbits; 136 137 __at(0x0D90) __sfr RXF15SIDH; 138 __at(0x0D90) volatile __RXF15SIDHbits_t RXF15SIDHbits; 139 140 __at(0x0D91) __sfr RXF15SIDL; 141 __at(0x0D91) volatile __RXF15SIDLbits_t RXF15SIDLbits; 142 143 __at(0x0D92) __sfr RXF15EIDH; 144 __at(0x0D92) volatile __RXF15EIDHbits_t RXF15EIDHbits; 145 146 __at(0x0D93) __sfr RXF15EIDL; 147 __at(0x0D93) volatile __RXF15EIDLbits_t RXF15EIDLbits; 148 149 __at(0x0DD4) __sfr RXFCON0; 150 __at(0x0DD4) volatile __RXFCON0bits_t RXFCON0bits; 151 152 __at(0x0DD5) __sfr RXFCON1; 153 __at(0x0DD5) volatile __RXFCON1bits_t RXFCON1bits; 154 155 __at(0x0DD8) __sfr SDFLC; 156 __at(0x0DD8) volatile __SDFLCbits_t SDFLCbits; 157 158 __at(0x0DE0) __sfr RXFBCON0; 159 __at(0x0DE0) volatile __RXFBCON0bits_t RXFBCON0bits; 160 161 __at(0x0DE1) __sfr RXFBCON1; 162 __at(0x0DE1) volatile __RXFBCON1bits_t RXFBCON1bits; 163 164 __at(0x0DE2) __sfr RXFBCON2; 165 __at(0x0DE2) volatile __RXFBCON2bits_t RXFBCON2bits; 166 167 __at(0x0DE3) __sfr RXFBCON3; 168 __at(0x0DE3) volatile __RXFBCON3bits_t RXFBCON3bits; 169 170 __at(0x0DE4) __sfr RXFBCON4; 171 __at(0x0DE4) volatile __RXFBCON4bits_t RXFBCON4bits; 172 173 __at(0x0DE5) __sfr RXFBCON5; 174 __at(0x0DE5) volatile __RXFBCON5bits_t RXFBCON5bits; 175 176 __at(0x0DE6) __sfr RXFBCON6; 177 __at(0x0DE6) volatile __RXFBCON6bits_t RXFBCON6bits; 178 179 __at(0x0DE7) __sfr RXFBCON7; 180 __at(0x0DE7) volatile __RXFBCON7bits_t RXFBCON7bits; 181 182 __at(0x0DF0) __sfr MSEL0; 183 __at(0x0DF0) volatile __MSEL0bits_t MSEL0bits; 184 185 __at(0x0DF1) __sfr MSEL1; 186 __at(0x0DF1) volatile __MSEL1bits_t MSEL1bits; 187 188 __at(0x0DF2) __sfr MSEL2; 189 __at(0x0DF2) volatile __MSEL2bits_t MSEL2bits; 190 191 __at(0x0DF3) __sfr MSEL3; 192 __at(0x0DF3) volatile __MSEL3bits_t MSEL3bits; 193 194 __at(0x0DF8) __sfr BSEL0; 195 __at(0x0DF8) volatile __BSEL0bits_t BSEL0bits; 196 197 __at(0x0DFA) __sfr BIE0; 198 __at(0x0DFA) volatile __BIE0bits_t BIE0bits; 199 200 __at(0x0DFC) __sfr TXBIE; 201 __at(0x0DFC) volatile __TXBIEbits_t TXBIEbits; 202 203 __at(0x0E20) __sfr B0CON; 204 __at(0x0E20) volatile __B0CONbits_t B0CONbits; 205 206 __at(0x0E21) __sfr B0SIDH; 207 __at(0x0E21) volatile __B0SIDHbits_t B0SIDHbits; 208 209 __at(0x0E22) __sfr B0SIDL; 210 __at(0x0E22) volatile __B0SIDLbits_t B0SIDLbits; 211 212 __at(0x0E23) __sfr B0EIDH; 213 __at(0x0E23) volatile __B0EIDHbits_t B0EIDHbits; 214 215 __at(0x0E24) __sfr B0EIDL; 216 __at(0x0E24) volatile __B0EIDLbits_t B0EIDLbits; 217 218 __at(0x0E25) __sfr B0DLC; 219 __at(0x0E25) volatile __B0DLCbits_t B0DLCbits; 220 221 __at(0x0E26) __sfr B0D0; 222 __at(0x0E26) volatile __B0D0bits_t B0D0bits; 223 224 __at(0x0E27) __sfr B0D1; 225 __at(0x0E27) volatile __B0D1bits_t B0D1bits; 226 227 __at(0x0E28) __sfr B0D2; 228 __at(0x0E28) volatile __B0D2bits_t B0D2bits; 229 230 __at(0x0E29) __sfr B0D3; 231 __at(0x0E29) volatile __B0D3bits_t B0D3bits; 232 233 __at(0x0E2A) __sfr B0D4; 234 __at(0x0E2A) volatile __B0D4bits_t B0D4bits; 235 236 __at(0x0E2B) __sfr B0D5; 237 __at(0x0E2B) volatile __B0D5bits_t B0D5bits; 238 239 __at(0x0E2C) __sfr B0D6; 240 __at(0x0E2C) volatile __B0D6bits_t B0D6bits; 241 242 __at(0x0E2D) __sfr B0D7; 243 __at(0x0E2D) volatile __B0D7bits_t B0D7bits; 244 245 __at(0x0E2E) __sfr CANSTAT_RO9; 246 __at(0x0E2E) volatile __CANSTAT_RO9bits_t CANSTAT_RO9bits; 247 248 __at(0x0E2F) __sfr CANCON_RO9; 249 __at(0x0E2F) volatile __CANCON_RO9bits_t CANCON_RO9bits; 250 251 __at(0x0E30) __sfr B1CON; 252 __at(0x0E30) volatile __B1CONbits_t B1CONbits; 253 254 __at(0x0E31) __sfr B1SIDH; 255 __at(0x0E31) volatile __B1SIDHbits_t B1SIDHbits; 256 257 __at(0x0E32) __sfr B1SIDL; 258 __at(0x0E32) volatile __B1SIDLbits_t B1SIDLbits; 259 260 __at(0x0E33) __sfr B1EIDH; 261 __at(0x0E33) volatile __B1EIDHbits_t B1EIDHbits; 262 263 __at(0x0E34) __sfr B1EIDL; 264 __at(0x0E34) volatile __B1EIDLbits_t B1EIDLbits; 265 266 __at(0x0E35) __sfr B1DLC; 267 __at(0x0E35) volatile __B1DLCbits_t B1DLCbits; 268 269 __at(0x0E36) __sfr B1D0; 270 __at(0x0E36) volatile __B1D0bits_t B1D0bits; 271 272 __at(0x0E37) __sfr B1D1; 273 __at(0x0E37) volatile __B1D1bits_t B1D1bits; 274 275 __at(0x0E38) __sfr B1D2; 276 __at(0x0E38) volatile __B1D2bits_t B1D2bits; 277 278 __at(0x0E39) __sfr B1D3; 279 __at(0x0E39) volatile __B1D3bits_t B1D3bits; 280 281 __at(0x0E3A) __sfr B1D4; 282 __at(0x0E3A) volatile __B1D4bits_t B1D4bits; 283 284 __at(0x0E3B) __sfr B1D5; 285 __at(0x0E3B) volatile __B1D5bits_t B1D5bits; 286 287 __at(0x0E3C) __sfr B1D6; 288 __at(0x0E3C) volatile __B1D6bits_t B1D6bits; 289 290 __at(0x0E3D) __sfr B1D7; 291 __at(0x0E3D) volatile __B1D7bits_t B1D7bits; 292 293 __at(0x0E3E) __sfr CANSTAT_RO8; 294 __at(0x0E3E) volatile __CANSTAT_RO8bits_t CANSTAT_RO8bits; 295 296 __at(0x0E3F) __sfr CANCON_RO8; 297 __at(0x0E3F) volatile __CANCON_RO8bits_t CANCON_RO8bits; 298 299 __at(0x0E40) __sfr B2CON; 300 __at(0x0E40) volatile __B2CONbits_t B2CONbits; 301 302 __at(0x0E41) __sfr B2SIDH; 303 __at(0x0E41) volatile __B2SIDHbits_t B2SIDHbits; 304 305 __at(0x0E42) __sfr B2SIDL; 306 __at(0x0E42) volatile __B2SIDLbits_t B2SIDLbits; 307 308 __at(0x0E43) __sfr B2EIDH; 309 __at(0x0E43) volatile __B2EIDHbits_t B2EIDHbits; 310 311 __at(0x0E44) __sfr B2EIDL; 312 __at(0x0E44) volatile __B2EIDLbits_t B2EIDLbits; 313 314 __at(0x0E45) __sfr B2DLC; 315 __at(0x0E45) volatile __B2DLCbits_t B2DLCbits; 316 317 __at(0x0E46) __sfr B2D0; 318 __at(0x0E46) volatile __B2D0bits_t B2D0bits; 319 320 __at(0x0E47) __sfr B2D1; 321 __at(0x0E47) volatile __B2D1bits_t B2D1bits; 322 323 __at(0x0E48) __sfr B2D2; 324 __at(0x0E48) volatile __B2D2bits_t B2D2bits; 325 326 __at(0x0E49) __sfr B2D3; 327 __at(0x0E49) volatile __B2D3bits_t B2D3bits; 328 329 __at(0x0E4A) __sfr B2D4; 330 __at(0x0E4A) volatile __B2D4bits_t B2D4bits; 331 332 __at(0x0E4B) __sfr B2D5; 333 __at(0x0E4B) volatile __B2D5bits_t B2D5bits; 334 335 __at(0x0E4C) __sfr B2D6; 336 __at(0x0E4C) volatile __B2D6bits_t B2D6bits; 337 338 __at(0x0E4D) __sfr B2D7; 339 __at(0x0E4D) volatile __B2D7bits_t B2D7bits; 340 341 __at(0x0E4E) __sfr CANSTAT_RO7; 342 __at(0x0E4E) volatile __CANSTAT_RO7bits_t CANSTAT_RO7bits; 343 344 __at(0x0E4F) __sfr CANCON_RO7; 345 __at(0x0E4F) volatile __CANCON_RO7bits_t CANCON_RO7bits; 346 347 __at(0x0E50) __sfr B3CON; 348 __at(0x0E50) volatile __B3CONbits_t B3CONbits; 349 350 __at(0x0E51) __sfr B3SIDH; 351 __at(0x0E51) volatile __B3SIDHbits_t B3SIDHbits; 352 353 __at(0x0E52) __sfr B3SIDL; 354 __at(0x0E52) volatile __B3SIDLbits_t B3SIDLbits; 355 356 __at(0x0E53) __sfr B3EIDH; 357 __at(0x0E53) volatile __B3EIDHbits_t B3EIDHbits; 358 359 __at(0x0E54) __sfr B3EIDL; 360 __at(0x0E54) volatile __B3EIDLbits_t B3EIDLbits; 361 362 __at(0x0E55) __sfr B3DLC; 363 __at(0x0E55) volatile __B3DLCbits_t B3DLCbits; 364 365 __at(0x0E56) __sfr B3D0; 366 __at(0x0E56) volatile __B3D0bits_t B3D0bits; 367 368 __at(0x0E57) __sfr B3D1; 369 __at(0x0E57) volatile __B3D1bits_t B3D1bits; 370 371 __at(0x0E58) __sfr B3D2; 372 __at(0x0E58) volatile __B3D2bits_t B3D2bits; 373 374 __at(0x0E59) __sfr B3D3; 375 __at(0x0E59) volatile __B3D3bits_t B3D3bits; 376 377 __at(0x0E5A) __sfr B3D4; 378 __at(0x0E5A) volatile __B3D4bits_t B3D4bits; 379 380 __at(0x0E5B) __sfr B3D5; 381 __at(0x0E5B) volatile __B3D5bits_t B3D5bits; 382 383 __at(0x0E5C) __sfr B3D6; 384 __at(0x0E5C) volatile __B3D6bits_t B3D6bits; 385 386 __at(0x0E5D) __sfr B3D7; 387 __at(0x0E5D) volatile __B3D7bits_t B3D7bits; 388 389 __at(0x0E5E) __sfr CANSTAT_RO6; 390 __at(0x0E5E) volatile __CANSTAT_RO6bits_t CANSTAT_RO6bits; 391 392 __at(0x0E5F) __sfr CANCON_RO6; 393 __at(0x0E5F) volatile __CANCON_RO6bits_t CANCON_RO6bits; 394 395 __at(0x0E60) __sfr B4CON; 396 __at(0x0E60) volatile __B4CONbits_t B4CONbits; 397 398 __at(0x0E61) __sfr B4SIDH; 399 __at(0x0E61) volatile __B4SIDHbits_t B4SIDHbits; 400 401 __at(0x0E62) __sfr B4SIDL; 402 __at(0x0E62) volatile __B4SIDLbits_t B4SIDLbits; 403 404 __at(0x0E63) __sfr B4EIDH; 405 __at(0x0E63) volatile __B4EIDHbits_t B4EIDHbits; 406 407 __at(0x0E64) __sfr B4EIDL; 408 __at(0x0E64) volatile __B4EIDLbits_t B4EIDLbits; 409 410 __at(0x0E65) __sfr B4DLC; 411 __at(0x0E65) volatile __B4DLCbits_t B4DLCbits; 412 413 __at(0x0E66) __sfr B4D0; 414 __at(0x0E66) volatile __B4D0bits_t B4D0bits; 415 416 __at(0x0E67) __sfr B4D1; 417 __at(0x0E67) volatile __B4D1bits_t B4D1bits; 418 419 __at(0x0E68) __sfr B4D2; 420 __at(0x0E68) volatile __B4D2bits_t B4D2bits; 421 422 __at(0x0E69) __sfr B4D3; 423 __at(0x0E69) volatile __B4D3bits_t B4D3bits; 424 425 __at(0x0E6A) __sfr B4D4; 426 __at(0x0E6A) volatile __B4D4bits_t B4D4bits; 427 428 __at(0x0E6B) __sfr B4D5; 429 __at(0x0E6B) volatile __B4D5bits_t B4D5bits; 430 431 __at(0x0E6C) __sfr B4D6; 432 __at(0x0E6C) volatile __B4D6bits_t B4D6bits; 433 434 __at(0x0E6D) __sfr B4D7; 435 __at(0x0E6D) volatile __B4D7bits_t B4D7bits; 436 437 __at(0x0E6E) __sfr CANSTAT_RO5; 438 __at(0x0E6E) volatile __CANSTAT_RO5bits_t CANSTAT_RO5bits; 439 440 __at(0x0E6F) __sfr CANCON_RO5; 441 __at(0x0E6F) volatile __CANCON_RO5bits_t CANCON_RO5bits; 442 443 __at(0x0E70) __sfr B5CON; 444 __at(0x0E70) volatile __B5CONbits_t B5CONbits; 445 446 __at(0x0E71) __sfr B5SIDH; 447 __at(0x0E71) volatile __B5SIDHbits_t B5SIDHbits; 448 449 __at(0x0E72) __sfr B5SIDL; 450 __at(0x0E72) volatile __B5SIDLbits_t B5SIDLbits; 451 452 __at(0x0E73) __sfr B5EIDH; 453 __at(0x0E73) volatile __B5EIDHbits_t B5EIDHbits; 454 455 __at(0x0E74) __sfr B5EIDL; 456 __at(0x0E74) volatile __B5EIDLbits_t B5EIDLbits; 457 458 __at(0x0E75) __sfr B5DLC; 459 __at(0x0E75) volatile __B5DLCbits_t B5DLCbits; 460 461 __at(0x0E76) __sfr B5D0; 462 __at(0x0E76) volatile __B5D0bits_t B5D0bits; 463 464 __at(0x0E77) __sfr B5D1; 465 __at(0x0E77) volatile __B5D1bits_t B5D1bits; 466 467 __at(0x0E78) __sfr B5D2; 468 __at(0x0E78) volatile __B5D2bits_t B5D2bits; 469 470 __at(0x0E79) __sfr B5D3; 471 __at(0x0E79) volatile __B5D3bits_t B5D3bits; 472 473 __at(0x0E7A) __sfr B5D4; 474 __at(0x0E7A) volatile __B5D4bits_t B5D4bits; 475 476 __at(0x0E7B) __sfr B5D5; 477 __at(0x0E7B) volatile __B5D5bits_t B5D5bits; 478 479 __at(0x0E7C) __sfr B5D6; 480 __at(0x0E7C) volatile __B5D6bits_t B5D6bits; 481 482 __at(0x0E7D) __sfr B5D7; 483 __at(0x0E7D) volatile __B5D7bits_t B5D7bits; 484 485 __at(0x0E7E) __sfr CANSTAT_RO4; 486 __at(0x0E7E) volatile __CANSTAT_RO4bits_t CANSTAT_RO4bits; 487 488 __at(0x0E7F) __sfr CANCON_RO4; 489 __at(0x0E7F) volatile __CANCON_RO4bits_t CANCON_RO4bits; 490 491 __at(0x0F00) __sfr RXF0SIDH; 492 __at(0x0F00) volatile __RXF0SIDHbits_t RXF0SIDHbits; 493 494 __at(0x0F01) __sfr RXF0SIDL; 495 __at(0x0F01) volatile __RXF0SIDLbits_t RXF0SIDLbits; 496 497 __at(0x0F02) __sfr RXF0EIDH; 498 __at(0x0F02) volatile __RXF0EIDHbits_t RXF0EIDHbits; 499 500 __at(0x0F03) __sfr RXF0EIDL; 501 __at(0x0F03) volatile __RXF0EIDLbits_t RXF0EIDLbits; 502 503 __at(0x0F04) __sfr RXF1SIDH; 504 __at(0x0F04) volatile __RXF1SIDHbits_t RXF1SIDHbits; 505 506 __at(0x0F05) __sfr RXF1SIDL; 507 __at(0x0F05) volatile __RXF1SIDLbits_t RXF1SIDLbits; 508 509 __at(0x0F06) __sfr RXF1EIDH; 510 __at(0x0F06) volatile __RXF1EIDHbits_t RXF1EIDHbits; 511 512 __at(0x0F07) __sfr RXF1EIDL; 513 __at(0x0F07) volatile __RXF1EIDLbits_t RXF1EIDLbits; 514 515 __at(0x0F08) __sfr RXF2SIDH; 516 __at(0x0F08) volatile __RXF2SIDHbits_t RXF2SIDHbits; 517 518 __at(0x0F09) __sfr RXF2SIDL; 519 __at(0x0F09) volatile __RXF2SIDLbits_t RXF2SIDLbits; 520 521 __at(0x0F0A) __sfr RXF2EIDH; 522 __at(0x0F0A) volatile __RXF2EIDHbits_t RXF2EIDHbits; 523 524 __at(0x0F0B) __sfr RXF2EIDL; 525 __at(0x0F0B) volatile __RXF2EIDLbits_t RXF2EIDLbits; 526 527 __at(0x0F0C) __sfr RXF3SIDH; 528 __at(0x0F0C) volatile __RXF3SIDHbits_t RXF3SIDHbits; 529 530 __at(0x0F0D) __sfr RXF3SIDL; 531 __at(0x0F0D) volatile __RXF3SIDLbits_t RXF3SIDLbits; 532 533 __at(0x0F0E) __sfr RXF3EIDH; 534 __at(0x0F0E) volatile __RXF3EIDHbits_t RXF3EIDHbits; 535 536 __at(0x0F0F) __sfr RXF3EIDL; 537 __at(0x0F0F) volatile __RXF3EIDLbits_t RXF3EIDLbits; 538 539 __at(0x0F10) __sfr RXF4SIDH; 540 __at(0x0F10) volatile __RXF4SIDHbits_t RXF4SIDHbits; 541 542 __at(0x0F11) __sfr RXF4SIDL; 543 __at(0x0F11) volatile __RXF4SIDLbits_t RXF4SIDLbits; 544 545 __at(0x0F12) __sfr RXF4EIDH; 546 __at(0x0F12) volatile __RXF4EIDHbits_t RXF4EIDHbits; 547 548 __at(0x0F13) __sfr RXF4EIDL; 549 __at(0x0F13) volatile __RXF4EIDLbits_t RXF4EIDLbits; 550 551 __at(0x0F14) __sfr RXF5SIDH; 552 __at(0x0F14) volatile __RXF5SIDHbits_t RXF5SIDHbits; 553 554 __at(0x0F15) __sfr RXF5SIDL; 555 __at(0x0F15) volatile __RXF5SIDLbits_t RXF5SIDLbits; 556 557 __at(0x0F16) __sfr RXF5EIDH; 558 __at(0x0F16) volatile __RXF5EIDHbits_t RXF5EIDHbits; 559 560 __at(0x0F17) __sfr RXF5EIDL; 561 __at(0x0F17) volatile __RXF5EIDLbits_t RXF5EIDLbits; 562 563 __at(0x0F18) __sfr RXM0SIDH; 564 __at(0x0F18) volatile __RXM0SIDHbits_t RXM0SIDHbits; 565 566 __at(0x0F19) __sfr RXM0SIDL; 567 __at(0x0F19) volatile __RXM0SIDLbits_t RXM0SIDLbits; 568 569 __at(0x0F1A) __sfr RXM0EIDH; 570 __at(0x0F1A) volatile __RXM0EIDHbits_t RXM0EIDHbits; 571 572 __at(0x0F1B) __sfr RXM0EIDL; 573 __at(0x0F1B) volatile __RXM0EIDLbits_t RXM0EIDLbits; 574 575 __at(0x0F1C) __sfr RXM1SIDH; 576 __at(0x0F1C) volatile __RXM1SIDHbits_t RXM1SIDHbits; 577 578 __at(0x0F1D) __sfr RXM1SIDL; 579 __at(0x0F1D) volatile __RXM1SIDLbits_t RXM1SIDLbits; 580 581 __at(0x0F1E) __sfr RXM1EIDH; 582 __at(0x0F1E) volatile __RXM1EIDHbits_t RXM1EIDHbits; 583 584 __at(0x0F1F) __sfr RXM1EIDL; 585 __at(0x0F1F) volatile __RXM1EIDLbits_t RXM1EIDLbits; 586 587 __at(0x0F20) __sfr TXB2CON; 588 __at(0x0F20) volatile __TXB2CONbits_t TXB2CONbits; 589 590 __at(0x0F21) __sfr TXB2SIDH; 591 __at(0x0F21) volatile __TXB2SIDHbits_t TXB2SIDHbits; 592 593 __at(0x0F22) __sfr TXB2SIDL; 594 __at(0x0F22) volatile __TXB2SIDLbits_t TXB2SIDLbits; 595 596 __at(0x0F23) __sfr TXB2EIDH; 597 __at(0x0F23) volatile __TXB2EIDHbits_t TXB2EIDHbits; 598 599 __at(0x0F24) __sfr TXB2EIDL; 600 __at(0x0F24) volatile __TXB2EIDLbits_t TXB2EIDLbits; 601 602 __at(0x0F25) __sfr TXB2DLC; 603 __at(0x0F25) volatile __TXB2DLCbits_t TXB2DLCbits; 604 605 __at(0x0F26) __sfr TXB2D0; 606 __at(0x0F26) volatile __TXB2D0bits_t TXB2D0bits; 607 608 __at(0x0F27) __sfr TXB2D1; 609 __at(0x0F27) volatile __TXB2D1bits_t TXB2D1bits; 610 611 __at(0x0F28) __sfr TXB2D2; 612 __at(0x0F28) volatile __TXB2D2bits_t TXB2D2bits; 613 614 __at(0x0F29) __sfr TXB2D3; 615 __at(0x0F29) volatile __TXB2D3bits_t TXB2D3bits; 616 617 __at(0x0F2A) __sfr TXB2D4; 618 __at(0x0F2A) volatile __TXB2D4bits_t TXB2D4bits; 619 620 __at(0x0F2B) __sfr TXB2D5; 621 __at(0x0F2B) volatile __TXB2D5bits_t TXB2D5bits; 622 623 __at(0x0F2C) __sfr TXB2D6; 624 __at(0x0F2C) volatile __TXB2D6bits_t TXB2D6bits; 625 626 __at(0x0F2D) __sfr TXB2D7; 627 __at(0x0F2D) volatile __TXB2D7bits_t TXB2D7bits; 628 629 __at(0x0F2E) __sfr CANSTAT_RO3; 630 __at(0x0F2E) volatile __CANSTAT_RO3bits_t CANSTAT_RO3bits; 631 632 __at(0x0F2F) __sfr CANCON_RO3; 633 __at(0x0F2F) volatile __CANCON_RO3bits_t CANCON_RO3bits; 634 635 __at(0x0F30) __sfr TXB1CON; 636 __at(0x0F30) volatile __TXB1CONbits_t TXB1CONbits; 637 638 __at(0x0F31) __sfr TXB1SIDH; 639 __at(0x0F31) volatile __TXB1SIDHbits_t TXB1SIDHbits; 640 641 __at(0x0F32) __sfr TXB1SIDL; 642 __at(0x0F32) volatile __TXB1SIDLbits_t TXB1SIDLbits; 643 644 __at(0x0F33) __sfr TXB1EIDH; 645 __at(0x0F33) volatile __TXB1EIDHbits_t TXB1EIDHbits; 646 647 __at(0x0F34) __sfr TXB1EIDL; 648 __at(0x0F34) volatile __TXB1EIDLbits_t TXB1EIDLbits; 649 650 __at(0x0F35) __sfr TXB1DLC; 651 __at(0x0F35) volatile __TXB1DLCbits_t TXB1DLCbits; 652 653 __at(0x0F36) __sfr TXB1D0; 654 __at(0x0F36) volatile __TXB1D0bits_t TXB1D0bits; 655 656 __at(0x0F37) __sfr TXB1D1; 657 __at(0x0F37) volatile __TXB1D1bits_t TXB1D1bits; 658 659 __at(0x0F38) __sfr TXB1D2; 660 __at(0x0F38) volatile __TXB1D2bits_t TXB1D2bits; 661 662 __at(0x0F39) __sfr TXB1D3; 663 __at(0x0F39) volatile __TXB1D3bits_t TXB1D3bits; 664 665 __at(0x0F3A) __sfr TXB1D4; 666 __at(0x0F3A) volatile __TXB1D4bits_t TXB1D4bits; 667 668 __at(0x0F3B) __sfr TXB1D5; 669 __at(0x0F3B) volatile __TXB1D5bits_t TXB1D5bits; 670 671 __at(0x0F3C) __sfr TXB1D6; 672 __at(0x0F3C) volatile __TXB1D6bits_t TXB1D6bits; 673 674 __at(0x0F3D) __sfr TXB1D7; 675 __at(0x0F3D) volatile __TXB1D7bits_t TXB1D7bits; 676 677 __at(0x0F3E) __sfr CANSTAT_RO2; 678 __at(0x0F3E) volatile __CANSTAT_RO2bits_t CANSTAT_RO2bits; 679 680 __at(0x0F3F) __sfr CANCON_RO2; 681 __at(0x0F3F) volatile __CANCON_RO2bits_t CANCON_RO2bits; 682 683 __at(0x0F40) __sfr TXB0CON; 684 __at(0x0F40) volatile __TXB0CONbits_t TXB0CONbits; 685 686 __at(0x0F41) __sfr TXB0SIDH; 687 __at(0x0F41) volatile __TXB0SIDHbits_t TXB0SIDHbits; 688 689 __at(0x0F42) __sfr TXB0SIDL; 690 __at(0x0F42) volatile __TXB0SIDLbits_t TXB0SIDLbits; 691 692 __at(0x0F43) __sfr TXB0EIDH; 693 __at(0x0F43) volatile __TXB0EIDHbits_t TXB0EIDHbits; 694 695 __at(0x0F44) __sfr TXB0EIDL; 696 __at(0x0F44) volatile __TXB0EIDLbits_t TXB0EIDLbits; 697 698 __at(0x0F45) __sfr TXB0DLC; 699 __at(0x0F45) volatile __TXB0DLCbits_t TXB0DLCbits; 700 701 __at(0x0F46) __sfr TXB0D0; 702 __at(0x0F46) volatile __TXB0D0bits_t TXB0D0bits; 703 704 __at(0x0F47) __sfr TXB0D1; 705 __at(0x0F47) volatile __TXB0D1bits_t TXB0D1bits; 706 707 __at(0x0F48) __sfr TXB0D2; 708 __at(0x0F48) volatile __TXB0D2bits_t TXB0D2bits; 709 710 __at(0x0F49) __sfr TXB0D3; 711 __at(0x0F49) volatile __TXB0D3bits_t TXB0D3bits; 712 713 __at(0x0F4A) __sfr TXB0D4; 714 __at(0x0F4A) volatile __TXB0D4bits_t TXB0D4bits; 715 716 __at(0x0F4B) __sfr TXB0D5; 717 __at(0x0F4B) volatile __TXB0D5bits_t TXB0D5bits; 718 719 __at(0x0F4C) __sfr TXB0D6; 720 __at(0x0F4C) volatile __TXB0D6bits_t TXB0D6bits; 721 722 __at(0x0F4D) __sfr TXB0D7; 723 __at(0x0F4D) volatile __TXB0D7bits_t TXB0D7bits; 724 725 __at(0x0F4E) __sfr CANSTAT_RO1; 726 __at(0x0F4E) volatile __CANSTAT_RO1bits_t CANSTAT_RO1bits; 727 728 __at(0x0F4F) __sfr CANCON_RO1; 729 __at(0x0F4F) volatile __CANCON_RO1bits_t CANCON_RO1bits; 730 731 __at(0x0F50) __sfr RXB1CON; 732 __at(0x0F50) volatile __RXB1CONbits_t RXB1CONbits; 733 734 __at(0x0F51) __sfr RXB1SIDH; 735 __at(0x0F51) volatile __RXB1SIDHbits_t RXB1SIDHbits; 736 737 __at(0x0F52) __sfr RXB1SIDL; 738 __at(0x0F52) volatile __RXB1SIDLbits_t RXB1SIDLbits; 739 740 __at(0x0F53) __sfr RXB1EIDH; 741 __at(0x0F53) volatile __RXB1EIDHbits_t RXB1EIDHbits; 742 743 __at(0x0F54) __sfr RXB1EIDL; 744 __at(0x0F54) volatile __RXB1EIDLbits_t RXB1EIDLbits; 745 746 __at(0x0F55) __sfr RXB1DLC; 747 __at(0x0F55) volatile __RXB1DLCbits_t RXB1DLCbits; 748 749 __at(0x0F56) __sfr RXB1D0; 750 __at(0x0F56) volatile __RXB1D0bits_t RXB1D0bits; 751 752 __at(0x0F57) __sfr RXB1D1; 753 __at(0x0F57) volatile __RXB1D1bits_t RXB1D1bits; 754 755 __at(0x0F58) __sfr RXB1D2; 756 __at(0x0F58) volatile __RXB1D2bits_t RXB1D2bits; 757 758 __at(0x0F59) __sfr RXB1D3; 759 __at(0x0F59) volatile __RXB1D3bits_t RXB1D3bits; 760 761 __at(0x0F5A) __sfr RXB1D4; 762 __at(0x0F5A) volatile __RXB1D4bits_t RXB1D4bits; 763 764 __at(0x0F5B) __sfr RXB1D5; 765 __at(0x0F5B) volatile __RXB1D5bits_t RXB1D5bits; 766 767 __at(0x0F5C) __sfr RXB1D6; 768 __at(0x0F5C) volatile __RXB1D6bits_t RXB1D6bits; 769 770 __at(0x0F5D) __sfr RXB1D7; 771 __at(0x0F5D) volatile __RXB1D7bits_t RXB1D7bits; 772 773 __at(0x0F5E) __sfr CANSTAT_RO0; 774 __at(0x0F5E) volatile __CANSTAT_RO0bits_t CANSTAT_RO0bits; 775 776 __at(0x0F5F) __sfr CANCON_RO0; 777 __at(0x0F5F) volatile __CANCON_RO0bits_t CANCON_RO0bits; 778 779 __at(0x0F60) __sfr RXB0CON; 780 __at(0x0F60) volatile __RXB0CONbits_t RXB0CONbits; 781 782 __at(0x0F61) __sfr RXB0SIDH; 783 __at(0x0F61) volatile __RXB0SIDHbits_t RXB0SIDHbits; 784 785 __at(0x0F62) __sfr RXB0SIDL; 786 __at(0x0F62) volatile __RXB0SIDLbits_t RXB0SIDLbits; 787 788 __at(0x0F63) __sfr RXB0EIDH; 789 __at(0x0F63) volatile __RXB0EIDHbits_t RXB0EIDHbits; 790 791 __at(0x0F64) __sfr RXB0EIDL; 792 __at(0x0F64) volatile __RXB0EIDLbits_t RXB0EIDLbits; 793 794 __at(0x0F65) __sfr RXB0DLC; 795 __at(0x0F65) volatile __RXB0DLCbits_t RXB0DLCbits; 796 797 __at(0x0F66) __sfr RXB0D0; 798 __at(0x0F66) volatile __RXB0D0bits_t RXB0D0bits; 799 800 __at(0x0F67) __sfr RXB0D1; 801 __at(0x0F67) volatile __RXB0D1bits_t RXB0D1bits; 802 803 __at(0x0F68) __sfr RXB0D2; 804 __at(0x0F68) volatile __RXB0D2bits_t RXB0D2bits; 805 806 __at(0x0F69) __sfr RXB0D3; 807 __at(0x0F69) volatile __RXB0D3bits_t RXB0D3bits; 808 809 __at(0x0F6A) __sfr RXB0D4; 810 __at(0x0F6A) volatile __RXB0D4bits_t RXB0D4bits; 811 812 __at(0x0F6B) __sfr RXB0D5; 813 __at(0x0F6B) volatile __RXB0D5bits_t RXB0D5bits; 814 815 __at(0x0F6C) __sfr RXB0D6; 816 __at(0x0F6C) volatile __RXB0D6bits_t RXB0D6bits; 817 818 __at(0x0F6D) __sfr RXB0D7; 819 __at(0x0F6D) volatile __RXB0D7bits_t RXB0D7bits; 820 821 __at(0x0F6E) __sfr CANSTAT; 822 __at(0x0F6E) volatile __CANSTATbits_t CANSTATbits; 823 824 __at(0x0F6F) __sfr CANCON; 825 __at(0x0F6F) volatile __CANCONbits_t CANCONbits; 826 827 __at(0x0F70) __sfr BRGCON1; 828 __at(0x0F70) volatile __BRGCON1bits_t BRGCON1bits; 829 830 __at(0x0F71) __sfr BRGCON2; 831 __at(0x0F71) volatile __BRGCON2bits_t BRGCON2bits; 832 833 __at(0x0F72) __sfr BRGCON3; 834 __at(0x0F72) volatile __BRGCON3bits_t BRGCON3bits; 835 836 __at(0x0F73) __sfr CIOCON; 837 __at(0x0F73) volatile __CIOCONbits_t CIOCONbits; 838 839 __at(0x0F74) __sfr COMSTAT; 840 __at(0x0F74) volatile __COMSTATbits_t COMSTATbits; 841 842 __at(0x0F75) __sfr RXERRCNT; 843 __at(0x0F75) volatile __RXERRCNTbits_t RXERRCNTbits; 844 845 __at(0x0F76) __sfr TXERRCNT; 846 __at(0x0F76) volatile __TXERRCNTbits_t TXERRCNTbits; 847 848 __at(0x0F77) __sfr ECANCON; 849 __at(0x0F77) volatile __ECANCONbits_t ECANCONbits; 850 851 __at(0x0F80) __sfr PORTA; 852 __at(0x0F80) volatile __PORTAbits_t PORTAbits; 853 854 __at(0x0F81) __sfr PORTB; 855 __at(0x0F81) volatile __PORTBbits_t PORTBbits; 856 857 __at(0x0F82) __sfr PORTC; 858 __at(0x0F82) volatile __PORTCbits_t PORTCbits; 859 860 __at(0x0F83) __sfr PORTD; 861 __at(0x0F83) volatile __PORTDbits_t PORTDbits; 862 863 __at(0x0F84) __sfr PORTE; 864 __at(0x0F84) volatile __PORTEbits_t PORTEbits; 865 866 __at(0x0F89) __sfr LATA; 867 __at(0x0F89) volatile __LATAbits_t LATAbits; 868 869 __at(0x0F8A) __sfr LATB; 870 __at(0x0F8A) volatile __LATBbits_t LATBbits; 871 872 __at(0x0F8B) __sfr LATC; 873 __at(0x0F8B) volatile __LATCbits_t LATCbits; 874 875 __at(0x0F8C) __sfr LATD; 876 __at(0x0F8C) volatile __LATDbits_t LATDbits; 877 878 __at(0x0F8D) __sfr LATE; 879 __at(0x0F8D) volatile __LATEbits_t LATEbits; 880 881 __at(0x0F92) __sfr DDRA; 882 __at(0x0F92) volatile __DDRAbits_t DDRAbits; 883 884 __at(0x0F92) __sfr TRISA; 885 __at(0x0F92) volatile __TRISAbits_t TRISAbits; 886 887 __at(0x0F93) __sfr DDRB; 888 __at(0x0F93) volatile __DDRBbits_t DDRBbits; 889 890 __at(0x0F93) __sfr TRISB; 891 __at(0x0F93) volatile __TRISBbits_t TRISBbits; 892 893 __at(0x0F94) __sfr DDRC; 894 __at(0x0F94) volatile __DDRCbits_t DDRCbits; 895 896 __at(0x0F94) __sfr TRISC; 897 __at(0x0F94) volatile __TRISCbits_t TRISCbits; 898 899 __at(0x0F95) __sfr DDRD; 900 __at(0x0F95) volatile __DDRDbits_t DDRDbits; 901 902 __at(0x0F95) __sfr TRISD; 903 __at(0x0F95) volatile __TRISDbits_t TRISDbits; 904 905 __at(0x0F96) __sfr DDRE; 906 __at(0x0F96) volatile __DDREbits_t DDREbits; 907 908 __at(0x0F96) __sfr TRISE; 909 __at(0x0F96) volatile __TRISEbits_t TRISEbits; 910 911 __at(0x0F9B) __sfr OSCTUNE; 912 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits; 913 914 __at(0x0F9D) __sfr PIE1; 915 __at(0x0F9D) volatile __PIE1bits_t PIE1bits; 916 917 __at(0x0F9E) __sfr PIR1; 918 __at(0x0F9E) volatile __PIR1bits_t PIR1bits; 919 920 __at(0x0F9F) __sfr IPR1; 921 __at(0x0F9F) volatile __IPR1bits_t IPR1bits; 922 923 __at(0x0FA0) __sfr PIE2; 924 __at(0x0FA0) volatile __PIE2bits_t PIE2bits; 925 926 __at(0x0FA1) __sfr PIR2; 927 __at(0x0FA1) volatile __PIR2bits_t PIR2bits; 928 929 __at(0x0FA2) __sfr IPR2; 930 __at(0x0FA2) volatile __IPR2bits_t IPR2bits; 931 932 __at(0x0FA3) __sfr PIE3; 933 __at(0x0FA3) volatile __PIE3bits_t PIE3bits; 934 935 __at(0x0FA4) __sfr PIR3; 936 __at(0x0FA4) volatile __PIR3bits_t PIR3bits; 937 938 __at(0x0FA5) __sfr IPR3; 939 __at(0x0FA5) volatile __IPR3bits_t IPR3bits; 940 941 __at(0x0FA6) __sfr EECON1; 942 __at(0x0FA6) volatile __EECON1bits_t EECON1bits; 943 944 __at(0x0FA7) __sfr EECON2; 945 946 __at(0x0FA8) __sfr EEDATA; 947 948 __at(0x0FA9) __sfr EEADR; 949 950 __at(0x0FAA) __sfr EEADRH; 951 952 __at(0x0FAB) __sfr RCSTA; 953 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits; 954 955 __at(0x0FAC) __sfr TXSTA; 956 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits; 957 958 __at(0x0FAD) __sfr TXREG; 959 960 __at(0x0FAE) __sfr RCREG; 961 962 __at(0x0FAF) __sfr SPBRG; 963 964 __at(0x0FB0) __sfr SPBRGH; 965 966 __at(0x0FB1) __sfr T3CON; 967 __at(0x0FB1) volatile __T3CONbits_t T3CONbits; 968 969 __at(0x0FB2) __sfr TMR3; 970 971 __at(0x0FB2) __sfr TMR3L; 972 973 __at(0x0FB3) __sfr TMR3H; 974 975 __at(0x0FB4) __sfr CMCON; 976 __at(0x0FB4) volatile __CMCONbits_t CMCONbits; 977 978 __at(0x0FB5) __sfr CVRCON; 979 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits; 980 981 __at(0x0FB6) __sfr ECCP1AS; 982 __at(0x0FB6) volatile __ECCP1ASbits_t ECCP1ASbits; 983 984 __at(0x0FB7) __sfr ECCP1DEL; 985 __at(0x0FB7) volatile __ECCP1DELbits_t ECCP1DELbits; 986 987 __at(0x0FB8) __sfr BAUDCON; 988 __at(0x0FB8) volatile __BAUDCONbits_t BAUDCONbits; 989 990 __at(0x0FB8) __sfr BAUDCTL; 991 __at(0x0FB8) volatile __BAUDCTLbits_t BAUDCTLbits; 992 993 __at(0x0FBA) __sfr ECCP1CON; 994 __at(0x0FBA) volatile __ECCP1CONbits_t ECCP1CONbits; 995 996 __at(0x0FBB) __sfr ECCPR1; 997 998 __at(0x0FBB) __sfr ECCPR1L; 999 1000 __at(0x0FBC) __sfr ECCPR1H; 1001 1002 __at(0x0FBD) __sfr CCP1CON; 1003 __at(0x0FBD) volatile __CCP1CONbits_t CCP1CONbits; 1004 1005 __at(0x0FBE) __sfr CCPR1; 1006 1007 __at(0x0FBE) __sfr CCPR1L; 1008 1009 __at(0x0FBF) __sfr CCPR1H; 1010 1011 __at(0x0FC0) __sfr ADCON2; 1012 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits; 1013 1014 __at(0x0FC1) __sfr ADCON1; 1015 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits; 1016 1017 __at(0x0FC2) __sfr ADCON0; 1018 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits; 1019 1020 __at(0x0FC3) __sfr ADRES; 1021 1022 __at(0x0FC3) __sfr ADRESL; 1023 1024 __at(0x0FC4) __sfr ADRESH; 1025 1026 __at(0x0FC5) __sfr SSPCON2; 1027 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits; 1028 1029 __at(0x0FC6) __sfr SSPCON1; 1030 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits; 1031 1032 __at(0x0FC7) __sfr SSPSTAT; 1033 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits; 1034 1035 __at(0x0FC8) __sfr SSPADD; 1036 1037 __at(0x0FC9) __sfr SSPBUF; 1038 1039 __at(0x0FCA) __sfr T2CON; 1040 __at(0x0FCA) volatile __T2CONbits_t T2CONbits; 1041 1042 __at(0x0FCB) __sfr PR2; 1043 1044 __at(0x0FCC) __sfr TMR2; 1045 1046 __at(0x0FCD) __sfr T1CON; 1047 __at(0x0FCD) volatile __T1CONbits_t T1CONbits; 1048 1049 __at(0x0FCE) __sfr TMR1; 1050 1051 __at(0x0FCE) __sfr TMR1L; 1052 1053 __at(0x0FCF) __sfr TMR1H; 1054 1055 __at(0x0FD0) __sfr RCON; 1056 __at(0x0FD0) volatile __RCONbits_t RCONbits; 1057 1058 __at(0x0FD1) __sfr WDTCON; 1059 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits; 1060 1061 __at(0x0FD2) __sfr HLVDCON; 1062 __at(0x0FD2) volatile __HLVDCONbits_t HLVDCONbits; 1063 1064 __at(0x0FD2) __sfr LVDCON; 1065 __at(0x0FD2) volatile __LVDCONbits_t LVDCONbits; 1066 1067 __at(0x0FD3) __sfr OSCCON; 1068 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits; 1069 1070 __at(0x0FD5) __sfr T0CON; 1071 __at(0x0FD5) volatile __T0CONbits_t T0CONbits; 1072 1073 __at(0x0FD6) __sfr TMR0; 1074 1075 __at(0x0FD6) __sfr TMR0L; 1076 1077 __at(0x0FD7) __sfr TMR0H; 1078 1079 __at(0x0FD8) __sfr STATUS; 1080 __at(0x0FD8) volatile __STATUSbits_t STATUSbits; 1081 1082 __at(0x0FD9) __sfr FSR2L; 1083 1084 __at(0x0FDA) __sfr FSR2H; 1085 1086 __at(0x0FDB) __sfr PLUSW2; 1087 1088 __at(0x0FDC) __sfr PREINC2; 1089 1090 __at(0x0FDD) __sfr POSTDEC2; 1091 1092 __at(0x0FDE) __sfr POSTINC2; 1093 1094 __at(0x0FDF) __sfr INDF2; 1095 1096 __at(0x0FE0) __sfr BSR; 1097 1098 __at(0x0FE1) __sfr FSR1L; 1099 1100 __at(0x0FE2) __sfr FSR1H; 1101 1102 __at(0x0FE3) __sfr PLUSW1; 1103 1104 __at(0x0FE4) __sfr PREINC1; 1105 1106 __at(0x0FE5) __sfr POSTDEC1; 1107 1108 __at(0x0FE6) __sfr POSTINC1; 1109 1110 __at(0x0FE7) __sfr INDF1; 1111 1112 __at(0x0FE8) __sfr WREG; 1113 1114 __at(0x0FE9) __sfr FSR0L; 1115 1116 __at(0x0FEA) __sfr FSR0H; 1117 1118 __at(0x0FEB) __sfr PLUSW0; 1119 1120 __at(0x0FEC) __sfr PREINC0; 1121 1122 __at(0x0FED) __sfr POSTDEC0; 1123 1124 __at(0x0FEE) __sfr POSTINC0; 1125 1126 __at(0x0FEF) __sfr INDF0; 1127 1128 __at(0x0FF0) __sfr INTCON3; 1129 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits; 1130 1131 __at(0x0FF1) __sfr INTCON2; 1132 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits; 1133 1134 __at(0x0FF2) __sfr INTCON; 1135 __at(0x0FF2) volatile __INTCONbits_t INTCONbits; 1136 1137 __at(0x0FF3) __sfr PROD; 1138 1139 __at(0x0FF3) __sfr PRODL; 1140 1141 __at(0x0FF4) __sfr PRODH; 1142 1143 __at(0x0FF5) __sfr TABLAT; 1144 1145 __at(0x0FF6) __sfr TBLPTR; 1146 1147 __at(0x0FF6) __sfr TBLPTRL; 1148 1149 __at(0x0FF7) __sfr TBLPTRH; 1150 1151 __at(0x0FF8) __sfr TBLPTRU; 1152 1153 __at(0x0FF9) __sfr PC; 1154 1155 __at(0x0FF9) __sfr PCL; 1156 1157 __at(0x0FFA) __sfr PCLATH; 1158 1159 __at(0x0FFB) __sfr PCLATU; 1160 1161 __at(0x0FFC) __sfr STKPTR; 1162 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits; 1163 1164 __at(0x0FFD) __sfr TOS; 1165 1166 __at(0x0FFD) __sfr TOSL; 1167 1168 __at(0x0FFE) __sfr TOSH; 1169 1170 __at(0x0FFF) __sfr TOSU; 1171