1 /*
2  * This definitions of the PIC18F64J90 MCU.
3  *
4  * This file is part of the GNU PIC library for SDCC, originally
5  * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016.
6  *
7  * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:23:31 UTC.
8  *
9  * SDCC is licensed under the GNU Public license (GPL) v2. Note that
10  * this license covers the code to the compiler and other executables,
11  * but explicitly does not cover any code or objects generated by sdcc.
12  *
13  * For pic device libraries and header files which are derived from
14  * Microchip header (.inc) and linker script (.lkr) files Microchip
15  * requires that "The header files should state that they are only to be
16  * used with authentic Microchip devices" which makes them incompatible
17  * with the GPL. Pic device libraries and header files are located at
18  * non-free/lib and non-free/include directories respectively.
19  * Sdcc should be run with the --use-non-free command line option in
20  * order to include non-free header files and libraries.
21  *
22  * See http://sdcc.sourceforge.net/ for the latest information on sdcc.
23  */
24 
25 #include <pic18f64j90.h>
26 
27 //==============================================================================
28 
29 __at(0x0F60) __sfr RCSTA2;
30 __at(0x0F60) volatile __RCSTA2bits_t RCSTA2bits;
31 
32 __at(0x0F61) __sfr TXSTA2;
33 __at(0x0F61) volatile __TXSTA2bits_t TXSTA2bits;
34 
35 __at(0x0F62) __sfr TXREG2;
36 
37 __at(0x0F63) __sfr RCREG2;
38 
39 __at(0x0F64) __sfr SPBRG2;
40 
41 __at(0x0F65) __sfr CCP2CON;
42 __at(0x0F65) volatile __CCP2CONbits_t CCP2CONbits;
43 
44 __at(0x0F66) __sfr CCPR2;
45 
46 __at(0x0F66) __sfr CCPR2L;
47 
48 __at(0x0F67) __sfr CCPR2H;
49 
50 __at(0x0F68) __sfr CCP1CON;
51 __at(0x0F68) volatile __CCP1CONbits_t CCP1CONbits;
52 
53 __at(0x0F69) __sfr CCPR1;
54 
55 __at(0x0F69) __sfr CCPR1L;
56 
57 __at(0x0F6A) __sfr CCPR1H;
58 
59 __at(0x0F6C) __sfr LCDDATA6;
60 __at(0x0F6C) volatile __LCDDATA6bits_t LCDDATA6bits;
61 
62 __at(0x0F6D) __sfr LCDDATA7;
63 __at(0x0F6D) volatile __LCDDATA7bits_t LCDDATA7bits;
64 
65 __at(0x0F6E) __sfr LCDDATA8;
66 __at(0x0F6E) volatile __LCDDATA8bits_t LCDDATA8bits;
67 
68 __at(0x0F6F) __sfr LCDDATA9;
69 __at(0x0F6F) volatile __LCDDATA9bits_t LCDDATA9bits;
70 
71 __at(0x0F70) __sfr LCDDATA10;
72 __at(0x0F70) volatile __LCDDATA10bits_t LCDDATA10bits;
73 
74 __at(0x0F72) __sfr LCDDATA12;
75 __at(0x0F72) volatile __LCDDATA12bits_t LCDDATA12bits;
76 
77 __at(0x0F73) __sfr LCDDATA13;
78 __at(0x0F73) volatile __LCDDATA13bits_t LCDDATA13bits;
79 
80 __at(0x0F74) __sfr LCDDATA14;
81 __at(0x0F74) volatile __LCDDATA14bits_t LCDDATA14bits;
82 
83 __at(0x0F75) __sfr LCDDATA15;
84 __at(0x0F75) volatile __LCDDATA15bits_t LCDDATA15bits;
85 
86 __at(0x0F76) __sfr LCDDATA16;
87 __at(0x0F76) volatile __LCDDATA16bits_t LCDDATA16bits;
88 
89 __at(0x0F78) __sfr LCDDATA18;
90 __at(0x0F78) volatile __LCDDATA18bits_t LCDDATA18bits;
91 
92 __at(0x0F79) __sfr LCDDATA19;
93 __at(0x0F79) volatile __LCDDATA19bits_t LCDDATA19bits;
94 
95 __at(0x0F7A) __sfr LCDDATA20;
96 __at(0x0F7A) volatile __LCDDATA20bits_t LCDDATA20bits;
97 
98 __at(0x0F7B) __sfr LCDDATA21;
99 __at(0x0F7B) volatile __LCDDATA21bits_t LCDDATA21bits;
100 
101 __at(0x0F7C) __sfr LCDDATA22;
102 __at(0x0F7C) volatile __LCDDATA22bits_t LCDDATA22bits;
103 
104 __at(0x0F7E) __sfr BAUDCON1;
105 __at(0x0F7E) volatile __BAUDCON1bits_t BAUDCON1bits;
106 
107 __at(0x0F7F) __sfr SPBRGH1;
108 
109 __at(0x0F80) __sfr PORTA;
110 __at(0x0F80) volatile __PORTAbits_t PORTAbits;
111 
112 __at(0x0F81) __sfr PORTB;
113 __at(0x0F81) volatile __PORTBbits_t PORTBbits;
114 
115 __at(0x0F82) __sfr PORTC;
116 __at(0x0F82) volatile __PORTCbits_t PORTCbits;
117 
118 __at(0x0F83) __sfr PORTD;
119 __at(0x0F83) volatile __PORTDbits_t PORTDbits;
120 
121 __at(0x0F84) __sfr PORTE;
122 __at(0x0F84) volatile __PORTEbits_t PORTEbits;
123 
124 __at(0x0F85) __sfr PORTF;
125 __at(0x0F85) volatile __PORTFbits_t PORTFbits;
126 
127 __at(0x0F86) __sfr PORTG;
128 __at(0x0F86) volatile __PORTGbits_t PORTGbits;
129 
130 __at(0x0F89) __sfr LATA;
131 __at(0x0F89) volatile __LATAbits_t LATAbits;
132 
133 __at(0x0F8A) __sfr LATB;
134 __at(0x0F8A) volatile __LATBbits_t LATBbits;
135 
136 __at(0x0F8B) __sfr LATC;
137 __at(0x0F8B) volatile __LATCbits_t LATCbits;
138 
139 __at(0x0F8C) __sfr LATD;
140 __at(0x0F8C) volatile __LATDbits_t LATDbits;
141 
142 __at(0x0F8D) __sfr LATE;
143 __at(0x0F8D) volatile __LATEbits_t LATEbits;
144 
145 __at(0x0F8E) __sfr LATF;
146 __at(0x0F8E) volatile __LATFbits_t LATFbits;
147 
148 __at(0x0F8F) __sfr LATG;
149 __at(0x0F8F) volatile __LATGbits_t LATGbits;
150 
151 __at(0x0F92) __sfr DDRA;
152 __at(0x0F92) volatile __DDRAbits_t DDRAbits;
153 
154 __at(0x0F92) __sfr TRISA;
155 __at(0x0F92) volatile __TRISAbits_t TRISAbits;
156 
157 __at(0x0F93) __sfr DDRB;
158 __at(0x0F93) volatile __DDRBbits_t DDRBbits;
159 
160 __at(0x0F93) __sfr TRISB;
161 __at(0x0F93) volatile __TRISBbits_t TRISBbits;
162 
163 __at(0x0F94) __sfr DDRC;
164 __at(0x0F94) volatile __DDRCbits_t DDRCbits;
165 
166 __at(0x0F94) __sfr TRISC;
167 __at(0x0F94) volatile __TRISCbits_t TRISCbits;
168 
169 __at(0x0F95) __sfr DDRD;
170 __at(0x0F95) volatile __DDRDbits_t DDRDbits;
171 
172 __at(0x0F95) __sfr TRISD;
173 __at(0x0F95) volatile __TRISDbits_t TRISDbits;
174 
175 __at(0x0F96) __sfr DDRE;
176 __at(0x0F96) volatile __DDREbits_t DDREbits;
177 
178 __at(0x0F96) __sfr TRISE;
179 __at(0x0F96) volatile __TRISEbits_t TRISEbits;
180 
181 __at(0x0F97) __sfr DDRF;
182 __at(0x0F97) volatile __DDRFbits_t DDRFbits;
183 
184 __at(0x0F97) __sfr TRISF;
185 __at(0x0F97) volatile __TRISFbits_t TRISFbits;
186 
187 __at(0x0F98) __sfr DDRG;
188 __at(0x0F98) volatile __DDRGbits_t DDRGbits;
189 
190 __at(0x0F98) __sfr TRISG;
191 __at(0x0F98) volatile __TRISGbits_t TRISGbits;
192 
193 __at(0x0F9B) __sfr OSCTUNE;
194 __at(0x0F9B) volatile __OSCTUNEbits_t OSCTUNEbits;
195 
196 __at(0x0F9D) __sfr PIE1;
197 __at(0x0F9D) volatile __PIE1bits_t PIE1bits;
198 
199 __at(0x0F9E) __sfr PIR1;
200 __at(0x0F9E) volatile __PIR1bits_t PIR1bits;
201 
202 __at(0x0F9F) __sfr IPR1;
203 __at(0x0F9F) volatile __IPR1bits_t IPR1bits;
204 
205 __at(0x0FA0) __sfr PIE2;
206 __at(0x0FA0) volatile __PIE2bits_t PIE2bits;
207 
208 __at(0x0FA1) __sfr PIR2;
209 __at(0x0FA1) volatile __PIR2bits_t PIR2bits;
210 
211 __at(0x0FA2) __sfr IPR2;
212 __at(0x0FA2) volatile __IPR2bits_t IPR2bits;
213 
214 __at(0x0FA3) __sfr PIE3;
215 __at(0x0FA3) volatile __PIE3bits_t PIE3bits;
216 
217 __at(0x0FA4) __sfr PIR3;
218 __at(0x0FA4) volatile __PIR3bits_t PIR3bits;
219 
220 __at(0x0FA5) __sfr IPR3;
221 __at(0x0FA5) volatile __IPR3bits_t IPR3bits;
222 
223 __at(0x0FA6) __sfr EECON1;
224 __at(0x0FA6) volatile __EECON1bits_t EECON1bits;
225 
226 __at(0x0FA7) __sfr EECON2;
227 
228 __at(0x0FA8) __sfr LCDCON;
229 __at(0x0FA8) volatile __LCDCONbits_t LCDCONbits;
230 
231 __at(0x0FA9) __sfr LCDSE0;
232 __at(0x0FA9) volatile __LCDSE0bits_t LCDSE0bits;
233 
234 __at(0x0FAA) __sfr LCDPS;
235 __at(0x0FAA) volatile __LCDPSbits_t LCDPSbits;
236 
237 __at(0x0FAB) __sfr RCSTA;
238 __at(0x0FAB) volatile __RCSTAbits_t RCSTAbits;
239 
240 __at(0x0FAB) __sfr RCSTA1;
241 __at(0x0FAB) volatile __RCSTA1bits_t RCSTA1bits;
242 
243 __at(0x0FAC) __sfr TXSTA;
244 __at(0x0FAC) volatile __TXSTAbits_t TXSTAbits;
245 
246 __at(0x0FAC) __sfr TXSTA1;
247 __at(0x0FAC) volatile __TXSTA1bits_t TXSTA1bits;
248 
249 __at(0x0FAD) __sfr TXREG;
250 
251 __at(0x0FAD) __sfr TXREG1;
252 
253 __at(0x0FAE) __sfr RCREG;
254 
255 __at(0x0FAE) __sfr RCREG1;
256 
257 __at(0x0FAF) __sfr SPBRG;
258 
259 __at(0x0FAF) __sfr SPBRG1;
260 
261 __at(0x0FB1) __sfr T3CON;
262 __at(0x0FB1) volatile __T3CONbits_t T3CONbits;
263 
264 __at(0x0FB2) __sfr TMR3;
265 
266 __at(0x0FB2) __sfr TMR3L;
267 
268 __at(0x0FB3) __sfr TMR3H;
269 
270 __at(0x0FB4) __sfr CMCON;
271 __at(0x0FB4) volatile __CMCONbits_t CMCONbits;
272 
273 __at(0x0FB5) __sfr CVRCON;
274 __at(0x0FB5) volatile __CVRCONbits_t CVRCONbits;
275 
276 __at(0x0FB6) __sfr LCDSE1;
277 __at(0x0FB6) volatile __LCDSE1bits_t LCDSE1bits;
278 
279 __at(0x0FB7) __sfr LCDSE2;
280 __at(0x0FB7) volatile __LCDSE2bits_t LCDSE2bits;
281 
282 __at(0x0FB8) __sfr LCDSE3;
283 __at(0x0FB8) volatile __LCDSE3bits_t LCDSE3bits;
284 
285 __at(0x0FB9) __sfr LCDSE4;
286 __at(0x0FB9) volatile __LCDSE4bits_t LCDSE4bits;
287 
288 __at(0x0FBB) __sfr LCDDATA0;
289 __at(0x0FBB) volatile __LCDDATA0bits_t LCDDATA0bits;
290 
291 __at(0x0FBC) __sfr LCDDATA1;
292 __at(0x0FBC) volatile __LCDDATA1bits_t LCDDATA1bits;
293 
294 __at(0x0FBD) __sfr LCDDATA2;
295 __at(0x0FBD) volatile __LCDDATA2bits_t LCDDATA2bits;
296 
297 __at(0x0FBE) __sfr LCDDATA3;
298 __at(0x0FBE) volatile __LCDDATA3bits_t LCDDATA3bits;
299 
300 __at(0x0FBF) __sfr LCDDATA4;
301 __at(0x0FBF) volatile __LCDDATA4bits_t LCDDATA4bits;
302 
303 __at(0x0FC0) __sfr ADCON2;
304 __at(0x0FC0) volatile __ADCON2bits_t ADCON2bits;
305 
306 __at(0x0FC1) __sfr ADCON1;
307 __at(0x0FC1) volatile __ADCON1bits_t ADCON1bits;
308 
309 __at(0x0FC2) __sfr ADCON0;
310 __at(0x0FC2) volatile __ADCON0bits_t ADCON0bits;
311 
312 __at(0x0FC3) __sfr ADRES;
313 
314 __at(0x0FC3) __sfr ADRESL;
315 
316 __at(0x0FC4) __sfr ADRESH;
317 
318 __at(0x0FC5) __sfr SSP1CON2;
319 __at(0x0FC5) volatile __SSP1CON2bits_t SSP1CON2bits;
320 
321 __at(0x0FC5) __sfr SSPCON2;
322 __at(0x0FC5) volatile __SSPCON2bits_t SSPCON2bits;
323 
324 __at(0x0FC6) __sfr SSP1CON1;
325 __at(0x0FC6) volatile __SSP1CON1bits_t SSP1CON1bits;
326 
327 __at(0x0FC6) __sfr SSPCON1;
328 __at(0x0FC6) volatile __SSPCON1bits_t SSPCON1bits;
329 
330 __at(0x0FC7) __sfr SSP1STAT;
331 __at(0x0FC7) volatile __SSP1STATbits_t SSP1STATbits;
332 
333 __at(0x0FC7) __sfr SSPSTAT;
334 __at(0x0FC7) volatile __SSPSTATbits_t SSPSTATbits;
335 
336 __at(0x0FC8) __sfr SSP1ADD;
337 
338 __at(0x0FC8) __sfr SSPADD;
339 
340 __at(0x0FC9) __sfr SSP1BUF;
341 
342 __at(0x0FC9) __sfr SSPBUF;
343 
344 __at(0x0FCA) __sfr T2CON;
345 __at(0x0FCA) volatile __T2CONbits_t T2CONbits;
346 
347 __at(0x0FCB) __sfr PR2;
348 
349 __at(0x0FCC) __sfr TMR2;
350 
351 __at(0x0FCD) __sfr T1CON;
352 __at(0x0FCD) volatile __T1CONbits_t T1CONbits;
353 
354 __at(0x0FCE) __sfr TMR1;
355 
356 __at(0x0FCE) __sfr TMR1L;
357 
358 __at(0x0FCF) __sfr TMR1H;
359 
360 __at(0x0FD0) __sfr RCON;
361 __at(0x0FD0) volatile __RCONbits_t RCONbits;
362 
363 __at(0x0FD1) __sfr WDTCON;
364 __at(0x0FD1) volatile __WDTCONbits_t WDTCONbits;
365 
366 __at(0x0FD2) __sfr LCDREG;
367 __at(0x0FD2) volatile __LCDREGbits_t LCDREGbits;
368 
369 __at(0x0FD3) __sfr OSCCON;
370 __at(0x0FD3) volatile __OSCCONbits_t OSCCONbits;
371 
372 __at(0x0FD5) __sfr T0CON;
373 __at(0x0FD5) volatile __T0CONbits_t T0CONbits;
374 
375 __at(0x0FD6) __sfr TMR0;
376 
377 __at(0x0FD6) __sfr TMR0L;
378 
379 __at(0x0FD7) __sfr TMR0H;
380 
381 __at(0x0FD8) __sfr STATUS;
382 __at(0x0FD8) volatile __STATUSbits_t STATUSbits;
383 
384 __at(0x0FD9) __sfr FSR2L;
385 
386 __at(0x0FDA) __sfr FSR2H;
387 
388 __at(0x0FDB) __sfr PLUSW2;
389 
390 __at(0x0FDC) __sfr PREINC2;
391 
392 __at(0x0FDD) __sfr POSTDEC2;
393 
394 __at(0x0FDE) __sfr POSTINC2;
395 
396 __at(0x0FDF) __sfr INDF2;
397 
398 __at(0x0FE0) __sfr BSR;
399 
400 __at(0x0FE1) __sfr FSR1L;
401 
402 __at(0x0FE2) __sfr FSR1H;
403 
404 __at(0x0FE3) __sfr PLUSW1;
405 
406 __at(0x0FE4) __sfr PREINC1;
407 
408 __at(0x0FE5) __sfr POSTDEC1;
409 
410 __at(0x0FE6) __sfr POSTINC1;
411 
412 __at(0x0FE7) __sfr INDF1;
413 
414 __at(0x0FE8) __sfr WREG;
415 
416 __at(0x0FE9) __sfr FSR0L;
417 
418 __at(0x0FEA) __sfr FSR0H;
419 
420 __at(0x0FEB) __sfr PLUSW0;
421 
422 __at(0x0FEC) __sfr PREINC0;
423 
424 __at(0x0FED) __sfr POSTDEC0;
425 
426 __at(0x0FEE) __sfr POSTINC0;
427 
428 __at(0x0FEF) __sfr INDF0;
429 
430 __at(0x0FF0) __sfr INTCON3;
431 __at(0x0FF0) volatile __INTCON3bits_t INTCON3bits;
432 
433 __at(0x0FF1) __sfr INTCON2;
434 __at(0x0FF1) volatile __INTCON2bits_t INTCON2bits;
435 
436 __at(0x0FF2) __sfr INTCON;
437 __at(0x0FF2) volatile __INTCONbits_t INTCONbits;
438 
439 __at(0x0FF3) __sfr PROD;
440 
441 __at(0x0FF3) __sfr PRODL;
442 
443 __at(0x0FF4) __sfr PRODH;
444 
445 __at(0x0FF5) __sfr TABLAT;
446 
447 __at(0x0FF6) __sfr TBLPTR;
448 
449 __at(0x0FF6) __sfr TBLPTRL;
450 
451 __at(0x0FF7) __sfr TBLPTRH;
452 
453 __at(0x0FF8) __sfr TBLPTRU;
454 
455 __at(0x0FF9) __sfr PC;
456 
457 __at(0x0FF9) __sfr PCL;
458 
459 __at(0x0FFA) __sfr PCLATH;
460 
461 __at(0x0FFB) __sfr PCLATU;
462 
463 __at(0x0FFC) __sfr STKPTR;
464 __at(0x0FFC) volatile __STKPTRbits_t STKPTRbits;
465 
466 __at(0x0FFD) __sfr TOS;
467 
468 __at(0x0FFD) __sfr TOSL;
469 
470 __at(0x0FFE) __sfr TOSH;
471 
472 __at(0x0FFF) __sfr TOSU;
473