1 /* 2 * Simulator of microcontrollers (uc51cl.h) 3 * 4 * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. 5 * 6 * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu 7 * 8 */ 9 10 /* 11 This file is part of microcontroller simulator: ucsim. 12 13 UCSIM is free software; you can redistribute it and/or modify 14 it under the terms of the GNU General Public License as published by 15 the Free Software Foundation; either version 2 of the License, or 16 (at your option) any later version. 17 18 UCSIM is distributed in the hope that it will be useful, 19 but WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 GNU General Public License for more details. 22 23 You should have received a copy of the GNU General Public License 24 along with UCSIM; see the file COPYING. If not, write to the Free 25 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 26 02111-1307, USA. 27 */ 28 /*@1@*/ 29 30 #ifndef UC51CL_HEADER 31 #define UC51CL_HEADER 32 33 #include <stdio.h> 34 #ifdef HAVE_TERMIOS_H 35 #include <termios.h> 36 #endif 37 38 #include "pobjcl.h" 39 40 #include "simcl.h" 41 #include "memcl.h" 42 #include "uccl.h" 43 #include "itsrccl.h" 44 #include "brkcl.h" 45 #include "stypes.h" 46 47 #include "interruptcl.h" 48 49 50 class t_uc51; 51 52 class cl_irq_stop_option: public cl_optref 53 { 54 protected: 55 class cl_51core *uc51; 56 public: 57 cl_irq_stop_option(class cl_51core *the_uc51); 58 virtual int init(void); 59 virtual void option_changed(void); 60 }; 61 62 class cl_51core: public cl_uc 63 { 64 public: 65 // Options 66 //bool debug; 67 class cl_irq_stop_option *irq_stop_option; 68 bool stop_at_it; 69 70 // memories and cells for faster access 71 class cl_address_space *sfr, *iram, *xram, *regs, *bits; 72 class cl_address_space *dptr; 73 class cl_memory_cell *acc, *psw, *R[8]; 74 class cl_memory_chip *rom_chip, *sfr_chip, *iram_chip, *xram_chip; 75 76 public: 77 // Help to detect external it requests (falling edge) 78 uchar prev_p1; // Prev state of P1 79 uchar prev_p3; // Prev state of P3 80 int p3_int0_edge, p3_int1_edge; 81 82 public: 83 // Simulation of interrupt system 84 class cl_interrupt *interrupt; 85 //bool was_reti; // Instruction had an effect on IE 86 87 public: 88 int result; // result of instruction execution 89 90 cl_51core(struct cpu_entry *Itype, class cl_sim *asim); 91 virtual ~cl_51core(void); 92 virtual int init(void); 93 virtual char *id_string(void); 94 virtual void make_cpu_hw(void); 95 virtual void mk_hw_elements(void); 96 virtual void build_cmdset(class cl_cmdset *cmdset); 97 //virtual class cl_m *mk_mem(enum mem_class type, char *class_name); 98 virtual void make_memories(void); 99 virtual void make_address_spaces(void); 100 virtual void make_chips(void); 101 virtual void decode_regs(void); 102 virtual void decode_bits(void); 103 virtual void decode_rom(void); 104 virtual void decode_iram(void); 105 virtual void decode_sfr(void); 106 virtual void decode_xram(void); 107 virtual void decode_dptr(void); 108 virtual void make_vars(void); 109 clock_per_cycle(void)110 virtual int clock_per_cycle(void) { return(12); } 111 virtual struct dis_entry *dis_tbl(void); 112 virtual struct name_entry *bit_tbl(void); 113 virtual char *disass(t_addr addr, const char *sep); 114 virtual void print_regs(class cl_console_base *con); 115 virtual class cl_address_space *bit2mem(t_addr bitaddr, 116 t_addr *memaddr, t_mem *bitmask); 117 virtual t_addr bit_address(class cl_memory *mem, 118 t_addr mem_address, 119 int bit_number); 120 virtual void daddr_name(t_addr addr, char *buf); 121 virtual void baddr_name(t_addr addr, char *buf); 122 123 virtual void reset(void); 124 virtual void clear_sfr(void); 125 virtual void analyze(t_addr addr); 126 127 virtual int do_inst(int step); 128 129 //virtual void mem_cell_changed(class cl_m *mem, t_addr addr); 130 131 virtual int priority_of(uchar nuof_it); 132 virtual int do_interrupt(void); 133 virtual int accept_it(class it_level *il); 134 virtual bool it_enabled(void); 135 136 protected: 137 virtual int idle_pd(void); 138 139 virtual class cl_memory_cell *get_direct(t_mem addr); 140 141 virtual int exec_inst(void); 142 //virtual void post_inst(void); 143 144 virtual int inst_unknown(void); 145 virtual int instruction_00/*inst_nop*/(t_mem/*uchar*/ code); /* 00 */ 146 virtual int instruction_01/*inst_ajmp_addr*/(t_mem/*uchar*/ code); /* [02468ace]1 */ 147 virtual int instruction_02/*inst_ljmp*/(t_mem/*uchar*/ code); /* 02 */ 148 virtual int instruction_03/*inst_rr*/(t_mem/*uchar*/ code); /* 03 */ 149 virtual int instruction_04/*inst_inc_a*/(t_mem/*uchar*/ code); /* 04 */ 150 virtual int instruction_05/*inst_inc_addr*/(t_mem/*uchar*/ code); /* 05 */ 151 virtual int instruction_06/*inst_inc_Sri*/(t_mem/*uchar*/ code); /* 06,07 */ 152 virtual int instruction_08/*inst_inc_rn*/(t_mem/*uchar*/ code); /* 08-0f */ 153 virtual int instruction_10/*inst_jbc_bit_addr*/(t_mem/*uchar*/ code); /* 10 */ 154 virtual int instruction_11/*inst_acall_addr*/(t_mem/*uchar*/ code); /* [13579bdf]1 */ 155 virtual int inst_lcall(t_mem code, uint addr, bool intr); /* 12 */ instruction_12(t_mem code)156 virtual int instruction_12(t_mem code) { return inst_lcall(code, 0, false); } 157 virtual int instruction_13/*inst_rrc*/(t_mem/*uchar*/ code); /* 13 */ 158 virtual int instruction_14/*inst_dec_a*/(t_mem/*uchar*/ code); /* 14 */ 159 virtual int instruction_15/*inst_dec_addr*/(t_mem/*uchar*/ code); /* 15 */ 160 virtual int instruction_16/*inst_dec_Sri*/(t_mem/*uchar*/ code); /* 16,17 */ 161 virtual int instruction_18/*inst_dec_rn*/(t_mem/*uchar*/ code); /* 18-1f */ 162 virtual int instruction_20/*inst_jb_bit_addr*/(t_mem/*uchar*/ code); /* 20 */ 163 virtual int instruction_22/*inst_ret*/(t_mem/*uchar*/ code); /* 22 */ 164 virtual int instruction_23/*inst_rl*/(t_mem/*uchar*/ code); /* 23 */ 165 virtual int instruction_24/*inst_add_a_Sdata*/(t_mem/*uchar*/ code); /* 24 */ 166 virtual int instruction_25/*inst_add_a_addr*/(t_mem/*uchar*/ code); /* 25 */ 167 virtual int instruction_26/*inst_add_a_Sri*/(t_mem/*uchar*/ code); /* 26,27 */ 168 virtual int instruction_28/*inst_add_a_rn*/(t_mem/*uchar*/ code); /* 28-2f */ 169 virtual int instruction_30/*inst_jnb_bit_addr*/(t_mem/*uchar*/ code); /* 30 */ 170 virtual int instruction_32/*inst_reti*/(t_mem/*uchar*/ code); /* 32 */ 171 virtual int instruction_33/*inst_rlc*/(t_mem/*uchar*/ code); /* 33 */ 172 virtual int instruction_34/*inst_addc_a_Sdata*/(t_mem/*uchar*/ code); /* 34 */ 173 virtual int instruction_35/*inst_addc_a_addr*/(t_mem/*uchar*/ code); /* 35 */ 174 virtual int instruction_36/*inst_addc_a_Sri*/(t_mem/*uchar*/ code); /* 36,37 */ 175 virtual int instruction_38/*inst_addc_a_rn*/(t_mem/*uchar*/ code); /* 38-3f */ 176 virtual int instruction_40/*inst_jc_addr*/(t_mem/*uchar*/ code); /* 40 */ 177 virtual int instruction_42/*inst_orl_addr_a*/(t_mem/*uchar*/ code); /* 42 */ 178 virtual int instruction_43/*inst_orl_addr_Sdata*/(t_mem/*uchar*/ code);/* 43 */ 179 virtual int instruction_44/*inst_orl_a_Sdata*/(t_mem/*uchar*/ code); /* 44 */ 180 virtual int instruction_45/*inst_orl_a_addr*/(t_mem/*uchar*/ code); /* 45 */ 181 virtual int instruction_46/*inst_orl_a_Sri*/(t_mem/*uchar*/ code); /* 46,47 */ 182 virtual int instruction_48/*inst_orl_a_rn*/(t_mem/*uchar*/ code); /* 48-4f */ 183 virtual int instruction_50/*inst_jnc_addr*/(t_mem/*uchar*/ code); /* 50 */ 184 virtual int instruction_52/*inst_anl_addr_a*/(t_mem/*uchar*/ code); /* 52 */ 185 virtual int instruction_53/*inst_anl_addr_Sdata*/(t_mem/*uchar*/ code);/* 53 */ 186 virtual int instruction_54/*inst_anl_a_Sdata*/(t_mem/*uchar*/ code); /* 54 */ 187 virtual int instruction_55/*inst_anl_a_addr*/(t_mem/*uchar*/ code); /* 55 */ 188 virtual int instruction_56/*inst_anl_a_Sri*/(t_mem/*uchar*/ code); /* 56,57 */ 189 virtual int instruction_58/*inst_anl_a_rn*/(t_mem/*uchar*/ code); /* 58-5f */ 190 virtual int instruction_60/*inst_jz_addr*/(t_mem/*uchar*/ code); /* 60 */ 191 virtual int instruction_62/*inst_xrl_addr_a*/(t_mem/*uchar*/ code); /* 62 */ 192 virtual int instruction_63/*inst_xrl_addr_Sdata*/(t_mem/*uchar*/ code);/* 63 */ 193 virtual int instruction_64/*inst_xrl_a_Sdata*/(t_mem/*uchar*/ code); /* 64 */ 194 virtual int instruction_65/*inst_xrl_a_addr*/(t_mem/*uchar*/ code); /* 65 */ 195 virtual int instruction_66/*inst_xrl_a_Sri*/(t_mem/*uchar*/ code); /* 66,67 */ 196 virtual int instruction_68/*inst_xrl_a_rn*/(t_mem/*uchar*/ code); /* 68-6f */ 197 virtual int instruction_70/*inst_jnz_addr*/(t_mem/*uchar*/ code); /* 70 */ 198 virtual int instruction_72/*inst_orl_c_bit*/(t_mem/*uchar*/ code); /* 72 */ 199 virtual int instruction_73/*inst_jmp_Sa_dptr*/(t_mem/*uchar*/ code); /* 73 */ 200 virtual int instruction_74/*inst_mov_a_Sdata*/(t_mem/*uchar*/ code); /* 74 */ 201 virtual int instruction_75/*inst_mov_addr_Sdata*/(t_mem/*uchar*/ code);/* 75 */ 202 virtual int instruction_76/*inst_mov_Sri_Sdata*/(t_mem/*uchar*/ code);/* 76,77 */ 203 virtual int instruction_78/*inst_mov_rn_Sdata*/(t_mem/*uchar*/ code); /* 78-7f */ 204 virtual int instruction_80/*inst_sjmp*/(t_mem/*uchar*/ code); /* 80 */ 205 virtual int instruction_82/*inst_anl_c_bit*/(t_mem/*uchar*/ code); /* 82 */ 206 virtual int instruction_83/*inst_movc_a_Sa_pc*/(t_mem/*uchar*/ code); /* 83 */ 207 virtual int instruction_84/*inst_div_ab*/(t_mem/*uchar*/ code); /* 84 */ 208 virtual int instruction_85/*inst_mov_addr_addr*/(t_mem/*uchar*/ code);/* 85 */ 209 virtual int instruction_86/*inst_mov_addr_Sri*/(t_mem/*uchar*/ code); /* 86,87 */ 210 virtual int instruction_88/*inst_mov_addr_rn*/(t_mem/*uchar*/ code); /* 88-8f */ 211 virtual int instruction_90/*inst_mov_dptr_Sdata*/(t_mem/*uchar*/ code);/* 90 */ 212 virtual int instruction_92/*inst_mov_bit_c*/(t_mem/*uchar*/ code); /* 92 */ 213 virtual int instruction_93/*inst_movc_a_Sa_dptr*/(t_mem/*uchar*/ code);/* 93 */ 214 virtual int instruction_94/*inst_subb_a_Sdata*/(t_mem/*uchar*/ code); /* 94 */ 215 virtual int instruction_95/*inst_subb_a_addr*/(t_mem/*uchar*/ code); /* 95 */ 216 virtual int instruction_96/*inst_subb_a_Sri*/(t_mem/*uchar*/ code); /* 96,97 */ 217 virtual int instruction_98/*inst_subb_a_rn*/(t_mem/*uchar*/ code); /* 98-9f */ 218 virtual int instruction_a0/*inst_orl_c_Sbit*/(t_mem/*uchar*/ code); /* a0 */ 219 virtual int instruction_a2/*inst_mov_c_bit*/(t_mem/*uchar*/ code); /* a2 */ 220 virtual int instruction_a3/*inst_inc_dptr*/(t_mem/*uchar*/ code); /* a3 */ 221 virtual int instruction_a4/*inst_mul_ab*/(t_mem/*uchar*/ code); /* a4 */ 222 virtual int instruction_a6/*inst_mov_Sri_addr*/(t_mem/*uchar*/ code); /* a6,a7 */ 223 virtual int instruction_a8/*inst_mov_rn_addr*/(t_mem/*uchar*/ code); /* a8-af */ 224 virtual int instruction_b0/*inst_anl_c_Sbit*/(t_mem/*uchar*/ code); /* b0 */ 225 virtual int instruction_b2/*inst_cpl_bit*/(t_mem/*uchar*/ code); /* b2 */ 226 virtual int instruction_b3/*inst_cpl_c*/(t_mem/*uchar*/ code); /* b3 */ 227 virtual int instruction_b4/*inst_cjne_a_Sdata_addr*/(t_mem/*uchar*/ code);/* b4 */ 228 virtual int instruction_b5/*inst_cjne_a_addr_addr*/(t_mem/*uchar*/ code);/* b5 */ 229 virtual int instruction_b6/*inst_cjne_Sri_Sdata_addr*/(t_mem/*uchar*/ code);/* b6,b7 */ 230 virtual int instruction_b8/*inst_cjne_rn_Sdata_addr*/(t_mem/*uchar*/ code);/* b8-bf */ 231 virtual int instruction_c0/*inst_push*/(t_mem/*uchar*/ code); /* c0 */ 232 virtual int instruction_c2/*inst_clr_bit*/(t_mem/*uchar*/ code); /* c2 */ 233 virtual int instruction_c3/*inst_clr_c*/(t_mem/*uchar*/ code); /* c3*/ 234 virtual int instruction_c4/*inst_swap*/(t_mem/*uchar*/ code); /* c4 */ 235 virtual int instruction_c5/*inst_xch_a_addr*/(t_mem/*uchar*/ code); /* c5 */ 236 virtual int instruction_c6/*inst_xch_a_Sri*/(t_mem/*uchar*/ code); /* c6,c7 */ 237 virtual int instruction_c8/*inst_xch_a_rn*/(t_mem/*uchar*/ code); /* c8-cf */ 238 virtual int instruction_d0/*inst_pop*/(t_mem/*uchar*/ code); /* d0 */ 239 virtual int instruction_d2/*inst_setb_bit*/(t_mem/*uchar*/ code); /* d2 */ 240 virtual int instruction_d3/*inst_setb_c*/(t_mem/*uchar*/ code); /* d3 */ 241 virtual int instruction_d4/*inst_da_a*/(t_mem/*uchar*/ code); /* d4 */ 242 virtual int instruction_d5/*inst_djnz_addr_addr*/(t_mem/*uchar*/ code);/* d5 */ 243 virtual int instruction_d6/*inst_xchd_a_Sri*/(t_mem/*uchar*/ code); /* d6,d7 */ 244 virtual int instruction_d8/*inst_djnz_rn_addr*/(t_mem/*uchar*/ code); /* d8-df */ 245 virtual int instruction_e0/*inst_movx_a_Sdptr*/(t_mem/*uchar*/ code); /* e0 */ 246 virtual int instruction_e2/*inst_movx_a_Sri*/(t_mem/*uchar*/ code); /* e2,e3 */ 247 virtual int instruction_e4/*inst_clr_a*/(t_mem/*uchar*/ code); /* e4 */ 248 virtual int instruction_e5/*inst_mov_a_addr*/(t_mem/*uchar*/ code); /* e5 */ 249 virtual int instruction_e6/*inst_mov_a_Sri*/(t_mem/*uchar*/ code); /* e6,e7 */ 250 virtual int instruction_e8/*inst_mov_a_rn*/(t_mem/*uchar*/ code); /* e8-ef */ 251 virtual int instruction_f0/*inst_movx_Sdptr_a*/(t_mem/*uchar*/ code); /* f0 */ 252 virtual int instruction_f2/*inst_movx_Sri_a*/(t_mem/*uchar*/ code); /* f2,f3 */ 253 virtual int instruction_f4/*inst_cpl_a*/(t_mem/*uchar*/ code); /* f4 */ 254 virtual int instruction_f5/*inst_mov_addr_a*/(t_mem/*uchar*/ code); /* f5 */ 255 virtual int instruction_f6/*inst_mov_Sri_a*/(t_mem/*uchar*/ code); /* f6,f7 */ 256 virtual int instruction_f8/*inst_mov_rn_a*/(t_mem/*uchar*/ code); /* f8-ff */ 257 }; 258 259 260 enum uc51cpu_cfg { 261 uc51cpu_aof_mdps = 0, // addr of multi_DPTR_sfr selector 262 uc51cpu_mask_mdps = 1, // mask in mutli_DPTR_sfr selector 263 uc51cpu_aof_mdps1l = 2, // addr of multi_DPTR_sfr DPL1 264 uc51cpu_aof_mdps1h = 3, // addr of multi_DPTR_sfr DPH1 265 266 uc51cpu_aof_mdpc = 4, // addr of multi_DPTR_chip selector 267 uc51cpu_mask_mdpc = 5, // mask in multi_DPTR_chip selector 268 269 uc51cpu_nuof = 16 270 }; 271 272 class cl_uc51_cpu: public cl_hw 273 { 274 protected: 275 class cl_memory_cell *cell_acc, *cell_sp, *cell_psw; 276 class cl_memory_cell *acc_bits[8]; 277 public: 278 cl_uc51_cpu(class cl_uc *auc); 279 virtual int init(void); cfg_size(void)280 virtual int cfg_size(void) { return uc51cpu_nuof; } 281 virtual char *cfg_help(t_addr addr); 282 283 virtual void write(class cl_memory_cell *cell, t_mem *val); 284 virtual t_mem conf_op(cl_memory_cell *cell, t_addr addr, t_mem *val); 285 }; 286 287 288 #endif 289 290 /* End of s51.src/uc51cl.h */ 291