1 /* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*-
2  * vim: set ts=8 sts=2 et sw=2 tw=80:
3  * This Source Code Form is subject to the terms of the Mozilla Public
4  * License, v. 2.0. If a copy of the MPL was not distributed with this
5  * file, You can obtain one at http://mozilla.org/MPL/2.0/. */
6 
7 #ifndef jit_mips64_Assembler_mips64_h
8 #define jit_mips64_Assembler_mips64_h
9 
10 #include "jit/mips-shared/Assembler-mips-shared.h"
11 
12 #include "jit/mips64/Architecture-mips64.h"
13 
14 namespace js {
15 namespace jit {
16 
17 static constexpr Register CallTempReg4 = a4;
18 static constexpr Register CallTempReg5 = a5;
19 
20 static constexpr Register CallTempNonArgRegs[] = {t0, t1, t2, t3};
21 static const uint32_t NumCallTempNonArgRegs =
22     mozilla::ArrayLength(CallTempNonArgRegs);
23 
24 class ABIArgGenerator {
25   unsigned usedArgSlots_;
26   bool firstArgFloat;
27   ABIArg current_;
28 
29  public:
30   ABIArgGenerator();
31   ABIArg next(MIRType argType);
current()32   ABIArg& current() { return current_; }
33 
stackBytesConsumedSoFar()34   uint32_t stackBytesConsumedSoFar() const {
35     if (usedArgSlots_ <= 8) {
36       return 0;
37     }
38 
39     return (usedArgSlots_ - 8) * sizeof(int64_t);
40   }
41 };
42 
43 // These registers may be volatile or nonvolatile.
44 static constexpr Register ABINonArgReg0 = t0;
45 static constexpr Register ABINonArgReg1 = t1;
46 static constexpr Register ABINonArgReg2 = t2;
47 static constexpr Register ABINonArgReg3 = t3;
48 
49 // This register may be volatile or nonvolatile. Avoid f23 which is the
50 // ScratchDoubleReg.
51 static constexpr FloatRegister ABINonArgDoubleReg{FloatRegisters::f21,
52                                                   FloatRegisters::Double};
53 
54 // These registers may be volatile or nonvolatile.
55 // Note: these three registers are all guaranteed to be different
56 static constexpr Register ABINonArgReturnReg0 = t0;
57 static constexpr Register ABINonArgReturnReg1 = t1;
58 static constexpr Register ABINonVolatileReg = s0;
59 
60 // This register is guaranteed to be clobberable during the prologue and
61 // epilogue of an ABI call which must preserve both ABI argument, return
62 // and non-volatile registers.
63 static constexpr Register ABINonArgReturnVolatileReg = t0;
64 
65 // TLS pointer argument register for WebAssembly functions. This must not alias
66 // any other register used for passing function arguments or return values.
67 // Preserved by WebAssembly functions.
68 static constexpr Register WasmTlsReg = s5;
69 
70 // Registers used for wasm table calls. These registers must be disjoint
71 // from the ABI argument registers, WasmTlsReg and each other.
72 static constexpr Register WasmTableCallScratchReg0 = ABINonArgReg0;
73 static constexpr Register WasmTableCallScratchReg1 = ABINonArgReg1;
74 static constexpr Register WasmTableCallSigReg = ABINonArgReg2;
75 static constexpr Register WasmTableCallIndexReg = ABINonArgReg3;
76 
77 // Register used as a scratch along the return path in the fast js -> wasm stub
78 // code. This must not overlap ReturnReg, JSReturnOperand, or WasmTlsReg. It
79 // must be a volatile register.
80 static constexpr Register WasmJitEntryReturnScratch = t1;
81 
82 static constexpr Register InterpreterPCReg = t5;
83 
84 static constexpr Register JSReturnReg = v1;
85 static constexpr Register JSReturnReg_Type = JSReturnReg;
86 static constexpr Register JSReturnReg_Data = JSReturnReg;
87 static constexpr Register64 ReturnReg64(ReturnReg);
88 static constexpr FloatRegister ReturnFloat32Reg = {FloatRegisters::f0,
89                                                    FloatRegisters::Single};
90 static constexpr FloatRegister ReturnDoubleReg = {FloatRegisters::f0,
91                                                   FloatRegisters::Double};
92 static constexpr FloatRegister ScratchFloat32Reg = {FloatRegisters::f23,
93                                                     FloatRegisters::Single};
94 static constexpr FloatRegister ScratchDoubleReg = {FloatRegisters::f23,
95                                                    FloatRegisters::Double};
96 
97 struct ScratchFloat32Scope : public AutoFloatRegisterScope {
ScratchFloat32ScopeScratchFloat32Scope98   explicit ScratchFloat32Scope(MacroAssembler& masm)
99       : AutoFloatRegisterScope(masm, ScratchFloat32Reg) {}
100 };
101 
102 struct ScratchDoubleScope : public AutoFloatRegisterScope {
ScratchDoubleScopeScratchDoubleScope103   explicit ScratchDoubleScope(MacroAssembler& masm)
104       : AutoFloatRegisterScope(masm, ScratchDoubleReg) {}
105 };
106 
107 static constexpr FloatRegister f0 = {FloatRegisters::f0,
108                                      FloatRegisters::Double};
109 static constexpr FloatRegister f1 = {FloatRegisters::f1,
110                                      FloatRegisters::Double};
111 static constexpr FloatRegister f2 = {FloatRegisters::f2,
112                                      FloatRegisters::Double};
113 static constexpr FloatRegister f3 = {FloatRegisters::f3,
114                                      FloatRegisters::Double};
115 static constexpr FloatRegister f4 = {FloatRegisters::f4,
116                                      FloatRegisters::Double};
117 static constexpr FloatRegister f5 = {FloatRegisters::f5,
118                                      FloatRegisters::Double};
119 static constexpr FloatRegister f6 = {FloatRegisters::f6,
120                                      FloatRegisters::Double};
121 static constexpr FloatRegister f7 = {FloatRegisters::f7,
122                                      FloatRegisters::Double};
123 static constexpr FloatRegister f8 = {FloatRegisters::f8,
124                                      FloatRegisters::Double};
125 static constexpr FloatRegister f9 = {FloatRegisters::f9,
126                                      FloatRegisters::Double};
127 static constexpr FloatRegister f10 = {FloatRegisters::f10,
128                                       FloatRegisters::Double};
129 static constexpr FloatRegister f11 = {FloatRegisters::f11,
130                                       FloatRegisters::Double};
131 static constexpr FloatRegister f12 = {FloatRegisters::f12,
132                                       FloatRegisters::Double};
133 static constexpr FloatRegister f13 = {FloatRegisters::f13,
134                                       FloatRegisters::Double};
135 static constexpr FloatRegister f14 = {FloatRegisters::f14,
136                                       FloatRegisters::Double};
137 static constexpr FloatRegister f15 = {FloatRegisters::f15,
138                                       FloatRegisters::Double};
139 static constexpr FloatRegister f16 = {FloatRegisters::f16,
140                                       FloatRegisters::Double};
141 static constexpr FloatRegister f17 = {FloatRegisters::f17,
142                                       FloatRegisters::Double};
143 static constexpr FloatRegister f18 = {FloatRegisters::f18,
144                                       FloatRegisters::Double};
145 static constexpr FloatRegister f19 = {FloatRegisters::f19,
146                                       FloatRegisters::Double};
147 static constexpr FloatRegister f20 = {FloatRegisters::f20,
148                                       FloatRegisters::Double};
149 static constexpr FloatRegister f21 = {FloatRegisters::f21,
150                                       FloatRegisters::Double};
151 static constexpr FloatRegister f22 = {FloatRegisters::f22,
152                                       FloatRegisters::Double};
153 static constexpr FloatRegister f23 = {FloatRegisters::f23,
154                                       FloatRegisters::Double};
155 static constexpr FloatRegister f24 = {FloatRegisters::f24,
156                                       FloatRegisters::Double};
157 static constexpr FloatRegister f25 = {FloatRegisters::f25,
158                                       FloatRegisters::Double};
159 static constexpr FloatRegister f26 = {FloatRegisters::f26,
160                                       FloatRegisters::Double};
161 static constexpr FloatRegister f27 = {FloatRegisters::f27,
162                                       FloatRegisters::Double};
163 static constexpr FloatRegister f28 = {FloatRegisters::f28,
164                                       FloatRegisters::Double};
165 static constexpr FloatRegister f29 = {FloatRegisters::f29,
166                                       FloatRegisters::Double};
167 static constexpr FloatRegister f30 = {FloatRegisters::f30,
168                                       FloatRegisters::Double};
169 static constexpr FloatRegister f31 = {FloatRegisters::f31,
170                                       FloatRegisters::Double};
171 
172 // MIPS64 CPUs can only load multibyte data that is "naturally"
173 // eight-byte-aligned, sp register should be sixteen-byte-aligned.
174 static constexpr uint32_t ABIStackAlignment = 16;
175 static constexpr uint32_t JitStackAlignment = 16;
176 
177 static constexpr uint32_t JitStackValueAlignment =
178     JitStackAlignment / sizeof(Value);
179 static_assert(JitStackAlignment % sizeof(Value) == 0 &&
180                   JitStackValueAlignment >= 1,
181               "Stack alignment should be a non-zero multiple of sizeof(Value)");
182 
183 // TODO this is just a filler to prevent a build failure. The MIPS SIMD
184 // alignment requirements still need to be explored.
185 // TODO Copy the static_asserts from x64/x86 assembler files.
186 static constexpr uint32_t SimdMemoryAlignment = 16;
187 
188 static constexpr uint32_t WasmStackAlignment = SimdMemoryAlignment;
189 static const uint32_t WasmTrapInstructionLength = 4;
190 
191 static constexpr Scale ScalePointer = TimesEight;
192 
193 class Assembler : public AssemblerMIPSShared {
194  public:
Assembler()195   Assembler() : AssemblerMIPSShared() {}
196 
197   static uintptr_t GetPointer(uint8_t*);
198 
199   using AssemblerMIPSShared::bind;
200 
201   static void Bind(uint8_t* rawCode, const CodeLabel& label);
202 
203   void processCodeLabels(uint8_t* rawCode);
204 
205   static void TraceJumpRelocations(JSTracer* trc, JitCode* code,
206                                    CompactBufferReader& reader);
207   static void TraceDataRelocations(JSTracer* trc, JitCode* code,
208                                    CompactBufferReader& reader);
209 
210   void bind(InstImm* inst, uintptr_t branch, uintptr_t target);
211 
212   // Copy the assembly code to the given buffer, and perform any pending
213   // relocations relying on the target address.
214   void executableCopy(uint8_t* buffer);
215 
216   static uint32_t PatchWrite_NearCallSize();
217 
218   static uint64_t ExtractLoad64Value(Instruction* inst0);
219   static void UpdateLoad64Value(Instruction* inst0, uint64_t value);
220   static void WriteLoad64Instructions(Instruction* inst0, Register reg,
221                                       uint64_t value);
222 
223   static void PatchWrite_NearCall(CodeLocationLabel start,
224                                   CodeLocationLabel toCall);
225   static void PatchDataWithValueCheck(CodeLocationLabel label, ImmPtr newValue,
226                                       ImmPtr expectedValue);
227   static void PatchDataWithValueCheck(CodeLocationLabel label,
228                                       PatchedImmPtr newValue,
229                                       PatchedImmPtr expectedValue);
230 
231   static uint64_t ExtractInstructionImmediate(uint8_t* code);
232 
233   static void ToggleCall(CodeLocationLabel inst_, bool enabled);
234 };  // Assembler
235 
236 static const uint32_t NumIntArgRegs = 8;
237 static const uint32_t NumFloatArgRegs = NumIntArgRegs;
238 
GetIntArgReg(uint32_t usedArgSlots,Register * out)239 static inline bool GetIntArgReg(uint32_t usedArgSlots, Register* out) {
240   if (usedArgSlots < NumIntArgRegs) {
241     *out = Register::FromCode(a0.code() + usedArgSlots);
242     return true;
243   }
244   return false;
245 }
246 
GetFloatArgReg(uint32_t usedArgSlots,FloatRegister * out)247 static inline bool GetFloatArgReg(uint32_t usedArgSlots, FloatRegister* out) {
248   if (usedArgSlots < NumFloatArgRegs) {
249     *out = FloatRegister::FromCode(f12.code() + usedArgSlots);
250     return true;
251   }
252   return false;
253 }
254 
255 // Get a register in which we plan to put a quantity that will be used as an
256 // integer argument. This differs from GetIntArgReg in that if we have no more
257 // actual argument registers to use we will fall back on using whatever
258 // CallTempReg* don't overlap the argument registers, and only fail once those
259 // run out too.
GetTempRegForIntArg(uint32_t usedIntArgs,uint32_t usedFloatArgs,Register * out)260 static inline bool GetTempRegForIntArg(uint32_t usedIntArgs,
261                                        uint32_t usedFloatArgs, Register* out) {
262   // NOTE: We can't properly determine which regs are used if there are
263   // float arguments. If this is needed, we will have to guess.
264   MOZ_ASSERT(usedFloatArgs == 0);
265 
266   if (GetIntArgReg(usedIntArgs, out)) {
267     return true;
268   }
269   // Unfortunately, we have to assume things about the point at which
270   // GetIntArgReg returns false, because we need to know how many registers it
271   // can allocate.
272   usedIntArgs -= NumIntArgRegs;
273   if (usedIntArgs >= NumCallTempNonArgRegs) {
274     return false;
275   }
276   *out = CallTempNonArgRegs[usedIntArgs];
277   return true;
278 }
279 
GetArgStackDisp(uint32_t usedArgSlots)280 static inline uint32_t GetArgStackDisp(uint32_t usedArgSlots) {
281   MOZ_ASSERT(usedArgSlots >= NumIntArgRegs);
282   return (usedArgSlots - NumIntArgRegs) * sizeof(int64_t);
283 }
284 
285 }  // namespace jit
286 }  // namespace js
287 
288 #endif /* jit_mips64_Assembler_mips64_h */
289