1 /** 2 * This file is part of the mingw-w64 runtime package. 3 * No warranty is given; refer to the file DISCLAIMER within this package. 4 */ 5 6 #ifndef _WINHVAPIDEFS_H_ 7 #define _WINHVAPIDEFS_H_ 8 9 typedef enum WHV_CAPABILITY_CODE { 10 WHvCapabilityCodeHypervisorPresent = 0x00000000, 11 WHvCapabilityCodeFeatures = 0x00000001, 12 WHvCapabilityCodeExtendedVmExits = 0x00000002, 13 WHvCapabilityCodeExceptionExitBitmap = 0x00000003, 14 WHvCapabilityCodeX64MsrExitBitmap = 0x00000004, 15 WHvCapabilityCodeProcessorVendor = 0x00001000, 16 WHvCapabilityCodeProcessorFeatures = 0x00001001, 17 WHvCapabilityCodeProcessorClFlushSize = 0x00001002, 18 WHvCapabilityCodeProcessorXsaveFeatures = 0x00001003, 19 WHvCapabilityCodeProcessorClockFrequency = 0x00001004, 20 WHvCapabilityCodeInterruptClockFrequency = 0x00001005, 21 WHvCapabilityCodeProcessorFeaturesBanks = 0x00001006 22 } WHV_CAPABILITY_CODE; 23 24 typedef union WHV_CAPABILITY_FEATURES { 25 __C89_NAMELESS struct { 26 UINT64 PartialUnmap : 1; 27 UINT64 LocalApicEmulation : 1; 28 UINT64 Xsave : 1; 29 UINT64 DirtyPageTracking : 1; 30 UINT64 SpeculationControl : 1; 31 UINT64 ApicRemoteRead : 1; 32 UINT64 IdleSuspend : 1; 33 UINT64 Reserved : 57; 34 }; 35 UINT64 AsUINT64; 36 } WHV_CAPABILITY_FEATURES; 37 38 C_ASSERT(sizeof(WHV_CAPABILITY_FEATURES) == sizeof(UINT64)); 39 40 typedef union WHV_EXTENDED_VM_EXITS { 41 __C89_NAMELESS struct { 42 UINT64 X64CpuidExit : 1; 43 UINT64 X64MsrExit : 1; 44 UINT64 ExceptionExit : 1; 45 UINT64 X64RdtscExit : 1; 46 UINT64 X64ApicSmiExitTrap : 1; 47 UINT64 HypercallExit : 1; 48 UINT64 X64ApicInitSipiExitTrap : 1; 49 UINT64 Reserved : 57; 50 }; 51 UINT64 AsUINT64; 52 } WHV_EXTENDED_VM_EXITS; 53 54 C_ASSERT(sizeof(WHV_EXTENDED_VM_EXITS) == sizeof(UINT64)); 55 56 typedef enum WHV_PROCESSOR_VENDOR { 57 WHvProcessorVendorAmd = 0x0000, 58 WHvProcessorVendorIntel = 0x0001, 59 WHvProcessorVendorHygon = 0x0002 60 } WHV_PROCESSOR_VENDOR; 61 62 typedef union WHV_PROCESSOR_FEATURES { 63 __C89_NAMELESS struct { 64 UINT64 Sse3Support : 1; 65 UINT64 LahfSahfSupport : 1; 66 UINT64 Ssse3Support : 1; 67 UINT64 Sse4_1Support : 1; 68 UINT64 Sse4_2Support : 1; 69 UINT64 Sse4aSupport : 1; 70 UINT64 XopSupport : 1; 71 UINT64 PopCntSupport : 1; 72 UINT64 Cmpxchg16bSupport : 1; 73 UINT64 Altmovcr8Support : 1; 74 UINT64 LzcntSupport : 1; 75 UINT64 MisAlignSseSupport : 1; 76 UINT64 MmxExtSupport : 1; 77 UINT64 Amd3DNowSupport : 1; 78 UINT64 ExtendedAmd3DNowSupport : 1; 79 UINT64 Page1GbSupport : 1; 80 UINT64 AesSupport : 1; 81 UINT64 PclmulqdqSupport : 1; 82 UINT64 PcidSupport : 1; 83 UINT64 Fma4Support : 1; 84 UINT64 F16CSupport : 1; 85 UINT64 RdRandSupport : 1; 86 UINT64 RdWrFsGsSupport : 1; 87 UINT64 SmepSupport : 1; 88 UINT64 EnhancedFastStringSupport : 1; 89 UINT64 Bmi1Support : 1; 90 UINT64 Bmi2Support : 1; 91 UINT64 Reserved1 : 2; 92 UINT64 MovbeSupport : 1; 93 UINT64 Npiep1Support : 1; 94 UINT64 DepX87FPUSaveSupport : 1; 95 UINT64 RdSeedSupport : 1; 96 UINT64 AdxSupport : 1; 97 UINT64 IntelPrefetchSupport : 1; 98 UINT64 SmapSupport : 1; 99 UINT64 HleSupport : 1; 100 UINT64 RtmSupport : 1; 101 UINT64 RdtscpSupport : 1; 102 UINT64 ClflushoptSupport : 1; 103 UINT64 ClwbSupport : 1; 104 UINT64 ShaSupport : 1; 105 UINT64 X87PointersSavedSupport : 1; 106 UINT64 InvpcidSupport : 1; 107 UINT64 IbrsSupport : 1; 108 UINT64 StibpSupport : 1; 109 UINT64 IbpbSupport : 1; 110 UINT64 Reserved2 : 1; 111 UINT64 SsbdSupport : 1; 112 UINT64 FastShortRepMovSupport : 1; 113 UINT64 Reserved3 : 1; 114 UINT64 RdclNo : 1; 115 UINT64 IbrsAllSupport : 1; 116 UINT64 Reserved4 : 1; 117 UINT64 SsbNo : 1; 118 UINT64 RsbANo : 1; 119 UINT64 Reserved5 : 1; 120 UINT64 RdPidSupport : 1; 121 UINT64 UmipSupport : 1; 122 UINT64 MdsNoSupport : 1; 123 UINT64 MdClearSupport : 1; 124 UINT64 Reserved6 : 3; 125 }; 126 UINT64 AsUINT64; 127 } WHV_PROCESSOR_FEATURES; 128 129 C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES) == sizeof(UINT64)); 130 131 typedef union WHV_PROCESSOR_FEATURES1 { 132 __C89_NAMELESS struct { 133 UINT64 Reserved1 : 2; 134 UINT64 ClZeroSupport : 1; 135 UINT64 Reserved2 : 61; 136 }; 137 UINT64 AsUINT64; 138 } WHV_PROCESSOR_FEATURES1; 139 140 C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES1) == sizeof(UINT64)); 141 142 #define WHV_PROCESSOR_FEATURES_BANKS_COUNT 2 143 144 typedef struct WHV_PROCESSOR_FEATURES_BANKS { 145 UINT32 BanksCount; 146 UINT32 Reserved0; 147 __C89_NAMELESS union { 148 __C89_NAMELESS struct { 149 WHV_PROCESSOR_FEATURES Bank0; 150 WHV_PROCESSOR_FEATURES1 Bank1; 151 }; 152 UINT64 AsUINT64[WHV_PROCESSOR_FEATURES_BANKS_COUNT]; 153 }; 154 } WHV_PROCESSOR_FEATURES_BANKS; 155 156 C_ASSERT(sizeof(WHV_PROCESSOR_FEATURES_BANKS) == sizeof(UINT64) * (WHV_PROCESSOR_FEATURES_BANKS_COUNT + 1)); 157 158 typedef union _WHV_PROCESSOR_XSAVE_FEATURES { 159 __C89_NAMELESS struct { 160 UINT64 XsaveSupport : 1; 161 UINT64 XsaveoptSupport : 1; 162 UINT64 AvxSupport : 1; 163 UINT64 Avx2Support : 1; 164 UINT64 FmaSupport : 1; 165 UINT64 MpxSupport : 1; 166 UINT64 Avx512Support : 1; 167 UINT64 Avx512DQSupport : 1; 168 UINT64 Avx512CDSupport : 1; 169 UINT64 Avx512BWSupport : 1; 170 UINT64 Avx512VLSupport : 1; 171 UINT64 XsaveCompSupport : 1; 172 UINT64 XsaveSupervisorSupport : 1; 173 UINT64 Xcr1Support : 1; 174 UINT64 Avx512BitalgSupport : 1; 175 UINT64 Avx512IfmaSupport : 1; 176 UINT64 Avx512VBmiSupport : 1; 177 UINT64 Avx512VBmi2Support : 1; 178 UINT64 Avx512VnniSupport : 1; 179 UINT64 GfniSupport : 1; 180 UINT64 VaesSupport : 1; 181 UINT64 Avx512VPopcntdqSupport : 1; 182 UINT64 VpclmulqdqSupport : 1; 183 UINT64 Avx512Bf16Support : 1; 184 UINT64 Avx512Vp2IntersectSupport : 1; 185 UINT64 Reserved : 39; 186 }; 187 UINT64 AsUINT64; 188 } WHV_PROCESSOR_XSAVE_FEATURES, *PWHV_PROCESSOR_XSAVE_FEATURES; 189 190 C_ASSERT(sizeof(WHV_PROCESSOR_XSAVE_FEATURES) == sizeof(UINT64)); 191 192 typedef union WHV_X64_MSR_EXIT_BITMAP { 193 UINT64 AsUINT64; 194 __C89_NAMELESS struct { 195 UINT64 UnhandledMsrs : 1; 196 UINT64 TscMsrWrite : 1; 197 UINT64 TscMsrRead : 1; 198 UINT64 ApicBaseMsrWrite : 1; 199 UINT64 Reserved : 60; 200 }; 201 } WHV_X64_MSR_EXIT_BITMAP; 202 203 C_ASSERT(sizeof(WHV_X64_MSR_EXIT_BITMAP) == sizeof(UINT64)); 204 205 typedef union WHV_CAPABILITY { 206 WINBOOL HypervisorPresent; 207 WHV_CAPABILITY_FEATURES Features; 208 WHV_EXTENDED_VM_EXITS ExtendedVmExits; 209 WHV_PROCESSOR_VENDOR ProcessorVendor; 210 WHV_PROCESSOR_FEATURES ProcessorFeatures; 211 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures; 212 UINT8 ProcessorClFlushSize; 213 UINT64 ExceptionExitBitmap; 214 WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap; 215 UINT64 ProcessorClockFrequency; 216 UINT64 InterruptClockFrequency; 217 WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks; 218 } WHV_CAPABILITY; 219 220 typedef VOID* WHV_PARTITION_HANDLE; 221 222 typedef enum WHV_PARTITION_PROPERTY_CODE { 223 WHvPartitionPropertyCodeExtendedVmExits = 0x00000001, 224 WHvPartitionPropertyCodeExceptionExitBitmap = 0x00000002, 225 WHvPartitionPropertyCodeSeparateSecurityDomain = 0x00000003, 226 WHvPartitionPropertyCodeNestedVirtualization = 0x00000004, 227 WHvPartitionPropertyCodeX64MsrExitBitmap = 0x00000005, 228 WHvPartitionPropertyCodeProcessorFeatures = 0x00001001, 229 WHvPartitionPropertyCodeProcessorClFlushSize = 0x00001002, 230 WHvPartitionPropertyCodeCpuidExitList = 0x00001003, 231 WHvPartitionPropertyCodeCpuidResultList = 0x00001004, 232 WHvPartitionPropertyCodeLocalApicEmulationMode = 0x00001005, 233 WHvPartitionPropertyCodeProcessorXsaveFeatures = 0x00001006, 234 WHvPartitionPropertyCodeProcessorClockFrequency = 0x00001007, 235 WHvPartitionPropertyCodeInterruptClockFrequency = 0x00001008, 236 WHvPartitionPropertyCodeApicRemoteReadSupport = 0x00001009, 237 WHvPartitionPropertyCodeProcessorFeaturesBanks = 0x0000100A, 238 WHvPartitionPropertyCodeReferenceTime = 0x0000100B, 239 WHvPartitionPropertyCodeProcessorCount = 0x00001fff 240 } WHV_PARTITION_PROPERTY_CODE; 241 242 typedef struct WHV_X64_CPUID_RESULT { 243 UINT32 Function; 244 UINT32 Reserved[3]; 245 UINT32 Eax; 246 UINT32 Ebx; 247 UINT32 Ecx; 248 UINT32 Edx; 249 } WHV_X64_CPUID_RESULT; 250 251 typedef enum WHV_EXCEPTION_TYPE { 252 WHvX64ExceptionTypeDivideErrorFault = 0x0, 253 WHvX64ExceptionTypeDebugTrapOrFault = 0x1, 254 WHvX64ExceptionTypeBreakpointTrap = 0x3, 255 WHvX64ExceptionTypeOverflowTrap = 0x4, 256 WHvX64ExceptionTypeBoundRangeFault = 0x5, 257 WHvX64ExceptionTypeInvalidOpcodeFault = 0x6, 258 WHvX64ExceptionTypeDeviceNotAvailableFault = 0x7, 259 WHvX64ExceptionTypeDoubleFaultAbort = 0x8, 260 WHvX64ExceptionTypeInvalidTaskStateSegmentFault = 0x0A, 261 WHvX64ExceptionTypeSegmentNotPresentFault = 0x0B, 262 WHvX64ExceptionTypeStackFault = 0x0C, 263 WHvX64ExceptionTypeGeneralProtectionFault = 0x0D, 264 WHvX64ExceptionTypePageFault = 0x0E, 265 WHvX64ExceptionTypeFloatingPointErrorFault = 0x10, 266 WHvX64ExceptionTypeAlignmentCheckFault = 0x11, 267 WHvX64ExceptionTypeMachineCheckAbort = 0x12, 268 WHvX64ExceptionTypeSimdFloatingPointFault = 0x13 269 } WHV_EXCEPTION_TYPE; 270 271 typedef enum WHV_X64_LOCAL_APIC_EMULATION_MODE { 272 WHvX64LocalApicEmulationModeNone, 273 WHvX64LocalApicEmulationModeXApic, 274 WHvX64LocalApicEmulationModeX2Apic 275 } WHV_X64_LOCAL_APIC_EMULATION_MODE; 276 277 typedef union WHV_PARTITION_PROPERTY { 278 WHV_EXTENDED_VM_EXITS ExtendedVmExits; 279 WHV_PROCESSOR_FEATURES ProcessorFeatures; 280 WHV_PROCESSOR_XSAVE_FEATURES ProcessorXsaveFeatures; 281 UINT8 ProcessorClFlushSize; 282 UINT32 ProcessorCount; 283 UINT32 CpuidExitList[1]; 284 WHV_X64_CPUID_RESULT CpuidResultList[1]; 285 UINT64 ExceptionExitBitmap; 286 WHV_X64_LOCAL_APIC_EMULATION_MODE LocalApicEmulationMode; 287 WINBOOL SeparateSecurityDomain; 288 WINBOOL NestedVirtualization; 289 WHV_X64_MSR_EXIT_BITMAP X64MsrExitBitmap; 290 UINT64 ProcessorClockFrequency; 291 UINT64 InterruptClockFrequency; 292 WINBOOL ApicRemoteRead; 293 WHV_PROCESSOR_FEATURES_BANKS ProcessorFeaturesBanks; 294 UINT64 ReferenceTime; 295 } WHV_PARTITION_PROPERTY; 296 297 typedef UINT64 WHV_GUEST_PHYSICAL_ADDRESS; 298 typedef UINT64 WHV_GUEST_VIRTUAL_ADDRESS; 299 300 typedef enum WHV_MAP_GPA_RANGE_FLAGS { 301 WHvMapGpaRangeFlagNone = 0x00000000, 302 WHvMapGpaRangeFlagRead = 0x00000001, 303 WHvMapGpaRangeFlagWrite = 0x00000002, 304 WHvMapGpaRangeFlagExecute = 0x00000004, 305 WHvMapGpaRangeFlagTrackDirtyPages = 0x00000008 306 } WHV_MAP_GPA_RANGE_FLAGS; 307 308 DEFINE_ENUM_FLAG_OPERATORS(WHV_MAP_GPA_RANGE_FLAGS); 309 310 typedef enum WHV_TRANSLATE_GVA_FLAGS { 311 WHvTranslateGvaFlagNone = 0x00000000, 312 WHvTranslateGvaFlagValidateRead = 0x00000001, 313 WHvTranslateGvaFlagValidateWrite = 0x00000002, 314 WHvTranslateGvaFlagValidateExecute = 0x00000004, 315 WHvTranslateGvaFlagPrivilegeExempt = 0x00000008, 316 WHvTranslateGvaFlagSetPageTableBits = 0x00000010 317 } WHV_TRANSLATE_GVA_FLAGS; 318 319 DEFINE_ENUM_FLAG_OPERATORS(WHV_TRANSLATE_GVA_FLAGS); 320 321 typedef enum WHV_TRANSLATE_GVA_RESULT_CODE { 322 WHvTranslateGvaResultSuccess = 0, 323 WHvTranslateGvaResultPageNotPresent = 1, 324 WHvTranslateGvaResultPrivilegeViolation = 2, 325 WHvTranslateGvaResultInvalidPageTableFlags = 3, 326 WHvTranslateGvaResultGpaUnmapped = 4, 327 WHvTranslateGvaResultGpaNoReadAccess = 5, 328 WHvTranslateGvaResultGpaNoWriteAccess = 6, 329 WHvTranslateGvaResultGpaIllegalOverlayAccess = 7, 330 WHvTranslateGvaResultIntercept = 8 331 } WHV_TRANSLATE_GVA_RESULT_CODE; 332 333 typedef struct WHV_TRANSLATE_GVA_RESULT { 334 WHV_TRANSLATE_GVA_RESULT_CODE ResultCode; 335 UINT32 Reserved; 336 } WHV_TRANSLATE_GVA_RESULT; 337 338 typedef enum WHV_REGISTER_NAME { 339 WHvX64RegisterRax = 0x00000000, 340 WHvX64RegisterRcx = 0x00000001, 341 WHvX64RegisterRdx = 0x00000002, 342 WHvX64RegisterRbx = 0x00000003, 343 WHvX64RegisterRsp = 0x00000004, 344 WHvX64RegisterRbp = 0x00000005, 345 WHvX64RegisterRsi = 0x00000006, 346 WHvX64RegisterRdi = 0x00000007, 347 WHvX64RegisterR8 = 0x00000008, 348 WHvX64RegisterR9 = 0x00000009, 349 WHvX64RegisterR10 = 0x0000000A, 350 WHvX64RegisterR11 = 0x0000000B, 351 WHvX64RegisterR12 = 0x0000000C, 352 WHvX64RegisterR13 = 0x0000000D, 353 WHvX64RegisterR14 = 0x0000000E, 354 WHvX64RegisterR15 = 0x0000000F, 355 WHvX64RegisterRip = 0x00000010, 356 WHvX64RegisterRflags = 0x00000011, 357 WHvX64RegisterEs = 0x00000012, 358 WHvX64RegisterCs = 0x00000013, 359 WHvX64RegisterSs = 0x00000014, 360 WHvX64RegisterDs = 0x00000015, 361 WHvX64RegisterFs = 0x00000016, 362 WHvX64RegisterGs = 0x00000017, 363 WHvX64RegisterLdtr = 0x00000018, 364 WHvX64RegisterTr = 0x00000019, 365 WHvX64RegisterIdtr = 0x0000001A, 366 WHvX64RegisterGdtr = 0x0000001B, 367 WHvX64RegisterCr0 = 0x0000001C, 368 WHvX64RegisterCr2 = 0x0000001D, 369 WHvX64RegisterCr3 = 0x0000001E, 370 WHvX64RegisterCr4 = 0x0000001F, 371 WHvX64RegisterCr8 = 0x00000020, 372 WHvX64RegisterDr0 = 0x00000021, 373 WHvX64RegisterDr1 = 0x00000022, 374 WHvX64RegisterDr2 = 0x00000023, 375 WHvX64RegisterDr3 = 0x00000024, 376 WHvX64RegisterDr6 = 0x00000025, 377 WHvX64RegisterDr7 = 0x00000026, 378 WHvX64RegisterXCr0 = 0x00000027, 379 WHvX64RegisterXmm0 = 0x00001000, 380 WHvX64RegisterXmm1 = 0x00001001, 381 WHvX64RegisterXmm2 = 0x00001002, 382 WHvX64RegisterXmm3 = 0x00001003, 383 WHvX64RegisterXmm4 = 0x00001004, 384 WHvX64RegisterXmm5 = 0x00001005, 385 WHvX64RegisterXmm6 = 0x00001006, 386 WHvX64RegisterXmm7 = 0x00001007, 387 WHvX64RegisterXmm8 = 0x00001008, 388 WHvX64RegisterXmm9 = 0x00001009, 389 WHvX64RegisterXmm10 = 0x0000100A, 390 WHvX64RegisterXmm11 = 0x0000100B, 391 WHvX64RegisterXmm12 = 0x0000100C, 392 WHvX64RegisterXmm13 = 0x0000100D, 393 WHvX64RegisterXmm14 = 0x0000100E, 394 WHvX64RegisterXmm15 = 0x0000100F, 395 WHvX64RegisterFpMmx0 = 0x00001010, 396 WHvX64RegisterFpMmx1 = 0x00001011, 397 WHvX64RegisterFpMmx2 = 0x00001012, 398 WHvX64RegisterFpMmx3 = 0x00001013, 399 WHvX64RegisterFpMmx4 = 0x00001014, 400 WHvX64RegisterFpMmx5 = 0x00001015, 401 WHvX64RegisterFpMmx6 = 0x00001016, 402 WHvX64RegisterFpMmx7 = 0x00001017, 403 WHvX64RegisterFpControlStatus = 0x00001018, 404 WHvX64RegisterXmmControlStatus = 0x00001019, 405 WHvX64RegisterTsc = 0x00002000, 406 WHvX64RegisterEfer = 0x00002001, 407 WHvX64RegisterKernelGsBase = 0x00002002, 408 WHvX64RegisterApicBase = 0x00002003, 409 WHvX64RegisterPat = 0x00002004, 410 WHvX64RegisterSysenterCs = 0x00002005, 411 WHvX64RegisterSysenterEip = 0x00002006, 412 WHvX64RegisterSysenterEsp = 0x00002007, 413 WHvX64RegisterStar = 0x00002008, 414 WHvX64RegisterLstar = 0x00002009, 415 WHvX64RegisterCstar = 0x0000200A, 416 WHvX64RegisterSfmask = 0x0000200B, 417 WHvX64RegisterInitialApicId = 0x0000200C, 418 WHvX64RegisterMsrMtrrCap = 0x0000200D, 419 WHvX64RegisterMsrMtrrDefType = 0x0000200E, 420 WHvX64RegisterMsrMtrrPhysBase0 = 0x00002010, 421 WHvX64RegisterMsrMtrrPhysBase1 = 0x00002011, 422 WHvX64RegisterMsrMtrrPhysBase2 = 0x00002012, 423 WHvX64RegisterMsrMtrrPhysBase3 = 0x00002013, 424 WHvX64RegisterMsrMtrrPhysBase4 = 0x00002014, 425 WHvX64RegisterMsrMtrrPhysBase5 = 0x00002015, 426 WHvX64RegisterMsrMtrrPhysBase6 = 0x00002016, 427 WHvX64RegisterMsrMtrrPhysBase7 = 0x00002017, 428 WHvX64RegisterMsrMtrrPhysBase8 = 0x00002018, 429 WHvX64RegisterMsrMtrrPhysBase9 = 0x00002019, 430 WHvX64RegisterMsrMtrrPhysBaseA = 0x0000201A, 431 WHvX64RegisterMsrMtrrPhysBaseB = 0x0000201B, 432 WHvX64RegisterMsrMtrrPhysBaseC = 0x0000201C, 433 WHvX64RegisterMsrMtrrPhysBaseD = 0x0000201D, 434 WHvX64RegisterMsrMtrrPhysBaseE = 0x0000201E, 435 WHvX64RegisterMsrMtrrPhysBaseF = 0x0000201F, 436 WHvX64RegisterMsrMtrrPhysMask0 = 0x00002040, 437 WHvX64RegisterMsrMtrrPhysMask1 = 0x00002041, 438 WHvX64RegisterMsrMtrrPhysMask2 = 0x00002042, 439 WHvX64RegisterMsrMtrrPhysMask3 = 0x00002043, 440 WHvX64RegisterMsrMtrrPhysMask4 = 0x00002044, 441 WHvX64RegisterMsrMtrrPhysMask5 = 0x00002045, 442 WHvX64RegisterMsrMtrrPhysMask6 = 0x00002046, 443 WHvX64RegisterMsrMtrrPhysMask7 = 0x00002047, 444 WHvX64RegisterMsrMtrrPhysMask8 = 0x00002048, 445 WHvX64RegisterMsrMtrrPhysMask9 = 0x00002049, 446 WHvX64RegisterMsrMtrrPhysMaskA = 0x0000204A, 447 WHvX64RegisterMsrMtrrPhysMaskB = 0x0000204B, 448 WHvX64RegisterMsrMtrrPhysMaskC = 0x0000204C, 449 WHvX64RegisterMsrMtrrPhysMaskD = 0x0000204D, 450 WHvX64RegisterMsrMtrrPhysMaskE = 0x0000204E, 451 WHvX64RegisterMsrMtrrPhysMaskF = 0x0000204F, 452 WHvX64RegisterMsrMtrrFix64k00000 = 0x00002070, 453 WHvX64RegisterMsrMtrrFix16k80000 = 0x00002071, 454 WHvX64RegisterMsrMtrrFix16kA0000 = 0x00002072, 455 WHvX64RegisterMsrMtrrFix4kC0000 = 0x00002073, 456 WHvX64RegisterMsrMtrrFix4kC8000 = 0x00002074, 457 WHvX64RegisterMsrMtrrFix4kD0000 = 0x00002075, 458 WHvX64RegisterMsrMtrrFix4kD8000 = 0x00002076, 459 WHvX64RegisterMsrMtrrFix4kE0000 = 0x00002077, 460 WHvX64RegisterMsrMtrrFix4kE8000 = 0x00002078, 461 WHvX64RegisterMsrMtrrFix4kF0000 = 0x00002079, 462 WHvX64RegisterMsrMtrrFix4kF8000 = 0x0000207A, 463 WHvX64RegisterTscAux = 0x0000207B, 464 WHvX64RegisterSpecCtrl = 0x00002084, 465 WHvX64RegisterPredCmd = 0x00002085, 466 WHvX64RegisterTscVirtualOffset = 0x00002087, 467 WHvX64RegisterApicId = 0x00003002, 468 WHvX64RegisterApicVersion = 0x00003003, 469 WHvRegisterPendingInterruption = 0x80000000, 470 WHvRegisterInterruptState = 0x80000001, 471 WHvRegisterPendingEvent = 0x80000002, 472 WHvX64RegisterDeliverabilityNotifications = 0x80000004, 473 WHvRegisterInternalActivityState = 0x80000005, 474 WHvX64RegisterPendingDebugException = 0x80000006 475 } WHV_REGISTER_NAME; 476 477 typedef union DECLSPEC_ALIGN(16) WHV_UINT128 { 478 __C89_NAMELESS struct { 479 UINT64 Low64; 480 UINT64 High64; 481 }; 482 UINT32 Dword[4]; 483 } WHV_UINT128; 484 485 typedef union WHV_X64_FP_REGISTER { 486 __C89_NAMELESS struct { 487 UINT64 Mantissa; 488 UINT64 BiasedExponent:15; 489 UINT64 Sign:1; 490 UINT64 Reserved:48; 491 }; 492 WHV_UINT128 AsUINT128; 493 } WHV_X64_FP_REGISTER; 494 495 typedef union WHV_X64_FP_CONTROL_STATUS_REGISTER { 496 __C89_NAMELESS struct { 497 UINT16 FpControl; 498 UINT16 FpStatus; 499 UINT8 FpTag; 500 UINT8 Reserved; 501 UINT16 LastFpOp; 502 __C89_NAMELESS union { 503 UINT64 LastFpRip; 504 __C89_NAMELESS struct { 505 UINT32 LastFpEip; 506 UINT16 LastFpCs; 507 UINT16 Reserved2; 508 }; 509 }; 510 }; 511 WHV_UINT128 AsUINT128; 512 } WHV_X64_FP_CONTROL_STATUS_REGISTER; 513 514 typedef union WHV_X64_XMM_CONTROL_STATUS_REGISTER { 515 __C89_NAMELESS struct { 516 __C89_NAMELESS union { 517 UINT64 LastFpRdp; 518 __C89_NAMELESS struct { 519 UINT32 LastFpDp; 520 UINT16 LastFpDs; 521 UINT16 Reserved; 522 }; 523 }; 524 UINT32 XmmStatusControl; 525 UINT32 XmmStatusControlMask; 526 }; 527 WHV_UINT128 AsUINT128; 528 } WHV_X64_XMM_CONTROL_STATUS_REGISTER; 529 530 typedef struct WHV_X64_SEGMENT_REGISTER { 531 UINT64 Base; 532 UINT32 Limit; 533 UINT16 Selector; 534 __C89_NAMELESS union { 535 __C89_NAMELESS struct { 536 UINT16 SegmentType:4; 537 UINT16 NonSystemSegment:1; 538 UINT16 DescriptorPrivilegeLevel:2; 539 UINT16 Present:1; 540 UINT16 Reserved:4; 541 UINT16 Available:1; 542 UINT16 Long:1; 543 UINT16 Default:1; 544 UINT16 Granularity:1; 545 }; 546 UINT16 Attributes; 547 }; 548 } WHV_X64_SEGMENT_REGISTER; 549 550 typedef struct WHV_X64_TABLE_REGISTER { 551 UINT16 Pad[3]; 552 UINT16 Limit; 553 UINT64 Base; 554 } WHV_X64_TABLE_REGISTER; 555 556 typedef union WHV_X64_INTERRUPT_STATE_REGISTER { 557 __C89_NAMELESS struct { 558 UINT64 InterruptShadow:1; 559 UINT64 NmiMasked:1; 560 UINT64 Reserved:62; 561 }; 562 UINT64 AsUINT64; 563 } WHV_X64_INTERRUPT_STATE_REGISTER; 564 565 typedef union WHV_X64_PENDING_INTERRUPTION_REGISTER { 566 __C89_NAMELESS struct { 567 UINT32 InterruptionPending:1; 568 UINT32 InterruptionType:3; 569 UINT32 DeliverErrorCode:1; 570 UINT32 InstructionLength:4; 571 UINT32 NestedEvent:1; 572 UINT32 Reserved:6; 573 UINT32 InterruptionVector:16; 574 UINT32 ErrorCode; 575 }; 576 UINT64 AsUINT64; 577 } WHV_X64_PENDING_INTERRUPTION_REGISTER; 578 579 C_ASSERT(sizeof(WHV_X64_PENDING_INTERRUPTION_REGISTER) == sizeof(UINT64)); 580 581 typedef union WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER { 582 __C89_NAMELESS struct { 583 UINT64 NmiNotification:1; 584 UINT64 InterruptNotification:1; 585 UINT64 InterruptPriority:4; 586 UINT64 Reserved:58; 587 }; 588 UINT64 AsUINT64; 589 } WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER; 590 591 C_ASSERT(sizeof(WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER) == sizeof(UINT64)); 592 593 594 typedef enum WHV_X64_PENDING_EVENT_TYPE { 595 WHvX64PendingEventException = 0, 596 WHvX64PendingEventExtInt = 5 597 } WHV_X64_PENDING_EVENT_TYPE; 598 599 typedef union WHV_X64_PENDING_EXCEPTION_EVENT { 600 __C89_NAMELESS struct { 601 UINT32 EventPending : 1; 602 UINT32 EventType : 3; 603 UINT32 Reserved0 : 4; 604 UINT32 DeliverErrorCode : 1; 605 UINT32 Reserved1 : 7; 606 UINT32 Vector : 16; 607 UINT32 ErrorCode; 608 UINT64 ExceptionParameter; 609 }; 610 WHV_UINT128 AsUINT128; 611 } WHV_X64_PENDING_EXCEPTION_EVENT; 612 613 C_ASSERT(sizeof(WHV_X64_PENDING_EXCEPTION_EVENT) == sizeof(WHV_UINT128)); 614 615 typedef union WHV_X64_PENDING_EXT_INT_EVENT { 616 __C89_NAMELESS struct { 617 UINT64 EventPending : 1; 618 UINT64 EventType : 3; 619 UINT64 Reserved0 : 4; 620 UINT64 Vector : 8; 621 UINT64 Reserved1 : 48; 622 UINT64 Reserved2; 623 }; 624 WHV_UINT128 AsUINT128; 625 } WHV_X64_PENDING_EXT_INT_EVENT; 626 627 C_ASSERT(sizeof(WHV_X64_PENDING_EXT_INT_EVENT) == sizeof(WHV_UINT128)); 628 629 typedef union WHV_INTERNAL_ACTIVITY_REGISTER { 630 __C89_NAMELESS struct { 631 UINT64 StartupSuspend : 1; 632 UINT64 HaltSuspend : 1; 633 UINT64 IdleSuspend : 1; 634 UINT64 Reserved :61; 635 }; 636 UINT64 AsUINT64; 637 } WHV_INTERNAL_ACTIVITY_REGISTER; 638 639 C_ASSERT(sizeof(WHV_INTERNAL_ACTIVITY_REGISTER) == sizeof(UINT64)); 640 641 typedef union WHV_X64_PENDING_DEBUG_EXCEPTION { 642 UINT64 AsUINT64; 643 __C89_NAMELESS struct { 644 UINT64 Breakpoint0 : 1; 645 UINT64 Breakpoint1 : 1; 646 UINT64 Breakpoint2 : 1; 647 UINT64 Breakpoint3 : 1; 648 UINT64 SingleStep : 1; 649 UINT64 Reserved0 : 59; 650 }; 651 } WHV_X64_PENDING_DEBUG_EXCEPTION; 652 653 C_ASSERT(sizeof(WHV_X64_PENDING_DEBUG_EXCEPTION) == sizeof(UINT64)); 654 655 typedef union WHV_REGISTER_VALUE { 656 WHV_UINT128 Reg128; 657 UINT64 Reg64; 658 UINT32 Reg32; 659 UINT16 Reg16; 660 UINT8 Reg8; 661 WHV_X64_FP_REGISTER Fp; 662 WHV_X64_FP_CONTROL_STATUS_REGISTER FpControlStatus; 663 WHV_X64_XMM_CONTROL_STATUS_REGISTER XmmControlStatus; 664 WHV_X64_SEGMENT_REGISTER Segment; 665 WHV_X64_TABLE_REGISTER Table; 666 WHV_X64_INTERRUPT_STATE_REGISTER InterruptState; 667 WHV_X64_PENDING_INTERRUPTION_REGISTER PendingInterruption; 668 WHV_X64_DELIVERABILITY_NOTIFICATIONS_REGISTER DeliverabilityNotifications; 669 WHV_X64_PENDING_EXCEPTION_EVENT ExceptionEvent; 670 WHV_X64_PENDING_EXT_INT_EVENT ExtIntEvent; 671 WHV_INTERNAL_ACTIVITY_REGISTER InternalActivity; 672 WHV_X64_PENDING_DEBUG_EXCEPTION PendingDebugException; 673 } WHV_REGISTER_VALUE; 674 675 typedef enum WHV_RUN_VP_EXIT_REASON { 676 WHvRunVpExitReasonNone = 0x00000000, 677 WHvRunVpExitReasonMemoryAccess = 0x00000001, 678 WHvRunVpExitReasonX64IoPortAccess = 0x00000002, 679 WHvRunVpExitReasonUnrecoverableException = 0x00000004, 680 WHvRunVpExitReasonInvalidVpRegisterValue = 0x00000005, 681 WHvRunVpExitReasonUnsupportedFeature = 0x00000006, 682 WHvRunVpExitReasonX64InterruptWindow = 0x00000007, 683 WHvRunVpExitReasonX64Halt = 0x00000008, 684 WHvRunVpExitReasonX64ApicEoi = 0x00000009, 685 WHvRunVpExitReasonX64MsrAccess = 0x00001000, 686 WHvRunVpExitReasonX64Cpuid = 0x00001001, 687 WHvRunVpExitReasonException = 0x00001002, 688 WHvRunVpExitReasonX64Rdtsc = 0x00001003, 689 WHvRunVpExitReasonX64ApicSmiTrap = 0x00001004, 690 WHvRunVpExitReasonHypercall = 0x00001005, 691 WHvRunVpExitReasonX64ApicInitSipiTrap = 0x00001006, 692 WHvRunVpExitReasonCanceled = 0x00002001 693 } WHV_RUN_VP_EXIT_REASON; 694 695 typedef union WHV_X64_VP_EXECUTION_STATE { 696 __C89_NAMELESS struct { 697 UINT16 Cpl : 2; 698 UINT16 Cr0Pe : 1; 699 UINT16 Cr0Am : 1; 700 UINT16 EferLma : 1; 701 UINT16 DebugActive : 1; 702 UINT16 InterruptionPending : 1; 703 UINT16 Reserved0 : 5; 704 UINT16 InterruptShadow : 1; 705 UINT16 Reserved1 : 3; 706 }; 707 UINT16 AsUINT16; 708 } WHV_X64_VP_EXECUTION_STATE; 709 710 C_ASSERT(sizeof(WHV_X64_VP_EXECUTION_STATE) == sizeof(UINT16)); 711 712 typedef struct WHV_VP_EXIT_CONTEXT { 713 WHV_X64_VP_EXECUTION_STATE ExecutionState; 714 UINT8 InstructionLength : 4; 715 UINT8 Cr8 : 4; 716 UINT8 Reserved; 717 UINT32 Reserved2; 718 WHV_X64_SEGMENT_REGISTER Cs; 719 UINT64 Rip; 720 UINT64 Rflags; 721 } WHV_VP_EXIT_CONTEXT; 722 723 typedef enum WHV_MEMORY_ACCESS_TYPE { 724 WHvMemoryAccessRead = 0, 725 WHvMemoryAccessWrite = 1, 726 WHvMemoryAccessExecute = 2 727 } WHV_MEMORY_ACCESS_TYPE; 728 729 typedef union WHV_MEMORY_ACCESS_INFO { 730 __C89_NAMELESS struct { 731 UINT32 AccessType : 2; 732 UINT32 GpaUnmapped : 1; 733 UINT32 GvaValid : 1; 734 UINT32 Reserved : 28; 735 }; 736 UINT32 AsUINT32; 737 } WHV_MEMORY_ACCESS_INFO; 738 739 typedef struct WHV_MEMORY_ACCESS_CONTEXT { 740 UINT8 InstructionByteCount; 741 UINT8 Reserved[3]; 742 UINT8 InstructionBytes[16]; 743 WHV_MEMORY_ACCESS_INFO AccessInfo; 744 WHV_GUEST_PHYSICAL_ADDRESS Gpa; 745 WHV_GUEST_VIRTUAL_ADDRESS Gva; 746 } WHV_MEMORY_ACCESS_CONTEXT; 747 748 typedef union WHV_X64_IO_PORT_ACCESS_INFO { 749 __C89_NAMELESS struct { 750 UINT32 IsWrite : 1; 751 UINT32 AccessSize: 3; 752 UINT32 StringOp : 1; 753 UINT32 RepPrefix : 1; 754 UINT32 Reserved : 26; 755 }; 756 UINT32 AsUINT32; 757 } WHV_X64_IO_PORT_ACCESS_INFO; 758 759 C_ASSERT(sizeof(WHV_X64_IO_PORT_ACCESS_INFO) == sizeof(UINT32)); 760 761 typedef struct WHV_X64_IO_PORT_ACCESS_CONTEXT { 762 UINT8 InstructionByteCount; 763 UINT8 Reserved[3]; 764 UINT8 InstructionBytes[16]; 765 WHV_X64_IO_PORT_ACCESS_INFO AccessInfo; 766 UINT16 PortNumber; 767 UINT16 Reserved2[3]; 768 UINT64 Rax; 769 UINT64 Rcx; 770 UINT64 Rsi; 771 UINT64 Rdi; 772 WHV_X64_SEGMENT_REGISTER Ds; 773 WHV_X64_SEGMENT_REGISTER Es; 774 } WHV_X64_IO_PORT_ACCESS_CONTEXT; 775 776 typedef union WHV_X64_MSR_ACCESS_INFO { 777 __C89_NAMELESS struct { 778 UINT32 IsWrite : 1; 779 UINT32 Reserved : 31; 780 }; 781 UINT32 AsUINT32; 782 } WHV_X64_MSR_ACCESS_INFO; 783 784 C_ASSERT(sizeof(WHV_X64_MSR_ACCESS_INFO) == sizeof(UINT32)); 785 786 typedef struct WHV_X64_MSR_ACCESS_CONTEXT { 787 WHV_X64_MSR_ACCESS_INFO AccessInfo; 788 UINT32 MsrNumber; 789 UINT64 Rax; 790 UINT64 Rdx; 791 } WHV_X64_MSR_ACCESS_CONTEXT; 792 793 typedef struct WHV_X64_CPUID_ACCESS_CONTEXT { 794 UINT64 Rax; 795 UINT64 Rcx; 796 UINT64 Rdx; 797 UINT64 Rbx; 798 UINT64 DefaultResultRax; 799 UINT64 DefaultResultRcx; 800 UINT64 DefaultResultRdx; 801 UINT64 DefaultResultRbx; 802 } WHV_X64_CPUID_ACCESS_CONTEXT; 803 804 typedef union WHV_VP_EXCEPTION_INFO { 805 __C89_NAMELESS struct { 806 UINT32 ErrorCodeValid : 1; 807 UINT32 SoftwareException : 1; 808 UINT32 Reserved : 30; 809 }; 810 UINT32 AsUINT32; 811 } WHV_VP_EXCEPTION_INFO; 812 813 C_ASSERT(sizeof(WHV_VP_EXCEPTION_INFO) == sizeof(UINT32)); 814 815 typedef struct WHV_VP_EXCEPTION_CONTEXT { 816 UINT8 InstructionByteCount; 817 UINT8 Reserved[3]; 818 UINT8 InstructionBytes[16]; 819 WHV_VP_EXCEPTION_INFO ExceptionInfo; 820 UINT8 ExceptionType; 821 UINT8 Reserved2[3]; 822 UINT32 ErrorCode; 823 UINT64 ExceptionParameter; 824 } WHV_VP_EXCEPTION_CONTEXT; 825 826 typedef enum WHV_X64_UNSUPPORTED_FEATURE_CODE { 827 WHvUnsupportedFeatureIntercept = 1, 828 WHvUnsupportedFeatureTaskSwitchTss = 2 829 } WHV_X64_UNSUPPORTED_FEATURE_CODE; 830 831 typedef struct WHV_X64_UNSUPPORTED_FEATURE_CONTEXT { 832 WHV_X64_UNSUPPORTED_FEATURE_CODE FeatureCode; 833 UINT32 Reserved; 834 UINT64 FeatureParameter; 835 } WHV_X64_UNSUPPORTED_FEATURE_CONTEXT; 836 837 typedef enum WHV_RUN_VP_CANCEL_REASON { 838 WhvRunVpCancelReasonUser = 0 839 } WHV_RUN_VP_CANCEL_REASON; 840 841 typedef struct WHV_RUN_VP_CANCELED_CONTEXT { 842 WHV_RUN_VP_CANCEL_REASON CancelReason; 843 } WHV_RUN_VP_CANCELED_CONTEXT; 844 845 typedef enum WHV_X64_PENDING_INTERRUPTION_TYPE { 846 WHvX64PendingInterrupt = 0, 847 WHvX64PendingNmi = 2, 848 WHvX64PendingException = 3 849 } WHV_X64_PENDING_INTERRUPTION_TYPE, *PWHV_X64_PENDING_INTERRUPTION_TYPE; 850 851 typedef struct WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT { 852 WHV_X64_PENDING_INTERRUPTION_TYPE DeliverableType; 853 } WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT, *PWHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT; 854 855 typedef struct WHV_X64_APIC_EOI_CONTEXT { 856 UINT32 InterruptVector; 857 } WHV_X64_APIC_EOI_CONTEXT; 858 859 typedef union WHV_X64_RDTSC_INFO { 860 __C89_NAMELESS struct { 861 UINT64 IsRdtscp : 1; 862 UINT64 Reserved : 63; 863 }; 864 UINT64 AsUINT64; 865 } WHV_X64_RDTSC_INFO; 866 867 typedef struct WHV_X64_RDTSC_CONTEXT { 868 UINT64 TscAux; 869 UINT64 VirtualOffset; 870 UINT64 Tsc; 871 UINT64 ReferenceTime; 872 WHV_X64_RDTSC_INFO RdtscInfo; 873 } WHV_X64_RDTSC_CONTEXT; 874 875 typedef struct WHV_X64_APIC_SMI_CONTEXT { 876 UINT64 ApicIcr; 877 } WHV_X64_APIC_SMI_CONTEXT; 878 879 #define WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS 6 880 881 typedef struct _WHV_HYPERCALL_CONTEXT { 882 UINT64 Rax; 883 UINT64 Rbx; 884 UINT64 Rcx; 885 UINT64 Rdx; 886 UINT64 R8; 887 UINT64 Rsi; 888 UINT64 Rdi; 889 UINT64 Reserved0; 890 WHV_UINT128 XmmRegisters[WHV_HYPERCALL_CONTEXT_MAX_XMM_REGISTERS]; 891 UINT64 Reserved1[2]; 892 } WHV_HYPERCALL_CONTEXT, *PWHV_HYPERCALL_CONTEXT; 893 894 typedef struct WHV_X64_APIC_INIT_SIPI_CONTEXT { 895 UINT64 ApicIcr; 896 } WHV_X64_APIC_INIT_SIPI_CONTEXT; 897 898 typedef struct WHV_RUN_VP_EXIT_CONTEXT { 899 WHV_RUN_VP_EXIT_REASON ExitReason; 900 UINT32 Reserved; 901 WHV_VP_EXIT_CONTEXT VpContext; 902 __C89_NAMELESS union { 903 WHV_MEMORY_ACCESS_CONTEXT MemoryAccess; 904 WHV_X64_IO_PORT_ACCESS_CONTEXT IoPortAccess; 905 WHV_X64_MSR_ACCESS_CONTEXT MsrAccess; 906 WHV_X64_CPUID_ACCESS_CONTEXT CpuidAccess; 907 WHV_VP_EXCEPTION_CONTEXT VpException; 908 WHV_X64_INTERRUPTION_DELIVERABLE_CONTEXT InterruptWindow; 909 WHV_X64_UNSUPPORTED_FEATURE_CONTEXT UnsupportedFeature; 910 WHV_RUN_VP_CANCELED_CONTEXT CancelReason; 911 WHV_X64_APIC_EOI_CONTEXT ApicEoi; 912 WHV_X64_RDTSC_CONTEXT ReadTsc; 913 WHV_X64_APIC_SMI_CONTEXT ApicSmi; 914 WHV_HYPERCALL_CONTEXT Hypercall; 915 WHV_X64_APIC_INIT_SIPI_CONTEXT ApicInitSipi; 916 }; 917 } WHV_RUN_VP_EXIT_CONTEXT; 918 919 typedef enum WHV_INTERRUPT_TYPE { 920 WHvX64InterruptTypeFixed = 0, 921 WHvX64InterruptTypeLowestPriority = 1, 922 WHvX64InterruptTypeNmi = 4, 923 WHvX64InterruptTypeInit = 5, 924 WHvX64InterruptTypeSipi = 6, 925 WHvX64InterruptTypeLocalInt1 = 9 926 } WHV_INTERRUPT_TYPE; 927 928 typedef enum WHV_INTERRUPT_DESTINATION_MODE { 929 WHvX64InterruptDestinationModePhysical, 930 WHvX64InterruptDestinationModeLogical 931 } WHV_INTERRUPT_DESTINATION_MODE; 932 933 typedef enum WHV_INTERRUPT_TRIGGER_MODE { 934 WHvX64InterruptTriggerModeEdge, 935 WHvX64InterruptTriggerModeLevel 936 } WHV_INTERRUPT_TRIGGER_MODE; 937 938 typedef struct WHV_INTERRUPT_CONTROL { 939 UINT64 Type : 8; 940 UINT64 DestinationMode : 4; 941 UINT64 TriggerMode : 4; 942 UINT64 Reserved : 48; 943 UINT32 Destination; 944 UINT32 Vector; 945 } WHV_INTERRUPT_CONTROL; 946 947 typedef struct WHV_DOORBELL_MATCH_DATA { 948 WHV_GUEST_PHYSICAL_ADDRESS GuestAddress; 949 UINT64 Value; 950 UINT32 Length; 951 UINT32 MatchOnValue : 1; 952 UINT32 MatchOnLength : 1; 953 UINT32 Reserved : 30; 954 } WHV_DOORBELL_MATCH_DATA; 955 956 typedef enum WHV_PARTITION_COUNTER_SET { 957 WHvPartitionCounterSetMemory 958 } WHV_PARTITION_COUNTER_SET; 959 960 typedef struct WHV_PARTITION_MEMORY_COUNTERS { 961 UINT64 Mapped4KPageCount; 962 UINT64 Mapped2MPageCount; 963 UINT64 Mapped1GPageCount; 964 } WHV_PARTITION_MEMORY_COUNTERS; 965 966 typedef enum WHV_PROCESSOR_COUNTER_SET { 967 WHvProcessorCounterSetRuntime, 968 WHvProcessorCounterSetIntercepts, 969 WHvProcessorCounterSetEvents, 970 WHvProcessorCounterSetApic 971 } WHV_PROCESSOR_COUNTER_SET; 972 973 typedef struct WHV_PROCESSOR_RUNTIME_COUNTERS { 974 UINT64 TotalRuntime100ns; 975 UINT64 HypervisorRuntime100ns; 976 } WHV_PROCESSOR_RUNTIME_COUNTERS; 977 978 typedef struct WHV_PROCESSOR_INTERCEPT_COUNTER { 979 UINT64 Count; 980 UINT64 Time100ns; 981 } WHV_PROCESSOR_INTERCEPT_COUNTER; 982 983 typedef struct WHV_PROCESSOR_INTERCEPT_COUNTERS { 984 WHV_PROCESSOR_INTERCEPT_COUNTER PageInvalidations; 985 WHV_PROCESSOR_INTERCEPT_COUNTER ControlRegisterAccesses; 986 WHV_PROCESSOR_INTERCEPT_COUNTER IoInstructions; 987 WHV_PROCESSOR_INTERCEPT_COUNTER HaltInstructions; 988 WHV_PROCESSOR_INTERCEPT_COUNTER CpuidInstructions; 989 WHV_PROCESSOR_INTERCEPT_COUNTER MsrAccesses; 990 WHV_PROCESSOR_INTERCEPT_COUNTER OtherIntercepts; 991 WHV_PROCESSOR_INTERCEPT_COUNTER PendingInterrupts; 992 WHV_PROCESSOR_INTERCEPT_COUNTER EmulatedInstructions; 993 WHV_PROCESSOR_INTERCEPT_COUNTER DebugRegisterAccesses; 994 WHV_PROCESSOR_INTERCEPT_COUNTER PageFaultIntercepts; 995 } WHV_PROCESSOR_ACTIVITY_COUNTERS; 996 997 typedef struct WHV_PROCESSOR_EVENT_COUNTERS { 998 UINT64 PageFaultCount; 999 UINT64 ExceptionCount; 1000 UINT64 InterruptCount; 1001 } WHV_PROCESSOR_GUEST_EVENT_COUNTERS; 1002 1003 typedef struct WHV_PROCESSOR_APIC_COUNTERS { 1004 UINT64 MmioAccessCount; 1005 UINT64 EoiAccessCount; 1006 UINT64 TprAccessCount; 1007 UINT64 SentIpiCount; 1008 UINT64 SelfIpiCount; 1009 } WHV_PROCESSOR_APIC_COUNTERS; 1010 1011 #endif /* _WINHVAPIDEFS_H_ */ 1012