1 #if defined(CORE2) || defined(PENRYN) 2 #define ALIGNED_ACCESS 3 #endif 4 5 #ifdef NEHALEM 6 #define PREFETCH prefetcht0 7 #define PREFETCHW prefetcht0 8 #define PREFETCHSIZE (128 * 12) 9 #define ALIGNED_ACCESS 10 #endif 11 12 #ifdef ATHLON 13 #define PREFETCH prefetch 14 #define PREFETCHW prefetchw 15 #define PREFETCHSIZE (128 * 10) 16 #define ALIGNED_ACCESS 17 #define movsd movlps 18 #endif 19 20 #ifdef PENTIUM3 21 #define PREFETCH prefetcht0 22 #define PREFETCHSIZE (128 * 10) 23 #define ALIGNED_ACCESS 24 #define movsd movlps 25 #endif 26 27 #ifdef PENTIUM4 28 #define PREFETCH prefetcht0 29 #define PREFETCHSIZE (128 * 10) 30 #define FETCH128 31 #define ALIGNED_ACCESS 32 #define xorps pxor 33 #define xorpd pxor 34 #endif 35 36 #ifdef ATOM 37 #define ALIGNED_ACCESS 38 #define PREFETCH prefetcht0 39 #define PREFETCHSIZE ( 64 * 12 + 32) 40 #endif 41 42 #ifdef OPTERON 43 #define PREFETCH prefetch 44 #define PREFETCHW prefetchw 45 #define PREFETCHSIZE (128 * 3) 46 #define movsd movlps 47 #endif 48 49 #ifdef BARCELONA 50 #define PREFETCH prefetch 51 #define PREFETCHW prefetchw 52 #define PREFETCHSIZE (128 * 5) 53 #define ALIGNED_ACCESS 54 #endif 55 56 #ifdef SHANGHAI 57 #define PREFETCH prefetch 58 #define PREFETCHW prefetchw 59 #define PREFETCHSIZE (128 * 5) 60 #define ALIGNED_ACCESS 61 #endif 62 63 #ifdef NANO 64 #define PREFETCH prefetcht0 65 #define PREFETCHW prefetcht0 66 #define PREFETCHSIZE (128 * 4) 67 #define ALIGNED_ACCESS 68 #endif 69 70 #define PREOFFSET 128 71 72 73 #ifdef HAVE_SSE2 74 #define PSHUFD1(A, B) pshufd A, B, B 75 #define PSHUFD2(A, B, C) pshufd A, B, C 76 #else 77 #define PSHUFD1(A, B) shufps A, B, B 78 #define PSHUFD2(A, B, C) movaps B, C; shufps A, C, C 79 #endif 80 81 #define MOVDDUP1(OFFSET, BASE, REGS) movddup OFFSET(BASE), REGS 82 83 #define MOVAPS(OFFSET, BASE, REGS) movlps REGS, OFFSET(BASE); movhps REGS, OFFSET + SIZE(BASE) 84 85