1Copyright 1996, 2001 Free Software Foundation, Inc.
2
3This file is part of the GNU MP Library.
4
5The GNU MP Library is free software; you can redistribute it and/or modify
6it under the terms of the GNU Lesser General Public License as published by
7the Free Software Foundation; either version 2.1 of the License, or (at your
8option) any later version.
9
10The GNU MP Library is distributed in the hope that it will be useful, but
11WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public
13License for more details.
14
15You should have received a copy of the GNU Lesser General Public License
16along with the GNU MP Library; see the file COPYING.LIB.  If not, write to
17the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
1802110-1301, USA.
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20
21
22
23
24This directory contains mpn functions for various SPARC chips.  Code that
25runs only on version 8 SPARC implementations, is in the v8 subdirectory.
26
27RELEVANT OPTIMIZATION ISSUES
28
29  Load and Store timing
30
31On most early SPARC implementations, the ST instructions takes multiple
32cycles, while a STD takes just a single cycle more than an ST.  For the CPUs
33in SPARCstation I and II, the times are 3 and 4 cycles, respectively.
34Therefore, combining two ST instructions into a STD when possible is a
35significant optimization.
36
37Later SPARC implementations have single cycle ST.
38
39For SuperSPARC, we can perform just one memory instruction per cycle, even
40if up to two integer instructions can be executed in its pipeline.  For
41programs that perform so many memory operations that there are not enough
42non-memory operations to issue in parallel with all memory operations, using
43LDD and STD when possible helps.
44
45UltraSPARC-1/2 has very slow integer multiplication.  In the v9 subdirectory,
46we therefore use floating-point multiplication.
47
48STATUS
49
501. On a SuperSPARC, mpn_lshift and mpn_rshift run at 3 cycles/limb, or 2.5
51   cycles/limb asymptotically.  We could optimize speed for special counts
52   by using ADDXCC.
53
542. On a SuperSPARC, mpn_add_n and mpn_sub_n runs at 2.5 cycles/limb, or 2
55   cycles/limb asymptotically.
56
573. mpn_mul_1 runs at what is believed to be optimal speed.
58
594. On SuperSPARC, mpn_addmul_1 and mpn_submul_1 could both be improved by a
60   cycle by avoiding one of the add instructions.  See a29k/addmul_1.
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62The speed of the code for other SPARC implementations is uncertain.
63