1;; Predicate definitions for GCN.
2;; Copyright (C) 2016-2021 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5;;
6;; GCC is free software; you can redistribute it and/or modify
7;; it under the terms of the GNU General Public License as published by
8;; the Free Software Foundation; either version 3, or (at your option)
9;; any later version.
10;;
11;; GCC is distributed in the hope that it will be useful,
12;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14;; GNU General Public License for more details.
15;;
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING3.  If not see
18;; <http://www.gnu.org/licenses/>.
19;; Return true if VALUE can be stored in a sign extended immediate field.
20
21(define_predicate "gcn_conditional_register_operand"
22  (match_operand 0 "register_operand")
23{
24  if (GET_CODE (op) == SUBREG)
25    op = SUBREG_REG (op);
26
27  if (!REG_P (op) || GET_MODE (op) != BImode)
28    return 0;
29
30  return REGNO (op) == VCCZ_REG
31	 || REGNO (op) == VCC_REG   /* Implied VCCZ.  */
32	 || REGNO (op) == SCC_REG
33	 || REGNO (op) == EXECZ_REG
34	 || REGNO (op) >= FIRST_PSEUDO_REGISTER;
35})
36
37(define_predicate "gcn_ssrc_register_operand"
38  (match_operand 0 "register_operand")
39{
40  if (GET_CODE (op) == SUBREG)
41    op = SUBREG_REG (op);
42
43  if (!REG_P (op))
44    return false;
45
46  return SSRC_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
47})
48
49(define_predicate "gcn_sdst_register_operand"
50  (match_operand 0 "register_operand")
51{
52  if (GET_CODE (op) == SUBREG)
53    op = SUBREG_REG (op);
54
55  if (!REG_P (op))
56    return false;
57
58  return SDST_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
59})
60
61(define_predicate "gcn_vgpr_register_operand"
62  (match_operand 0 "register_operand")
63{
64  if (GET_CODE (op) == SUBREG)
65    op = SUBREG_REG (op);
66
67  if (!REG_P (op))
68    return false;
69
70  return VGPR_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
71})
72
73(define_predicate "gcn_inline_immediate_operand"
74  (match_code "const_int,const_double,const_vector")
75{
76  return gcn_inline_constant_p (op);
77})
78
79(define_predicate "gcn_vop3_operand"
80  (ior (match_operand 0 "gcn_inline_immediate_operand")
81       (match_operand 0 "register_operand")))
82
83(define_predicate "gcn_vec0_operand"
84  (match_code "const_vector")
85{
86  return CONST_VECTOR_ELT (op, 0) == const0_rtx && gcn_inline_constant_p (op);
87})
88
89(define_predicate "gcn_vec1_operand"
90  (match_code "const_vector")
91{
92  return CONST_VECTOR_ELT (op, 0) == const1_rtx && gcn_inline_constant_p (op);
93})
94
95(define_predicate "gcn_vec1d_operand"
96  (match_code "const_vector")
97{
98  if (!gcn_inline_constant_p (op))
99    return false;
100
101  rtx elem = CONST_VECTOR_ELT (op, 0);
102  if (!CONST_DOUBLE_P (elem))
103    return false;
104  return real_identical (CONST_DOUBLE_REAL_VALUE (elem), &dconst1);
105})
106
107(define_predicate "gcn_const1d_operand"
108  (match_code "const_double")
109{
110  return gcn_inline_constant_p (op)
111      && real_identical (CONST_DOUBLE_REAL_VALUE (op), &dconst1);
112})
113
114(define_predicate "gcn_32bit_immediate_operand"
115  (match_code "const_int,const_double,const_vector,symbol_ref,label_ref")
116{
117  return gcn_constant_p (op);
118})
119
120; LRA works smoother when exec values are immediate constants
121; prior register allocation.
122(define_predicate "gcn_exec_operand"
123  (ior (match_operand 0 "register_operand")
124       (match_code "const_int")))
125
126(define_predicate "gcn_exec_reg_operand"
127  (match_operand 0 "register_operand"))
128
129(define_predicate "gcn_load_operand"
130  (ior (match_operand 0 "nonimmediate_operand")
131       (match_operand 0 "gcn_32bit_immediate_operand")))
132
133(define_predicate "gcn_alu_operand"
134  (ior (match_operand 0 "register_operand")
135       (match_operand 0 "gcn_32bit_immediate_operand")))
136
137(define_predicate "gcn_ds_memory_operand"
138  (and (match_code "mem")
139       (and (match_test "AS_ANY_DS_P (MEM_ADDR_SPACE (op))")
140	    (match_operand 0 "memory_operand"))))
141
142(define_predicate "gcn_valu_dst_operand"
143  (ior (match_operand 0 "register_operand")
144       (match_operand 0 "gcn_ds_memory_operand")))
145
146(define_predicate "gcn_valu_src0_operand"
147  (ior (match_operand 0 "register_operand")
148       (ior (match_operand 0 "gcn_32bit_immediate_operand")
149	    (match_operand 0 "gcn_ds_memory_operand"))))
150
151(define_predicate "gcn_valu_src1_operand"
152  (match_operand 0 "register_operand"))
153
154(define_predicate "gcn_valu_src1com_operand"
155  (ior (match_operand 0 "register_operand")
156       (match_operand 0 "gcn_32bit_immediate_operand")))
157
158(define_predicate "gcn_conditional_operator"
159  (match_code "eq,ne"))
160
161(define_predicate "gcn_compare_64bit_operator"
162  (match_code "eq,ne"))
163
164(define_predicate "gcn_compare_operator"
165  (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu"))
166
167(define_predicate "gcn_fp_compare_operator"
168  (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu,ordered,unordered,uneq,unge,ungt,unle,unlt,ltgt"))
169
170(define_predicate "unary_operator"
171  (match_code "not,popcount"))
172
173(define_predicate "binary_operator"
174  (match_code "and,ior,xor,ashift,lshiftrt,ashiftrt,smin,smax,umin,umax"))
175
176(define_predicate "gcn_unspec_operand"
177  (and (match_code "unspec")
178       (match_test "XINT (op, 1) == UNSPEC_VECTOR")))
179
180(define_predicate "general_or_unspec_operand"
181  (ior (match_operand 0 "general_operand")
182       (and (match_code "unspec")
183            (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
184
185(define_predicate "gcn_register_or_unspec_operand"
186  (ior (match_operand 0 "register_operand")
187       (and (match_code "unspec")
188            (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
189
190(define_predicate "gcn_alu_or_unspec_operand"
191  (ior (match_operand 0 "gcn_alu_operand")
192       (and (match_code "unspec")
193            (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
194
195(define_predicate "gcn_register_ds_or_unspec_operand"
196  (ior (match_operand 0 "register_operand")
197       (ior (match_operand 0 "gcn_ds_memory_operand")
198	    (and (match_code "unspec")
199              (match_test "XINT (op, 1) == UNSPEC_VECTOR")))))
200