1 /* { dg-do compile { target lp64 } } */
2 /* { dg-options "-O -mlittle-endian -fno-stack-clash-protection -g" } */
3 /* { dg-final { check-function-bodies "**" "" } } */
4
5 #pragma GCC aarch64 "arm_sve.h"
6
7 /*
8 ** callee1:
9 ** ...
10 ** ldr (z[0-9]+), \[x1, #3, mul vl\]
11 ** ...
12 ** st4d {z[0-9]+\.d - \1\.d}, p0, \[x0\]
13 ** st2d {z3\.d - z4\.d}, p1, \[x0\]
14 ** st3d {z5\.d - z7\.d}, p2, \[x0\]
15 ** ret
16 */
17 void __attribute__((noipa))
callee1(void * x0,svfloat64x3_t z0,svfloat64x2_t z3,svfloat64x3_t z5,svfloat64x4_t stack1,svfloat64_t stack2,svbool_t p0,svbool_t p1,svbool_t p2)18 callee1 (void *x0, svfloat64x3_t z0, svfloat64x2_t z3, svfloat64x3_t z5,
19 svfloat64x4_t stack1, svfloat64_t stack2, svbool_t p0,
20 svbool_t p1, svbool_t p2)
21 {
22 svst4_f64 (p0, x0, stack1);
23 svst2_f64 (p1, x0, z3);
24 svst3_f64 (p2, x0, z5);
25 }
26
27 /*
28 ** callee2:
29 ** ptrue p3\.b, all
30 ** ld1d (z[0-9]+\.d), p3/z, \[x2\]
31 ** st1d \1, p0, \[x0\]
32 ** st2d {z3\.d - z4\.d}, p1, \[x0\]
33 ** st3d {z0\.d - z2\.d}, p2, \[x0\]
34 ** ret
35 */
36 void __attribute__((noipa))
callee2(void * x0,svfloat64x3_t z0,svfloat64x2_t z3,svfloat64x3_t z5,svfloat64x4_t stack1,svfloat64_t stack2,svbool_t p0,svbool_t p1,svbool_t p2)37 callee2 (void *x0, svfloat64x3_t z0, svfloat64x2_t z3, svfloat64x3_t z5,
38 svfloat64x4_t stack1, svfloat64_t stack2, svbool_t p0,
39 svbool_t p1, svbool_t p2)
40 {
41 svst1_f64 (p0, x0, stack2);
42 svst2_f64 (p1, x0, z3);
43 svst3_f64 (p2, x0, z0);
44 }
45
46 void __attribute__((noipa))
caller(void * x0)47 caller (void *x0)
48 {
49 svbool_t pg;
50 pg = svptrue_b8 ();
51 callee1 (x0,
52 svld3_vnum_f64 (pg, x0, -9),
53 svld2_vnum_f64 (pg, x0, -2),
54 svld3_vnum_f64 (pg, x0, 0),
55 svld4_vnum_f64 (pg, x0, 8),
56 svld1_vnum_f64 (pg, x0, 5),
57 svptrue_pat_b8 (SV_VL1),
58 svptrue_pat_b16 (SV_VL2),
59 svptrue_pat_b32 (SV_VL3));
60 }
61
62 /* { dg-final { scan-assembler {\tld3d\t{z0\.d - z2\.d}, p[0-7]/z, \[x0, #-9, mul vl\]\n} } } */
63 /* { dg-final { scan-assembler {\tld2d\t{z3\.d - z4\.d}, p[0-7]/z, \[x0, #-2, mul vl\]\n} } } */
64 /* { dg-final { scan-assembler {\tld3d\t{z5\.d - z7\.d}, p[0-7]/z, \[x0\]\n} } } */
65 /* { dg-final { scan-assembler {\tld4d\t{(z[0-9]+)\.d - z[0-9]+\.d}.*\tstr\t\1, \[x1\]\n} } } */
66 /* { dg-final { scan-assembler {\tld4d\t{z[0-9]+\.d - (z[0-9]+)\.d}.*\tstr\t\1, \[x1, #3, mul vl\]\n} } } */
67 /* { dg-final { scan-assembler {\tld1d\t(z[0-9]+\.d), p[0-7]/z, \[x0, #5, mul vl\]\n.*\tst1d\t\1, p[0-7], \[x2\]\n} } } */
68 /* { dg-final { scan-assembler {\tptrue\tp0\.b, vl1\n} } } */
69 /* { dg-final { scan-assembler {\tptrue\tp1\.h, vl2\n} } } */
70 /* { dg-final { scan-assembler {\tptrue\tp2\.s, vl3\n} } } */
71