1 /* Produce code-dense instructions and the assembler must *
2 * be okay with it. An example would be: *
3 * *
4 * sub_s r3, r1, r3 *
5 * *
6 * While generally for _short instructions_ , it is not *
7 * allowed to have different registers as the first and *
8 * second operands, the code-dense mode allows it. *
9 * This test is about the fact that if "-mcode-density" is *
10 * passed to gcc driver as the flag, "as" must receive it *
11 * as well, else it is going to choke on such encodings. */
12
13 /* { dg-do assemble } */
14 /* { dg-skip-if "" { ! { clmcpu } } } */
15 /* { dg-options "-mcpu=em_mini -mcode-density" } */
16
17 typedef long long uint64_t;
18
f1(void)19 uint64_t f1(void)
20 {
21 return 1;
22 }
23
f2(void)24 void f2(void)
25 {
26 uint64_t start_us = 0;
27 while ((f1() - start_us) < 2);
28 }
29
30 /* This is a tricky check, because it hardcodes register *
31 * numbers. Nevertheless, it is easier than coming up with *
32 * a regular expression that the first two operands should *
33 * not be the same. */
34 /* { dg-final { scan-assembler "sub_s\\s+r3,r1,r3" } } */
35