1 list p=p16f873 2 radix dec 3; 4; Test EEPROM and FLASH program single byte reads and writes. 5; on 16f873 which uses wide mode 6 7 __config _WDT_OFF 8 9 include "p16f873.inc" 10 include <coff.inc> ; Grab some useful macros 11 12 13 cblock 0x20 ; bank 0 and 2 14 adr_cnt 15 data_cnt 16 status_temp 17 datah 18 datal 19 ee_int 20 endc 21 22 ; W shadowing for interrupts 23 ; When an interrupt occurs, we don't know what the current bank settings 24 ; are. The solution here is to declare two temporaries that have the 25 ; same base address. That way we don't need to worry about the bank setting. 26 27 cblock 0x70 28 w_temp ; W is stored here during interrupts if the 29 ; bank bits point to bank 0 or 2 30 endc 31 cblock 0xf0 32 w_temp_shadow ; W is stored here during interrupts if the 33 ; bank bits point to bank 0 or 2 34 endc 35 36;;======================================================================== 37;;======================================================================== 38; 39; Start 40; 41 org 0 42 43 goto start 44 45 org 4 46 47 ;;************** 48 ;; Interrupt 49 ;;************* 50 51 movwf w_temp 52 swapf STATUS,W 53 clrf STATUS ;Bank 0 54 movwf status_temp 55 56 btfss PIR2,EEIF 57 goto check 58 59;;; eeprom has interrupted 60 bcf PIR2,EEIE 61 incf ee_int,F 62 goto i_ret 63 64check: 65 .assert "'*** FAILED wide EEPROM unexpected interrupt'" 66 nop 67 68i_ret: 69 clrf STATUS ;bank 0 70 swapf status_temp,W 71 movwf STATUS 72 swapf w_temp,F 73 swapf w_temp,W 74 retfie 75 ;;************* 76 ;; end of interrupt 77 ;;************* 78 79 80start: 81 clrf STATUS ;Point to Bank 0 82 clrf adr_cnt 83 clrf data_cnt 84 ; bsf INTCON,EEIE 85 bsf INTCON,PEIE 86 bsf INTCON,GIE 87 bsf STATUS,RP0 ;Bank 1 88 bsf PIR2,EEIE 89 bcf STATUS,RP0 ;Bank 0 90; 91; write to EEPROM starting at EEPROM address 0 92; value of address as data using interrupts to 93; determine write complete. 94; read and verify data 95 96l1: 97 bcf PIR2,EEIF 98 movf adr_cnt,W 99 clrf ee_int 100 bcf STATUS,RP0 101 bsf STATUS,RP1 ;Bank 2 102 movwf EEADR ^ 0x100 103 movf data_cnt,W 104 movwf EEDATA ^ 0x100 105 106 bcf INTCON,GIE ;Disable interrupts while enabling write 107 108 bsf STATUS,RP0 ; Bank 3 109 bcf (EECON1 ^ 0x180),EEPGD ;Point to data Memory 110 bsf (EECON1 ^ 0x180),WREN ;Enable eeprom writes 111 112 movlw 0x55 ;Magic sequence to enable eeprom write 113 movwf (EECON2 ^ 0x180) 114 movlw 0xaa 115 movwf (EECON2 ^ 0x180) 116 117 bsf (EECON1 ^ 0x180),WR ;Begin eeprom write 118 119 bsf INTCON,GIE ;Re-enable interrupts 120 121 clrf STATUS ; Bank 0 122 movf ee_int,W 123 skpnz 124 goto $-2 125; 126; read what we just wrote 127; 128 129 movf adr_cnt,W 130 131 bsf STATUS,RP1 132 bcf STATUS,RP0 ; Bank 2 133 movwf EEADR 134 bsf STATUS,RP0 ; Bank 3 135 bcf EECON1,EEPGD ; point ot data memory 136 bsf EECON1,RD ; start read operation 137 bcf STATUS,RP0 ; Bank 2 138 movf EEDATA,W ; Read data 139 clrf STATUS ; Bank 0 140 141 xorwf data_cnt,W ; did we read what we wrote ? 142 skpz 143 goto fail 144 145 incf adr_cnt,W 146 andlw 0x7f 147 movwf adr_cnt 148 movwf data_cnt 149 150 skpz 151 goto l1 152 153 goto flash 154 155fail: 156 .assert "'*** FAILED wide EEPROM Compare written and read'" 157 goto $ 158 159; 160; test program FLASH read and writes 161; read low program memory (0x00XX) 162; write to higher memory (0x01XX) 163; read and compare higher memory (0x1XX) 164 165flash: 166 167 bsf STATUS,RP1 168 bcf STATUS,RP0 ; Bank 2 169loop_prg: 170; 171; read low memory 0x00XX 172; 173 bsf STATUS,RP1 174 bcf STATUS,RP0 ; Bank 2 175 movwf adr_cnt 176 movwf EEADR 177 clrf EEADRH 178 bsf STATUS,RP0 ; Bank 3 179 bsf EECON1,EEPGD ; point to program memory 180 bsf EECON1,RD ; start read operation 181 nop 182 nop 183 bcf STATUS,RP0 ; Bank 2 184 movf EEDATA,W ; save read data 185 movwf datal 186 movf EEDATH,W 187 movwf datah 188; 189; Write to High address (0x01XX) data alredy in EEDATA, EEDATAH 190; 191 movlw 0x01 192 movwf EEADRH 193 movf adr_cnt,W 194 movwf EEADR ^ 0x100 195 196 bcf INTCON,GIE ;Disable interrupts while enabling write 197 bsf STATUS,RP0 ; Bank 3 198 bsf (EECON1 ^ 0x180),EEPGD ;Point to program Memory 199 bsf (EECON1 ^ 0x180),WREN ;Enable eeprom writes 200 movlw 0x55 ;Magic sequence to enable write 201 movwf (EECON2 ^ 0x180) 202 movlw 0xaa 203 movwf (EECON2 ^ 0x180) 204 205 bsf (EECON1 ^ 0x180),WR ;Begin write 206 nop 207 nop 208 209 bsf INTCON,GIE ;Re-enable interrupts 210 bcf (EECON1 ^ 0x180),WREN ;Disable writes 211 212 btfsc (EECON1 & 0x7f),WR 213 goto $-1 214; 215; read what we just wrote 216; 217 218 bcf STATUS,RP0 ; Bank 2 219 movf adr_cnt,W 220 movwf EEADR 221 movlw 0x01 222 movwf EEADRH 223 bsf STATUS,RP0 ; Bank 3 224 bsf EECON1,EEPGD ; point to program memory 225 bsf EECON1,RD ; start read operation 226 bcf STATUS,RP0 ; Bank 2 227 movf EEDATA,W ; Read data 228 xorwf datal,W 229 skpz 230 goto fail_prog ; low byte does not match 231 movf EEDATH,W ; Read data 232 xorwf datah,W 233 skpz 234 goto fail_prog ; low byte does not match 235 nop 236 nop 237 238 incf adr_cnt,W 239 andlw 0x3f 240 movwf adr_cnt 241 skpz 242 goto loop_prg 243 244 .assert "'*** PASSED wide EEPROM and program FLASH read-write test'" 245 goto $ 246 247fail_prog: 248 .assert "'*** FAILED wide program FLASH Compare written and read'" 249 goto $ 250 251 252 org 0x2100 253 de "0123456789ABCDEF" 254 de "Linux is cool!",0 255 de 0xaa,0x55,0xf0,0x0f 256 de 'g','p','s','i','m' 257 258 end 259