1 2 ;; 16F84 tests 3 ;; 4 ;; This regression test exercises the 16f84. 5 ;; 6 ;; Tests performed: 7 ;; 8 ;; - Verify that the PORTB internal pull-ups work 9 ;; 10 11 12 list p=16f84 ; list directive to define processor 13 include <p16f84.inc> ; processor specific variable definitions 14 include <coff.inc> ; Grab some useful macros 15 16CONFIG_WORD EQU _CP_OFF & _WDT_OFF 17 __CONFIG CONFIG_WORD 18 19;---------------------------------------------------------------------- 20;---------------------------------------------------------------------- 21GPR_DATA UDATA 22failures RES 1 23 24 25 GLOBAL done 26 27;---------------------------------------------------------------------- 28; ********************* RESET VECTOR LOCATION ******************** 29;---------------------------------------------------------------------- 30RESET_VECTOR CODE 0x000 ; processor reset vector 31 movlw high start ; load upper byte of 'start' label 32 movwf PCLATH ; initialize PCLATH 33 goto start ; go to beginning of program 34 35INT_VECTOR CODE 0x004 ; interrupt vector location 36 nop 37 38 39 ; Node Test 40 ; This script will tie Port A and Port B together 41 42 ;"# First, create 8 nodes: 43 .sim "node loop_back0" 44 .sim "node loop_back1" 45 .sim "node loop_back2" 46 .sim "node loop_back3" 47 48 .sim "node loop_back4" 49 .sim "node loop_back5" 50 .sim "node loop_back6" 51 .sim "node loop_back7" 52 53 ;# Now tie the ports together: 54 55 .sim "attach loop_back0 portb0 porta0" 56 .sim "attach loop_back1 portb1 porta1" 57 .sim "attach loop_back2 portb2 porta2" 58 .sim "attach loop_back3 portb3 porta3" 59 60 .sim "attach loop_back4 portb4 porta4" 61 62;---------------------------------------------------------------------- 63; ******************* MAIN CODE START LOCATION ****************** 64;---------------------------------------------------------------------- 65MAIN CODE 66start 67 68 CLRF failures ;Assume success 69 70 MOVLW 0xff 71 BSF STATUS,RP0 72 73 CLRF TRISA^0x80 ;Port A is an output 74 MOVWF TRISB^0x80 ;Port B is an input 75 BSF OPTION_REG ^ 0x80, NOT_RBPU ;Disable the pullups 76 77 BCF STATUS,RP0 78 79 80 MOVLW 0x0F 81 82a_to_b_loop: 83 MOVWF PORTA ;Port A and Port B are externally 84 XORWF PORTB,W ;connected. So we should see the 85 SKPZ ;same thing on each port. 86 GOTO FAILED 87 88 DECFSZ PORTB,W 89 goto a_to_b_loop 90 91 BSF PORTA,4 ;Port A bit 4 is an open collector. 92 BTFSC PORTB,4 93 .assert "'*** FAILED 16f84 test -RA4 stuck high'" 94 GOTO FAILED 95 96 97 ; Now let's write from PORTB to PORTA. 98 ; With the configuration bit setting we have, all of PORTA I/O lines 99 ; should be able to serve as inputs 100 101 BSF STATUS,RP0 102 103 COMF TRISA^0x80,F ;Port A is now an input port 104 COMF TRISB^0x80,F ;Port B is now an output port 105 106 BCF STATUS,RP0 107 108 CLRW 109 110 111b_to_a_loop: 112 MOVWF PORTB ;Port A and Port B are externally 113 XORWF PORTA,W ;connected. So we should see the 114 ANDLW 0x1f 115 SKPZ ;same thing on each port. 116 GOTO FAILED 117 118 DECFSZ PORTB,W 119 goto b_to_a_loop 120 121 ; 122 ; Now test PORTB's internal pullups 123 ; 124 125 CLRF PORTB 126 127 MOVLW 0xff 128 BSF STATUS,RP0 129 130 MOVWF TRISA^0x80 ;Port A is an input 131 MOVWF TRISB^0x80 ;Port B is an input 132 133 BSF OPTION_REG ^ 0x80, NOT_RBPU ;Disable the pullups 134 135 BCF STATUS,RP0 136 137 MOVF PORTB,W 138 ANDLW 0x0F 139 SKPZ 140 GOTO FAILED 141 142 BSF STATUS,RP0 143 BCF OPTION_REG ^ 0x80, NOT_RBPU ;Enable the pullups 144 BCF STATUS,RP0 145 146 MOVF PORTB,W ;All lines should be high 147 XORLW 0xFF 148 SKPZ 149 GOTO FAILED 150 151 GOTO done 152 153FAILED: 154 .assert "'*** FAILED 16f84 test'" 155 INCF failures,F 156done: 157 .assert "'*** PASSED 16f84 test'" 158 GOTO $ 159 160 161 end 162