1 2 /* 3 Copyright (C) 1998-2000 T. Scott Dattalo 4 5 This file is part of the libgpsim library of gpsim 6 7 This library is free software; you can redistribute it and/or 8 modify it under the terms of the GNU Lesser General Public 9 License as published by the Free Software Foundation; either 10 version 2.1 of the License, or (at your option) any later version. 11 12 This library is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 Lesser General Public License for more details. 16 17 You should have received a copy of the GNU Lesser General Public 18 License along with this library; if not, see 19 <http://www.gnu.org/licenses/lgpl-2.1.html>. 20 */ 21 22 #ifndef SRC_PIC_REGISTERS_H_ 23 #define SRC_PIC_REGISTERS_H_ 24 25 #include "gpsim_classes.h" 26 #include "registers.h" 27 28 class Processor; 29 class ProgramMemoryAccess; 30 31 32 //------------------------------------------------------------------------ 33 // 34 // PCHelper 35 // 36 // The purpose of this class is to provide a register wrapper around the 37 // program counter. On the low and mid range pics, the program counter spans 38 // two registers. On the high end ones it spans 3. This class allows the 39 // gui to treat the program counter as though if it's a single register. 40 41 class PCHelper : public Register 42 { 43 public: 44 PCHelper(Processor *pCpu, ProgramMemoryAccess *); 45 46 virtual void put_value(unsigned int new_value); 47 virtual unsigned int get_value(); register_size()48 virtual unsigned int register_size() const 49 { 50 return 2; 51 } 52 53 ProgramMemoryAccess *pma; 54 }; 55 56 57 //--------------------------------------------------------- 58 // OPTION_REG - 59 60 class OPTION_REG : public sfr_register 61 { 62 public: 63 64 OPTION_REG(Processor *pCpu, const char *pName, const char *pDesc = nullptr); 65 get_prescale()66 inline unsigned int get_prescale() { return value.get() & (PS0 | PS1 | PS2); } 67 get_psa()68 inline unsigned int get_psa() { return value.get() & PSA; } 69 get_t0cs()70 inline unsigned int get_t0cs() { return value.get() & T0CS; } 71 get_t0se()72 inline unsigned int get_t0se() { return value.get() & T0SE; } 73 74 virtual void put(unsigned int new_value); 75 virtual void reset(RESET_TYPE r); 76 virtual void initialize(); 77 78 enum 79 { 80 PS0 = 1 << 0, 81 PS1 = 1 << 1, 82 PS2 = 1 << 2, 83 PSA = 1 << 3, 84 T0SE = 1 << 4, 85 T0CS = 1 << 5, 86 INTEDG = 1 << 6, 87 BIT6 = 1 << 6, 88 NOT_WPUEN = 1 << 7, 89 BIT7 = 1 << 7 90 }; 91 92 unsigned int prescale = 0; 93 }; 94 95 96 // For use on 14bit enhanced cores 97 class OPTION_REG_2 : public OPTION_REG 98 { 99 public: 100 OPTION_REG_2(Processor *pCpu, const char *pName, const char *pDesc = nullptr); 101 102 virtual void put(unsigned int new_value); 103 virtual void initialize(); 104 }; 105 106 107 #endif 108