1# Licensed to the Apache Software Foundation (ASF) under one
2# or more contributor license agreements.  See the NOTICE file
3# distributed with this work for additional information
4# regarding copyright ownership.  The ASF licenses this file
5# to you under the Apache License, Version 2.0 (the
6# "License"); you may not use this file except in compliance
7# with the License.  You may obtain a copy of the License at
8#
9#   http://www.apache.org/licenses/LICENSE-2.0
10#
11# Unless required by applicable law or agreed to in writing,
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14# KIND, either express or implied.  See the License for the
15# specific language governing permissions and limitations
16# under the License.
17
18export PYTHONPATH:=$(PWD)/python:$(PYTHONPATH)
19
20BUILD_NAME = build
21build_dir = $(abspath .)/$(BUILD_NAME)
22
23default: verilog driver
24	python3 tests/python/verilog_accel.py
25
26run_chisel: chisel driver
27	python3 tests/python/chisel_accel.py
28
29driver: | $(build_dir)
30	cd $(build_dir) && cmake .. && make
31
32$(build_dir):
33	mkdir -p $@
34
35verilog:
36	make -C hardware/verilog
37
38chisel:
39	make -C hardware/chisel
40
41clean:
42	-rm -rf $(build_dir)
43	make -C hardware/chisel clean
44	make -C hardware/verilog clean
45