1 /* $NetBSD: pmap.h,v 1.92 2013/10/19 19:40:23 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1996 5 * The President and Fellows of Harvard College. All rights reserved. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This software was developed by the Computer Systems Engineering group 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 11 * contributed to Berkeley. 12 * 13 * All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Aaron Brown and 16 * Harvard University. 17 * This product includes software developed by the University of 18 * California, Lawrence Berkeley Laboratory. 19 * 20 * @InsertRedistribution@ 21 * 3. All advertising materials mentioning features or use of this software 22 * must display the following acknowledgement: 23 * This product includes software developed by Aaron Brown and 24 * Harvard University. 25 * This product includes software developed by the University of 26 * California, Berkeley and its contributors. 27 * 4. Neither the name of the University nor the names of its contributors 28 * may be used to endorse or promote products derived from this software 29 * without specific prior written permission. 30 * 31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 41 * SUCH DAMAGE. 42 * 43 * @(#)pmap.h 8.1 (Berkeley) 6/11/93 44 */ 45 46 #ifndef _SPARC_PMAP_H_ 47 #define _SPARC_PMAP_H_ 48 49 #if defined(_KERNEL_OPT) 50 #include "opt_sparc_arch.h" 51 #endif 52 53 #include <sparc/pte.h> 54 55 /* 56 * Pmap structure. 57 * 58 * The pmap structure really comes in two variants, one---a single 59 * instance---for kernel virtual memory and the other---up to nproc 60 * instances---for user virtual memory. Unfortunately, we have to mash 61 * both into the same structure. Fortunately, they are almost the same. 62 * 63 * The kernel begins at 0xf8000000 and runs to 0xffffffff (although 64 * some of this is not actually used). Kernel space, including DVMA 65 * space (for now?), is mapped identically into all user contexts. 66 * There is no point in duplicating this mapping in each user process 67 * so they do not appear in the user structures. 68 * 69 * User space begins at 0x00000000 and runs through 0x1fffffff, 70 * then has a `hole', then resumes at 0xe0000000 and runs until it 71 * hits the kernel space at 0xf8000000. This can be mapped 72 * contiguously by ignorning the top two bits and pretending the 73 * space goes from 0 to 37ffffff. Typically the lower range is 74 * used for text+data and the upper for stack, but the code here 75 * makes no such distinction. 76 * 77 * Since each virtual segment covers 256 kbytes, the user space 78 * requires 3584 segments, while the kernel (including DVMA) requires 79 * only 512 segments. 80 * 81 * 82 ** FOR THE SUN4/SUN4C 83 * 84 * The segment map entry for virtual segment vseg is offset in 85 * pmap->pm_rsegmap by 0 if pmap is not the kernel pmap, or by 86 * NUSEG if it is. We keep a pointer called pmap->pm_segmap 87 * pre-offset by this value. pmap->pm_segmap thus contains the 88 * values to be loaded into the user portion of the hardware segment 89 * map so as to reach the proper PMEGs within the MMU. The kernel 90 * mappings are `set early' and are always valid in every context 91 * (every change is always propagated immediately). 92 * 93 * The PMEGs within the MMU are loaded `on demand'; when a PMEG is 94 * taken away from context `c', the pmap for context c has its 95 * corresponding pm_segmap[vseg] entry marked invalid (the MMU segment 96 * map entry is also made invalid at the same time). Thus 97 * pm_segmap[vseg] is the `invalid pmeg' number (127 or 511) whenever 98 * the corresponding PTEs are not actually in the MMU. On the other 99 * hand, pm_pte[vseg] is NULL only if no pages in that virtual segment 100 * are in core; otherwise it points to a copy of the 32 or 64 PTEs that 101 * must be loaded in the MMU in order to reach those pages. 102 * pm_npte[vseg] counts the number of valid pages in each vseg. 103 * 104 * XXX performance: faster to count valid bits? 105 * 106 * The kernel pmap cannot malloc() PTEs since malloc() will sometimes 107 * allocate a new virtual segment. Since kernel mappings are never 108 * `stolen' out of the MMU, we just keep all its PTEs there, and have 109 * no software copies. Its mmu entries are nonetheless kept on lists 110 * so that the code that fiddles with mmu lists has something to fiddle. 111 * 112 ** FOR THE SUN4M/SUN4D 113 * 114 * On this architecture, the virtual-to-physical translation (page) tables 115 * are *not* stored within the MMU as they are in the earlier Sun architect- 116 * ures; instead, they are maintained entirely within physical memory (there 117 * is a TLB cache to prevent the high performance hit from keeping all page 118 * tables in core). Thus there is no need to dynamically allocate PMEGs or 119 * SMEGs; only contexts must be shared. 120 * 121 * We maintain two parallel sets of tables: one is the actual MMU-edible 122 * hierarchy of page tables in allocated kernel memory; these tables refer 123 * to each other by physical address pointers in SRMMU format (thus they 124 * are not very useful to the kernel's management routines). The other set 125 * of tables is similar to those used for the Sun4/100's 3-level MMU; it 126 * is a hierarchy of regmap and segmap structures which contain kernel virtual 127 * pointers to each other. These must (unfortunately) be kept in sync. 128 * 129 */ 130 #define NKREG ((int)((-(unsigned)KERNBASE) / NBPRG)) /* i.e., 8 */ 131 #define NUREG (256 - NKREG) /* i.e., 248 */ 132 133 TAILQ_HEAD(mmuhd,mmuentry); 134 135 /* 136 * data appearing in both user and kernel pmaps 137 * 138 * note: if we want the same binaries to work on the 4/4c and 4m, we have to 139 * include the fields for both to make sure that the struct kproc 140 * is the same size. 141 */ 142 struct pmap { 143 union ctxinfo *pm_ctx; /* current context, if any */ 144 int pm_ctxnum; /* current context's number */ 145 u_int pm_cpuset; /* CPU's this pmap has context on */ 146 int pm_refcount; /* just what it says */ 147 148 struct mmuhd pm_reglist; /* MMU regions on this pmap (4/4c) */ 149 struct mmuhd pm_seglist; /* MMU segments on this pmap (4/4c) */ 150 151 struct regmap *pm_regmap; 152 153 int **pm_reg_ptps; /* SRMMU-edible region tables for 4m */ 154 int *pm_reg_ptps_pa;/* _Physical_ address of pm_reg_ptps */ 155 156 int pm_gap_start; /* Starting with this vreg there's */ 157 int pm_gap_end; /* no valid mapping until here */ 158 159 struct pmap_statistics pm_stats; /* pmap statistics */ 160 u_int pm_flags; 161 #define PMAP_USERCACHECLEAN 1 162 }; 163 164 struct regmap { 165 struct segmap *rg_segmap; /* point to NSGPRG PMEGs */ 166 int *rg_seg_ptps; /* SRMMU-edible segment tables (NULL 167 * indicates invalid region (4m) */ 168 smeg_t rg_smeg; /* the MMU region number (4c) */ 169 u_char rg_nsegmap; /* number of valid PMEGS */ 170 }; 171 172 struct segmap { 173 uint64_t sg_wiremap; /* per-page wire bits (4m) */ 174 int *sg_pte; /* points to NPTESG PTEs */ 175 pmeg_t sg_pmeg; /* the MMU segment number (4c) */ 176 u_char sg_npte; /* number of valid PTEs in sg_pte 177 * (not used for 4m/4d kernel_map) */ 178 int8_t sg_nwired; /* number of wired pages */ 179 }; 180 181 #if 0 182 struct kvm_cpustate { 183 int kvm_npmemarr; 184 struct memarr kvm_pmemarr[MA_SIZE]; 185 int kvm_seginval; /* [4,4c] */ 186 struct segmap kvm_segmap_store[NKREG*NSEGRG]; /* [4,4c] */ 187 }/*not yet used*/; 188 #endif 189 190 #ifdef _KERNEL 191 192 #define PMAP_NULL ((pmap_t)0) 193 194 /* 195 * Bounds on managed physical addresses. Used by (MD) users 196 * of uvm_pglistalloc() to provide search hints. 197 */ 198 extern paddr_t vm_first_phys, vm_last_phys; 199 extern psize_t vm_num_phys; 200 201 /* 202 * Since PTEs also contain type bits, we have to have some way 203 * to tell pmap_enter `this is an IO page' or `this is not to 204 * be cached'. Since physical addresses are always aligned, we 205 * can do this with the low order bits. 206 * 207 * The ordering below is important: PMAP_PGTYPE << PG_TNC must give 208 * exactly the PG_NC and PG_TYPE bits. 209 */ 210 #define PMAP_OBIO 1 /* tells pmap_enter to use PG_OBIO */ 211 #define PMAP_VME16 2 /* etc */ 212 #define PMAP_VME32 3 /* etc */ 213 #define PMAP_NC 4 /* tells pmap_enter to set PG_NC */ 214 #define PMAP_TNC_4 7 /* mask to get PG_TYPE & PG_NC */ 215 216 #define PMAP_T2PTE_4(x) (((x) & PMAP_TNC_4) << PG_TNC_SHIFT) 217 #define PMAP_IOENC_4(io) (io) 218 219 /* 220 * On a SRMMU machine, the iospace is encoded in bits [3-6] of the 221 * physical address passed to pmap_enter(). 222 */ 223 #define PMAP_TYPE_SRMMU 0x78 /* mask to get 4m page type */ 224 #define PMAP_PTESHFT_SRMMU 25 /* right shift to put type in pte */ 225 #define PMAP_SHFT_SRMMU 3 /* left shift to extract iospace */ 226 #define PMAP_TNC_SRMMU 127 /* mask to get PG_TYPE & PG_NC */ 227 228 /*#define PMAP_IOC 0x00800000 -* IO cacheable, NOT shifted */ 229 230 #define PMAP_T2PTE_SRMMU(x) (((x) & PMAP_TYPE_SRMMU) << PMAP_PTESHFT_SRMMU) 231 #define PMAP_IOENC_SRMMU(io) ((io) << PMAP_SHFT_SRMMU) 232 233 /* Encode IO space for pmap_enter() */ 234 #define PMAP_IOENC(io) (CPU_HAS_SRMMU ? PMAP_IOENC_SRMMU(io) \ 235 : PMAP_IOENC_4(io)) 236 237 int pmap_dumpsize(void); 238 int pmap_dumpmmu(int (*)(dev_t, daddr_t, void *, size_t), daddr_t); 239 240 #define pmap_resident_count(pm) ((pm)->pm_stats.resident_count) 241 #define pmap_wired_count(pm) ((pm)->pm_stats.wired_count) 242 243 #define PMAP_PREFER(fo, ap, sz, td) pmap_prefer((fo), (ap), (sz), (td)) 244 245 #define PMAP_EXCLUDE_DECLS /* tells MI pmap.h *not* to include decls */ 246 247 /* FUNCTION DECLARATIONS FOR COMMON PMAP MODULE */ 248 249 void pmap_activate(struct lwp *); 250 void pmap_deactivate(struct lwp *); 251 void pmap_bootstrap(int nmmu, int nctx, int nregion); 252 void pmap_prefer(vaddr_t, vaddr_t *, size_t, int); 253 int pmap_pa_exists(paddr_t); 254 void pmap_unwire(pmap_t, vaddr_t); 255 void pmap_copy(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); 256 pmap_t pmap_create(void); 257 void pmap_destroy(pmap_t); 258 void pmap_init(void); 259 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, int); 260 #define pmap_phys_address(x) (x) 261 void pmap_reference(pmap_t); 262 void pmap_remove(pmap_t, vaddr_t, vaddr_t); 263 #define pmap_update(pmap) __USE(pmap) 264 void pmap_virtual_space(vaddr_t *, vaddr_t *); 265 #ifdef PMAP_GROWKERNEL 266 vaddr_t pmap_growkernel(vaddr_t); 267 #endif 268 void pmap_redzone(void); 269 void kvm_uncache(char *, int); 270 int mmu_pagein(struct pmap *pm, vaddr_t, int); 271 void pmap_writetext(unsigned char *, int); 272 void pmap_globalize_boot_cpuinfo(struct cpu_info *); 273 void pmap_remove_all(struct pmap *pm); 274 #define pmap_mmap_flags(x) 0 /* dummy so far */ 275 276 /* SUN4/SUN4C SPECIFIC DECLARATIONS */ 277 278 #if defined(SUN4) || defined(SUN4C) 279 bool pmap_clear_modify4_4c(struct vm_page *); 280 bool pmap_clear_reference4_4c(struct vm_page *); 281 void pmap_copy_page4_4c(paddr_t, paddr_t); 282 int pmap_enter4_4c(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 283 bool pmap_extract4_4c(pmap_t, vaddr_t, paddr_t *); 284 bool pmap_is_modified4_4c(struct vm_page *); 285 bool pmap_is_referenced4_4c(struct vm_page *); 286 void pmap_kenter_pa4_4c(vaddr_t, paddr_t, vm_prot_t, u_int); 287 void pmap_kremove4_4c(vaddr_t, vsize_t); 288 void pmap_kprotect4_4c(vaddr_t, vsize_t, vm_prot_t); 289 void pmap_page_protect4_4c(struct vm_page *, vm_prot_t); 290 void pmap_protect4_4c(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 291 void pmap_zero_page4_4c(paddr_t); 292 #endif /* defined SUN4 || defined SUN4C */ 293 294 /* SIMILAR DECLARATIONS FOR SUN4M/SUN4D MODULE */ 295 296 #if defined(SUN4M) || defined(SUN4D) 297 bool pmap_clear_modify4m(struct vm_page *); 298 bool pmap_clear_reference4m(struct vm_page *); 299 void pmap_copy_page4m(paddr_t, paddr_t); 300 void pmap_copy_page_viking_mxcc(paddr_t, paddr_t); 301 void pmap_copy_page_hypersparc(paddr_t, paddr_t); 302 int pmap_enter4m(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 303 bool pmap_extract4m(pmap_t, vaddr_t, paddr_t *); 304 bool pmap_is_modified4m(struct vm_page *); 305 bool pmap_is_referenced4m(struct vm_page *); 306 void pmap_kenter_pa4m(vaddr_t, paddr_t, vm_prot_t, u_int); 307 void pmap_kremove4m(vaddr_t, vsize_t); 308 void pmap_kprotect4m(vaddr_t, vsize_t, vm_prot_t); 309 void pmap_page_protect4m(struct vm_page *, vm_prot_t); 310 void pmap_protect4m(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 311 void pmap_zero_page4m(paddr_t); 312 void pmap_zero_page_viking_mxcc(paddr_t); 313 void pmap_zero_page_hypersparc(paddr_t); 314 #endif /* defined SUN4M || defined SUN4D */ 315 316 #if !(defined(SUN4M) || defined(SUN4D)) && (defined(SUN4) || defined(SUN4C)) 317 318 #define pmap_clear_modify pmap_clear_modify4_4c 319 #define pmap_clear_reference pmap_clear_reference4_4c 320 #define pmap_enter pmap_enter4_4c 321 #define pmap_extract pmap_extract4_4c 322 #define pmap_is_modified pmap_is_modified4_4c 323 #define pmap_is_referenced pmap_is_referenced4_4c 324 #define pmap_kenter_pa pmap_kenter_pa4_4c 325 #define pmap_kremove pmap_kremove4_4c 326 #define pmap_kprotect pmap_kprotect4_4c 327 #define pmap_page_protect pmap_page_protect4_4c 328 #define pmap_protect pmap_protect4_4c 329 330 #elif (defined(SUN4M) || defined(SUN4D)) && !(defined(SUN4) || defined(SUN4C)) 331 332 #define pmap_clear_modify pmap_clear_modify4m 333 #define pmap_clear_reference pmap_clear_reference4m 334 #define pmap_enter pmap_enter4m 335 #define pmap_extract pmap_extract4m 336 #define pmap_is_modified pmap_is_modified4m 337 #define pmap_is_referenced pmap_is_referenced4m 338 #define pmap_kenter_pa pmap_kenter_pa4m 339 #define pmap_kremove pmap_kremove4m 340 #define pmap_kprotect pmap_kprotect4m 341 #define pmap_page_protect pmap_page_protect4m 342 #define pmap_protect pmap_protect4m 343 344 #else /* must use function pointers */ 345 346 extern bool (*pmap_clear_modify_p)(struct vm_page *); 347 extern bool (*pmap_clear_reference_p)(struct vm_page *); 348 extern int (*pmap_enter_p)(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); 349 extern bool (*pmap_extract_p)(pmap_t, vaddr_t, paddr_t *); 350 extern bool (*pmap_is_modified_p)(struct vm_page *); 351 extern bool (*pmap_is_referenced_p)(struct vm_page *); 352 extern void (*pmap_kenter_pa_p)(vaddr_t, paddr_t, vm_prot_t, u_int); 353 extern void (*pmap_kremove_p)(vaddr_t, vsize_t); 354 extern void (*pmap_kprotect_p)(vaddr_t, vsize_t, vm_prot_t); 355 extern void (*pmap_page_protect_p)(struct vm_page *, vm_prot_t); 356 extern void (*pmap_protect_p)(pmap_t, vaddr_t, vaddr_t, vm_prot_t); 357 358 #define pmap_clear_modify (*pmap_clear_modify_p) 359 #define pmap_clear_reference (*pmap_clear_reference_p) 360 #define pmap_enter (*pmap_enter_p) 361 #define pmap_extract (*pmap_extract_p) 362 #define pmap_is_modified (*pmap_is_modified_p) 363 #define pmap_is_referenced (*pmap_is_referenced_p) 364 #define pmap_kenter_pa (*pmap_kenter_pa_p) 365 #define pmap_kremove (*pmap_kremove_p) 366 #define pmap_kprotect (*pmap_kprotect_p) 367 #define pmap_page_protect (*pmap_page_protect_p) 368 #define pmap_protect (*pmap_protect_p) 369 370 #endif 371 372 /* pmap_{zero,copy}_page() may be assisted by specialized hardware */ 373 #define pmap_zero_page (*cpuinfo.zero_page) 374 #define pmap_copy_page (*cpuinfo.copy_page) 375 376 #if defined(SUN4M) || defined(SUN4D) 377 /* 378 * Macros which implement SRMMU TLB flushing/invalidation 379 */ 380 #define tlb_flush_page_real(va) \ 381 sta(((vaddr_t)(va) & 0xfffff000) | ASI_SRMMUFP_L3, ASI_SRMMUFP, 0) 382 383 #define tlb_flush_segment_real(va) \ 384 sta(((vaddr_t)(va) & 0xfffc0000) | ASI_SRMMUFP_L2, ASI_SRMMUFP, 0) 385 386 #define tlb_flush_region_real(va) \ 387 sta(((vaddr_t)(va) & 0xff000000) | ASI_SRMMUFP_L1, ASI_SRMMUFP, 0) 388 389 #define tlb_flush_context_real() sta(ASI_SRMMUFP_L0, ASI_SRMMUFP, 0) 390 #define tlb_flush_all_real() sta(ASI_SRMMUFP_LN, ASI_SRMMUFP, 0) 391 392 #endif /* SUN4M || SUN4D */ 393 394 #define __HAVE_VM_PAGE_MD 395 396 /* 397 * For each managed physical page, there is a list of all currently 398 * valid virtual mappings of that page. Since there is usually one 399 * (or zero) mapping per page, the table begins with an initial entry, 400 * rather than a pointer; this head entry is empty iff its pv_pmap 401 * field is NULL. 402 */ 403 struct vm_page_md { 404 struct pvlist { 405 struct pvlist *pv_next; /* next pvlist, if any */ 406 struct pmap *pv_pmap; /* pmap of this va */ 407 vaddr_t pv_va; /* virtual address */ 408 int pv_flags; /* flags (below) */ 409 } pvlisthead; 410 }; 411 #define VM_MDPAGE_PVHEAD(pg) (&(pg)->mdpage.pvlisthead) 412 413 #define VM_MDPAGE_INIT(pg) do { \ 414 (pg)->mdpage.pvlisthead.pv_next = NULL; \ 415 (pg)->mdpage.pvlisthead.pv_pmap = NULL; \ 416 (pg)->mdpage.pvlisthead.pv_va = 0; \ 417 (pg)->mdpage.pvlisthead.pv_flags = 0; \ 418 } while(/*CONSTCOND*/0) 419 420 #endif /* _KERNEL */ 421 422 #endif /* _SPARC_PMAP_H_ */ 423