1 #ifndef _MIPS_H
2 #define _MIPS_H
3 
4 #include "ao.h"
5 //#include "driver.h"
6 
7 typedef void genf(void);
8 typedef uint32_t offs_t;
9 
10 #define cpu_readop32(pc) program_read_dword_32le(pc)
11 #define change_pc(pc)																	\
12 
13 
14 #ifdef __GNUC__
15 #if (__GNUC__ < 2) || ((__GNUC__ == 2) && (__GNUC_MINOR__ <= 7))
16 #define UNUSEDARG
17 #else
18 #define UNUSEDARG __attribute__((__unused__))
19 #endif
20 #else
21 #define UNUSEDARG
22 #endif
23 
24 typedef int8_t		(*read8_handler)  (UNUSEDARG offs_t offset);
25 typedef void		(*write8_handler) (UNUSEDARG offs_t offset, UNUSEDARG int8_t data);
26 typedef int16_t		(*read16_handler) (UNUSEDARG offs_t offset, UNUSEDARG int16_t mem_mask);
27 typedef void		(*write16_handler)(UNUSEDARG offs_t offset, UNUSEDARG int16_t data, UNUSEDARG int16_t mem_mask);
28 typedef int32_t		(*read32_handler) (UNUSEDARG offs_t offset, UNUSEDARG int32_t mem_mask);
29 typedef void		(*write32_handler)(UNUSEDARG offs_t offset, UNUSEDARG int32_t data, UNUSEDARG int32_t mem_mask);
30 typedef int64_t		(*read64_handler) (UNUSEDARG offs_t offset, UNUSEDARG int64_t mem_mask);
31 typedef void		(*write64_handler)(UNUSEDARG offs_t offset, UNUSEDARG int64_t data, UNUSEDARG int64_t mem_mask);
32 
33 union read_handlers_t
34 {
35 	genf *				handler;
36 	read8_handler		handler8;
37 	read16_handler		handler16;
38 	read32_handler		handler32;
39 	read64_handler		handler64;
40 };
41 
42 union write_handlers_t
43 {
44 	genf *				handler;
45 	write8_handler		handler8;
46 	write16_handler		handler16;
47 	write32_handler		handler32;
48 	write64_handler		handler64;
49 };
50 
51 struct address_map_t
52 {
53 	uint32_t				flags;				/* flags and additional info about this entry */
54 	offs_t				start, end;			/* start/end (or mask/match) values */
55 	offs_t				mirror;				/* mirror bits */
56 	offs_t				mask;				/* mask bits */
57 	union read_handlers_t read;				/* read handler callback */
58 	union write_handlers_t write;			/* write handler callback */
59 	void *				memory;				/* pointer to memory backing this entry */
60 	uint32_t				share;				/* index of a shared memory block */
61 	void **				base;				/* receives pointer to memory (optional) */
62 	size_t *			size;				/* receives size of area in bytes (optional) */
63 };
64 typedef struct address_map_t *(*construct_map_t)(struct address_map_t *map);
65 
66 union cpuinfo
67 {
68 	int64_t	i;											/* generic integers */
69 	void *	p;											/* generic pointers */
70 	genf *  f;											/* generic function pointers */
71 	char *	s;											/* generic strings */
72 
73 	void	(*setinfo)(uint32_t state, union cpuinfo *info);/* CPUINFO_PTR_SET_INFO */
74 	void	(*getcontext)(void *context);				/* CPUINFO_PTR_GET_CONTEXT */
75 	void	(*setcontext)(void *context);				/* CPUINFO_PTR_SET_CONTEXT */
76 	void	(*init)(void);								/* CPUINFO_PTR_INIT */
77 	void	(*reset)(void *param);						/* CPUINFO_PTR_RESET */
78 	void	(*exit)(void);								/* CPUINFO_PTR_EXIT */
79 	int		(*execute)(int cycles);						/* CPUINFO_PTR_EXECUTE */
80 	void	(*burn)(int cycles);						/* CPUINFO_PTR_BURN */
81 	offs_t	(*disassemble)(char *buffer, offs_t pc);	/* CPUINFO_PTR_DISASSEMBLE */
82 	int		(*irqcallback)(int state);					/* CPUINFO_PTR_IRQCALLBACK */
83 	int *	icount;										/* CPUINFO_PTR_INSTRUCTION_COUNTER */
84 	construct_map_t internal_map;						/* CPUINFO_PTR_INTERNAL_MEMORY_MAP */
85 };
86 
87 enum
88 {
89 	MIPS_PC = 1,
90 	MIPS_DELAYV, MIPS_DELAYR,
91 	MIPS_HI, MIPS_LO,
92 	MIPS_R0, MIPS_R1,
93 	MIPS_R2, MIPS_R3,
94 	MIPS_R4, MIPS_R5,
95 	MIPS_R6, MIPS_R7,
96 	MIPS_R8, MIPS_R9,
97 	MIPS_R10, MIPS_R11,
98 	MIPS_R12, MIPS_R13,
99 	MIPS_R14, MIPS_R15,
100 	MIPS_R16, MIPS_R17,
101 	MIPS_R18, MIPS_R19,
102 	MIPS_R20, MIPS_R21,
103 	MIPS_R22, MIPS_R23,
104 	MIPS_R24, MIPS_R25,
105 	MIPS_R26, MIPS_R27,
106 	MIPS_R28, MIPS_R29,
107 	MIPS_R30, MIPS_R31,
108 	MIPS_CP0R0, MIPS_CP0R1,
109 	MIPS_CP0R2, MIPS_CP0R3,
110 	MIPS_CP0R4, MIPS_CP0R5,
111 	MIPS_CP0R6, MIPS_CP0R7,
112 	MIPS_CP0R8, MIPS_CP0R9,
113 	MIPS_CP0R10, MIPS_CP0R11,
114 	MIPS_CP0R12, MIPS_CP0R13,
115 	MIPS_CP0R14, MIPS_CP0R15,
116 	MIPS_CP0R16, MIPS_CP0R17,
117 	MIPS_CP0R18, MIPS_CP0R19,
118 	MIPS_CP0R20, MIPS_CP0R21,
119 	MIPS_CP0R22, MIPS_CP0R23,
120 	MIPS_CP0R24, MIPS_CP0R25,
121 	MIPS_CP0R26, MIPS_CP0R27,
122 	MIPS_CP0R28, MIPS_CP0R29,
123 	MIPS_CP0R30, MIPS_CP0R31,
124 	MIPS_CP2DR0, MIPS_CP2DR1,
125 	MIPS_CP2DR2, MIPS_CP2DR3,
126 	MIPS_CP2DR4, MIPS_CP2DR5,
127 	MIPS_CP2DR6, MIPS_CP2DR7,
128 	MIPS_CP2DR8, MIPS_CP2DR9,
129 	MIPS_CP2DR10, MIPS_CP2DR11,
130 	MIPS_CP2DR12, MIPS_CP2DR13,
131 	MIPS_CP2DR14, MIPS_CP2DR15,
132 	MIPS_CP2DR16, MIPS_CP2DR17,
133 	MIPS_CP2DR18, MIPS_CP2DR19,
134 	MIPS_CP2DR20, MIPS_CP2DR21,
135 	MIPS_CP2DR22, MIPS_CP2DR23,
136 	MIPS_CP2DR24, MIPS_CP2DR25,
137 	MIPS_CP2DR26, MIPS_CP2DR27,
138 	MIPS_CP2DR28, MIPS_CP2DR29,
139 	MIPS_CP2DR30, MIPS_CP2DR31,
140 	MIPS_CP2CR0, MIPS_CP2CR1,
141 	MIPS_CP2CR2, MIPS_CP2CR3,
142 	MIPS_CP2CR4, MIPS_CP2CR5,
143 	MIPS_CP2CR6, MIPS_CP2CR7,
144 	MIPS_CP2CR8, MIPS_CP2CR9,
145 	MIPS_CP2CR10, MIPS_CP2CR11,
146 	MIPS_CP2CR12, MIPS_CP2CR13,
147 	MIPS_CP2CR14, MIPS_CP2CR15,
148 	MIPS_CP2CR16, MIPS_CP2CR17,
149 	MIPS_CP2CR18, MIPS_CP2CR19,
150 	MIPS_CP2CR20, MIPS_CP2CR21,
151 	MIPS_CP2CR22, MIPS_CP2CR23,
152 	MIPS_CP2CR24, MIPS_CP2CR25,
153 	MIPS_CP2CR26, MIPS_CP2CR27,
154 	MIPS_CP2CR28, MIPS_CP2CR29,
155 	MIPS_CP2CR30, MIPS_CP2CR31
156 };
157 
158 #define MIPS_INT_NONE	( -1 )
159 
160 #define MIPS_IRQ0	( 0 )
161 #define MIPS_IRQ1	( 1 )
162 #define MIPS_IRQ2	( 2 )
163 #define MIPS_IRQ3	( 3 )
164 #define MIPS_IRQ4	( 4 )
165 #define MIPS_IRQ5	( 5 )
166 
167 #define MIPS_BYTE_EXTEND( a ) ( (int32_t)(int8_t)a )
168 #define MIPS_WORD_EXTEND( a ) ( (int32_t)(int16_t)a )
169 
170 #define INS_OP( op ) ( ( op >> 26 ) & 63 )
171 #define INS_RS( op ) ( ( op >> 21 ) & 31 )
172 #define INS_RT( op ) ( ( op >> 16 ) & 31 )
173 #define INS_IMMEDIATE( op ) ( op & 0xffff )
174 #define INS_TARGET( op ) ( op & 0x3ffffff )
175 #define INS_RD( op ) ( ( op >> 11 ) & 31 )
176 #define INS_SHAMT( op ) ( ( op >> 6 ) & 31 )
177 #define INS_FUNCT( op ) ( op & 63 )
178 #define INS_CODE( op ) ( ( op >> 6 ) & 0xfffff )
179 #define INS_CO( op ) ( ( op >> 25 ) & 1 )
180 #define INS_COFUN( op ) ( op & 0x1ffffff )
181 #define INS_CF( op ) ( op & 63 )
182 
183 #define GTE_OP( op ) ( ( op >> 20 ) & 31 )
184 #define GTE_SF( op ) ( ( op >> 19 ) & 1 )
185 #define GTE_MX( op ) ( ( op >> 17 ) & 3 )
186 #define GTE_V( op ) ( ( op >> 15 ) & 3 )
187 #define GTE_CV( op ) ( ( op >> 13 ) & 3 )
188 #define GTE_CD( op ) ( ( op >> 11 ) & 3 ) /* not used */
189 #define GTE_LM( op ) ( ( op >> 10 ) & 1 )
190 #define GTE_CT( op ) ( ( op >> 6 ) & 15 ) /* not used */
191 #define GTE_FUNCT( op ) ( op & 63 )
192 
193 #define OP_SPECIAL ( 0 )
194 #define OP_REGIMM ( 1 )
195 #define OP_J ( 2 )
196 #define OP_JAL ( 3 )
197 #define OP_BEQ ( 4 )
198 #define OP_BNE ( 5 )
199 #define OP_BLEZ ( 6 )
200 #define OP_BGTZ ( 7 )
201 #define OP_ADDI ( 8 )
202 #define OP_ADDIU ( 9 )
203 #define OP_SLTI ( 10 )
204 #define OP_SLTIU ( 11 )
205 #define OP_ANDI ( 12 )
206 #define OP_ORI ( 13 )
207 #define OP_XORI ( 14 )
208 #define OP_LUI ( 15 )
209 #define OP_COP0 ( 16 )
210 #define OP_COP1 ( 17 )
211 #define OP_COP2 ( 18 )
212 #define OP_LB ( 32 )
213 #define OP_LH ( 33 )
214 #define OP_LWL ( 34 )
215 #define OP_LW ( 35 )
216 #define OP_LBU ( 36 )
217 #define OP_LHU ( 37 )
218 #define OP_LWR ( 38 )
219 #define OP_SB ( 40 )
220 #define OP_SH ( 41 )
221 #define OP_SWL ( 42 )
222 #define OP_SW ( 43 )
223 #define OP_SWR ( 46 )
224 #define OP_LWC1 ( 49 )
225 #define OP_LWC2 ( 50 )
226 #define OP_SWC1 ( 57 )
227 #define OP_SWC2 ( 58 )
228 
229 /* OP_SPECIAL */
230 #define FUNCT_SLL ( 0 )
231 #define FUNCT_SRL ( 2 )
232 #define FUNCT_SRA ( 3 )
233 #define FUNCT_SLLV ( 4 )
234 #define FUNCT_SRLV ( 6 )
235 #define FUNCT_SRAV ( 7 )
236 #define FUNCT_JR ( 8 )
237 #define FUNCT_JALR ( 9 )
238 #define FUNCT_HLECALL ( 11 )
239 #define FUNCT_SYSCALL ( 12 )
240 #define FUNCT_BREAK ( 13 )
241 #define FUNCT_MFHI ( 16 )
242 #define FUNCT_MTHI ( 17 )
243 #define FUNCT_MFLO ( 18 )
244 #define FUNCT_MTLO ( 19 )
245 #define FUNCT_MULT ( 24 )
246 #define FUNCT_MULTU ( 25 )
247 #define FUNCT_DIV ( 26 )
248 #define FUNCT_DIVU ( 27 )
249 #define FUNCT_ADD ( 32 )
250 #define FUNCT_ADDU ( 33 )
251 #define FUNCT_SUB ( 34 )
252 #define FUNCT_SUBU ( 35 )
253 #define FUNCT_AND ( 36 )
254 #define FUNCT_OR ( 37 )
255 #define FUNCT_XOR ( 38 )
256 #define FUNCT_NOR ( 39 )
257 #define FUNCT_SLT ( 42 )
258 #define FUNCT_SLTU ( 43 )
259 
260 /* OP_REGIMM */
261 #define RT_BLTZ ( 0 )
262 #define RT_BGEZ ( 1 )
263 #define RT_BLTZAL ( 16 )
264 #define RT_BGEZAL ( 17 )
265 
266 /* OP_COP0/OP_COP1/OP_COP2 */
267 #define RS_MFC ( 0 )
268 #define RS_CFC ( 2 )
269 #define RS_MTC ( 4 )
270 #define RS_CTC ( 6 )
271 #define RS_BC ( 8 )
272 
273 /* RS_BC */
274 #define RT_BCF ( 0 )
275 #define RT_BCT ( 1 )
276 
277 /* OP_COP0 */
278 #define CF_RFE ( 16 )
279 
280 #ifdef MAME_DEBUG
281 extern unsigned DasmMIPS(char *buff, unsigned _pc);
282 #endif
283 
284 #if (HAS_PSXCPU)
285 extern void psxcpu_get_info(uint32_t state, union cpuinfo *info);
286 #endif
287 
288 /* eng_psf.cc */
289 extern int psf_refresh;
290 
291 int32_t psf_start(uint8_t *buffer, uint32_t length);
292 int32_t psf_execute(void (*update)(const void *, int));
293 int32_t psf_stop(void);
294 
295 /* eng_psf2.cc */
296 uint32_t psf2_load_elf(uint8_t *start, uint32_t len);
297 uint32_t psf2_load_file(const char *file, uint8_t *buf, uint32_t buflen);
298 int32_t psf2_start(uint8_t *, uint32_t length);
299 int32_t psf2_execute(void (*update)(const void *, int));
300 int32_t psf2_stop(void);
301 int32_t psf2_command(int32_t, int32_t);
302 uint32_t psf2_get_loadaddr(void);
303 void psf2_set_loadaddr(uint32_t addr);
304 
305 /* eng_spx.cc */
306 int32_t spx_start(uint8_t *buffer, uint32_t length);
307 int32_t spx_execute(void (*update)(const void *, int));
308 int32_t spx_stop(void);
309 
310 /* plugin.cc */
311 extern bool stop_flag;
312 
313 /* psx.cc */
314 void mips_init(void);
315 void mips_reset(void *param);
316 void mips_shorten_frame(void);
317 int mips_execute(int cycles);
318 void mips_set_info(uint32_t state, union cpuinfo *info);
319 void mips_get_info(uint32_t state, union cpuinfo *info);
320 uint32_t mips_get_cause(void);
321 uint32_t mips_get_status(void);
322 void mips_set_status(uint32_t status);
323 uint32_t mips_get_ePC(void);
324 int mips_get_icount(void);
325 void mips_set_icount(int count);
326 
327 /* psx_hw.cc */
328 extern uint32_t psx_ram[((2*1024*1024)/4)+4];
329 extern uint32_t psx_scratch[0x400];
330 extern uint32_t initial_ram[((2*1024*1024)/4)+4];
331 extern uint32_t initial_scratch[0x400];
332 
333 void psx_hw_slice(void);
334 void ps2_hw_slice(void);
335 void psx_hw_frame(void);
336 void ps2_hw_frame(void);
337 
338 void psx_hw_init(void);
339 void psx_bios_hle(uint32_t pc);
340 void psx_hw_runcounters(void);
341 
342 uint8_t program_read_byte_32le(offs_t address);
343 uint16_t program_read_word_32le(offs_t address);
344 uint32_t program_read_dword_32le(offs_t address);
345 
346 void program_write_byte_32le(offs_t address, uint8_t data);
347 void program_write_word_32le(offs_t address, uint16_t data);
348 void program_write_dword_32le(offs_t address, uint32_t data);
349 
350 void psx_iop_call(uint32_t pc, uint32_t callnum);
351 
352 #endif
353