1 /*
2 * Copyright (c) 2017-2019, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encoder_base.h
24 //! \brief Defines the encode interface for CodecHal.
25 //! \details The encode interface is further sub-divided by standard, this file is for the base interface which is shared by all encode standards.
26 //!
27
28 #ifndef __CODECHAL_ENCODER_BASE_H__
29 #define __CODECHAL_ENCODER_BASE_H__
30
31 #include "codechal.h"
32 #include "codechal_setting.h"
33 #include "codechal_hw.h"
34 #include "codechal_debug.h"
35 #include "codechal_encode_sfc.h"
36 #include "codechal_encode_csc_ds.h"
37 #include "codechal_encode_tracked_buffer.h"
38 #include "codechal_encode_allocator.h"
39 #include "codechal_mmc.h"
40 #include "codechal_utilities.h"
41 #include "codec_def_encode.h"
42 #include "cm_rt_umd.h"
43 #include "media_perf_profiler.h"
44 #include <algorithm> // std::reverse
45
46 //------------------------------------------------------------------------------
47 // Macros specific to MOS_CODEC_SUBCOMP_ENCODE sub-comp
48 //------------------------------------------------------------------------------
49 #define CODECHAL_ENCODE_ASSERT(_expr) \
50 MOS_ASSERT(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _expr)
51
52 #define CODECHAL_ENCODE_ASSERTMESSAGE(_message, ...) \
53 MOS_ASSERTMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _message, ##__VA_ARGS__)
54
55 #define CODECHAL_ENCODE_NORMALMESSAGE(_message, ...) \
56 MOS_NORMALMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _message, ##__VA_ARGS__)
57
58 #define CODECHAL_ENCODE_VERBOSEMESSAGE(_message, ...) \
59 MOS_VERBOSEMESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _message, ##__VA_ARGS__)
60
61 #define CODECHAL_ENCODE_FUNCTION_ENTER \
62 MOS_FUNCTION_ENTER(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE)
63
64 #define CODECHAL_ENCODE_CHK_STATUS(_stmt) \
65 MOS_CHK_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _stmt)
66
67 #define CODECHAL_ENCODE_CHK_STATUS_MESSAGE(_stmt, _message, ...) \
68 MOS_CHK_STATUS_MESSAGE(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _stmt, _message, ##__VA_ARGS__)
69
70 #define CODECHAL_ENCODE_CHK_NULL(_ptr) \
71 MOS_CHK_NULL(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _ptr)
72
73 #define CODECHAL_ENCODE_CHK_NULL_NO_STATUS(_ptr) \
74 MOS_CHK_NULL_NO_STATUS(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _ptr)
75
76 #define CODECHAL_ENCODE_CHK_COND(_expr, _message, ...) \
77 MOS_CHK_COND(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE,_expr,_message, ##__VA_ARGS__)
78
79 #define CODECHAL_ENCODE_CHK_NULL_NO_STATUS_RETURN(_ptr) \
80 MOS_CHK_NULL_NO_STATUS_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _ptr)
81
82 #define CODECHAL_ENCODE_CHK_NULL_RETURN(_ptr) \
83 MOS_CHK_NULL_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _ptr)
84
85 #define CODECHAL_ENCODE_CHK_STATUS_RETURN(_stmt) \
86 MOS_CHK_STATUS_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _stmt)
87
88 #define CODECHAL_ENCODE_CHK_STATUS_MESSAGE_RETURN(_stmt, _message, ...) \
89 MOS_CHK_STATUS_MESSAGE_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE, _stmt, _message, ##__VA_ARGS__)
90
91 #define CODECHAL_ENCODE_CHK_COND_RETURN(_expr, _message, ...) \
92 MOS_CHK_COND_RETURN(MOS_COMPONENT_CODEC, MOS_CODEC_SUBCOMP_ENCODE,_expr,_message, ##__VA_ARGS__)
93
94 // User Feature Report Writeout
95 #define CodecHalEncode_WriteKey64(key, value)\
96 {\
97 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
98 UserFeatureWriteData.Value.i64Data = (value);\
99 UserFeatureWriteData.ValueID = (key);\
100 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
101 }
102
103 #define CodecHalEncode_WriteKey(key, value)\
104 {\
105 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
106 UserFeatureWriteData.Value.i32Data = (value);\
107 UserFeatureWriteData.ValueID = (key);\
108 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
109 }
110
111 #define CodecHalEncode_WriteStringKey(key, value, len)\
112 {\
113 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
114 UserFeatureWriteData.Value.StringData.pStringData = (value);\
115 UserFeatureWriteData.Value.StringData.uSize = (len);\
116 UserFeatureWriteData.ValueID = (key);\
117 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
118 }
119
120 //!
121 //! \brief Recycled buffers are buffers which are locked and populated each execute
122 //! to be consumed by HW. The driver loops through these buffers, if for the
123 //! current index it is detected that the buffers for that index are still in
124 //! use by HW, the driver waits until the buffers are available. 6 of each
125 //! recycled buffer type are allocated to achieve performance parity with the
126 //! old method of not having any waits.
127 //!
128 #define CODECHAL_ENCODE_RECYCLED_BUFFER_NUM 6
129
130 // Encode Sizes
131 #define CODECHAL_ENCODE_STATUS_NUM 512
132 #define CODECHAL_ENCODE_VME_BBUF_NUM 2
133 #define CODECHAL_ENCODE_MIN_SCALED_SURFACE_SIZE 48
134 #define CODECHAL_ENCODE_BRC_PAK_STATISTICS_SIZE 64
135 #define CODECHAL_ENCODE_MAX_NUM_MAD_BUFFERS CODEC_MAX_NUM_REF_FIELD
136 #define CODECHAL_ENCODE_SLICESIZE_BUF_SIZE (4960 * sizeof(uint16_t))
137 #define CODECHAL_VDENC_BRC_NUM_OF_PASSES 2
138 #define CODECHAL_VDENC_BRC_NUM_OF_PASSES_FOR_TILE_REPLAY 22
139 #define CODECHAL_DP_MAX_NUM_BRC_PASSES 4
140 #define CODECHAL_VDENC_NUMIMEPREDICTORS 0x8
141 #define CODECHAL_CMDINITIALIZER_MAX_CMD_SIZE CODECHAL_CACHELINE_SIZE * 4
142 #define CODECHAL_ENCODE_NUM_MAX_VME_L0_REF 8 // multiref - G7.5+ - used from DDI
143 #define CODECHAL_ENCODE_NUM_MAX_VME_L1_REF 2 // multiref - G7.5+ - used from DDI
144 #define CODECHAL_ENCODE_ME_DATA_SIZE_MULTIPLIER (CODECHAL_ENCODE_NUM_MAX_VME_L0_REF + CODECHAL_ENCODE_NUM_MAX_VME_L1_REF)
145 #define CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L0_REF 4 // multiref - G7.5+
146 #define CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L1_REF 1 // multiref - G7.5+
147
148 // BRC
149 #define CODECHAL_ENCODE_BRC_KBPS 1000 // 1000bps for disk storage, aligned with industry usage
150 #define CODECHAL_ENCODE_SCENE_CHANGE_DETECTED_MASK 0xffff
151
152 typedef enum _CODECHAL_ENCODE_FUNCTION_ID
153 {
154 CODECHAL_ENCODE_ENC_ID = 0x100,
155 CODECHAL_ENCODE_PAK_ID = 0x101,
156 CODECHAL_ENCODE_ENC_PAK_ID = 0x102,
157 CODECHAL_ENCODE_VPP_ID = 0x103,
158 CODECHAL_ENCODE_FORMAT_COUNT_ID = 0x104,
159 CODECHAL_ENCODE_FORMATS_ID = 0x105,
160 CODECHAL_ENCODE_ENC_CTRL_CAPS_ID = 0x106,
161 CODECHAL_ENCODE_ENC_CTRL_GET_ID = 0x107,
162 CODECHAL_ENCODE_ENC_CTRL_SET_ID = 0x108,
163 CODECHAL_ENCODE_MBDATA_LAYOUT_ID = 0x109,
164 CODECHAL_ENCODE_FEI_PRE_ENC_ID = 0x10A,
165 CODECHAL_ENCODE_FEI_ENC_ID = 0x10B,
166 CODECHAL_ENCODE_FEI_PAK_ID = 0x10C,
167 CODECHAL_ENCODE_FEI_ENC_PAK_ID = 0x10D,
168 CODECHAL_ENCODE_QUERY_STATUS_ID = 0x121
169 } CODECHAL_ENCODE_FUNCTION_ID;
170
171 typedef enum _CODECHAL_ENCODE_BRC_KERNEL_STATE_IDX
172 {
173 CODECHAL_ENCODE_BRC_IDX_INIT = 0,
174 CODECHAL_ENCODE_BRC_IDX_FrameBRC_UPDATE,
175 CODECHAL_ENCODE_BRC_IDX_RESET,
176 CODECHAL_ENCODE_BRC_IDX_IFRAMEDIST,
177 CODECHAL_ENCODE_BRC_IDX_BLOCKCOPY,
178 CODECHAL_ENCODE_BRC_IDX_MbBRC_UPDATE, // extra MbBRCUpdate kernel starting GEN9
179 CODECHAL_ENCODE_BRC_IDX_NUM
180 } CODECHAL_ENCODE_BRC_KERNEL_STATE_IDX;
181
182 typedef struct KernelHeaderEncode
183 {
184 int nKernelCount;
185
186 union
187 {
188 struct
189 {
190 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_DS4X_Frame;
191 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_DS4X_Field;
192 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_DS2X_Frame;
193 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_DS2X_Field;
194 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_HME_P;
195 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_HME_B;
196 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_HME_Streamin;
197 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_HME_HEVC_Streamin;
198 CODECHAL_KERNEL_HEADER Gen10_HEVC_VP9_VDEnc_HMEDetection;
199 };
200 };
201
202 }KernelHeaderEncode;
203
204 //!
205 //! \enum BindingTableOffsetKernel
206 //! \brief Binding table offset kernel
207 //!
208 enum BindingTableOffsetKernel
209 {
210 // VDEnc HME kernel
211 HmeBegin = 0,
212 HmeMvDataSurfaceCm = HmeBegin,
213 Hme16xMeMvDataSurfaceCm,
214 Hme32xMeMvDataSurfaceCm = Hme16xMeMvDataSurfaceCm,
215 HmeDistortionSurfaceCm,
216 HmeBrcDistortionCm,
217 HmeCurrForFwdRefCm,
218 HmeFwdRefIdx0Cm,
219 HmeReserved1Cm,
220 HmeFwdRefIdx1Cm,
221 HmeReserved2Cm,
222 HmeFwdRefIdx2Cm,
223 HmeReserved3Cm,
224 HmeFwdRefIdx3Cm,
225 HmeReserved4Cm,
226 HmeFwdRefIdx4Cm,
227 HmeReserved5Cm,
228 HmeFwdRefIdx5Cm,
229 HmeReserved6Cm,
230 HmeFwdRefIdx6Cm,
231 HmeReserved7Cm,
232 HmeFwdRefIdx7Cm,
233 HmeReserved8Cm,
234 HmeCurrForBwdRefCm,
235 HmeBwdRefIdx0Cm,
236 HmeReserved9Cm,
237 HmeBwdRefIdx1Cm,
238 HmeReserved10Cm,
239 HmeVdencStreaminOutputCm,
240 HmeVdencStreaminInputCm,
241 HmeEnd,
242 };
243
244 //!
245 //! \enum BrcUpdateFlag
246 //! \brief Indicate the Brc Update Flag
247 //!
248 enum BrcUpdateFlag
249 {
250 brcUpdateIsField = 0x01,
251 brcUpdateIsMbaff = (0x01 << 1),
252 brcUpdateIsBottomField = (0x01 << 2),
253 brcUpdateAutoPbFrameSize = (0x01 << 3),
254 brcUpdateIsActualQp = (0x01 << 6),
255 brcUpdateIsReference = (0x01 << 7)
256 };
257
258 //!
259 //! \enum TrellisSetting
260 //! \brief Indicate the different Trellis Settings
261 //!
262 enum TrellisSetting
263 {
264 trellisInternal = 0,
265 trellisDisabled = 1,
266 trellisEnabledI = 2,
267 trellisEnabledP = 4,
268 trellisEnabledB = 8
269 };
270
271 //!
272 //! \enum MbBrcSetting
273 //! \brief Indicate the MBBRC settings
274 //!
275 enum MbBrcSetting
276 {
277 mbBrcInternal = 0,
278 mbBrcEnabled = 1,
279 mbBrcDisabled = 2,
280 };
281
282 // User Feature Key Report Writeout
283 #define CodecHalEncodeWriteKey64(key, value)\
284 {\
285 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
286 UserFeatureWriteData.Value.i64Data = (value);\
287 UserFeatureWriteData.ValueID = (key);\
288 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
289 }
290
291 #define CodecHalEncodeWriteKey(key, value)\
292 {\
293 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
294 UserFeatureWriteData.Value.i32Data = (value);\
295 UserFeatureWriteData.ValueID = (key);\
296 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
297 }
298
299 #define CodecHalEncodeWriteStringKey(key, value, len)\
300 {\
301 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;\
302 UserFeatureWriteData.Value.StringData.pStringData = (value);\
303 UserFeatureWriteData.Value.StringData.uSize = (len);\
304 UserFeatureWriteData.ValueID = (key);\
305 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1);\
306 }
307
308 // ---------------------------
309 // Tables
310 // ---------------------------
311
312 // ---------------------------
313 // Structures
314 // ---------------------------
315
316 #define CODECHAL_ENCODE_SET_PERFTAG_INFO(perfTag, type) { \
317 perfTag.Value = 0; \
318 perfTag.Mode = m_mode & CODECHAL_ENCODE_MODE_BIT_MASK; \
319 perfTag.CallType = type; \
320 perfTag.PictureCodingType = m_pictureCodingType > 3 ? 0 : m_pictureCodingType; \
321 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value); \
322 m_osInterface->pfnIncPerfBufferID(m_osInterface); }
323
324 //!
325 //! \struct CodechalEncodeMdfKernelResource
326 //! \brief Codechal encode mdf kernel resource
327 //!
328 struct CodechalEncodeMdfKernelResource
329 {
330 void *pCommonISA;
331 CmProgram *pCmProgram;
332 CmKernel **ppKernel;
333 uint8_t *pCurbe;
334 CmThreadSpace *pTS;
335 CmBuffer **ppCmBuf;
336 CmSurface2D **ppCmSurf;
337 SurfaceIndex **ppCmVmeSurf;
338 CmEvent *e;
339
340 uint8_t KernelNum;
341 uint8_t BufNum;
342 uint8_t SurfNum;
343 uint8_t VmeSurfNum;
344 uint16_t wCurbeSize;
345 uint16_t wReserved;
346 };
347
348 //!
349 //! \struct MfeParams
350 //! \brief Mfe encode parameters
351 //!
352 struct MfeParams
353 {
354 uint32_t streamId; //!< Unique id
355 uint32_t submitIndex; //!< Index during this submission
356 uint32_t submitNumber; //!< Total stream number during this submission
357 uint32_t maxWidth; //!< Maximum width for all frames
358 uint32_t maxHeight; //!< Maximum height for all frames
359 };
360
361 //!
362 //! \struct MfeSharedState
363 //! \brief State shared across multiple streams
364 //!
365 struct MfeSharedState
366 {
367 CodechalHwInterface *pHwInterface = nullptr;
368 PMOS_INTERFACE pOsInterface;
369 PMHW_KERNEL_STATE pMfeMbEncKernelState; //!< Set in the first stream, Used by the rest streams
370 uint32_t dwPicWidthInMB; //!< Keep the maximum width
371 uint32_t dwPicHeightInMB; //!< Keep the maximum height
372 uint16_t sliceHeight; //!< Keep the maximum slice height
373 uint32_t maxTheadWidth = 0; //!< Keep the maximum width of the threadspace
374 uint32_t maxTheadHeight = 0; //!< Keep the maximum Height of the threadspace
375 uint32_t *maxThreadWidthFrames = nullptr; //!< Keep the thread space width for all frames
376
377 CmDevice *pCmDev = nullptr; //!< Set in the first stream, Used by the rest streams
378 CmTask *pCmTask = nullptr;
379 CmQueue *pCmQueue = nullptr;
380 CodechalEncodeMdfKernelResource *resMbencKernel = nullptr;
381 SurfaceIndex *vmeSurface = nullptr;
382 SurfaceIndex *commonSurface = nullptr;
383 std::vector<CodechalEncoderState*> encoders;
384 };
385
386 //!
387 //! \struct FeiPreEncParams
388 //! \brief Fei pre-encode parameters
389 //!
390 struct FeiPreEncParams
391 {
392 MOS_RESOURCE resMvPredBuffer;
393 MOS_RESOURCE resMbQpBuffer;
394 MOS_RESOURCE resMvBuffer;
395 MOS_RESOURCE resStatsBuffer;
396 MOS_RESOURCE resStatsBotFieldBuffer;
397
398 PMOS_SURFACE psCurrOriginalSurface;
399
400 bool bInterlaced;
401 uint32_t dwNumPastReferences;
402 uint32_t dwNumFutureReferences;
403
404 bool bCurPicUpdated;
405 CODEC_PICTURE CurrOriginalPicture;
406
407 CODEC_PICTURE PastRefPicture;
408 bool bPastRefUpdated;
409 MOS_SURFACE sPastRefSurface;
410 bool bPastRefStatsNeeded;
411 MOS_RESOURCE sPastRefStatsBuffer;
412 MOS_RESOURCE sPastRefStatsBotFieldBuffer;
413
414 CODEC_PICTURE FutureRefPicture;
415 bool bFutureRefUpdated;
416 MOS_SURFACE sFutureRefSurface;
417 bool bFutureRefStatsNeeded;
418 MOS_RESOURCE sFutureRefStatsBuffer;
419 MOS_RESOURCE sFutureRefStatsBotFieldBuffer;
420
421 uint32_t dwFrameQp;
422 uint32_t dwLenSP;
423 uint32_t dwSearchPath;
424 uint32_t dwSubMBPartMask;
425 uint32_t dwIntraPartMask;
426 uint32_t dwSubPelMode;
427 uint32_t dwInterSAD;
428 uint32_t dwIntraSAD;
429 bool bAdaptiveSearch;
430
431 uint32_t dwMVPredictorCtrl;
432 bool bMBQp;
433 bool bFTEnable;
434 uint32_t dwRefWidth;
435 uint32_t dwRefHeight;
436 uint32_t dwSearchWindow;
437 bool bDisableMVOutput;
438 bool bDisableStatisticsOutput;
439 bool bEnable8x8Statistics;
440 bool bInputUpdated;
441 };
442
443 //!
444 //! \enum EncOperation
445 //! \brief Encode operations
446 //!
447 enum EncOperation
448 {
449 ENC_SCALING4X = 0,
450 ENC_SCALING2X,
451 ENC_ME,
452 ENC_BRC,
453 ENC_MBENC,
454 ENC_MBENC_ADV,
455 ENC_RESETVLINESTRIDE,
456 ENC_MC,
457 ENC_MBPAK,
458 ENC_DEBLOCK,
459 ENC_PREPROC,
460 VDENC_ME,
461 ENC_WP,
462 ENC_SFD, //!< Static frame detection
463 ENC_SCOREBOARD,
464 ENC_MBENC_I_LUMA,
465 ENC_MPU,
466 ENC_TPU,
467 ENC_SCALING_CONVERSION, //!< for HEVC
468 ENC_DYS,
469 ENC_INTRA_DISTORTION,
470 VDENC_ME_P,
471 VDENC_ME_B,
472 VDENC_STREAMIN,
473 VDENC_STREAMIN_HEVC,
474 VDENC_STREAMIN_HEVC_RAB
475 };
476
477 //!
478 //! \enum HmeLevel
479 //! \brief Indicate the Hme level
480 //!
481 enum HmeLevel
482 {
483 HME_LEVEL_4x = 0,
484 HME_LEVEL_16x = 1,
485 HME_LEVEL_32x = 2
486 };
487
488 //!
489 //! \enum EncodeMeMode
490 //! \brief Encode me mode
491 //!
492 enum EncodeMeMode
493 {
494 CODECHAL_ENCODE_ME16X_BEFORE_ME4X = 0,
495 CODECHAL_ENCODE_ME16X_ONLY = 1,
496 CODECHAL_ENCODE_ME4X_ONLY = 2,
497 CODECHAL_ENCODE_ME4X_AFTER_ME16X = 3
498 };
499
500 //!
501 //! \enum CodechalEncodeBrcNumPasses
502 //! \brief used in GetNumBrcPakPasses
503 //!
504 enum CodechalEncodeBrcNumPasses
505 {
506 CODECHAL_ENCODE_BRC_SINGLE_PASS = 1, // No IPCM case
507 CODECHAL_ENCODE_BRC_MINIMUM_NUM_PASSES = 2, // 2 to cover IPCM case
508 CODECHAL_ENCODE_BRC_DEFAULT_NUM_PASSES = 4,
509 CODECHAL_ENCODE_BRC_MAXIMUM_NUM_PASSES = 7
510 };
511
512 //!
513 //! \struct HmeParams
514 //! \brief Indicate the Hme parameters
515 //!
516 struct HmeParams
517 {
518 // ME
519 PMOS_SURFACE ps4xMeMvDataBuffer;
520 PMOS_SURFACE ps16xMeMvDataBuffer;
521 PMOS_SURFACE ps32xMeMvDataBuffer;
522 PMOS_SURFACE ps4xMeDistortionBuffer;
523 PMOS_RESOURCE presMvAndDistortionSumSurface;
524 bool b4xMeDistortionBufferSupported;
525 };
526
527 //!
528 //! \brief Generic binding table
529 //!
530 struct GenericBindingTable
531 {
532 uint32_t dwMediaState;
533 uint32_t dwBindingTableStartOffset;
534 uint32_t dwNumBindingTableEntries;
535 uint32_t dwBindingTableEntries[64];
536 };
537 using PCODECHAL_ENCODE_BINDING_TABLE_GENERIC = GenericBindingTable*;
538
539 //!
540 //! \struct MeKernelBindingTable
541 //! \brief The struct of Me kernel binding table
542 //!
543 struct MeKernelBindingTable
544 {
545 uint32_t dwMEMVDataSurface;
546 uint32_t dwMECurrY;
547 uint32_t dwMEFwdRefY;
548 uint32_t dwMEBwdRefY;
549 uint32_t dwMECurrForFwdRef;
550 uint32_t dwMEFwdRef;
551 uint32_t dwMECurrForBwdRef;
552 uint32_t dwMEBwdRef;
553 uint32_t dw16xMEMVDataSurface;
554 uint32_t dw32xMEMVDataSurface;
555 uint32_t dwMEDist;
556 uint32_t dwMEBRCDist;
557 uint32_t dwMECurrForFwdRefIdx[CODECHAL_ENCODE_NUM_MAX_VME_L0_REF];
558 uint32_t dwMECurrForBwdRefIdx[CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
559
560 // Frame Binding Table Entries
561 uint32_t dwMEFwdRefPicIdx[CODECHAL_ENCODE_NUM_MAX_VME_L0_REF];
562 uint32_t dwMEBwdRefPicIdx[CODECHAL_ENCODE_NUM_MAX_VME_L1_REF];
563
564 // Field Binding Table Entries
565 uint32_t dwMEFwdRefPicTopIdx[CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L0_REF];
566 uint32_t dwMEFwdRefPicBotIdx[CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L0_REF];
567 uint32_t dwMEBwdRefPicTopIdx[CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L1_REF];
568 uint32_t dwMEBwdRefPicBotIdx[CODECHAL_ENCODE_FIELD_NUM_MAX_VME_L1_REF];
569
570 uint32_t dwVdencStreamInSurface;
571 uint32_t dwVdencStreamInInputSurface;
572
573 uint32_t dwBindingTableStartOffset;
574 uint32_t dwNumBindingTableEntries;
575 };
576
577 //!
578 //! \struct MeSurfaceParams
579 //! \brief The struct of Me surface parameters
580 //!
581 struct MeSurfaceParams
582 {
583 PCODEC_REF_LIST *ppRefList;
584 PCODEC_PIC_ID pPicIdx;
585 PCODEC_PICTURE pCurrOriginalPic;
586 PMOS_SURFACE ps4xMeMvDataBuffer;
587 uint32_t dw4xMeMvBottomFieldOffset;
588 PMOS_SURFACE ps16xMeMvDataBuffer;
589 uint32_t dw16xMeMvBottomFieldOffset;
590 PMOS_SURFACE ps32xMeMvDataBuffer;
591 uint32_t dw32xMeMvBottomFieldOffset;
592 uint32_t dw4xScaledBottomFieldOffset;
593 uint32_t dw16xScaledBottomFieldOffset;
594 uint32_t dw32xScaledBottomFieldOffset;
595 PMOS_SURFACE psMeDistortionBuffer;
596 uint32_t dwMeDistortionBottomFieldOffset;
597 PMOS_SURFACE psMeBrcDistortionBuffer;
598 PMOS_RESOURCE psMeVdencStreamInBuffer;
599 uint32_t dwMeBrcDistortionBottomFieldOffset;
600 uint32_t dwDownscaledWidthInMb;
601 uint32_t dwDownscaledHeightInMb;
602 uint32_t dwVDEncStreamInSurfaceSize;
603 uint32_t dwVerticalLineStride;
604 uint32_t dwVerticalLineStrideOffset;
605 bool b16xMeInUse;
606 bool b32xMeInUse;
607 bool b16xMeEnabled;
608 bool b32xMeEnabled;
609 bool bVdencStreamInEnabled;
610 PCODEC_PICTURE pL0RefFrameList;
611 PCODEC_PICTURE pL1RefFrameList;
612 uint32_t dwNumRefIdxL0ActiveMinus1;
613 uint32_t dwNumRefIdxL1ActiveMinus1;
614 PMHW_KERNEL_STATE pKernelState;
615 MeKernelBindingTable* pMeBindingTable;
616 bool bMbaff;
617 bool b4xMeDistortionBufferSupported;
618 };
619
620 //!
621 //! \struct MeCurbeParams
622 //! \brief The struct of Me Curbe parameters
623 //!
624 struct MeCurbeParams
625 {
626 PMHW_KERNEL_STATE pKernelState;
627 HmeLevel hmeLvl;
628 bool b16xMeEnabled;
629 bool b32xMeEnabled;
630 bool segmapProvided;
631 uint8_t TargetUsage;
632 uint8_t *pMEMethodTable;
633 uint8_t *pBMEMethodTable;
634 int32_t MaxMvLen;
635
636 // Picture parameters
637 CODEC_PICTURE CurrOriginalPic; // Source sent in by BeginFrame
638 int8_t pic_init_qp_minus26;
639
640 // Slice parameters
641 int8_t slice_qp_delta;
642 uint8_t num_ref_idx_l0_active_minus1;
643 uint8_t num_ref_idx_l1_active_minus1;
644 bool List0RefID0FieldParity;
645 bool List0RefID1FieldParity;
646 bool List0RefID2FieldParity;
647 bool List0RefID3FieldParity;
648 bool List0RefID4FieldParity;
649 bool List0RefID5FieldParity;
650 bool List0RefID6FieldParity;
651 bool List0RefID7FieldParity;
652 bool List1RefID0FieldParity;
653 bool List1RefID1FieldParity;
654 uint8_t *pCurbeBinary;
655 };
656
657 //!
658 //! \struct EncodeReadBrcPakStatsParams
659 //! \brief Encode read brc pak states parameters
660 //!
661 struct EncodeReadBrcPakStatsParams
662 {
663 CodechalHwInterface *pHwInterface;
664 PMOS_RESOURCE presBrcPakStatisticBuffer;
665 PMOS_RESOURCE presStatusBuffer;
666 uint32_t dwStatusBufNumPassesOffset;
667 uint8_t ucPass;
668 MOS_GPU_CONTEXT VideoContext;
669 };
670
671 //!
672 //! \struct PakIntegrationBrcData
673 //! \brief The struct of Huc input command 2
674 //!
675 struct PakIntegrationBrcData
676 {
677 uint32_t FrameByteCount;
678 uint32_t FrameByteCountNoHeader;
679 uint32_t HCP_ImageStatusControl;
680 };
681
682 //!
683 //! \struct SearchPathDelta
684 //! \brief The struct of Search Path Delta
685 //!
686 struct SearchPathDelta
687 {
688 uint8_t SearchPathDelta_X : 4;
689 uint8_t SearchPathDelta_Y : 4;
690 };
691
692 //!
693 //! \struct HwCounter
694 //! \brief Hardware counter
695 //!
696 struct HwCounter
697 {
698 uint64_t IV; // Big-Endian IV
699 uint64_t Count; // Big-Endian Block Count
700 };
701
702 //!
703 //! \struct PerfTagSetting
704 //! \brief Setting of performance tags
705 //!
706 struct PerfTagSetting
707 {
708 union
709 {
710 struct
711 {
712 uint16_t PictureCodingType : 2;
713 uint16_t CallType : 6;
714 uint16_t Mode : 4;
715 uint16_t : 4;
716 };
717 uint16_t Value;
718 };
719 };
720
721 //!
722 //! \struct SendKernelCmdsParams
723 //! \brief Struct of send kernel commands parameters
724 //!
725 struct SendKernelCmdsParams
726 {
727 CODECHAL_MEDIA_STATE_TYPE EncFunctionType = CODECHAL_NUM_MEDIA_STATES;
728 uint32_t uiDshIdx = 0;
729 uint8_t ucDmvPredFlag = 0;
730 bool bBrcResetRequested = false;
731 bool bEnable45ZWalkingPattern = false;
732 bool bEnableCustomScoreBoard = false;
733 PMHW_VFE_SCOREBOARD pCustomScoreBoard = nullptr;
734 PMHW_KERNEL_STATE pKernelState = nullptr;
735 bool bDshInUse = false;
736 };
737
738 //!
739 //! \struct BrcQpReport
740 //! \brief Struct of Query bit rate control and QP Status
741 //!
742 struct BrcQpReport
743 {
744 // uint32_t 0
745 union
746 {
747 struct
748 {
749 uint32_t QPPrimeY : 8;
750 uint32_t QPPrimeCb : 8;
751 uint32_t QPPrimeCr : 8;
752 uint32_t Reserved : 8;
753 };
754 struct
755 {
756 uint32_t Value;
757 };
758 } DW0;
759
760 // uint32_t 1 ~ 15
761 struct
762 {
763 uint32_t Value[15];
764 };
765 };
766
767 //!
768 //! \struct EncodeBrcBuffers
769 //! \brief Encode brc buffers
770 //!
771 struct EncodeBrcBuffers
772 {
773 MOS_RESOURCE resBrcHistoryBuffer; // BRC history buffer
774 MOS_RESOURCE resBrcPakStatisticBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM];
775 uint32_t uiCurrBrcPakStasIdxForRead;
776 uint32_t uiCurrBrcPakStasIdxForWrite;
777 MOS_RESOURCE resBrcImageStatesReadBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; // read only BRC image state buffer
778 MOS_RESOURCE resBrcImageStatesWriteBuffer; // write only BRC image state buffer
779 MOS_RESOURCE resHevcBrcImageStatesWriteBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; // write only HEVC BRC image state buffers
780 MOS_RESOURCE resPakQPInputTable;
781 MOS_RESOURCE resBrcConstantDataBuffer;
782 MOS_RESOURCE resEncoderCfgCommandReadBuffer;
783 MOS_RESOURCE resEncoderCfgCommandWriteBuffer;
784 MOS_RESOURCE resBrcPakStatsBeforeDumpBuffer; // These buffers are used to dump all the MMIO read values
785 MOS_RESOURCE resBrcPakStatsAfterDumpBuffer; // which are super-set of PakStat
786 MOS_SURFACE sBrcConstantDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM];
787 MOS_SURFACE sMeBrcDistortionBuffer;
788 uint32_t dwMeBrcDistortionBottomFieldOffset;
789 MOS_RESOURCE resMbBrcConstDataBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM];
790 MOS_SURFACE sBrcMbQpBuffer;
791 uint32_t dwBrcMbQpBottomFieldOffset;
792 MOS_RESOURCE resBrcPicHeaderInputBuffer;
793 MOS_RESOURCE resBrcPicHeaderOutputBuffer;
794 MOS_RESOURCE resMbEncAdvancedDsh;
795 MOS_RESOURCE resMbEncBrcBuffer;
796 MOS_SURFACE sBrcRoiSurface; // BRC ROI surface
797 PMHW_KERNEL_STATE pMbEncKernelStateInUse;
798 };
799
800 //!
801 //! \struct CODECHAL_ENCODE_BUFFER
802 //! \brief Codechal encode buffer
803 //!
804 struct CODECHAL_ENCODE_BUFFER
805 {
806 MOS_RESOURCE sResource;
807 uint32_t dwSize = 0;
808 };
809 using PCODECHAL_ENCODE_BUFFER = CODECHAL_ENCODE_BUFFER*;
810
811 //!
812 //! \struct CodechalTileInfo
813 //! \brief Tile info report to application
814 //!
815 struct CodechalTileInfo
816 {
817 uint16_t TileRowNum;
818 uint16_t TileColNum;
819 uint32_t TileBitStreamOffset;
820 uint32_t TileSizeInBytes;
821
822 uint32_t reserved;
823 HwCounter HWCounterValue;
824 };
825
826 //!
827 //! \struct EncodeStatusReport
828 //! \brief Encode status report structure
829 //!
830 struct EncodeStatusReport
831 {
832 CODECHAL_STATUS CodecStatus; //!< Status for the picture associated with this status report
833 uint32_t StatusReportNumber; //!< Status report number associated with the picture in this status report provided in CodechalEncoderState::Execute()
834 CODEC_PICTURE CurrOriginalPic; //!< Uncompressed frame information for the picture associated with this status report
835 CODECHAL_ENCODE_FUNCTION_ID Func; //!< Encode function requested at CodechalEncoderState::Execute()
836 PCODEC_REF_LIST pCurrRefList; //!< Reference list for the current frame, used for dump purposes with CodecHal Debug Tool
837 /*! \brief Specifies the order in which the statuses are expected.
838 *
839 * The order in which a status is returned is requested at the DDI level and the order itself is determined by StatusReportNumber.
840 * FALSE indicates the statuses should be returned in reverse order.
841 * TRUE indicates the statuses should be returned in sequential order.
842 */
843 bool bSequential;
844 /*! \brief Coded bitstream size reported by HW.
845 *
846 * The size reported by HW is the total bitstream size that is encoded by HW including any bitstream buffer overrun. That is, HW continues counting the encoded bytes past the programmed upperbound based on the allocated bitstream buffer size. The framework can compare this value to the allocated buffer size to determine if there was overflow for this frame and can act accordingly.
847 */
848 uint32_t bitstreamSize;
849 /*! \brief Qp value for Y used for the first PAK pass.
850 *
851 * It is not valid if CQP is set by framework.
852 */
853 int8_t QpY;
854 /*! \brief Suggested Qp delta value for Y.
855 *
856 * Framework can add this delta Qp with the first pass QpY to get the final Qp used for multi-pass. It is not valid if CQP is set by framework.
857 * Note: Framework can use this reported QpY and suggestedQpYDelta to set QpY in picture parameter to minimize LCU level Qp delta.
858 */
859 int8_t SuggestedQpYDelta;
860 uint8_t NumberPasses; //!< Number of PAK passes executed.
861 uint8_t AverageQp; //!< The average QP of all MBs or LCUs of the frame.
862 HwCounter HWCounterValue;
863 uint64_t * hwctr;
864 union
865 {
866 struct
867 {
868 uint32_t PanicMode : 1; //!< Indicates that panic mode was triggered by HW for this frame.
869 uint32_t SliceSizeOverflow : 1; //!< When SliceLevelRateCtrl is used, indicates the requested slice size was not met for one or more generated slices.
870 uint32_t NumSlicesNonCompliant : 1; //!< When SliceLevelRateCtrl is used, indicates whether or not the number of generated slices exceeds specification limits.
871 uint32_t LongTermReference : 1;
872 uint32_t FrameSkipped : 1;
873 uint32_t SceneChangeDetected : 1;
874 uint32_t : 26;
875 };
876 uint32_t QueryStatusFlags;
877 };
878 /*! \brief The average MAD (Mean Absolute Difference) across all macroblocks in the Y plane.
879 *
880 * The MAD value is the mean of the absolute difference between the pixels in the original block and the corresponding pixels in the block being used for comparison, from motion compensation or intra spatial prediction. MAD reporting is disabled by default.
881 */
882 uint32_t MAD;
883 uint32_t loopFilterLevel; //!< [VP9]
884 int8_t LongTermIndication; //!< [VP9]
885 uint16_t NextFrameWidthMinus1; //!< [VP9]
886 uint16_t NextFrameHeightMinus1; //!< [VP9]
887 uint8_t NumberSlices; //!< Number of slices generated for the frame.
888 uint16_t PSNRx100[3]; //!< PSNR for different channels
889 uint32_t NumberTilesInFrame; //!< Number of tiles generated for the frame.
890 uint8_t UsedVdBoxNumber; //!< Number of vdbox used.
891 uint32_t SizeOfSliceSizesBuffer; //!< Store the size of slice size buffer
892 uint16_t *pSliceSizes; //!< Pointer to the slice size buffer
893 uint32_t SizeOfTileInfoBuffer; //!< Store the size of tile info buffer
894 CodechalTileInfo* pHEVCTileinfo; //!< Pointer to the tile info buffer
895 uint32_t NumTileReported; //!< The number of tiles reported in status
896
897 /*! \brief indicate whether it is single stream encoder or MFE.
898 *
899 * For single stream encoder (regular), this value should be set to default 0. For Multi-Frame-Encoder (MFE), this value is the StreamId that is set by application.
900 */
901 uint32_t StreamId;
902
903 uint8_t cqmHint; //!< CQM hint. 0x00 - flat matrix; 0x01 - enable CQM; 0xFF - invalid hint; other vlaues are reserved.
904 };
905
906 //!
907 //! \struct EncodeStatusSliceReport
908 //! \brief The struct stores Encode status buffers
909 //!
910 struct EncodeStatusSliceReport
911 {
912 uint32_t SliceSizeOverflow;
913 uint8_t NumberSlices;
914 uint32_t SizeOfSliceSizesBuffer;
915 PMOS_RESOURCE pSliceSize;
916 };
917
918 //!
919 //! \struct EncodeStatus
920 //! \brief The struct stores Encode status
921 //!
922 struct EncodeStatus
923 {
924 uint32_t dwStoredDataMfx; //!< HW requires a QW aligned offset for data storage
925 uint32_t dwPad; //!< Pad
926 struct
927 {
928 uint32_t dwStoredData;
929 uint32_t dwPad;
930 } qwStoredDataEnc[CODECHAL_NUM_MEDIA_STATES]; //!< Media states of stored encode data
931 uint32_t dwStoredData; //!< SW stored data
932 uint32_t dwMFCBitstreamByteCountPerFrame; //!< Media fixed function bitstream byte count per frame
933 uint32_t dwMFCBitstreamSyntaxElementOnlyBitCount; //!< Media fixed function bitstream bit count for syntax element only
934 uint32_t lookaheadStatus; //!< Lookahead status. valid in lookahead pass only
935 uint32_t dwImageStatusMask; //!< MUST ENSURE THAT THIS IS QWORD ALIGNED as it's used for the conditional BB end
936 MHW_VDBOX_IMAGE_STATUS_CONTROL ImageStatusCtrl; //!< Used for storing the control flags for the image status
937 uint32_t HuCStatusRegMask; //!< MUST ENSURE THAT THIS IS QWORD ALIGNED as it's used for the conditional BB end
938 uint32_t HuCStatusReg; //!< Register value saving HuC Status
939 MHW_VDBOX_PAK_NUM_OF_SLICES NumSlices; //!< Num of slices for encode
940 uint32_t dwErrorFlags; //!< The definition is different on SNB/IVB, hence DWORD
941 BrcQpReport BrcQPReport; //!< Query bit rate control and QP Status
942 uint32_t dwNumberPasses; //!< Number of passes
943 uint32_t dwHeaderBytesInserted; //!< The size including header, prevention bytes and dummy "0xff" inserted by SW driver
944 CodechalQpStatusCount QpStatusCount; //!< This is used to obtain the cumulative QP
945 EncodeStatusReport encodeStatusReport; //!< The detailed encode status report structure
946 uint16_t wPictureCodingType; //!< Type of picture coding
947 uint32_t LoopFilterLevel; //!< The level of loop filter
948 MHW_VDBOX_IMAGE_STATUS_CONTROL ImageStatusCtrlOfLastBRCPass; //!< The level of loop filter
949 uint32_t dwSceneChangedFlag; //!< The flag indicate if the scene is changed
950 uint64_t sumSquareError[3]; //!< The list of sum square error
951 EncodeStatusSliceReport sliceReport;
952 };
953
954 //!
955 //! \struct EncodeStatusBuffer
956 //! \brief The sturct of encode status buffer
957 //!
958 struct EncodeStatusBuffer
959 {
960 uint8_t *pEncodeStatus; //!> needs to be first to ensure alingment of dwStoredDataMfx/Vme
961 MOS_RESOURCE resStatusBuffer; //!> Handle of eStatus buffer
962 uint32_t *pData; //!> Pointer of the buffer of actual data
963 uint16_t wFirstIndex; //!> Indicate the first index of status
964 uint16_t wCurrIndex; //!> Indicate current index of status
965 uint32_t dwStoreDataOffset; //!> The offset of stored data
966 uint32_t dwBSByteCountOffset; //!> The offset of BS byte count
967 uint32_t dwBSSEBitCountOffset; //!> The offset of BS SE byte count
968 uint32_t dwImageStatusMaskOffset; //!> The offset of image status mask
969 uint32_t dwImageStatusCtrlOffset; //!> The offset of status control
970 uint32_t dwHuCStatusMaskOffset; //!> The offset of HuC status register mask
971 uint32_t dwHuCStatusRegOffset; //!> The offset of HuC status register
972 uint32_t dwNumSlicesOffset; //!> The offset of silce num
973 uint32_t dwErrorFlagOffset; //!> The offset of error flag
974 uint32_t dwBRCQPReportOffset; //!> The offset of bitrate control QP report
975 uint32_t dwNumPassesOffset; //!> The offset of passes number
976 uint32_t dwQpStatusCountOffset; //!> The offset of QP status count
977 uint32_t dwImageStatusCtrlOfLastBRCPassOffset; //!> The offset of image status control of last bitrate control pass
978 uint32_t dwSceneChangedOffset; //!> The offset of the scene changed flag
979 uint32_t dwSumSquareErrorOffset; //!> The offset of list of sum square error
980 uint32_t dwSliceReportOffset; //!> The offset of slice size report structure
981 uint32_t dwLookaheadStatusOffset; //!> The offset of lookahead status
982 uint32_t dwSize; //!> Size of status buffer
983 uint32_t dwReportSize; //!> Size of report
984 };
985
986 //!
987 //! \struct AtomicScratchBuffer
988 //! \brief The sturct of Atomic Scratch Buffer
989 //!
990 struct AtomicScratchBuffer
991 {
992 MOS_RESOURCE resAtomicScratchBuffer; //!> Handle of eStatus buffer
993 uint32_t *pData; //!> Pointer of the buffer of actual data
994 uint16_t wEncodeUpdateIndex; //!> used for VDBOX update encode status
995 uint16_t wTearDownIndex; //!> Reserved for future extension
996 uint32_t dwZeroValueOffset; //!> Store the result of the ATOMIC_CMP
997 uint32_t dwOperand1Offset; //!> Operand 1 of the ATOMIC_CMP
998 uint32_t dwOperand2Offset; //!> Operand 2 of the ATOMIC_CMP
999 uint32_t dwOperand3Offset; //!> Copy of the operand 1
1000
1001 uint32_t dwSize; //!> Size of the buffer
1002 uint32_t dwOperandSetSize; //!> Size of Operand set
1003 };
1004
1005 //!
1006 //! \struct CodechalEncodeBbuf
1007 //! \brief Struct for Batch buffer
1008 //!
1009 struct CodechalEncodeBbuf
1010 {
1011 MHW_BATCH_BUFFER BatchBuffer;
1012 uint32_t dwSize;
1013 uint32_t dwNumMbsInBBuf;
1014 bool fieldScale;
1015 };
1016
1017 //!
1018 //! \struct CodechalEncodeIdOffsetParams
1019 //! \brief Indicate the ID Offset parameters
1020 //!
1021 struct CodechalEncodeIdOffsetParams
1022 {
1023 uint32_t Standard;
1024 CODECHAL_MEDIA_STATE_TYPE EncFunctionType;
1025 uint16_t wPictureCodingType;
1026 uint8_t ucDmvPredFlag;
1027 bool interlacedField;
1028 };
1029
1030 //!
1031 //! \struct VdencBrcPakMmio
1032 //! \brief MMIO of BRC and PAK
1033 //!
1034 struct VdencBrcPakMmio
1035 {
1036 uint32_t dwReEncode[4];
1037 };
1038
1039 //!
1040 //! \struct CodechalEncodeLaData
1041 //! \brief Codechal encode lookahead analysis output data structure, used by BRC kernel
1042 //!
1043 struct CodechalEncodeLaData
1044 {
1045 uint32_t reserved0[5];
1046 union
1047 {
1048 struct
1049 {
1050 uint32_t cqmHint : 8; //!< Custom quantization matrix hint. 0x00 - flat matrix; 0x01 - CQM; 0xFF - invalid hint; other values are reserved.
1051 uint32_t reserved2 : 24;
1052 };
1053 uint32_t report;
1054 };
1055 uint32_t reserved1[10];
1056 };
1057
1058 //!
1059 //! \enum EncodeMode
1060 //! \brief Encode mode
1061 //!
1062 enum EncodeMode
1063 {
1064 encodeNormalMode = 0,
1065 encodePerformanceMode = 1,
1066 encodeQualityMode = 2
1067 };
1068
1069 enum
1070 {
1071 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_KERNEL,
1072 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_PHASE1_KERNEL = CODECHAL_ENCODE_PERFTAG_CALL_MBENC_KERNEL,
1073 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_PHASE2_KERNEL,
1074 CODECHAL_ENCODE_PERFTAG_CALL_SCALING_KERNEL,
1075 CODECHAL_ENCODE_PERFTAG_CALL_INTRA_DIST,
1076 CODECHAL_ENCODE_PERFTAG_CALL_ME_KERNEL,
1077 CODECHAL_ENCODE_PERFTAG_CALL_BRC_INIT_RESET,
1078 CODECHAL_ENCODE_PERFTAG_CALL_BRC_UPDATE,
1079 CODECHAL_ENCODE_PERFTAG_CALL_BRC_COPY,
1080 CODECHAL_ENCODE_PERFTAG_CALL_PAK_ENGINE,
1081 CODECHAL_ENCODE_PERFTAG_CALL_PAK_KERNEL,
1082 CODECHAL_ENCODE_PERFTAG_CALL_PAK_PHASE1_KERNEL = CODECHAL_ENCODE_PERFTAG_CALL_PAK_KERNEL,
1083 CODECHAL_ENCODE_PERFTAG_CALL_PAK_PHASE2_KERNEL,
1084 CODECHAL_ENCODE_PERFTAG_CALL_UPSCALING,
1085 CODECHAL_ENCODE_PERFTAG_CALL_DEBLOCKING,
1086 CODECHAL_ENCODE_PERFTAG_CALL_WP_KERNEL,
1087 CODECHAL_ENCODE_PERFTAG_CALL_32X32_PU_MD,
1088 CODECHAL_ENCODE_PERFTAG_CALL_32X32_B_IC,
1089 CODECHAL_ENCODE_PERFTAG_CALL_16X16_PU_MD,
1090 CODECHAL_ENCODE_PERFTAG_CALL_16X16_SAD,
1091 CODECHAL_ENCODE_PERFTAG_CALL_8X8_PU,
1092 CODECHAL_ENCODE_PERFTAG_CALL_8X8_FMODE,
1093 CODECHAL_ENCODE_PERFTAG_CALL_BRC_UPDATE_LCU,
1094 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_I_32x32,
1095 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_I_16x16,
1096 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_P,
1097 CODECHAL_ENCODE_PERFTAG_CALL_MBENC_TX,
1098 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_RECON_LUMA,
1099 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_RECON_CHROMA,
1100 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_RECON_LUMA_32x32,
1101 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_RECON_INTRA_LUMA,
1102 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_RECON_INTRA_CHROMA,
1103 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_DEBLOCK_MASK,
1104 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_DEBLOCK_LUMA,
1105 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_DEBLOCK_CHROMA,
1106 CODECHAL_ENCODE_PERFTAG_CALL_MBPAK_MC,
1107 CODECHAL_ENCODE_PERFTAG_CALL_PREPROC_KERNEL,
1108 CODECHAL_ENCODE_PERFTAG_CALL_DS_CONVERSION_KERNEL,
1109 CODECHAL_ENCODE_PERFTAG_CALL_SCOREBOARD,
1110 CODECHAL_ENCODE_PERFTAG_CALL_SFD_KERNEL
1111 };
1112
1113 class CodechalEncodeWP;
1114 #if USE_CODECHAL_DEBUG_TOOL
1115 class CodechalDebugEncodePar;
1116 #endif
1117
1118 //!
1119 //! \class CodechalEncoderGenState
1120 //! \brief Codechal encoder gen state
1121 //!
1122 class CodechalEncoderGenState
1123 {
1124 public:
1125 CodechalEncoderGenState(CodechalEncoderState* encoder);
1126
~CodechalEncoderGenState()1127 virtual ~CodechalEncoderGenState() {}
1128
1129 CodechalEncoderState* m_encoder = nullptr;
1130 // Encoder private data
1131 CodechalHwInterface* m_hwInterface = nullptr;
1132 PMOS_INTERFACE m_osInterface = nullptr;
1133 CodechalDebugInterface* m_debugInterface = nullptr;
1134 MhwMiInterface* m_miInterface = nullptr; //!< Common Mi Interface
1135 MhwRenderInterface* m_renderEngineInterface = nullptr; //!< Render engine interface
1136 PMHW_STATE_HEAP_INTERFACE m_stateHeapInterface = nullptr; //!< State heap interface
1137
SetCurbeMe(MeCurbeParams * params)1138 virtual MOS_STATUS SetCurbeMe(
1139 MeCurbeParams* params)
1140 {
1141 return MOS_STATUS_SUCCESS;
1142 }
1143
SendMeSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,MeSurfaceParams * params)1144 virtual MOS_STATUS SendMeSurfaces(
1145 PMOS_COMMAND_BUFFER cmdBuffer,
1146 MeSurfaceParams* params)
1147 {
1148 return MOS_STATUS_SUCCESS;
1149 }
1150 };
1151
1152 //!
1153 //! \class CodechalEncoderState
1154 //! \brief This base class defines the common member fields, functions etc used by all encoder.
1155 //!
1156 class CodechalEncoderState : public Codechal
1157 {
1158 public:
1159 //!
1160 //! \enum RefId
1161 //! \brief Reference id
1162 //!
1163 enum RefId
1164 {
1165 CODECHAL_ENCODE_REF_ID_0 = 0,
1166 CODECHAL_ENCODE_REF_ID_1 = 1,
1167 CODECHAL_ENCODE_REF_ID_2 = 2,
1168 CODECHAL_ENCODE_REF_ID_3 = 3,
1169 CODECHAL_ENCODE_REF_ID_4 = 4,
1170 CODECHAL_ENCODE_REF_ID_5 = 5,
1171 CODECHAL_ENCODE_REF_ID_6 = 6,
1172 CODECHAL_ENCODE_REF_ID_7 = 7,
1173 };
1174
1175 // this is used for Mpeg2 encoding BRC as well,
1176 // therefore, the last entry is for Mpeg2
1177 const uint8_t m_bMeMethodGeneric[NUM_TARGET_USAGE_MODES + 1] = {0, 4, 4, 6, 6, 6, 6, 4, 7};
1178
1179 const uint8_t m_meMethodGeneric[NUM_TARGET_USAGE_MODES + 1] = {0, 4, 4, 6, 6, 6, 6, 4, 7};
1180
1181 const uint32_t m_superCombineDistGeneric[NUM_TARGET_USAGE_MODES + 1] ={0, 1, 1, 5, 5, 5, 9, 9, 0};
1182
1183 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISCBR = 0x0010;
1184 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISVBR = 0x0020;
1185 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISAVBR = 0x0040;
1186 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISCQL = 0x0080;
1187 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_FIELD_PIC = 0x0100;
1188 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISICQ = 0x0200;
1189 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISVCM = 0x0400;
1190 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_IGNORE_PICTURE_HEADER_SIZE = 0x2000;
1191 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_ISQVBR = 0x4000;
1192 static constexpr uint32_t CODECHAL_ENCODE_BRCINIT_DISABLE_MBBRC = 0x8000;
1193 static constexpr uint32_t m_numLaDataEntry = 128; //!< number of entries in lookahead data buffer and lookahead stats buffer
1194
1195 // SearchPath Table, index [CodingType][MEMethod][]
1196 const uint32_t m_encodeSearchPath[2][8][16] =
1197 {
1198 // I-Frame & P-Frame
1199 {
1200 // MEMethod: 0
1201 {
1202 0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
1203 0x0DFFFFE0, 0x11201F1F, 0x1105F1CF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1204 },
1205 // MEMethod: 1
1206 {
1207 0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
1208 0x0DFFFFE0, 0x11201F1F, 0x1105F1CF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1209 },
1210 // MEMethod: 2
1211 {
1212 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1213 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1214 },
1215 // MEMethod: 3
1216 {
1217 0x01010101, 0x11010101, 0x01010101, 0x11010101, 0x01010101, 0x11010101, 0x01010101, 0x11010101,
1218 0x01010101, 0x11010101, 0x01010101, 0x00010101, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1219 },
1220 // MEMethod: 4
1221 {
1222 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1223 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1224 },
1225 // MEMethod: 5
1226 {
1227 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1228 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1229 },
1230 // MEMethod: 6
1231 {
1232 0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
1233 0x0DFFFFE0, 0x11201F1F, 0x1105F1CF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1234 },
1235 // MEMethod: 7 used for mpeg2 encoding P frames
1236 {
1237 0x1F11F10F, 0x2E22E2FE, 0x20E220DF, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x02F1F1F1, 0x1F201111,
1238 0xF1EFFF0C, 0xF01104F1, 0x10FF0A50, 0x000FF1C0, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1239 }
1240 },
1241 // B-Frame
1242 {
1243 // MEMethod: 0
1244 {
1245 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1246 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1247 },
1248 // MEMethod: 1
1249 {
1250 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1251 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1252 },
1253 // MEMethod: 2
1254 {
1255 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1256 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1257 },
1258 // MEMethod: 3
1259 {
1260 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1261 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1262 },
1263 // MEMethod: 4
1264 {
1265 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1266 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1267 },
1268 // MEMethod: 5
1269 {
1270 0x0101F00F, 0x0F0F1010, 0xF0F0F00F, 0x01010101, 0x10101010, 0x0F0F0F0F, 0xF0F0F00F, 0x0101F0F0,
1271 0x01010101, 0x10101010, 0x0F0F1010, 0x0F0F0F0F, 0xF0F0F00F, 0xF0F0F0F0, 0x00000000, 0x00000000
1272 },
1273 // MEMethod: 6
1274 {
1275 0x120FF10F, 0x1E22E20D, 0x20E2FF10, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x4EF1F1F1, 0xF1F21211,
1276 0x0DFFFFE0, 0x11201F1F, 0x1105F1CF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1277 },
1278 // MEMethod: 7 used for mpeg2 encoding B frames
1279 {
1280 0x1F11F10F, 0x2E22E2FE, 0x20E220DF, 0x2EDD06FC, 0x11D33FF1, 0xEB1FF33D, 0x02F1F1F1, 0x1F201111,
1281 0xF1EFFF0C, 0xF01104F1, 0x10FF0A50, 0x000FF1C0, 0x00000000, 0x00000000, 0x00000000, 0x00000000
1282 }
1283 }
1284 };
1285
1286 // ME kernel
1287 enum
1288 {
1289 CODECHAL_ENCODE_ME_IDX_P = 0,
1290 CODECHAL_ENCODE_ME_IDX_B = 1,
1291 CODECHAL_ENCODE_ME_IDX_VDENC = 1,
1292 CODECHAL_ENCODE_ME_IDX_NUM = 2
1293 };
1294
1295 //!
1296 //! \struct MediaObjectInlineData
1297 //! \brief Media object inline data
1298 //!
1299 struct MediaObjectInlineData
1300 {
1301 // uint32_t 0
1302 union
1303 {
1304 struct
1305 {
1306 uint32_t mbHorizontalOrigin : 8; // in MB unit
1307 uint32_t mbVerticalOrigin : 8; // in MB unit
1308 uint32_t : 16;
1309 };
1310 // For BRC Block Copy kernels
1311 struct
1312 {
1313 uint32_t blockHeight : 16;
1314 uint32_t bufferOffset : 16;
1315 };
1316 struct
1317 {
1318 uint32_t value;
1319 };
1320 } DW0;
1321 };
1322
1323 //!
1324 //! \brief Constructor
1325 //!
1326 CodechalEncoderState(
1327 CodechalHwInterface* hwInterface,
1328 CodechalDebugInterface* debugInterface,
1329 PCODECHAL_STANDARD_INFO standardInfo);
1330
1331 //!
1332 //! \brief Destructor
1333 //!
1334 virtual ~CodechalEncoderState();
1335
1336 // Encoder private data
1337 MhwVdboxMfxInterface* m_mfxInterface = nullptr; //!< Mfx Interface
1338 MhwVdboxHcpInterface* m_hcpInterface = nullptr; //!< Hcp Interface
1339 MhwVdboxHucInterface* m_hucInterface = nullptr; //!< Huc Interface
1340 MhwVdboxVdencInterface* m_vdencInterface = nullptr; //!< Vdenc Interface
1341 MhwMiInterface* m_miInterface = nullptr; //!< Mi Interface
1342 MhwRenderInterface* m_renderEngineInterface = nullptr; //!< Render engine interface
1343 PMHW_STATE_HEAP_INTERFACE m_stateHeapInterface = nullptr; //!< State heap interface
1344 CodechalEncodeAllocator* m_allocator = nullptr; //!< Resource allocator
1345 CodechalEncodeTrackedBuffer* m_trackedBuf = nullptr; //!< Tracked buffer state
1346
1347 PLATFORM m_platform = {}; //!< The platorm info
1348 MEDIA_FEATURE_TABLE *m_skuTable = nullptr; //!< SKU table
1349 MEDIA_WA_TABLE *m_waTable = nullptr; //!< WA table
1350 CodecHalMmcState* m_mmcState = nullptr; //!< Memory compression
1351 MEDIA_SYSTEM_INFO *m_gtSystemInfo = nullptr; //!< GT system infomation
1352 MOS_GPU_NODE m_videoGpuNode = MOS_GPU_NODE_MAX; //!< GPU node of video
1353 MOS_GPU_CONTEXT m_videoContext = MOS_GPU_CONTEXT_INVALID_HANDLE; //!< GPU context of video
1354 MOS_GPU_CONTEXT m_videoContextExt[4]; //!< Extand GPU context
1355 MOS_GPU_CONTEXT m_renderContext = MOS_GPU_CONTEXT_INVALID_HANDLE; //!< GPU context of render
1356 bool m_pakEnabled = false; //!< flag to indicate if PAK is enabled
1357 bool m_encEnabled = false; //!< flag to indicate if ENC is enabled
1358 bool m_videoNodeAssociationCreated = false; //!< flag to indicate if video node association is created
1359 bool m_computeContextEnabled = false; //!< flag to indicate if compute context is enabled
1360 bool m_needCheckCpEnabled = false; //!< Indicate if checking cp is needed when prepare default nodes
1361 bool m_vdboxOneDefaultUsed = false; //!< Indicate VDBOX 1 is always used when prepare default nodes
1362
1363 CodechalEncoderGenState* m_encoderGenState = nullptr; //!< Pointer to Gen Specific Encoder State
1364 CodechalEncodeCscDs* m_cscDsState = nullptr; //!< pointer to CSC Downscaling state
1365 CodechalEncodeWP* m_wpState = nullptr; //!< pointer to weighted prediction state
1366 CODECHAL_FUNCTION m_codecFunction = CODECHAL_FUNCTION_INVALID; //!< The encode state's codec function used
1367 uint32_t m_standard = 0; //!< The encode state's standard
1368 uint32_t m_mode = 0; //!< The encode mode
1369 MHW_WALKER_MODE m_walkerMode = MHW_WALKER_MODE_NOT_SET; //!< The encode walker's mode
1370 uint8_t m_kernelMode = 0; //!< normal, performance, quality.
1371
1372 bool m_mfeEnabled = false; //!< Mfe enabled
1373 bool m_mfeMbEncEanbled = false; //!< Mfe MBEnc kernel enabled
1374 bool m_mfeLastStream = false; //!< Is last stream during this submission
1375 bool m_mfeFirstStream = false; //!< Is first stream during this submission
1376 bool m_mfeInitialized = false; //!< Used for initializing MFE resources during first execute
1377 MfeParams m_mfeEncodeParams = {}; //!< Mfe encode params during this submission
1378 MfeSharedState * m_mfeEncodeSharedState = nullptr; //!< shared state from the parent context
1379
1380 // Common Kernel Parameters
1381 uint8_t* m_kernelBase = nullptr; //!< Kernel base address
1382 uint32_t m_kuid = 0; //!< Kernel unified ID
1383
1384 // Per-frame Application Settings
1385 EncoderParams m_encodeParams = {}; //!< Encode parameters used in each frame
1386 uint32_t *m_dataHwCount = nullptr; //!< HW count data
1387 MOS_RESOURCE m_resHwCount = {}; //!< Resource of HW count
1388 MOS_SURFACE m_prevRawSurface = {}; //!< Pointer to MOS_SURFACE of previous raw surface
1389 MOS_SURFACE m_rawSurface = {}; //!< Pointer to MOS_SURFACE of raw surface
1390 MOS_SURFACE m_reconSurface = {}; //!< Pointer to MOS_SURFACE of reconstructed surface
1391 MOS_RESOURCE m_resBitstreamBuffer = {}; //!< Pointer to MOS_SURFACE of bitstream surface
1392 MOS_RESOURCE m_resMbCodeSurface = {}; //!< Pointer to MOS_SURFACE of MbCode surface
1393 MOS_RESOURCE m_resMvDataSurface = {}; //!< Pointer to MOS_SURFACE of MvData surface
1394 uint32_t m_mbDataBufferSize = 0;
1395 HwCounter m_regHwCount[CODECHAL_ENCODE_STATUS_NUM + 1]; //!< HW count register value
1396
1397 CODEC_PICTURE m_currOriginalPic = {}; //!< Raw.
1398 CODEC_PICTURE m_currReconstructedPic = {}; //!< Recon.
1399 uint16_t m_pictureCodingType = 0; //!< I, P, or B frame
1400 int16_t m_frameNum = 0; //!< Frame number
1401 bool m_firstFrame = true; //!< Flag to indicate if it is first frame
1402 bool m_firstTwoFrames = false; //!< Flag to indicate if they are first two frames
1403 bool m_firstField = true; //!< Flag to indicate if it is first field
1404 bool m_resolutionChanged = false; //!< Flag to indicate if resolution is changed
1405 bool m_scalingEnabled = false; //!< 4x Scaling kernel needs to be called for this frame
1406 bool m_2xScalingEnabled = false; //!< 2x Scaling kernel only used by HEVC now
1407 bool m_useRawForRef = false; //!< Flag to indicate if using raw surface for reference
1408 bool m_disableReconMMCD = false; //!< disable Recon surface's MMC
1409 bool m_repeatFrame = false; //!< Flag to indicate if current frame is repeat frame
1410 bool m_pollingSyncEnabled = false; //!< Flag to indicate if GPU polling based sync for raw surface copy is enabled
1411 uint32_t m_syncMarkerOffset = 0; //!< Sync marker offset in raw surface for GPU polling based sync
1412 uint32_t m_syncMarkerValue = 0; //!< Sync marker value in raw surface for GPU polling based sync
1413 uint8_t m_prevReconFrameIdx = 0; //!< Previous reconstruct frame index
1414 uint8_t m_currReconFrameIdx = 0; //!< Current reconstruct frame index
1415
1416 uint32_t m_frameWidth = 0; //!< Frame width in luma samples
1417 uint32_t m_frameHeight = 0; //!< Frame height in luma samples
1418 uint32_t m_frameFieldHeight = 0; //!< Frame height in luma samples
1419 uint32_t m_oriFrameHeight = 0; //!< Original frame height
1420 uint32_t m_oriFrameWidth = 0; //!< Original frame width
1421 uint32_t m_createWidth = 0; //!< Max Frame Width for resolution reset
1422 uint32_t m_createHeight = 0; //!< Max Frame Height for resolution reset
1423 uint16_t m_picWidthInMb = 0; //!< Picture Width in MB width count
1424 uint16_t m_picHeightInMb = 0; //!< Picture Height in MB height count
1425 uint16_t m_frameFieldHeightInMb = 0; //!< Frame/field Height in MB
1426 uint32_t m_bitstreamUpperBound = 0; //!< Bitstream upper bound
1427 uint8_t m_oriFieldCodingFlag = 0; //!< Original field coding flag
1428 uint32_t m_maxBtCount = 0; //!< Max bt count
1429 bool m_cmKernelEnable = false; //!< Flag to indicate if cm kernel is enabled
1430 bool m_feiEnable = false; //!< FEI is enabled
1431
1432 // Synchronization
1433 MOS_RESOURCE m_resSyncObjectRenderContextInUse = {}; //!< Resource of the sync object to indicate render context is in use
1434 MOS_RESOURCE m_resSyncObjectVideoContextInUse = {}; //!< Resource of the sync object to indicate video context is in use
1435 bool m_waitForPak = false; //!< Flag to indicate if waiting for PAK
1436 bool m_signalEnc = false; //!< Flag used to signal ENC
1437 uint32_t m_semaphoreObjCount = 0; //!< Count of semaphore objects
1438 uint32_t m_semaphoreMaxCount = 0; //!< Max count of semaphore
1439
1440 // Status Reporting
1441 bool m_codecGetStatusReportDefined = false; //!< Need to be set to true by any codec/gen that has their own impleementation.
1442 uint32_t m_storeData = 0; //!< Stored data
1443 bool m_statusQueryReportingEnabled = false; //!< Flag to indicate if we support eStatus query reporting on current Platform
1444 EncodeStatusBuffer m_encodeStatusBuf = {}; //!< Stores all the status_query related data for PAK engine
1445 EncodeStatusBuffer m_encodeStatusBufRcs = {}; //!< Stores all the status_query related data for render ring (RCS)
1446 MHW_VDBOX_IMAGE_STATUS_CONTROL m_imgStatusControlBuffer; //!< Stores image eStatus control data
1447 uint32_t m_statusReportFeedbackNumber = 0; //!< Status report feed back number
1448 bool m_frameTrackingEnabled = false; //!< Flag to indicate if we enable KMD frame tracking
1449 uint32_t m_numberTilesInFrame = 0; //!< Track number of tiles per frame
1450 bool m_inlineEncodeStatusUpdate = false; //!< check whether use inline encode status update or seperate BB
1451 AtomicScratchBuffer m_atomicScratchBuf = {}; //!< Stores atomic operands and result
1452 bool m_skipFrameBasedHWCounterRead = false; //!< Skip reading Frame base HW counter for status report
1453 bool m_disableStatusReport = false; //!< Indicate status report is not needed.
1454
1455 // Shared Parameters
1456 BSBuffer m_bsBuffer = {}; //!< Bitstream buffer
1457 bool m_newSeqHeader = false; //!< New sequence header flag
1458 bool m_newPpsHeader = false; //!< New PPS header flag
1459 bool m_newVuiData = false; //!< New Vui data flag
1460 bool m_newSeq = false; //!< New sequence flag
1461 bool m_lastPicInSeq = false; //!< Flag to indicate if it is last picture in sequence
1462 bool m_lastPicInStream = false; //!< Flag to indicate if it is last picture in stream
1463 uint8_t m_numRefPair = 0; //!< number of reference pair (forward & backward)
1464 uint8_t m_numPasses = 0; //!< Number passes
1465 uint8_t m_currPass = 0; //!< Current pass
1466 bool m_forceSinglePakPass = false; //!< Flag to enable forcing single pak pass
1467 bool m_useCmScalingKernel = false; //!< Flag to use cm scaling kernel
1468 bool m_useMwWlkrForAsmScalingKernel = false; //!< Use media walker for ASM scaling kernel flag
1469 bool m_combinedDownScaleAndDepthConversion = false; //!< Combied downscale and depth conversion
1470 uint32_t m_brcPakStatisticsSize = 0; //!< Bitrate control PAK statistics size
1471 uint32_t m_brcHistoryBufferSize = 0; //!< Bitrate control history buffer size
1472 uint32_t m_mbencBrcBufferSize = 0; //!< Mbenc bitrate control buffer size
1473 uint8_t m_numVdbox = 0; //!< Number of vdbox
1474 uint8_t m_numUsedVdbox = 0; //!< Number of vdbox used
1475
1476 // ENC/PAK batch buffer and surface indices
1477 PCODEC_REF_LIST m_currRefList = nullptr; //!< Current reference list
1478 uint8_t m_currRecycledBufIdx = 0; //!< Current recycled buffer index
1479 uint8_t m_currEncBbSet = 0; //!< Current encode bb set
1480 uint8_t m_currMbCodeIdx = 0; //!< Current mb code index
1481 uint8_t m_currMadBufferIdx = 0; //!< Current mad buffer
1482 uint32_t m_recycledBufStatusNum[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM] = {0}; //!< Recycled buffer status num list
1483 uint32_t m_recycledBufWaitMs = 0; //!< Recycled buffer wait (ms)
1484
1485 // User Feature Key Capabilities
1486 bool m_hmeSupported = false; //!< Flag to indicate if HME is supported
1487 bool m_noMeKernelForPFrame = false; //!< HEVC does not have P-frame, no need to load P-frame ME kernel
1488 bool m_16xMeSupported = false; //!< 16x ME supported
1489 bool m_16xMeUserfeatureControl = false; //!< User feature control if 16x ME is supported
1490 bool m_32xMeSupported = false; //!< 32x ME supported
1491 bool m_useNonLegacyStreamin = false; //!< Use non-legacy stream in
1492 bool m_32xMeUserfeatureControl = false; //!< User feature control if 32x ME is supported
1493 bool m_2xMeSupported = false; //!< 2x DS surface, currently only used by Gen10 Hevc Encode
1494 bool m_suppressReconPicSupported = false; //!< Suppress reconstructed picture supported flag
1495 bool m_useHwScoreboard = true; //!< Flag to indicate if HW score board is used
1496 bool m_hwWalker = false; //!< HW walker used
1497 bool m_panicEnable = false; //!< Rc panic enabled flag
1498 bool m_sliceShutdownEnable = false; //!< Slice Shutdown Enable
1499 uint32_t m_encodeVfeMaxThreads = 0; //!< Encode vfe max threads number
1500 uint32_t m_encodeVfeMaxThreadsScaling = 0; //!< Encode vfe max threads scaling number
1501 uint32_t m_hwScoreboardType = 0; //!< HW score board type
1502 bool m_flatnessCheckSupported = false; //!< Flatness check supported flag
1503 bool m_groupIdSelectSupported = false; //!< Group id select supported flag
1504 uint8_t m_groupId = 0; //!< Group id
1505 bool m_multipassBrcSupported = false; //!< Multi-pass bitrate control supported flag
1506 uint8_t m_targetUsageOverride = 0; //!< Target usage override
1507 bool m_userFeatureKeyReport = false; //!< User feature key report flag
1508 bool m_singlePassDys = false; //!< sungle pass dynamic scaling supported flag
1509
1510 // CmdGen HuC FW for HEVC/VP9 VDEnc
1511 MOS_RESOURCE m_resVdencCmdInitializerDmemBuffer = {}; //!< Resource of vdenc command initializer DMEM buffer
1512 MOS_RESOURCE m_resVdencCmdInitializerDataBuffer[2]; //!< Resource of vdenc command initializer data buffer
1513
1514 // VDEnc params
1515 bool m_vdencEnabled = false; //!< Vdenc enabled flag
1516 bool m_vdencBrcEnabled = false; //!< Vdenc bitrate control enabled flag
1517 bool m_vdencStreamInEnabled = false; //!< Vdenc stream in enabled flag
1518 bool m_vdencNoTailInsertion = false; //!< Vdenc no tail insertion enabled flag
1519 uint32_t m_vdencBrcStatsBufferSize = 0; //!< Vdenc bitrate control buffer size
1520 uint32_t m_vdencBrcPakStatsBufferSize = 0; //!< Vdenc bitrate control PAK buffer size
1521 uint32_t m_vdencBrcNumOfSliceOffset = 0; //!< Vdenc bitrate control number of slice offset
1522 bool m_waReadVDEncOverflowStatus = false; //!< Read vdenc overflow status used flag
1523 bool m_vdencBrcImgStatAllocated = false; //!< Vdenc bitrate control image state allocated flag
1524
1525 // VDEnc dynamic slice control params
1526 uint32_t m_mbSlcThresholdValue = 0; //!< MB slice threshold value
1527 uint32_t m_sliceThresholdTable = 0; //!< Slice threshold table
1528 uint32_t m_vdencFlushDelayCount = 0; //!< Vdenc flush delay count
1529 uint32_t m_vdencSliceMinusI = 0; //!< Vdenc slice minus I
1530 uint32_t m_vdencSliceMinusP = 0; //!< Vdenc slice minus P
1531
1532 HMODULE m_swBrcMode = nullptr; //!< Software bitrate control mode
1533
1534 // IQmatrix params
1535 bool m_picQuant = false; //!< picture quant
1536 bool m_newQmatrixData = false; //!< New Qmatrix data
1537 PCODEC_ENCODER_SLCDATA m_slcData = nullptr; //!< record slice header size & position
1538 uint32_t m_numSlices = 0; //!< Number of slices
1539 uint32_t m_numHuffBuffers = 0; //!< Number of Huffman buffers
1540
1541 // ENC input/output buffers
1542 uint32_t m_mbCodeStrideInDW = 0; //!< Offset + Size of MB + size of MV
1543 uint32_t m_mbCodeOffset = 0; //!< MB data offset
1544 uint32_t m_mvOffset = 0; //!< MV data offset, in 64 byte
1545 uint32_t m_mbCodeSize = 0; //!< MB code buffer size
1546 uint32_t m_mbcodeBottomFieldOffset = 0; //!< MB code offset frame/TopField - zero, BottomField - nonzero
1547 uint32_t m_mvDataSize = 0; //!< MV data size
1548 uint32_t m_mvBottomFieldOffset = 0; //!< MV data offset frame/TopField - zero, BottomField - nonzero
1549 MOS_RESOURCE m_resDistortionBuffer = {}; //!< MBEnc Distortion Buffer
1550 MOS_RESOURCE m_resMadDataBuffer[CODECHAL_ENCODE_MAX_NUM_MAD_BUFFERS]; //!< Buffers to store Mean of Absolute Differences
1551 bool m_madEnabled = false; //!< Mad enabled flag
1552
1553 bool m_arbitraryNumMbsInSlice = false; //!< Flag to indicate if the sliceMapSurface needs to be programmed or not
1554 MOS_SURFACE m_sliceMapSurface[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< Slice map surface
1555 uint32_t m_sliceMapBottomFieldOffset = 0; //!< Slice map bottom field offset
1556
1557 // VDENC and PAK Data Buffer
1558 PMOS_RESOURCE m_resVdencStatsBuffer = nullptr; //!< Resource of Vdenc status buffer
1559 PMOS_RESOURCE m_resVdencCuObjStreamOutBuffer = nullptr; //!< Resource of Vdenc Cu object stream out buffer
1560 PMOS_RESOURCE m_resVdencPakObjCmdStreamOutBuffer = nullptr; //!< Resource of Vdenc Pak object command stream out buffer
1561 PMOS_RESOURCE m_resPakStatsBuffer = nullptr; //!< Resource of Pak status buffer
1562 PMOS_RESOURCE m_resSliceCountBuffer = nullptr; //!< Resource of slice count buffer
1563 PMOS_RESOURCE m_resVdencModeTimerBuffer = nullptr; //!< Resource of Vdenc mode timer buffer
1564
1565 // VDEnc StreamIn Buffer
1566 MOS_RESOURCE m_resVdencStreamInBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< Resources of Vdenc stream in buffer
1567
1568 // Maximum number of slices allowed by video spec
1569 uint32_t m_maxNumSlicesAllowed = 0; //!< Max number of slices allowed
1570
1571 //VDEnc HuC FW status
1572 MOS_RESOURCE m_resPakMmioBuffer = {}; //!< Resource of PAK MMIO buffer
1573 MOS_RESOURCE m_resHucStatus2Buffer = {}; //!< Resource of HuC status 2 buffer
1574 MOS_RESOURCE m_resHucFwBuffer = {}; //!< Resource of HuC Fw buffer
1575 PMOS_RESOURCE m_resVdencBrcUpdateDmemBufferPtr[2] = {nullptr, nullptr}; //!< One for 1st pass of next frame, and the other for the next pass of current frame.
1576
1577 // PAK Scratch Buffers
1578 MOS_RESOURCE m_resDeblockingFilterRowStoreScratchBuffer = {}; //!< Handle of deblock row store surface
1579 MOS_RESOURCE m_resMPCRowStoreScratchBuffer = {}; //!< Handle of mpc row store surface
1580 MOS_RESOURCE m_resStreamOutBuffer[CODECHAL_ENCODE_RECYCLED_BUFFER_NUM]; //!< Handle of streamout data surface
1581
1582 // Scaling
1583 MHW_KERNEL_STATE m_scaling4xKernelStates[CODEC_NUM_FIELDS_PER_FRAME]; //!< Scaling 4x Kernel States
1584 ScalingBindingTable m_scaling4xBindingTable = {}; //!< Scaling 4x Binding Table
1585 MHW_KERNEL_STATE m_scaling2xKernelStates[CODEC_NUM_FIELDS_PER_FRAME]; //!< Scaling 2x Kernel States
1586 ScalingBindingTable m_scaling2xBindingTable = {}; //!< Scaling 2x Binding Table
1587 uint32_t m_scalingCurbeSize = 0; //!< Scaling curbe size
1588 bool m_interlacedFieldDisabled = false; //!< interlaced field disabled flag
1589 CodechalEncodeBbuf m_scalingBBUF[CODECHAL_ENCODE_VME_BBUF_NUM]; //!< This Batch Buffer is used for scaling kernel.
1590 uint32_t m_scaledBottomFieldOffset = 0; //!< Scaled Bottom Field Offset
1591 uint32_t m_scaled16xBottomFieldOffset = 0; //!< Scaled 16x Bottom Field Offset
1592 uint32_t m_scaled32xBottomFieldOffset = 0; //!< Scaled 32x Bottom Field Offset
1593 uint32_t m_scalingBBufIdx = 0; //!< Scaling batch buffer index
1594 uint8_t m_minScaledDimension = 0; //!< min scaled dimension
1595 uint8_t m_minScaledDimensionInMb = 0; //!< min scaled dimension in Mb
1596 uint32_t m_downscaledWidth2x = 0; //!< Downscale width 2x
1597 uint32_t m_downscaledHeight2x = 0; //!< Downscale height 2x
1598 uint32_t m_downscaledWidth4x = 0; //!< Downscale width 4x
1599 uint32_t m_downscaledHeight4x = 0; //!< Downscale height 4x
1600 uint32_t m_downscaledWidthInMb4x = 0; //!< Downscale width in Mb 4x
1601 uint32_t m_downscaledHeightInMb4x = 0; //!< Downscale height in Mb 4x
1602 uint32_t m_downscaledFrameFieldHeightInMb4x = 0; //!< Downscale frame field height in Mb 4x
1603 uint32_t m_downscaledWidth16x = 0; //!< Downscale width 16x
1604 uint32_t m_downscaledHeight16x = 0; //!< Downscale height 16x
1605 uint32_t m_downscaledWidthInMb16x = 0; //!< Downscale width in Mb 16x
1606 uint32_t m_downscaledHeightInMb16x = 0; //!< Downscale height in Mb 16x
1607 uint32_t m_downscaledFrameFieldHeightInMb16x = 0; //!< Downscale frame field height in Mb 16x
1608 uint32_t m_downscaledWidth32x = 0; //!< Downscale width 2x
1609 uint32_t m_downscaledHeight32x = 0; //!< Downscale height 2x
1610 uint32_t m_downscaledWidthInMb32x = 0; //!< Downscale width 2x
1611 uint32_t m_downscaledHeightInMb32x = 0; //!< Downscale height 2x
1612 uint32_t m_downscaledFrameFieldHeightInMb32x = 0; //!< Downscale frame field height in Mb 32x
1613
1614 bool m_fieldScalingOutputInterleaved = false; //!< Field scaling output interleaved flag
1615 MOS_SURFACE m_flatnessCheckSurface = {}; //!< Flatness check surface
1616 uint32_t m_flatnessCheckBottomFieldOffset = 0; //!< Flatness check bottom field offset
1617 bool m_flatnessCheckEnabled = false; //!< Flatness check enabled flag
1618 bool m_mbStatsEnabled = false; //!< MB status enabled flag
1619 bool m_adaptiveTransformDecisionEnabled = false; //!< Adaptive Transform Decision Enabled flag
1620 bool m_forceBrcMbStatsEnabled = false; //!< Force Brc Mb statistics Enabled flag
1621 uint32_t m_mbvProcStatsBottomFieldOffset = 0; //!< MB VProc statistics Bottom Field Offset
1622 CODECHAL_ENCODE_BUFFER m_resMbStatisticsSurface; //!< Resource of Mb statistics surface
1623 bool m_mbStatsSupported = false; //!< Mb statistics supported flag
1624 MOS_RESOURCE m_resMbStatsBuffer = {}; //!< Resource of Mb statistics buffer
1625 uint32_t m_mbStatsBottomFieldOffset = 0; //!< Mb statistics bottom field offset
1626
1627 // ME
1628 MHW_KERNEL_STATE m_meKernelStates[CODECHAL_ENCODE_ME_IDX_NUM]; //!< ME kernel states
1629 MeKernelBindingTable m_meBindingTable = {}; //!< ME binding table
1630 bool bStreamOutEnable = false;
1631 MOS_RESOURCE StreamOutBuffer = {}; // StreamOut buffer
1632
1633 //GVA paramters to change inter and intra rounding
1634 bool bCoeffRoundTag = false;
1635 uint32_t uiRoundIntra = 0;
1636 uint32_t uiRoundInter = 0;
1637
1638 // Ds+Copy kernel optimization
1639 uint8_t m_outputChromaFormat = (uint8_t)HCP_CHROMA_FORMAT_YUV420; //!< 1: 420 2: 422 3: 444
1640 bool m_gopIsIdrFrameOnly = false; //!< GOP structure contains I-frame only
1641 PMOS_SURFACE m_rawSurfaceToEnc = nullptr; //!< raw surf to enc
1642 PMOS_SURFACE m_rawSurfaceToPak = nullptr; //!< raw surf to pak
1643
1644 // HME VDEnc
1645 GenericBindingTable m_vdencMeKernelBindingTable = {}; //!< Vdenc ME kernel binding table
1646 MHW_KERNEL_STATE m_vdencMeKernelState; //!< Vdenc ME kernel state for Low Delay B
1647 MHW_KERNEL_STATE m_vdencMeKernelStateRAB = {}; //!< Vdenc ME kernel state for Random Access B
1648
1649 GenericBindingTable m_vdencStreaminKernelBindingTable = {}; //!< Vdenc stream in kernel binding table
1650 MHW_KERNEL_STATE m_vdencStreaminKernelState; //!< Vdenc stream in kernel state for Low Delay B
1651 MHW_KERNEL_STATE m_vdencStreaminKernelStateRAB; //!< Vdenc stream in kernel state for Random Access B
1652
1653 // Common kernel
1654 uint32_t m_kuidCommon = 0; //!< Common kernel UID
1655 bool m_useCommonKernel = false; //!< Use common kernel
1656 bool m_wpUseCommonKernel = false; //!< WP uses common kernel
1657
1658 // Generic ENC parameters
1659 uint32_t m_verticalLineStride = 0; //!< vertical line stride
1660 uint32_t m_verticalLineStrideOffset = 0; //!< vertical line stride offset
1661
1662 // CMD buffer sizes
1663 uint32_t m_pictureStatesSize = 0; //!< Picture states size
1664 uint32_t m_extraPictureStatesSize = 0; //!< Picture states size extra
1665 uint32_t m_sliceStatesSize = 0; //!< Slice states size
1666 uint32_t m_vmeStatesSize = 0; //!< VME states size
1667 uint32_t m_hucCommandsSize = 0; //!< HuC command size
1668
1669 // Patch List Size
1670 uint32_t m_picturePatchListSize = 0; //!< Picture patch list size
1671 uint32_t m_extraPicturePatchListSize = 0; //!< Picture patch list size extra
1672 uint32_t m_slicePatchListSize = 0; //!< Slice patch list size
1673 uint32_t m_vmePatchListSize = 0; //!< not used yet, for future development
1674
1675 // Single Task Phase parameters
1676 bool m_singleTaskPhaseSupported = false; //!< Single task phase supported flag
1677 bool m_firstTaskInPhase = false; //!< first task in phase flag
1678 bool m_lastTaskInPhase = false; //!< last task in phase flag
1679 bool m_lastEncPhase = false; //!< first enc phase flag
1680 bool m_singleTaskPhaseSupportedInPak = false; //!< Single task phase supported in pak flag
1681 uint32_t m_headerBytesInserted = 0; //!< Header bytes inserted flag
1682
1683 // Null Rendering Flags
1684 bool m_videoContextUsesNullHw = false; //!< Using null HW flags for video context
1685 bool m_renderContextUsesNullHw = false; //!< Using null HW flags for render context
1686
1687 // Slice Shutdown parameters
1688 bool m_setRequestedEUSlices = false; //!< Flag to indicate the need to set requested EU slices
1689 bool m_setRequestedSubSlices = false; //!< Flag to indicate the need to set requested EU sub-slices
1690 bool m_setRequestedEUs = false; //!< Flag to indicate the need to set requested EUs
1691 uint32_t m_sliceShutdownDefaultState = 0; //!< Default state of slice shutdown
1692 uint32_t m_sliceShutdownRequestState = 0; //!< Request state of slice shutdown
1693 uint32_t m_ssdResolutionThreshold = 0; //!< Resolution threshold for slice shutdown
1694 uint32_t m_ssdTargetUsageThreshold = 0; //!< Target usage threshold for slice shutdown
1695 uint32_t m_targetUsage = 0; //!< Target usage
1696
1697 // Skip frame params
1698 uint8_t m_skipFrameFlag = 0; //!< Skip frame flag
1699 uint32_t m_numSkipFrames = 0; //!< Number of skip frame
1700 uint32_t m_sizeSkipFrames = 0; //!< acccumulative size of skipped frames for skipflag = 2
1701 uint32_t m_sizeCurrSkipFrame = 0; //!< size of curr skipped frame for skipflag = 2
1702
1703 // Lookahead
1704 MOS_RESOURCE m_resLaDataBuffer = {}; //!< Resource of lookahead data buffer
1705 uint8_t m_lookaheadDepth = 0; //!< Number of frames to lookahead
1706 uint8_t m_currLaDataIdx = 0; //!< Current lookahead data index
1707
1708 MHW_VDBOX_NODE_IND m_vdboxIndex = MHW_VDBOX_NODE_MAX; //!< Index of vdbox
1709 MediaPerfProfiler *m_perfProfiler = nullptr; //!< Performance data profiler
1710 PMOS_GPUCTX_CREATOPTIONS m_gpuCtxCreatOpt = nullptr; //!< Used for creating GPU context
1711 bool intraModeMaskControl = false;
1712 uint32_t intraModeMask = 0; // to disable intra mode
1713 bool interMbTransformSizeControl = false;
1714 bool interMbTransform8x8Enabled = false;
1715
1716 PMOS_RESOURCE presMbInlineData = nullptr;
1717 PMOS_RESOURCE presMbConstSurface = nullptr;
1718 PMOS_RESOURCE presVMEOutSurface = nullptr;
1719
1720 #if (_DEBUG || _RELEASE_INTERNAL)
1721 bool m_mmcUserFeatureUpdated; //!< indicate if the user feature is updated with MMC state
1722 #endif
1723
1724 CmDevice *m_cmDev = nullptr;
1725 CmTask * m_cmTask = nullptr;
1726 CmQueue * m_cmQueue = nullptr;
1727 CmDevice *m_origCmDev = nullptr;
1728
1729 #define CM_EVENT_NUM 128
1730 CmEvent *m_cmEvent[CM_EVENT_NUM] = {nullptr};
1731 short m_cmEventIdx = 0; // current event idx
1732 short m_cmEventCheckIdx = 0;
1733
1734 #ifdef FEI_ENABLE_CMRT
1735 CodechalEncodeMdfKernelResource resDSKernel;
1736 #endif
1737
1738 bool m_colorbitSupported = false;
1739
1740 #if USE_CODECHAL_DEBUG_TOOL
1741 CodechalDebugEncodePar *m_encodeParState = nullptr; //!< Encode Par state
1742 #endif
1743
1744 //!
1745 //! \brief Entry to allocate and intialize the encode instance
1746 //! \param [in] codecHalSettings
1747 //! The settings to inialize the encode instance
1748 //! \return MOS_STATUS
1749 //! MOS_STATUS_SUCCESS if success, else fail reason
1750 //!
1751 MOS_STATUS Allocate(CodechalSetting * codecHalSettings) override;
1752
1753 //!
1754 //! \brief The entry to encode each frame.
1755 //! \param [in] params
1756 //! Pointer to encode parameters of this frame
1757 //! \return MOS_STATUS
1758 //! MOS_STATUS_SUCCESS if success, else fail reason
1759 //!
1760 MOS_STATUS Execute(void *params) override;
1761
1762 //!
1763 //! \brief The entry to get status report.
1764 //! \param [out] status
1765 //! The point to encode status
1766 //! \param [in] numStatus
1767 //! The requested number of status reports
1768 //! \return MOS_STATUS
1769 //! MOS_STATUS_SUCCESS if success, else fail reason
1770 //!
1771 MOS_STATUS GetStatusReport(void *status, uint16_t numStatus) override;
1772
1773 //!
1774 //! \brief Read counter value for encode.
1775 //! \param [in] index
1776 //! The index of status report number
1777 //! \param [in, out] encodeStatusReport
1778 //! The address of encodeStatusReport
1779 //! \return MOS_STATUS
1780 //! MOS_STATUS_SUCCESS if success, else fail reason
1781 //!
1782 MOS_STATUS ReadCounterValue(uint16_t index, EncodeStatusReport* encodeStatusReport);
1783
1784 //!
1785 //! \brief Initialize the encoder state
1786 //! \param [in] settings
1787 //! Pointer to the initialize settings
1788 //! \return MOS_STATUS
1789 //! MOS_STATUS_SUCCESS if success, else fail reason
1790 //!
1791 virtual MOS_STATUS Initialize(
1792 CodechalSetting * settings);
1793
1794 //!
1795 //! \brief Allocate resources for encoder
1796 //! \return MOS_STATUS
1797 //! MOS_STATUS_SUCCESS if success, else fail reason
1798 //!
1799 virtual MOS_STATUS AllocateResources();
1800
1801 //!
1802 //! \brief Free resources in encoder
1803 //! \return void
1804 //!
1805 virtual void FreeResources();
1806
1807 //!
1808 //! \brief Initialize the picture
1809 //! \param [in] params
1810 //! Encoder parameters
1811 //! \return MOS_STATUS
1812 //! MOS_STATUS_SUCCESS if success, else fail reason
1813 //!
1814 virtual MOS_STATUS InitializePicture(const EncoderParams& params) = 0;
1815
1816 //!
1817 //! \brief Execute kernel functions
1818 //! \return MOS_STATUS
1819 //! MOS_STATUS_SUCCESS if success, else fail reason
1820 //!
1821 virtual MOS_STATUS ExecuteKernelFunctions() = 0;
1822
1823 //!
1824 //! \brief Execute picture level in encoder
1825 //! \return MOS_STATUS
1826 //! MOS_STATUS_SUCCESS if success, else fail reason
1827 //!
1828 virtual MOS_STATUS ExecutePictureLevel() = 0;
1829
1830 //!
1831 //! \brief Execute slice level in encoder
1832 //! \return MOS_STATUS
1833 //! MOS_STATUS_SUCCESS if success, else fail reason
1834 //!
1835 virtual MOS_STATUS ExecuteSliceLevel() = 0;
1836
1837 //!
1838 //! \brief Get Status Report
1839 //! \details Each Codec need to define its own GetStatusReport
1840 //! \param [out] encodeStatus
1841 //! Encoder status
1842 //! \param [out] encodeStatusReport
1843 //! Encoder status report
1844 //! \return MOS_STATUS
1845 //! MOS_STATUS_SUCCESS if success, else fail reason
1846 //!
1847 virtual MOS_STATUS GetStatusReport(
1848 EncodeStatus* encodeStatus,
1849 EncodeStatusReport* encodeStatusReport) = 0;
1850
1851 //!
1852 //! \brief User Feature Key Report
1853 //! \return MOS_STATUS
1854 //! MOS_STATUS_SUCCESS if success, else fail reason
1855 //!
1856 virtual MOS_STATUS UserFeatureKeyReport();
1857
1858 //!
1859 //! \brief Help function to submit a command buffer
1860 //!
1861 //! \param [in] cmdBuffer
1862 //! Pointer to command buffer
1863 //! \param [in] nullRendering
1864 //! Null rendering flag
1865 //!
1866 //! \return MOS_STATUS
1867 //! MOS_STATUS_SUCCESS if success, else fail reason
1868 //!
1869 virtual MOS_STATUS SubmitCommandBuffer(
1870 PMOS_COMMAND_BUFFER cmdBuffer,
1871 int32_t nullRendering);
1872
1873 //!
1874 //! \brief Check Supported Format
1875 //! \param [in] surface
1876 //! Input surface to check
1877 //! \return bool
1878 //! true if supported, false if not
1879 //!
1880 virtual bool CheckSupportedFormat(
1881 PMOS_SURFACE surface);
1882
1883 //!
1884 //! \brief Encode Copy Skip Frame
1885 //! \return MOS_STATUS
1886 //! MOS_STATUS_SUCCESS if success, else fail reason
1887 //!
EncodeCopySkipFrame()1888 virtual MOS_STATUS EncodeCopySkipFrame()
1889 {
1890 return MOS_STATUS_SUCCESS;
1891 }
1892
1893 //!
1894 //! \brief Read Image Status
1895 //! \param [in, out] cmdBuffer
1896 //! Input and output cmdbuffer
1897 //! \return MOS_STATUS
1898 //! MOS_STATUS_SUCCESS if success, else fail reason
1899 //!
1900 virtual MOS_STATUS ReadImageStatus(
1901 PMOS_COMMAND_BUFFER cmdBuffer);
1902
1903 //!
1904 //! \brief Read Mfc Status
1905 //! \param [in, out] cmdBuffer
1906 //! Input and output cmdbuffer
1907 //! \return MOS_STATUS
1908 //! MOS_STATUS_SUCCESS if success, else fail reason
1909 //!
1910 virtual MOS_STATUS ReadMfcStatus(
1911 PMOS_COMMAND_BUFFER cmdBuffer);
1912
1913 //!
1914 //! \brief Send Prolog With Frame Tracking
1915 //! \param [in, out] cmdBuffer
1916 //! Input and output cmdbuffer
1917 //! \param [in] frameTrackingRequested
1918 //! frame Tracking Requested
1919 //! \return MOS_STATUS
1920 //! MOS_STATUS_SUCCESS if success, else fail reason
1921 //!
1922 virtual MOS_STATUS SendPrologWithFrameTracking(
1923 PMOS_COMMAND_BUFFER cmdBuffer,
1924 bool frameTrackingRequested,
1925 MHW_MI_MMIOREGISTERS* mmioRegister = nullptr);
1926
1927 //!
1928 //! \brief Calculate Command Buffer Size
1929 //!
1930 //! \return uint32_t
1931 //! Command buffer size calculated
1932 //!
1933 virtual uint32_t CalculateCommandBufferSize();
1934
1935 //!
1936 //! \brief Prepare Nodes
1937 //! \param [in, out] videoGpuNode
1938 //! GPU node prepared
1939 //! \param [in, out] setVideoNode
1940 //! flag indicates if node needs to set
1941 //! \return void
1942 //!
1943 virtual void PrepareNodes(
1944 MOS_GPU_NODE& videoGpuNode,
1945 bool& setVideoNode);
1946
1947 //!
1948 //! \brief Set up params for gpu context creation
1949 //! \return MOS_STATUS
1950 //! MOS_STATUS_SUCCESS if success, else fail reason
1951 //!
1952 virtual MOS_STATUS SetGpuCtxCreatOption();
1953
1954 //!
1955 //! \brief Sets video gpu context
1956 //!
SetVideoContext(MOS_GPU_CONTEXT videoContext)1957 void SetVideoContext(MOS_GPU_CONTEXT videoContext) { m_videoContext = videoContext; }
1958
1959 //!
1960 //! \brief Create Gpu Contexts
1961 //!
1962 //! \return MOS_STATUS
1963 //! MOS_STATUS_SUCCESS if success, else fail reason
1964 //!
1965 MOS_STATUS CreateGpuContexts();
1966
1967 //!
1968 //! \brief Verify Space Available
1969 //! \return MOS_STATUS
1970 //! MOS_STATUS_SUCCESS if success, else fail reason
1971 //!
1972 MOS_STATUS VerifySpaceAvailable();
1973
1974 //!
1975 //! \brief Add MEDIA_VFE command to command buffer
1976 //! \param [in, out] cmdBuffer
1977 //! cmdbuffer to send cmds
1978 //! \param [in] params
1979 //! Parameters for send cmds
1980 //! \return MOS_STATUS
1981 //! MOS_STATUS_SUCCESS if success, else fail reason
1982 //!
1983 virtual MOS_STATUS AddMediaVfeCmd(
1984 PMOS_COMMAND_BUFFER cmdBuffer,
1985 SendKernelCmdsParams *params);
1986
1987 //!
1988 //! \brief Send Generic Kernel Cmds
1989 //! \param [in, out] cmdBuffer
1990 //! cmdbuffer to send cmds
1991 //! \param [in] params
1992 //! Parameters for send cmds
1993 //! \return MOS_STATUS
1994 //! MOS_STATUS_SUCCESS if success, else fail reason
1995 //!
1996 MOS_STATUS SendGenericKernelCmds(
1997 PMOS_COMMAND_BUFFER cmdBuffer,
1998 SendKernelCmdsParams *params);
1999
2000 //!
2001 //! \brief Start Status Report
2002 //! \param [in, out] cmdBuffer
2003 //! cmdbuffer to send cmds
2004 //! \param [in] encFunctionType
2005 //! encFunctionType for send cmds
2006 //! \return MOS_STATUS
2007 //! MOS_STATUS_SUCCESS if success, else fail reason
2008 //!
2009 MOS_STATUS StartStatusReport(
2010 PMOS_COMMAND_BUFFER cmdBuffer,
2011 CODECHAL_MEDIA_STATE_TYPE encFunctionType);
2012
2013 //!
2014 //! \brief End Status Report
2015 //! \param [in, out] cmdBuffer
2016 //! cmdbuffer to send cmds
2017 //! \param [in] encFunctionType
2018 //! encFunctionType for send cmds
2019 //! \return MOS_STATUS
2020 //! MOS_STATUS_SUCCESS if success, else fail reason
2021 //!
2022 MOS_STATUS EndStatusReport(
2023 PMOS_COMMAND_BUFFER cmdBuffer,
2024 CODECHAL_MEDIA_STATE_TYPE encFunctionType);
2025
2026 //!
2027 //! \brief Set Status Report Parameters
2028 //! \param [in] currRefList
2029 //! current RefList used to set
2030 //! \return MOS_STATUS
2031 //! MOS_STATUS_SUCCESS if success, else fail reason
2032 //!
2033 MOS_STATUS SetStatusReportParams(
2034 PCODEC_REF_LIST currRefList);
2035
2036 //!
2037 //! \brief Motion Estimation Disable Check
2038 //!
2039 //! \return void
2040 //!
2041 virtual void MotionEstimationDisableCheck();
2042
2043 //!
2044 //! \brief Execute the encode
2045 //!
2046 //! \param [in] encodeParams
2047 //! Encode parameters used
2048 //!
2049 //! \return MOS_STATUS
2050 //! MOS_STATUS_SUCCESS if success, else fail reason
2051 //!
2052 MOS_STATUS ExecuteEnc(
2053 EncoderParams* encodeParams);
2054
2055 //! \brief Execute FEI PreEnc
2056 //!
2057 //! \param [in] encodeParams
2058 //! Encode parameters used
2059 //!
2060 //! \return MOS_STATUS
2061 //! MOS_STATUS_SUCCESS if success, else fail reason
2062 //!
ExecutePreEnc(EncoderParams * encodeParams)2063 virtual MOS_STATUS ExecutePreEnc(
2064 EncoderParams* encodeParams) { return MOS_STATUS_SUCCESS; }
2065
2066 //!
2067 //! \brief Destroy Me Resources
2068 //!
2069 //! \param [in] param
2070 //! Hme parameters used
2071 //!
2072 //! \return MOS_STATUS
2073 //! MOS_STATUS_SUCCESS if success, else fail reason
2074 //!
2075 MOS_STATUS DestroyMeResources(
2076 HmeParams* param);
2077
2078 //!
2079 //! \brief Clean Up Resource
2080 //!
2081 //! \param [in, out] resource
2082 //! Resource to clean up
2083 //! \param [in] allocParams
2084 //! allocParams used to clean
2085 //!
2086 //! \return MOS_STATUS
2087 //! MOS_STATUS_SUCCESS if success, else fail reason
2088 //!
2089 MOS_STATUS CleanUpResource(
2090 PMOS_RESOURCE resource,
2091 PMOS_ALLOC_GFXRES_PARAMS allocParams);
2092
2093 //!
2094 //! \brief Allocate Resources 4x Me
2095 //!
2096 //! \param [in] param
2097 //! Hme parameters used
2098 //!
2099 //! \return MOS_STATUS
2100 //! MOS_STATUS_SUCCESS if success, else fail reason
2101 //!
2102 MOS_STATUS AllocateResources4xMe(
2103 HmeParams* param);
2104
2105 //!
2106 //! \brief Allocate Resources 16x Me
2107 //!
2108 //! \param [in] param
2109 //! Hme parameters used
2110 //!
2111 //! \return MOS_STATUS
2112 //! MOS_STATUS_SUCCESS if success, else fail reason
2113 //!
2114 MOS_STATUS AllocateResources16xMe(
2115 HmeParams* param);
2116
2117 //!
2118 //! \brief Allocate Resources 32x Me
2119 //!
2120 //! \param [in] param
2121 //! Hme parameters used
2122 //!
2123 //! \return MOS_STATUS
2124 //! MOS_STATUS_SUCCESS if success, else fail reason
2125 //!
2126 MOS_STATUS AllocateResources32xMe(
2127 HmeParams* param);
2128
2129 //!
2130 //! \brief Initialize Common
2131 //!
2132 //! \return MOS_STATUS
2133 //! MOS_STATUS_SUCCESS if success, else fail reason
2134 //!
2135 MOS_STATUS InitCommon();
2136
2137 //!
2138 //! \brief Resize Internal Buffer on Resolution Change
2139 //!
2140 virtual void ResizeOnResChange();
2141
2142 //!
2143 //! \brief Check Resolution Change and CSC
2144 //!
2145 //! \details On resolution change, resize internal buffer
2146 //! Check raw surface to set flag for CSC operation
2147 //!
2148 //! \return MOS_STATUS
2149 //! MOS_STATUS_SUCCESS if success, else fail reason
2150 //!
2151 virtual MOS_STATUS CheckResChangeAndCsc();
2152
2153 //!
2154 //! \brief Destroy encode state
2155 //!
2156 //! \return void
2157 //!
2158 void Destroy() override;
2159
2160 //!
2161 //! \brief Allocate Scaling Resources
2162 //!
2163 //! \return MOS_STATUS
2164 //! MOS_STATUS_SUCCESS if success, else fail reason
2165 //!
2166 MOS_STATUS AllocateScalingResources();
2167
2168 //!
2169 //! \brief Execute Me Kernel
2170 //!
2171 //! \param [in] meParams
2172 //! meParams used to execute kernel
2173 //! \param [in] meSurfaceParams
2174 //! meSurfaceParams used to execute kernel
2175 //! \param [in] hmeLevel
2176 //! hme Level used to execute kernel
2177 //!
2178 //! \return MOS_STATUS
2179 //! MOS_STATUS_SUCCESS if success, else fail reason
2180 //!
2181 virtual MOS_STATUS ExecuteMeKernel(
2182 MeCurbeParams *meParams,
2183 MeSurfaceParams *meSurfaceParams,
2184 HmeLevel hmeLevel);
2185
2186 //!
2187 //! \brief Initialize Status Report
2188 //!
2189 //! \return MOS_STATUS
2190 //! MOS_STATUS_SUCCESS if success, else fail reason
2191 //!
2192 MOS_STATUS InitStatusReport();
2193
2194 //!
2195 //! \brief Update Encode Status
2196 //!
2197 //! \param [in, out] cmdBuffer
2198 //! cmdbuffer to send cmds
2199 //! \param [in] forceOperation
2200 //! forceOperation flag used
2201 //!
2202 //! \return MOS_STATUS
2203 //! MOS_STATUS_SUCCESS if success, else fail reason
2204 //!
2205 MOS_STATUS UpdateEncodeStatus(
2206 PMOS_COMMAND_BUFFER cmdBuffer,
2207 bool forceOperation);
2208
2209 //!
2210 //! \brief Reset Encode Status
2211 //!
2212 //! \return MOS_STATUS
2213 //! MOS_STATUS_SUCCESS if success, else fail reason
2214 //!
2215 MOS_STATUS ResetStatusReport();
2216
2217 //!
2218 //! \brief Read Brc Pak Statistics
2219 //!
2220 //! \param [in, out] cmdBuffer
2221 //! cmdbuffer to send cmds
2222 //! \param [in] params
2223 //! parameters used
2224 //!
2225 //! \return MOS_STATUS
2226 //! MOS_STATUS_SUCCESS if success, else fail reason
2227 //!
2228 MOS_STATUS ReadBrcPakStatistics(
2229 PMOS_COMMAND_BUFFER cmdBuffer,
2230 EncodeReadBrcPakStatsParams* params);
2231
2232 //!
2233 //! \brief Update command buffer attribute
2234 //!
2235 //! \param [in] cmdBuffer
2236 //! cmdbuffer to send cmds
2237 //! \param [in] renderEngineInUse
2238 //! renderEngineInUse flag used
2239 //!
2240 //! \return MOS_STATUS
2241 //! MOS_STATUS_SUCCESS if success, else fail reason
2242 //!
2243 virtual MOS_STATUS UpdateCmdBufAttribute(
2244 PMOS_COMMAND_BUFFER cmdBuffer,
2245 bool renderEngineInUse);
2246
2247 //!
2248 //! \brief Function pointer of Get Kernel Header And Size
2249 //!
2250 //! \return MOS_STATUS
2251 //! MOS_STATUS_SUCCESS if success, else fail reason
2252 //!
2253 MOS_STATUS(*pfnGetKernelHeaderAndSize) (
2254 void *binary,
2255 EncOperation operation,
2256 uint32_t krnStateIdx,
2257 void *krnHeader,
2258 uint32_t *krnSize);
2259
2260 //!
2261 //! \brief Function to allocate MDF required resources
2262 //!
2263 //! \return MOS_STATUS
2264 //! MOS_STATUS_SUCCESS if success, else fail reason
2265 //!
2266 virtual MOS_STATUS AllocateMDFResources();
2267
2268 //!
2269 //! \brief Function to destroy MDF required resources
2270 //!
2271 //! \return MOS_STATUS
2272 //! MOS_STATUS_SUCCESS if success, else fail reason
2273 //!
2274 virtual MOS_STATUS DestroyMDFResources();
2275
2276 //!
2277 //! \brief Function to set MFE Shared State
2278 //!
2279 //! \details Pointer on passed object will be saved in the local field,
2280 //! content of source object might be changed later
2281 //! (for example, CmDevice might be set or chagned)
2282 //!
2283 //! \return MOS_STATUS
2284 //! MOS_STATUS_SUCCESS if success, else fail reason
2285 //!
2286 virtual MOS_STATUS SetMfeSharedState(MfeSharedState *pMfeSharedState);
2287
2288 //!
2289 //! \brief Function to add MDF kernel
2290 //!
2291 //! \param [in] device
2292 //! pointer to CmDevice
2293 //! \param [in] queue
2294 //! pointer to CmQueue
2295 //! \param [in] kernel
2296 //! pointer to CmKernel
2297 //! \param [in] task
2298 //! pointer to CmTask
2299 //! \param [in] threadspace
2300 //! pointer to CmThreadSpace
2301 //! \param [in] event
2302 //! reference to CmEvent*
2303 //! \param [in] isEnqueue
2304 //! bool
2305 //!
2306 //! \return MOS_STATUS
2307 //! MOS_STATUS_SUCCESS if success, else fail reason
2308 //!
2309 MOS_STATUS AddKernelMdf(
2310 CmDevice *device,
2311 CmQueue *queue,
2312 CmKernel *kernel,
2313 CmTask *task,
2314 CmThreadSpace *threadspace,
2315 CmEvent *&event,
2316 bool isEnqueue);
2317
2318 //!
2319 //! \brief Function to create Mdf Kernel resource
2320 //!
2321 //! \param [out] resource
2322 //! pointer to CodechalEncodeMdfKernelResource
2323 //! \param [in] kernelNum
2324 //! uint8_t, kernel number
2325 //! \param [in] bufNum
2326 //! uint8_t, buffer number
2327 //! \param [in] surfNum
2328 //! uint8_t, surface number
2329 //! \param [in] vmeSurfNum
2330 //! uint8_t, vme surface number
2331 //! \param [in] curbeSize
2332 //! uint16_t, curbe structure size
2333 //!
2334 //! \return MOS_STATUS
2335 //! MOS_STATUS_SUCCESS if success, else fail reason
2336 //!
2337 MOS_STATUS CreateMDFKernelResource(
2338 CodechalEncodeMdfKernelResource *resource,
2339 uint8_t kernelNum,
2340 uint8_t bufNum,
2341 uint8_t surfNum,
2342 uint8_t vmeSurfNum,
2343 uint16_t curbeSize);
2344
2345 //!
2346 //! \brief Function to destroy Mdf kernel resource
2347 //!
2348 //! \param [in] resource
2349 //! pointer to CodechalEncodeMdfKernelResource
2350 //!
2351 //! \return MOS_STATUS
2352 //! MOS_STATUS_SUCCESS if success, else fail reason
2353 //!
2354 MOS_STATUS DestroyMDFKernelResource(
2355 CodechalEncodeMdfKernelResource *resource);
2356
2357 //!
2358 //! \brief Function to free Mdf kernel surfaces
2359 //!
2360 //! \param [in] resource
2361 //! pointer to CodechalEncodeMdfKernelResource
2362 //!
2363 //! \return MOS_STATUS
2364 //! MOS_STATUS_SUCCESS if success, else fail reason
2365 //!
2366 MOS_STATUS FreeMDFKernelSurfaces(
2367 CodechalEncodeMdfKernelResource *resource);
2368
2369 //!
2370 //! \brief Returns number of PAK Passes based on BRC Precision flag
2371 //!
2372 //! \param [in] usBRCPrecision
2373 //! refer to CodechalEncodeBrcNumPasses
2374 //!
2375 //! \return uint8_t
2376 //! number of pak passes
2377 //!
2378 uint8_t GetNumBrcPakPasses(uint16_t usBRCPrecision);
2379
2380 //!
2381 //! \brief Setup Walker Context
2382 //! \param [in, out] cmdBuffer
2383 //! Input and output cmdbuffer
2384 //! \param [in] Pointer to kernel state
2385 //!
2386 //! \return MOS_STATUS
2387 //! MOS_STATUS_SUCCESS if success, else fail reason
2388 //!
2389 virtual MOS_STATUS SetupWalkerContext(
2390 MOS_COMMAND_BUFFER* cmdBuffer,
2391 SendKernelCmdsParams* params);
2392
2393 #if USE_CODECHAL_DEBUG_TOOL
2394 virtual MOS_STATUS DumpMbEncPakOutput(PCODEC_REF_LIST currRefList, CodechalDebugInterface* debugInterface);
DumpFrameStatsBuffer(CodechalDebugInterface * debugInterface)2395 virtual MOS_STATUS DumpFrameStatsBuffer(CodechalDebugInterface* debugInterface) { return MOS_STATUS_SUCCESS; }
2396
2397 //!
2398 //! \brief Add/Subtract a value to specified gfx memory
2399 //!
2400 //! \param [in] cmdBuffer
2401 //! command buffer
2402 //! \param [in] presStoreBuffer
2403 //! buffer to modify
2404 //! \param [in] offset
2405 //! member offset in the buffer
2406 //! \param [in] value
2407 //! value to add/subtract
2408 //! \param [in] bAdd
2409 //! add or subtract
2410 //!
2411 //! \return MOS_STATUS
2412 //! MOS_STATUS_SUCCESS if success, else fail reason
2413 //!
2414 MOS_STATUS AddBufferWithIMMValue(
2415 PMOS_COMMAND_BUFFER cmdBuffer,
2416 PMOS_RESOURCE presStoreBuffer,
2417 uint32_t offset,
2418 uint32_t value,
2419 bool bAdd);
2420
2421 bool m_enableFakeHrdSize = false;
2422 int32_t m_fakeIFrameHrdSize = 0;
2423 int32_t m_fakePBFrameHrdSize = 0;
2424 #endif
2425 };
2426
PutBit(BSBuffer * bsbuffer,uint32_t code)2427 static void PutBit(BSBuffer *bsbuffer, uint32_t code)
2428 {
2429 if (code & 1)
2430 {
2431 *(bsbuffer->pCurrent) = (*(bsbuffer->pCurrent) | (uint8_t)(0x01 << (7 - bsbuffer->BitOffset)));
2432 }
2433
2434 bsbuffer->BitOffset++;
2435 if (bsbuffer->BitOffset == 8)
2436 {
2437 bsbuffer->BitOffset = 0;
2438 bsbuffer->pCurrent++;
2439 *(bsbuffer->pCurrent) = 0;
2440 }
2441 }
2442
PutBitsSub(BSBuffer * bsbuffer,uint32_t code,uint32_t length)2443 static void PutBitsSub(BSBuffer *bsbuffer, uint32_t code, uint32_t length)
2444 {
2445 uint8_t *byte = bsbuffer->pCurrent;
2446
2447 // make sure that the number of bits given is <= 24
2448 CODECHAL_ENCODE_ASSERT(length <= 24);
2449
2450 code <<= (32 - length);
2451
2452 // shift field so that the given code begins at the current bit
2453 // offset in the most significant byte of the 32-bit word
2454 length += bsbuffer->BitOffset;
2455 code >>= bsbuffer->BitOffset;
2456
2457 // write bytes back into memory, big-endian
2458 byte[0] = (uint8_t)((code >> 24) | byte[0]);
2459 byte[1] = (uint8_t)(code >> 16);
2460 if (length > 16)
2461 {
2462 byte[2] = (uint8_t)(code >> 8);
2463 byte[3] = (uint8_t)code;
2464 }
2465 else
2466 {
2467 byte[2] = 0;
2468 }
2469
2470 // update bitstream pointer and bit offset
2471 bsbuffer->pCurrent += (length >> 3);
2472 bsbuffer->BitOffset = (length & 7);
2473 }
2474
PutBits(BSBuffer * bsbuffer,uint32_t code,uint32_t length)2475 static void PutBits(BSBuffer *bsbuffer, uint32_t code, uint32_t length)
2476 {
2477 uint32_t code1, code2;
2478
2479 // temp solution, only support up to 32 bits based on current usage
2480 CODECHAL_ENCODE_ASSERT(length <= 32);
2481
2482 if (length >= 24)
2483 {
2484 code1 = code & 0xFFFF;
2485 code2 = code >> 16;
2486
2487 // high bits go first
2488 PutBitsSub(bsbuffer, code2, length - 16);
2489 PutBitsSub(bsbuffer, code1, 16);
2490 }
2491 else
2492 {
2493 PutBitsSub(bsbuffer, code, length);
2494 }
2495 }
2496
2497 template<typename ValueType>
SwapEndianness(ValueType value)2498 static ValueType SwapEndianness(ValueType value)
2499 {
2500 uint8_t* startLocation = reinterpret_cast<uint8_t*>(&value);
2501 uint8_t* endLocation = startLocation + sizeof(ValueType);
2502 std::reverse(startLocation, endLocation);
2503 return value;
2504 }
2505 #endif // __CODECHAL_ENCODER_BASE_H__
2506