1 /* 2 * Copyright (c) 2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_sfc_hwcmd_g11_X.h 24 //! \brief Auto-generated constructors for MHW and states. 25 //! \details This file may not be included outside of g11_X as other components 26 //! should use MHW interface to interact with MHW commands and states. 27 //! 28 #ifndef __MHW_SFC_HWCMD_G11_X_H__ 29 #define __MHW_SFC_HWCMD_G11_X_H__ 30 31 #pragma once 32 #pragma pack(1) 33 34 #include <cstdint> 35 #include <cstddef> 36 37 class mhw_sfc_g11_X 38 { 39 public: 40 // Internal Macros 41 #define __CODEGEN_MAX(_a, _b) (((_a) > (_b)) ? (_a) : (_b)) 42 #define __CODEGEN_BITFIELD(l, h) (h) - (l) + 1 43 #define __CODEGEN_OP_LENGTH_BIAS 2 44 #define __CODEGEN_OP_LENGTH(x) (uint32_t)((__CODEGEN_MAX(x, __CODEGEN_OP_LENGTH_BIAS)) - __CODEGEN_OP_LENGTH_BIAS) 45 GetOpLength(uint32_t uiLength)46 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 47 48 //! 49 //! \brief SFC_AVS_STATE 50 //! \details 51 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 52 //! each frame once the lock request is granted. 53 //! 54 struct SFC_AVS_STATE_CMD 55 { 56 union 57 { 58 //!< DWORD 0 59 struct 60 { 61 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 62 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 63 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 64 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 65 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 66 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 67 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 68 }; 69 uint32_t Value; 70 } DW0; 71 union 72 { 73 //!< DWORD 1 74 struct 75 { 76 uint32_t TransitionAreaWith8Pixels : __CODEGEN_BITFIELD( 0, 2) ; //!< Transition Area with 8 Pixels 77 uint32_t Reserved35 : __CODEGEN_BITFIELD( 3, 3) ; //!< Reserved 78 uint32_t TransitionAreaWith4Pixels : __CODEGEN_BITFIELD( 4, 6) ; //!< Transition Area with 4 Pixels 79 uint32_t Reserved39 : __CODEGEN_BITFIELD( 7, 23) ; //!< Reserved 80 uint32_t SharpnessLevel : __CODEGEN_BITFIELD(24, 31) ; //!< SHARPNESS_LEVEL 81 }; 82 uint32_t Value; 83 } DW1; 84 union 85 { 86 //!< DWORD 2 87 struct 88 { 89 uint32_t MaxDerivativePoint8 : __CODEGEN_BITFIELD( 0, 7) ; //!< MAX Derivative Point 8 90 uint32_t Reserved72 : __CODEGEN_BITFIELD( 8, 15) ; //!< Reserved 91 uint32_t MaxDerivative4Pixels : __CODEGEN_BITFIELD(16, 23) ; //!< Max Derivative 4 Pixels 92 uint32_t Reserved88 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 93 }; 94 uint32_t Value; 95 } DW2; 96 union 97 { 98 //!< DWORD 3 99 struct 100 { 101 uint32_t InputVerticalSitingSpecifiesTheVerticalSitingOfTheInput : __CODEGEN_BITFIELD( 0, 3) ; //!< INPUT_VERTICAL_SITING__SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT 102 uint32_t Reserved100 : __CODEGEN_BITFIELD( 4, 7) ; //!< Reserved 103 uint32_t InputHorizontalSitingValueSpecifiesTheHorizontalSitingOfTheInput : __CODEGEN_BITFIELD( 8, 11) ; //!< INPUT_HORIZONTAL_SITING_VALUE__SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT 104 uint32_t Reserved108 : __CODEGEN_BITFIELD(12, 31) ; //!< Reserved 105 }; 106 uint32_t Value; 107 } DW3; 108 109 //! \name Local enumerations 110 111 enum SUBOPCODEB 112 { 113 SUBOPCODEB_SFCAVSSTATE = 2, //!< No additional details 114 }; 115 116 enum SUBOPCODEA 117 { 118 SUBOPCODEA_COMMON = 0, //!< No additional details 119 }; 120 121 enum MEDIA_COMMAND_OPCODE 122 { 123 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 124 }; 125 126 enum PIPELINE 127 { 128 PIPELINE_MEDIA = 2, //!< No additional details 129 }; 130 131 enum COMMAND_TYPE 132 { 133 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 134 }; 135 136 //! \brief SHARPNESS_LEVEL 137 //! \details 138 //! When adaptive scaling is off, determines the balance between sharp and 139 //! smooth scalers. 140 enum SHARPNESS_LEVEL 141 { 142 SHARPNESS_LEVEL_UNNAMED0 = 0, //!< Contribute 1 from the smooth scalar 143 SHARPNESS_LEVEL_UNNAMED255 = 255, //!< Contribute 1 from the sharp scalar 144 }; 145 146 //! \brief INPUT_VERTICAL_SITING__SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT 147 //! \details 148 //! For 444 and 422 format, vertical chroma siting should be programmed to 149 //! zero. 150 enum INPUT_VERTICAL_SITING__SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT 151 { 152 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_0 = 0, //!< No additional details 153 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_18 = 1, //!< No additional details 154 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_28 = 2, //!< No additional details 155 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_38 = 3, //!< No additional details 156 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_48 = 4, //!< No additional details 157 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_58 = 5, //!< No additional details 158 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_68 = 6, //!< No additional details 159 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_78 = 7, //!< No additional details 160 INPUT_VERTICAL_SITING_SPECIFIES_THE_VERTICAL_SITING_OF_THE_INPUT_88 = 8, //!< No additional details 161 }; 162 163 //! \brief INPUT_HORIZONTAL_SITING_VALUE__SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT 164 //! \details 165 //! For 444 format, horizontal chroma siting should be programmed to zero. 166 enum INPUT_HORIZONTAL_SITING_VALUE__SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT 167 { 168 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_0_FRACTIONININTEGER = 0, //!< No additional details 169 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_18 = 1, //!< No additional details 170 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_28 = 2, //!< No additional details 171 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_38 = 3, //!< No additional details 172 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_48 = 4, //!< No additional details 173 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_58 = 5, //!< No additional details 174 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_68 = 6, //!< No additional details 175 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_78 = 7, //!< No additional details 176 INPUT_HORIZONTAL_SITING_VALUE_SPECIFIES_THE_HORIZONTAL_SITING_OF_THE_INPUT_88 = 8, //!< No additional details 177 }; 178 179 //! \name Initializations 180 181 //! \brief Explicit member initialization function 182 SFC_AVS_STATE_CMD(); 183 184 static const size_t dwSize = 4; 185 static const size_t byteSize = 16; 186 }; 187 188 //! 189 //! \brief SFC_IEF_STATE 190 //! \details 191 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 192 //! each frame once the lock request is granted. 193 //! 194 struct SFC_IEF_STATE_CMD 195 { 196 union 197 { 198 //!< DWORD 0 199 struct 200 { 201 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 202 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 203 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 204 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 205 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 206 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 207 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 208 }; 209 uint32_t Value; 210 } DW0; 211 union 212 { 213 //!< DWORD 1 214 struct 215 { 216 uint32_t GainFactor : __CODEGEN_BITFIELD( 0, 5) ; //!< GAIN_FACTOR 217 uint32_t WeakEdgeThreshold : __CODEGEN_BITFIELD( 6, 11) ; //!< WEAK_EDGE_THRESHOLD 218 uint32_t StrongEdgeThreshold : __CODEGEN_BITFIELD(12, 17) ; //!< STRONG_EDGE_THRESHOLD 219 uint32_t R3XCoefficient : __CODEGEN_BITFIELD(18, 22) ; //!< R3X_COEFFICIENT 220 uint32_t R3CCoefficient : __CODEGEN_BITFIELD(23, 27) ; //!< R3C_COEFFICIENT 221 uint32_t Reserved60 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 222 }; 223 uint32_t Value; 224 } DW1; 225 union 226 { 227 //!< DWORD 2 228 struct 229 { 230 uint32_t GlobalNoiseEstimation : __CODEGEN_BITFIELD( 0, 7) ; //!< GLOBAL_NOISE_ESTIMATION 231 uint32_t NonEdgeWeight : __CODEGEN_BITFIELD( 8, 10) ; //!< NON_EDGE_WEIGHT 232 uint32_t RegularWeight : __CODEGEN_BITFIELD(11, 13) ; //!< REGULAR_WEIGHT 233 uint32_t StrongEdgeWeight : __CODEGEN_BITFIELD(14, 16) ; //!< STRONG_EDGE_WEIGHT 234 uint32_t R5XCoefficient : __CODEGEN_BITFIELD(17, 21) ; //!< R5X_COEFFICIENT 235 uint32_t R5CxCoefficient : __CODEGEN_BITFIELD(22, 26) ; //!< R5CX_COEFFICIENT 236 uint32_t R5CCoefficient : __CODEGEN_BITFIELD(27, 31) ; //!< R5C_COEFFICIENT 237 }; 238 uint32_t Value; 239 } DW2; 240 union 241 { 242 //!< DWORD 3 243 struct 244 { 245 uint32_t StdSinAlpha : __CODEGEN_BITFIELD( 0, 7) ; //!< STD Sin(alpha) 246 uint32_t StdCosAlpha : __CODEGEN_BITFIELD( 8, 15) ; //!< STD Cos(alpha) 247 uint32_t SatMax : __CODEGEN_BITFIELD(16, 21) ; //!< SAT_MAX 248 uint32_t HueMax : __CODEGEN_BITFIELD(22, 27) ; //!< HUE_MAX 249 uint32_t Reserved124 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 250 }; 251 uint32_t Value; 252 } DW3; 253 union 254 { 255 //!< DWORD 4 256 struct 257 { 258 uint32_t S3U : __CODEGEN_BITFIELD( 0, 10) ; //!< S3U 259 uint32_t Reserved139 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 260 uint32_t DiamondMargin : __CODEGEN_BITFIELD(12, 14) ; //!< DIAMOND_MARGIN 261 uint32_t VyStdEnable : __CODEGEN_BITFIELD(15, 15) ; //!< VY_STD_Enable 262 uint32_t UMid : __CODEGEN_BITFIELD(16, 23) ; //!< U_MID 263 uint32_t VMid : __CODEGEN_BITFIELD(24, 31) ; //!< V_MID 264 }; 265 uint32_t Value; 266 } DW4; 267 union 268 { 269 //!< DWORD 5 270 struct 271 { 272 uint32_t DiamondDv : __CODEGEN_BITFIELD( 0, 6) ; //!< DIAMOND_DV 273 uint32_t DiamondTh : __CODEGEN_BITFIELD( 7, 12) ; //!< DIAMOND_TH 274 uint32_t DiamondAlpha : __CODEGEN_BITFIELD(13, 20) ; //!< Diamond_alpha 275 uint32_t HsMargin : __CODEGEN_BITFIELD(21, 23) ; //!< HS_MARGIN 276 uint32_t DiamondDu : __CODEGEN_BITFIELD(24, 30) ; //!< DIAMOND_DU 277 uint32_t SkinDetailFactor : __CODEGEN_BITFIELD(31, 31) ; //!< SKIN_DETAIL_FACTOR 278 }; 279 uint32_t Value; 280 } DW5; 281 union 282 { 283 //!< DWORD 6 284 struct 285 { 286 uint32_t YPoint1 : __CODEGEN_BITFIELD( 0, 7) ; //!< Y_POINT_1 287 uint32_t YPoint2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y_POINT_2 288 uint32_t YPoint3 : __CODEGEN_BITFIELD(16, 23) ; //!< Y_POINT_3 289 uint32_t YPoint4 : __CODEGEN_BITFIELD(24, 31) ; //!< Y_POINT_4 290 }; 291 uint32_t Value; 292 } DW6; 293 union 294 { 295 //!< DWORD 7 296 struct 297 { 298 uint32_t InvMarginVyl : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_Margin_VYL 299 uint32_t Reserved240 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 300 }; 301 uint32_t Value; 302 } DW7; 303 union 304 { 305 //!< DWORD 8 306 struct 307 { 308 uint32_t InvMarginVyu : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_Margin_VYU 309 uint32_t P0L : __CODEGEN_BITFIELD(16, 23) ; //!< P0L 310 uint32_t P1L : __CODEGEN_BITFIELD(24, 31) ; //!< P1L 311 }; 312 uint32_t Value; 313 } DW8; 314 union 315 { 316 //!< DWORD 9 317 struct 318 { 319 uint32_t P2L : __CODEGEN_BITFIELD( 0, 7) ; //!< P2L 320 uint32_t P3L : __CODEGEN_BITFIELD( 8, 15) ; //!< P3L 321 uint32_t B0L : __CODEGEN_BITFIELD(16, 23) ; //!< B0L 322 uint32_t B1L : __CODEGEN_BITFIELD(24, 31) ; //!< B1L 323 }; 324 uint32_t Value; 325 } DW9; 326 union 327 { 328 //!< DWORD 10 329 struct 330 { 331 uint32_t B2L : __CODEGEN_BITFIELD( 0, 7) ; //!< B2L 332 uint32_t B3L : __CODEGEN_BITFIELD( 8, 15) ; //!< B3L 333 uint32_t S0L : __CODEGEN_BITFIELD(16, 26) ; //!< S0L 334 uint32_t YSlope2 : __CODEGEN_BITFIELD(27, 31) ; //!< Y_Slope_2 335 }; 336 uint32_t Value; 337 } DW10; 338 union 339 { 340 //!< DWORD 11 341 struct 342 { 343 uint32_t S1L : __CODEGEN_BITFIELD( 0, 10) ; //!< S1L 344 uint32_t S2L : __CODEGEN_BITFIELD(11, 21) ; //!< S2L 345 uint32_t Reserved374 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 346 }; 347 uint32_t Value; 348 } DW11; 349 union 350 { 351 //!< DWORD 12 352 struct 353 { 354 uint32_t S3L : __CODEGEN_BITFIELD( 0, 10) ; //!< S3L 355 uint32_t P0U : __CODEGEN_BITFIELD(11, 18) ; //!< P0U 356 uint32_t P1U : __CODEGEN_BITFIELD(19, 26) ; //!< P1U 357 uint32_t YSlope1 : __CODEGEN_BITFIELD(27, 31) ; //!< Y_Slope1 358 }; 359 uint32_t Value; 360 } DW12; 361 union 362 { 363 //!< DWORD 13 364 struct 365 { 366 uint32_t P2U : __CODEGEN_BITFIELD( 0, 7) ; //!< P2U 367 uint32_t P3U : __CODEGEN_BITFIELD( 8, 15) ; //!< P3U 368 uint32_t B0U : __CODEGEN_BITFIELD(16, 23) ; //!< B0U 369 uint32_t B1U : __CODEGEN_BITFIELD(24, 31) ; //!< B1U 370 }; 371 uint32_t Value; 372 } DW13; 373 union 374 { 375 //!< DWORD 14 376 struct 377 { 378 uint32_t B2U : __CODEGEN_BITFIELD( 0, 7) ; //!< B2U 379 uint32_t B3U : __CODEGEN_BITFIELD( 8, 15) ; //!< B3U 380 uint32_t S0U : __CODEGEN_BITFIELD(16, 26) ; //!< S0U 381 uint32_t Reserved475 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 382 }; 383 uint32_t Value; 384 } DW14; 385 union 386 { 387 //!< DWORD 15 388 struct 389 { 390 uint32_t S1U : __CODEGEN_BITFIELD( 0, 10) ; //!< S1U 391 uint32_t S2U : __CODEGEN_BITFIELD(11, 21) ; //!< S2U 392 uint32_t Reserved502 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 393 }; 394 uint32_t Value; 395 } DW15; 396 union 397 { 398 //!< DWORD 16 399 struct 400 { 401 uint32_t TransformEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< Transform Enable 402 uint32_t YuvChannelSwap : __CODEGEN_BITFIELD( 1, 1) ; //!< YUV Channel Swap 403 uint32_t Reserved514 : __CODEGEN_BITFIELD( 2, 2) ; //!< Reserved 404 uint32_t C0 : __CODEGEN_BITFIELD( 3, 15) ; //!< C0 405 uint32_t C1 : __CODEGEN_BITFIELD(16, 28) ; //!< C1 406 uint32_t Reserved541 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 407 }; 408 uint32_t Value; 409 } DW16; 410 union 411 { 412 //!< DWORD 17 413 struct 414 { 415 uint32_t C2 : __CODEGEN_BITFIELD( 0, 12) ; //!< C2 416 uint32_t C3 : __CODEGEN_BITFIELD(13, 25) ; //!< C3 417 uint32_t Reserved570 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 418 }; 419 uint32_t Value; 420 } DW17; 421 union 422 { 423 //!< DWORD 18 424 struct 425 { 426 uint32_t C4 : __CODEGEN_BITFIELD( 0, 12) ; //!< C4 427 uint32_t C5 : __CODEGEN_BITFIELD(13, 25) ; //!< C5 428 uint32_t Reserved602 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 429 }; 430 uint32_t Value; 431 } DW18; 432 union 433 { 434 //!< DWORD 19 435 struct 436 { 437 uint32_t C6 : __CODEGEN_BITFIELD( 0, 12) ; //!< C6 438 uint32_t C7 : __CODEGEN_BITFIELD(13, 25) ; //!< C7 439 uint32_t Reserved634 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 440 }; 441 uint32_t Value; 442 } DW19; 443 union 444 { 445 //!< DWORD 20 446 struct 447 { 448 uint32_t C8 : __CODEGEN_BITFIELD( 0, 12) ; //!< C8 449 uint32_t Reserved653 : __CODEGEN_BITFIELD(13, 31) ; //!< Reserved 450 }; 451 uint32_t Value; 452 } DW20; 453 union 454 { 455 //!< DWORD 21 456 struct 457 { 458 uint32_t OffsetIn1 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_1 459 uint32_t OffsetOut1 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_1 460 uint32_t Reserved694 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 461 }; 462 uint32_t Value; 463 } DW21; 464 union 465 { 466 //!< DWORD 22 467 struct 468 { 469 uint32_t OffsetIn2 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_2 470 uint32_t OffsetOut2 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_2 471 uint32_t Reserved726 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 472 }; 473 uint32_t Value; 474 } DW22; 475 union 476 { 477 //!< DWORD 23 478 struct 479 { 480 uint32_t OffsetIn3 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_3 481 uint32_t OffsetOut3 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_3 482 uint32_t Reserved758 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 483 }; 484 uint32_t Value; 485 } DW23; 486 487 //! \name Local enumerations 488 489 enum SUBOPCODEB 490 { 491 SUBOPCODEB_SFCIEFSTATE = 3, //!< No additional details 492 }; 493 494 enum SUBOPCODEA 495 { 496 SUBOPCODEA_COMMON = 0, //!< No additional details 497 }; 498 499 enum MEDIA_COMMAND_OPCODE 500 { 501 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 502 }; 503 504 enum PIPELINE 505 { 506 PIPELINE_MEDIA = 2, //!< No additional details 507 }; 508 509 enum COMMAND_TYPE 510 { 511 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 512 }; 513 514 //! \brief GAIN_FACTOR 515 //! \details 516 //! User control sharpening strength. 517 enum GAIN_FACTOR 518 { 519 GAIN_FACTOR_UNNAMED_4_4 = 44, //!< No additional details 520 }; 521 522 //! \brief WEAK_EDGE_THRESHOLD 523 //! \details 524 //! If Strong Edge Threshold > EM > Weak Edge Threshold ? the basic 525 //! VSA detects a weak edge. 526 enum WEAK_EDGE_THRESHOLD 527 { 528 WEAK_EDGE_THRESHOLD_UNNAMED1 = 1, //!< No additional details 529 }; 530 531 //! \brief STRONG_EDGE_THRESHOLD 532 //! \details 533 //! If EM > Strong Edge Threshold ? the basic VSA detects a strong edge. 534 enum STRONG_EDGE_THRESHOLD 535 { 536 STRONG_EDGE_THRESHOLD_UNNAMED8 = 8, //!< No additional details 537 }; 538 539 //! \brief R3X_COEFFICIENT 540 //! \details 541 //! IEF smoothing coefficient, <i>see IEF map.</i> 542 enum R3X_COEFFICIENT 543 { 544 R3X_COEFFICIENT_UNNAMED5 = 5, //!< No additional details 545 }; 546 547 //! \brief R3C_COEFFICIENT 548 //! \details 549 //! IEF smoothing coefficient, <i>see IEF map.</i> 550 enum R3C_COEFFICIENT 551 { 552 R3C_COEFFICIENT_UNNAMED5 = 5, //!< No additional details 553 }; 554 555 //! \brief GLOBAL_NOISE_ESTIMATION 556 //! \details 557 //! Global noise estimation of previous frame. 558 enum GLOBAL_NOISE_ESTIMATION 559 { 560 GLOBAL_NOISE_ESTIMATION_UNNAMED255 = 255, //!< No additional details 561 }; 562 563 //! \brief NON_EDGE_WEIGHT 564 //! \details 565 //! . Sharpening strength when <u>NO EDGE</u> is found in basic VSA. 566 enum NON_EDGE_WEIGHT 567 { 568 NON_EDGE_WEIGHT_UNNAMED1 = 1, //!< No additional details 569 }; 570 571 //! \brief REGULAR_WEIGHT 572 //! \details 573 //! Sharpening strength when a <u>WEAK</u> edge is found in basic VSA. 574 enum REGULAR_WEIGHT 575 { 576 REGULAR_WEIGHT_UNNAMED2 = 2, //!< No additional details 577 }; 578 579 //! \brief STRONG_EDGE_WEIGHT 580 //! \details 581 //! Sharpening strength when a <u>STRONG</u> edge is found in basic VSA. 582 enum STRONG_EDGE_WEIGHT 583 { 584 STRONG_EDGE_WEIGHT_UNNAMED7 = 7, //!< No additional details 585 }; 586 587 //! \brief R5X_COEFFICIENT 588 //! \details 589 //! IEF smoothing coefficient, <i>see IEF map.</i> 590 enum R5X_COEFFICIENT 591 { 592 R5X_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 593 }; 594 595 //! \brief R5CX_COEFFICIENT 596 //! \details 597 //! IEF smoothing coefficient, <i>see IEF map.</i> 598 enum R5CX_COEFFICIENT 599 { 600 R5CX_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 601 }; 602 603 //! \brief R5C_COEFFICIENT 604 //! \details 605 //! IEF smoothing coefficient, <i>see IEF map.</i> 606 enum R5C_COEFFICIENT 607 { 608 R5C_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 609 }; 610 611 //! \brief SAT_MAX 612 //! \details 613 //! Rectangle half length. 614 enum SAT_MAX 615 { 616 SAT_MAX_UNNAMED31 = 31, //!< No additional details 617 }; 618 619 //! \brief HUE_MAX 620 //! \details 621 //! Rectangle half width. 622 enum HUE_MAX 623 { 624 HUE_MAX_UNNAMED1_4 = 14, //!< No additional details 625 }; 626 627 enum DIAMOND_MARGIN 628 { 629 DIAMOND_MARGIN_UNNAMED_4 = 4, //!< No additional details 630 }; 631 632 //! \brief U_MID 633 //! \details 634 //! Rectangle middle-point U coordinate. 635 enum U_MID 636 { 637 U_MID_UNNAMED110 = 110, //!< No additional details 638 }; 639 640 //! \brief V_MID 641 //! \details 642 //! Rectangle middle-point V coordinate. 643 enum V_MID 644 { 645 V_MID_UNNAMED15_4 = 154, //!< No additional details 646 }; 647 648 //! \brief DIAMOND_DV 649 //! \details 650 //! Rhombus center shift in the hue-direction, relative to the rectangle 651 //! center. 652 enum DIAMOND_DV 653 { 654 DIAMOND_DV_UNNAMED0 = 0, //!< No additional details 655 }; 656 657 //! \brief DIAMOND_TH 658 //! \details 659 //! Half length of the rhombus axis in the sat-direction. 660 enum DIAMOND_TH 661 { 662 DIAMOND_TH_UNNAMED35 = 35, //!< No additional details 663 }; 664 665 //! \brief HS_MARGIN 666 //! \details 667 //! Defines rectangle margin. 668 enum HS_MARGIN 669 { 670 HS_MARGIN_UNNAMED3 = 3, //!< No additional details 671 }; 672 673 //! \brief DIAMOND_DU 674 //! \details 675 //! Rhombus center shift in the sat-direction, relative to the rectangle 676 //! center. 677 enum DIAMOND_DU 678 { 679 DIAMOND_DU_UNNAMED0 = 0, //!< No additional details 680 }; 681 682 //! \brief SKIN_DETAIL_FACTOR 683 //! \details 684 //! This flag bit is in operation only when one of the following conditions 685 //! exists: 686 //! <ul> 687 //! <li>when the control bit <b>SkinToneTunedIEF_Enable</b> is on. 688 //! </li> 689 //! <Li>When <b>SkinDetailFactor</b> is equal to 0, 690 //! sign(<b>SkinDetailFactor</b>) is equal to +1, and the content of the 691 //! detected skin tone area is detail revealed.</Li> 692 //! <li>When <b>SkinDetailFactor</b> is equal to 1, 693 //! sign(<b>SkinDetailFactor</b>) is equal to -1, and the content of the 694 //! detected skin tone area is not detail revealed.</li> 695 //! </ul> 696 enum SKIN_DETAIL_FACTOR 697 { 698 SKIN_DETAIL_FACTOR_DETAILREVEALED = 0, //!< No additional details 699 SKIN_DETAIL_FACTOR_NOTDETAILREVEALED = 1, //!< No additional details 700 }; 701 702 //! \brief Y_POINT_1 703 //! \details 704 //! First point of the Y piecewise linear membership function. 705 enum Y_POINT_1 706 { 707 Y_POINT_1_UNNAMED_46 = 46, //!< No additional details 708 }; 709 710 //! \brief Y_POINT_2 711 //! \details 712 //! Second point of the Y piecewise linear membership function. 713 enum Y_POINT_2 714 { 715 Y_POINT_2_UNNAMED_47 = 47, //!< No additional details 716 }; 717 718 //! \brief Y_POINT_3 719 //! \details 720 //! Third point of the Y piecewise linear membership function. 721 enum Y_POINT_3 722 { 723 Y_POINT_3_UNNAMED25_4 = 254, //!< No additional details 724 }; 725 726 //! \brief Y_POINT_4 727 //! \details 728 //! Fourth point of the Y piecewise linear membership function. 729 enum Y_POINT_4 730 { 731 Y_POINT_4_UNNAMED255 = 255, //!< No additional details 732 }; 733 734 //! \brief P0L 735 //! \details 736 //! Y Point 0 of the lower part of the detection PWLF. 737 enum P0L 738 { 739 P0L_UNNAMED_46 = 46, //!< No additional details 740 }; 741 742 //! \brief P1L 743 //! \details 744 //! Y Point 1 of the lower part of the detection PWLF. 745 enum P1L 746 { 747 P1L_UNNAMED216 = 216, //!< No additional details 748 }; 749 750 //! \brief P2L 751 //! \details 752 //! Y Point 2 of the lower part of the detection PWLF. 753 enum P2L 754 { 755 P2L_UNNAMED236 = 236, //!< No additional details 756 }; 757 758 //! \brief P3L 759 //! \details 760 //! Y Point 3 of the lower part of the detection PWLF. 761 enum P3L 762 { 763 P3L_UNNAMED236 = 236, //!< No additional details 764 }; 765 766 //! \brief B0L 767 //! \details 768 //! V Bias 0 of the lower part of the detection PWLF. 769 enum B0L 770 { 771 B0L_UNNAMED133 = 133, //!< No additional details 772 }; 773 774 //! \brief B1L 775 //! \details 776 //! V Bias 1 of the lower part of the detection PWLF. 777 enum B1L 778 { 779 B1L_UNNAMED130 = 130, //!< No additional details 780 }; 781 782 //! \brief B2L 783 //! \details 784 //! V Bias 2 of the lower part of the detection PWLF. 785 enum B2L 786 { 787 B2L_UNNAMED130 = 130, //!< No additional details 788 }; 789 790 //! \brief B3L 791 //! \details 792 //! V Bias 3 of the lower part of the detection PWLF. 793 enum B3L 794 { 795 B3L_UNNAMED130 = 130, //!< No additional details 796 }; 797 798 //! \brief P0U 799 //! \details 800 //! Y Point 0 of the upper part of the detection PWLF. 801 enum P0U 802 { 803 P0U_UNNAMED_46 = 46, //!< No additional details 804 }; 805 806 //! \brief P1U 807 //! \details 808 //! Y Point 1 of the upper part of the detection PWLF. 809 enum P1U 810 { 811 P1U_UNNAMED66 = 66, //!< No additional details 812 }; 813 814 //! \brief P2U 815 //! \details 816 //! Y Point 2 of the upper part of the detection PWLF. 817 enum P2U 818 { 819 P2U_UNNAMED150 = 150, //!< No additional details 820 }; 821 822 //! \brief P3U 823 //! \details 824 //! Y Point 3 of the upper part of the detection PWLF. 825 enum P3U 826 { 827 P3U_UNNAMED236 = 236, //!< No additional details 828 }; 829 830 //! \brief B0U 831 //! \details 832 //! V Bias 0 of the upper part of the detection PWLF. 833 enum B0U 834 { 835 B0U_UNNAMED1_43 = 143, //!< No additional details 836 }; 837 838 //! \brief B1U 839 //! \details 840 //! V Bias 1 of the upper part of the detection PWLF. 841 enum B1U 842 { 843 B1U_UNNAMED163 = 163, //!< No additional details 844 }; 845 846 //! \brief B2U 847 //! \details 848 //! V Bias 2 of the upper part of the detection PWLF. 849 enum B2U 850 { 851 B2U_UNNAMED200 = 200, //!< No additional details 852 }; 853 854 //! \brief B3U 855 //! \details 856 //! V Bias 3 of the upper part of the detection PWLF. 857 enum B3U 858 { 859 B3U_UNNAMED1_40 = 140, //!< No additional details 860 }; 861 862 //! \brief C0 863 //! \details 864 //! Transform coefficient 865 enum C0 866 { 867 C0_UNNAMED102_4 = 1024, //!< No additional details 868 }; 869 870 //! \brief C1 871 //! \details 872 //! Transform coefficient 873 enum C1 874 { 875 C1_UNNAMED0 = 0, //!< No additional details 876 }; 877 878 //! \brief C2 879 //! \details 880 //! Transform coefficient 881 enum C2 882 { 883 C2_UNNAMED0 = 0, //!< No additional details 884 }; 885 886 //! \brief C3 887 //! \details 888 //! Transform coefficient 889 enum C3 890 { 891 C3_UNNAMED0 = 0, //!< No additional details 892 }; 893 894 //! \brief C4 895 //! \details 896 //! Transform coefficient 897 enum C4 898 { 899 C4_UNNAMED102_4 = 1024, //!< No additional details 900 }; 901 902 //! \brief C5 903 //! \details 904 //! Transform coefficient 905 enum C5 906 { 907 C5_UNNAMED0 = 0, //!< No additional details 908 }; 909 910 //! \brief C6 911 //! \details 912 //! Transform coefficient 913 enum C6 914 { 915 C6_UNNAMED0 = 0, //!< No additional details 916 }; 917 918 //! \brief C7 919 //! \details 920 //! Transform coefficient 921 enum C7 922 { 923 C7_UNNAMED0 = 0, //!< No additional details 924 }; 925 926 //! \brief C8 927 //! \details 928 //! Transform coefficient 929 enum C8 930 { 931 C8_UNNAMED102_4 = 1024, //!< No additional details 932 }; 933 934 //! \brief OFFSET_IN_1 935 //! \details 936 //! Offset in for Y/R. 937 enum OFFSET_IN_1 938 { 939 OFFSET_IN_1_UNNAMED0 = 0, //!< No additional details 940 }; 941 942 //! \brief OFFSET_OUT_1 943 //! \details 944 //! Offset out for Y/R. 945 enum OFFSET_OUT_1 946 { 947 OFFSET_OUT_1_UNNAMED0 = 0, //!< No additional details 948 }; 949 950 //! \brief OFFSET_IN_2 951 //! \details 952 //! Offset in for U/G. 953 enum OFFSET_IN_2 954 { 955 OFFSET_IN_2_UNNAMED0 = 0, //!< No additional details 956 }; 957 958 //! \brief OFFSET_OUT_2 959 //! \details 960 //! Offset out for U/G. 961 enum OFFSET_OUT_2 962 { 963 OFFSET_OUT_2_UNNAMED0 = 0, //!< No additional details 964 }; 965 966 //! \brief OFFSET_IN_3 967 //! \details 968 //! Offset in for V/B. 969 enum OFFSET_IN_3 970 { 971 OFFSET_IN_3_UNNAMED0 = 0, //!< No additional details 972 }; 973 974 //! \brief OFFSET_OUT_3 975 //! \details 976 //! Offset out for V/B. 977 enum OFFSET_OUT_3 978 { 979 OFFSET_OUT_3_UNNAMED0 = 0, //!< No additional details 980 }; 981 982 //! \name Initializations 983 984 //! \brief Explicit member initialization function 985 SFC_IEF_STATE_CMD(); 986 987 static const size_t dwSize = 24; 988 static const size_t byteSize = 96; 989 }; 990 991 //! 992 //! \brief SFC_FRAME_START 993 //! \details 994 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 995 //! each frame once the lock request is granted. 996 //! 997 struct SFC_FRAME_START_CMD 998 { 999 union 1000 { 1001 //!< DWORD 0 1002 struct 1003 { 1004 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1005 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1006 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 1007 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 1008 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 1009 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 1010 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1011 }; 1012 uint32_t Value; 1013 } DW0; 1014 union 1015 { 1016 //!< DWORD 1 1017 struct 1018 { 1019 uint32_t Reserved32 ; //!< Reserved 1020 }; 1021 uint32_t Value; 1022 } DW1; 1023 1024 //! \name Local enumerations 1025 1026 enum SUBOPCODEB 1027 { 1028 SUBOPCODEB_SFCFRAMESTART = 4, //!< No additional details 1029 }; 1030 1031 enum SUBOPCODEA 1032 { 1033 SUBOPCODEA_COMMON = 0, //!< No additional details 1034 }; 1035 1036 enum MEDIA_COMMAND_OPCODE 1037 { 1038 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 1039 }; 1040 1041 enum PIPELINE 1042 { 1043 PIPELINE_MEDIA = 2, //!< No additional details 1044 }; 1045 1046 enum COMMAND_TYPE 1047 { 1048 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1049 }; 1050 1051 //! \name Initializations 1052 1053 //! \brief Explicit member initialization function 1054 SFC_FRAME_START_CMD(); 1055 1056 static const size_t dwSize = 2; 1057 static const size_t byteSize = 8; 1058 }; 1059 1060 //! 1061 //! \brief SFC_LOCK 1062 //! \details 1063 //! 1064 //! 1065 struct SFC_LOCK_CMD 1066 { 1067 union 1068 { 1069 //!< DWORD 0 1070 struct 1071 { 1072 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1073 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1074 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 1075 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 1076 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 1077 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 1078 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1079 }; 1080 uint32_t Value; 1081 } DW0; 1082 union 1083 { 1084 //!< DWORD 1 1085 struct 1086 { 1087 uint32_t VeSfcPipeSelect : __CODEGEN_BITFIELD( 0, 0) ; //!< VE-SFC Pipe Select 1088 uint32_t PreScaledOutputSurfaceOutputEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< Pre-Scaled Output Surface Output Enable 1089 uint32_t Reserved34 : __CODEGEN_BITFIELD( 2, 31) ; //!< Reserved 1090 }; 1091 uint32_t Value; 1092 } DW1; 1093 1094 //! \name Local enumerations 1095 1096 enum SUBOPCODEB 1097 { 1098 SUBOPCODEB_SFCLOCK = 0, //!< No additional details 1099 }; 1100 1101 enum SUBOPCODEA 1102 { 1103 SUBOPCODEA_COMMON = 0, //!< No additional details 1104 }; 1105 1106 enum MEDIA_COMMAND_OPCODE 1107 { 1108 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 1109 }; 1110 1111 enum PIPELINE 1112 { 1113 PIPELINE_MEDIA = 2, //!< No additional details 1114 }; 1115 1116 enum COMMAND_TYPE 1117 { 1118 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1119 }; 1120 1121 //! \name Initializations 1122 1123 //! \brief Explicit member initialization function 1124 SFC_LOCK_CMD(); 1125 1126 static const size_t dwSize = 2; 1127 static const size_t byteSize = 8; 1128 }; 1129 1130 //! 1131 //! \brief SFC_STATE 1132 //! \details 1133 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 1134 //! each frame once the lock request is granted. 1135 //! 1136 struct SFC_STATE_CMD 1137 { 1138 union 1139 { 1140 //!< DWORD 0 1141 struct 1142 { 1143 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1144 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1145 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 1146 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 1147 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 1148 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 1149 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1150 }; 1151 uint32_t Value; 1152 } DW0; 1153 union 1154 { 1155 //!< DWORD 1 1156 struct 1157 { 1158 uint32_t SfcPipeMode : __CODEGEN_BITFIELD( 0, 3) ; //!< SFC_PIPE_MODE 1159 uint32_t SfcInputChromaSubSampling : __CODEGEN_BITFIELD( 4, 7) ; //!< SFC_INPUT_CHROMA_SUB_SAMPLING 1160 uint32_t VdVeInputOrderingMode : __CODEGEN_BITFIELD( 8, 10) ; //!< VDVE_INPUT_ORDERING_MODE 1161 uint32_t Reserved43 : __CODEGEN_BITFIELD(11, 31) ; //!< Reserved 1162 }; 1163 uint32_t Value; 1164 } DW1; 1165 union 1166 { 1167 //!< DWORD 2 1168 struct 1169 { 1170 uint32_t InputFrameResolutionWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Input Frame Resolution Width 1171 uint32_t Reserved76 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1172 uint32_t InputFrameResolutionHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Input Frame Resolution Height 1173 uint32_t Reserved92 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1174 }; 1175 uint32_t Value; 1176 } DW2; 1177 union 1178 { 1179 //!< DWORD 3 1180 struct 1181 { 1182 uint32_t OutputSurfaceFormatType : __CODEGEN_BITFIELD( 0, 3) ; //!< OUTPUT_SURFACE_FORMAT_TYPE 1183 uint32_t Reserved100 : __CODEGEN_BITFIELD( 4, 4) ; //!< Reserved 1184 uint32_t RgbaChannelSwapEnable : __CODEGEN_BITFIELD( 5, 5) ; //!< RGBA_CHANNEL_SWAP_ENABLE 1185 uint32_t Reserved102 : __CODEGEN_BITFIELD( 6, 7) ; //!< Reserved 1186 uint32_t OutputChromaDownsamplingCoSitingPositionVerticalDirection : __CODEGEN_BITFIELD( 8, 11) ; //!< OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION 1187 uint32_t OutputChromaDownsamplingCoSitingPositionHorizontalDirection : __CODEGEN_BITFIELD(12, 15) ; //!< OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION 1188 uint32_t Reserved112 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1189 }; 1190 uint32_t Value; 1191 } DW3; 1192 union 1193 { 1194 //!< DWORD 4 1195 struct 1196 { 1197 uint32_t IefEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< IEF_ENABLE 1198 uint32_t SkinToneTunedIefEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< Skin Tone Tuned IEF_Enable 1199 uint32_t Ief4SmoothEnable : __CODEGEN_BITFIELD( 2, 2) ; //!< IEF4SMOOTH_ENABLE_ 1200 uint32_t Reserved131 : __CODEGEN_BITFIELD( 3, 3) ; //!< Reserved 1201 uint32_t AvsFilterMode : __CODEGEN_BITFIELD( 4, 5) ; //!< AVS_FILTER_MODE 1202 uint32_t AdaptiveFilterForAllChannels : __CODEGEN_BITFIELD( 6, 6) ; //!< ADAPTIVE_FILTER_FOR_ALL_CHANNELS 1203 uint32_t AvsScalingEnable : __CODEGEN_BITFIELD( 7, 7) ; //!< AVS_SCALING_ENABLE 1204 uint32_t BypassYAdaptiveFiltering : __CODEGEN_BITFIELD( 8, 8) ; //!< BYPASS_Y_ADAPTIVE_FILTERING 1205 uint32_t BypassXAdaptiveFiltering : __CODEGEN_BITFIELD( 9, 9) ; //!< BYPASS_X_ADAPTIVE_FILTERING 1206 uint32_t Reserved138 : __CODEGEN_BITFIELD(10, 11) ; //!< Reserved 1207 uint32_t ChromaUpsamplingEnable : __CODEGEN_BITFIELD(12, 12) ; //!< Chroma Upsampling Enable 1208 uint32_t Reserved141 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1209 uint32_t RotationMode : __CODEGEN_BITFIELD(16, 17) ; //!< ROTATION_MODE 1210 uint32_t ColorFillEnable : __CODEGEN_BITFIELD(18, 18) ; //!< Color Fill Enable 1211 uint32_t CscEnable : __CODEGEN_BITFIELD(19, 19) ; //!< CSC Enable 1212 uint32_t Bitdepth : __CODEGEN_BITFIELD(20, 21) ; //!< BITDEPTH 1213 uint32_t Reserved150 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1214 }; 1215 uint32_t Value; 1216 } DW4; 1217 union 1218 { 1219 //!< DWORD 5 1220 struct 1221 { 1222 uint32_t SourceRegionWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Source Region Width 1223 uint32_t Reserved172 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1224 uint32_t SourceRegionHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Source Region Height 1225 uint32_t Reserved188 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1226 }; 1227 uint32_t Value; 1228 } DW5; 1229 union 1230 { 1231 //!< DWORD 6 1232 struct 1233 { 1234 uint32_t SourceRegionHorizontalOffset : __CODEGEN_BITFIELD( 0, 11) ; //!< Source Region Horizontal Offset 1235 uint32_t Reserved204 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1236 uint32_t SourceRegionVerticalOffset : __CODEGEN_BITFIELD(16, 27) ; //!< Source Region Vertical Offset 1237 uint32_t Reserved220 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1238 }; 1239 uint32_t Value; 1240 } DW6; 1241 union 1242 { 1243 //!< DWORD 7 1244 struct 1245 { 1246 uint32_t OutputFrameWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Output Frame Width 1247 uint32_t Reserved236 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1248 uint32_t OutputFrameHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Output Frame Height 1249 uint32_t Reserved252 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1250 }; 1251 uint32_t Value; 1252 } DW7; 1253 union 1254 { 1255 //!< DWORD 8 1256 struct 1257 { 1258 uint32_t ScaledRegionSizeWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Scaled Region Size Width 1259 uint32_t Reserved268 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1260 uint32_t ScaledRegionSizeHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Scaled Region Size Height 1261 uint32_t Reserved284 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1262 }; 1263 uint32_t Value; 1264 } DW8; 1265 union 1266 { 1267 //!< DWORD 9 1268 struct 1269 { 1270 uint32_t ScaledRegionHorizontalOffset : __CODEGEN_BITFIELD( 0, 12) ; //!< Scaled Region Horizontal Offset 1271 uint32_t Reserved301 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1272 uint32_t ScaledRegionVerticalOffset : __CODEGEN_BITFIELD(16, 28) ; //!< Scaled Region Vertical Offset 1273 uint32_t Reserved317 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1274 }; 1275 uint32_t Value; 1276 } DW9; 1277 union 1278 { 1279 //!< DWORD 10 1280 struct 1281 { 1282 uint32_t GrayBarPixelUG : __CODEGEN_BITFIELD( 0, 9) ; //!< Gray Bar Pixel - U/G 1283 uint32_t Reserved330 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1284 uint32_t GrayBarPixelYR : __CODEGEN_BITFIELD(16, 25) ; //!< Gray Bar Pixel - Y/R 1285 uint32_t Reserved346 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1286 }; 1287 uint32_t Value; 1288 } DW10; 1289 union 1290 { 1291 //!< DWORD 11 1292 struct 1293 { 1294 uint32_t GrayBarPixelA : __CODEGEN_BITFIELD( 0, 9) ; //!< Gray Bar Pixel - A 1295 uint32_t Reserved362 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1296 uint32_t GrayBarPixelVB : __CODEGEN_BITFIELD(16, 25) ; //!< Gray Bar Pixel - V/B 1297 uint32_t Reserved378 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1298 }; 1299 uint32_t Value; 1300 } DW11; 1301 union 1302 { 1303 //!< DWORD 12 1304 struct 1305 { 1306 uint32_t UvDefaultValueForUChannelForMonoInputSupport : __CODEGEN_BITFIELD( 0, 9) ; //!< UV Default value for U channel (For Mono Input Support) 1307 uint32_t Reserved394 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1308 uint32_t UvDefaultValueForVChannelForMonoInputSupport : __CODEGEN_BITFIELD(16, 25) ; //!< UV Default value for V channel (For Mono Input Support) 1309 uint32_t Reserved410 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1310 }; 1311 uint32_t Value; 1312 } DW12; 1313 union 1314 { 1315 //!< DWORD 13 1316 struct 1317 { 1318 uint32_t AlphaDefaultValue : __CODEGEN_BITFIELD( 0, 9) ; //!< Alpha Default Value 1319 uint32_t Reserved426 : __CODEGEN_BITFIELD(10, 31) ; //!< Reserved 1320 }; 1321 uint32_t Value; 1322 } DW13; 1323 union 1324 { 1325 //!< DWORD 14 1326 struct 1327 { 1328 uint32_t ScalingFactorHeight : __CODEGEN_BITFIELD( 0, 20) ; //!< SCALING_FACTOR_HEIGHT 1329 uint32_t Reserved469 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 1330 }; 1331 uint32_t Value; 1332 } DW14; 1333 union 1334 { 1335 //!< DWORD 15 1336 struct 1337 { 1338 uint32_t ScalingFactorWidth : __CODEGEN_BITFIELD( 0, 20) ; //!< SCALING_FACTOR_WIDTH 1339 uint32_t Reserved501 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 1340 }; 1341 uint32_t Value; 1342 } DW15; 1343 union 1344 { 1345 //!< DWORD 16 1346 struct 1347 { 1348 uint32_t Reserved512 ; //!< Reserved 1349 }; 1350 uint32_t Value; 1351 } DW16; 1352 union 1353 { 1354 //!< DWORD 17 1355 struct 1356 { 1357 uint32_t Reserved544 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1358 uint32_t OutputFrameSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< Output Frame Surface Base Address 1359 }; 1360 uint32_t Value; 1361 } DW17; 1362 union 1363 { 1364 //!< DWORD 18 1365 struct 1366 { 1367 uint32_t OutputFrameSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Output Frame Surface Base Address High 1368 uint32_t Reserved592 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1369 }; 1370 uint32_t Value; 1371 } DW18; 1372 union 1373 { 1374 //!< DWORD 19 1375 struct 1376 { 1377 uint32_t Reserved608 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1378 uint32_t OutputFrameSurfaceBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< Output Frame Surface Base Address - Index to Memory Object Control State (MOCS) Tables 1379 uint32_t OutputFrameSurfaceBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< Output Frame Surface Base Address - Arbitration Priority Control 1380 uint32_t OutputFrameSurfaceBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< Output Frame Surface Base Address - Memory Compression Enable 1381 uint32_t OutputFrameSurfaceBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1382 uint32_t Reserved619 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1383 uint32_t OutputFrameSurfaceBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1384 uint32_t OutputSurfaceTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< OUTPUT_SURFACE_TILED_MODE 1385 uint32_t Reserved623 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1386 }; 1387 uint32_t Value; 1388 } DW19; 1389 union 1390 { 1391 //!< DWORD 20 1392 struct 1393 { 1394 uint32_t Reserved640 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1395 uint32_t AvsLineBufferSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< AVS Line Buffer Surface Base Address 1396 }; 1397 uint32_t Value; 1398 } DW20; 1399 union 1400 { 1401 //!< DWORD 21 1402 struct 1403 { 1404 uint32_t AvsLineBufferSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< AVS Line Buffer Surface Base Address High 1405 uint32_t Reserved688 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1406 }; 1407 uint32_t Value; 1408 } DW21; 1409 union 1410 { 1411 //!< DWORD 22 1412 struct 1413 { 1414 uint32_t Reserved704 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1415 uint32_t AvsLineBufferBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< AVS Line Buffer Base Address - Index to Memory Object Control State (MOCS) Tables 1416 uint32_t AvsLineBufferBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< AVS Line Buffer Base Address - Arbitration Priority Control 1417 uint32_t AvsLineBufferBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1418 uint32_t AvsLineBufferBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1419 uint32_t Reserved715 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1420 uint32_t AvsLineBufferBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1421 uint32_t AvsLineBufferTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< AVS_LINE_BUFFER_TILED_MODE 1422 uint32_t Reserved719 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1423 }; 1424 uint32_t Value; 1425 } DW22; 1426 union 1427 { 1428 //!< DWORD 23 1429 struct 1430 { 1431 uint32_t Reserved736 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1432 uint32_t IefLineBufferSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< IEF Line Buffer Surface Base Address 1433 }; 1434 uint32_t Value; 1435 } DW23; 1436 union 1437 { 1438 //!< DWORD 24 1439 struct 1440 { 1441 uint32_t IefLineBufferSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< IEF Line Buffer Surface Base Address High 1442 uint32_t Reserved784 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1443 }; 1444 uint32_t Value; 1445 } DW24; 1446 union 1447 { 1448 //!< DWORD 25 1449 struct 1450 { 1451 uint32_t Reserved800 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1452 uint32_t IefLineBufferBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< IEF Line Buffer Base Address - Index to Memory Object Control State (MOCS) Tables 1453 uint32_t IefLineBufferBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< IEF Line Buffer Base Address - Arbitration Priority Control 1454 uint32_t IefLineBufferBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1455 uint32_t IefLineBufferBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1456 uint32_t Reserved811 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1457 uint32_t IefLineBufferBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1458 uint32_t IefLineBufferTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< IEF_LINE_BUFFER_TILED_MODE 1459 uint32_t Reserved815 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1460 }; 1461 uint32_t Value; 1462 } DW25; 1463 union 1464 { 1465 //!< DWORD 26 1466 struct 1467 { 1468 uint32_t Reserved832 ; //!< Reserved 1469 }; 1470 uint32_t Value; 1471 } DW26; 1472 union 1473 { 1474 //!< DWORD 27 1475 struct 1476 { 1477 uint32_t Reserved864 ; //!< Reserved 1478 }; 1479 uint32_t Value; 1480 } DW27; 1481 union 1482 { 1483 //!< DWORD 28 1484 struct 1485 { 1486 uint32_t Reserved896 ; //!< Reserved 1487 }; 1488 uint32_t Value; 1489 } DW28; 1490 union 1491 { 1492 //!< DWORD 29 1493 struct 1494 { 1495 uint32_t OutputSurfaceTileWalk : __CODEGEN_BITFIELD( 0, 0) ; //!< OUTPUT_SURFACE_TILE_WALK 1496 uint32_t OutputSurfaceTiled : __CODEGEN_BITFIELD( 1, 1) ; //!< OUTPUT_SURFACE_TILED 1497 uint32_t OutputSurfaceHalfPitchForChroma : __CODEGEN_BITFIELD( 2, 2) ; //!< Output Surface Half Pitch For Chroma 1498 uint32_t OutputSurfacePitch : __CODEGEN_BITFIELD( 3, 19) ; //!< Output Surface Pitch 1499 uint32_t Reserved948 : __CODEGEN_BITFIELD(20, 26) ; //!< Reserved 1500 uint32_t OutputSurfaceInterleaveChromaEnable : __CODEGEN_BITFIELD(27, 27) ; //!< Output Surface Interleave Chroma Enable 1501 uint32_t OutputSurfaceFormat : __CODEGEN_BITFIELD(28, 31) ; //!< Output Surface Format 1502 }; 1503 uint32_t Value; 1504 } DW29; 1505 union 1506 { 1507 //!< DWORD 30 1508 struct 1509 { 1510 uint32_t OutputSurfaceYOffsetForU : __CODEGEN_BITFIELD( 0, 13) ; //!< Output Surface Y Offset For U 1511 uint32_t Reserved974 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 1512 uint32_t OutputSurfaceXOffsetForU : __CODEGEN_BITFIELD(16, 29) ; //!< Output Surface X Offset For U 1513 uint32_t Reserved990 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1514 }; 1515 uint32_t Value; 1516 } DW30; 1517 union 1518 { 1519 //!< DWORD 31 1520 struct 1521 { 1522 uint32_t OutputSurfaceYOffsetForV : __CODEGEN_BITFIELD( 0, 13) ; //!< Output Surface Y Offset For V 1523 uint32_t Reserved1006 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 1524 uint32_t OutputSurfaceXOffsetForV : __CODEGEN_BITFIELD(16, 29) ; //!< Output Surface X Offset For V 1525 uint32_t Reserved1022 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1526 }; 1527 uint32_t Value; 1528 } DW31; 1529 union 1530 { 1531 //!< DWORD 32 1532 struct 1533 { 1534 uint32_t Reserved1024 ; //!< Reserved 1535 }; 1536 uint32_t Value; 1537 } DW32; 1538 union 1539 { 1540 //!< DWORD 33 1541 struct 1542 { 1543 uint32_t Reserved1056 ; //!< Reserved 1544 }; 1545 uint32_t Value; 1546 } DW33; 1547 1548 //! \name Local enumerations 1549 1550 enum SUBOPCODEB 1551 { 1552 SUBOPCODEB_SFCSTATE = 1, //!< No additional details 1553 }; 1554 1555 enum SUBOPCODEA 1556 { 1557 SUBOPCODEA_COMMON = 0, //!< No additional details 1558 }; 1559 1560 enum MEDIA_COMMAND_OPCODE 1561 { 1562 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 1563 }; 1564 1565 enum PIPELINE 1566 { 1567 PIPELINE_MEDIA = 2, //!< No additional details 1568 }; 1569 1570 enum COMMAND_TYPE 1571 { 1572 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1573 }; 1574 1575 //! \brief SFC_PIPE_MODE 1576 //! \details 1577 //! Note: for SFC Pipe mode set to VE-to-SFC AVS mode. 1578 //! IECP pipeline mode MUST be enabled. 1579 //! However, each sub-IECP feature can be turned on/off independently. 1580 enum SFC_PIPE_MODE 1581 { 1582 SFC_PIPE_MODE_UNNAMED0 = 0, //!< VD-to-SFC AVS 1583 SFC_PIPE_MODE_UNNAMED1 = 1, //!< VE-to-SFC AVS + IEF + Rotation 1584 SFC_PIPE_MODE_UNNAMED_4 = 4, //!< VE-to-SFC Integral Image 1585 }; 1586 1587 //! \brief SFC_INPUT_CHROMA_SUB_SAMPLING 1588 //! \details 1589 //! This field shall be programmed according to video modes used in VDBOX. 1590 //! NOTE: SFC supports progressive input and output only (Interlaced/MBAFF 1591 //! is not supported). 1592 //! <table border="1"> 1593 //! <tbody> 1594 //! <tr> 1595 //! <td>Video Mode</td> 1596 //! <td>Surface Format</td> 1597 //! <td>SFC Input Chroma Sub-Sampling</td> 1598 //! <td>VD/VE Input Ordering Mode</td> 1599 //! </tr> 1600 //! <tr> 1601 //! <td>VC1 w/o LF and w/o OS Note: VC1 LF applies for ILDB</td> 1602 //! <td>420 (NV12)</td> 1603 //! <td>1</td> 1604 //! <td>0</td> 1605 //! </tr> 1606 //! <tr> 1607 //! <td>VC1 w/ LF or w/ OS or w/ both Note: VC1 LF applies for ILDB</td> 1608 //! <td></td> 1609 //! <td>INVALID with SFC</td> 1610 //! <td>INVALID with SFC</td> 1611 //! </tr> 1612 //! <tr> 1613 //! <td>AVC w/o LF</td> 1614 //! <td>Monochrome</td> 1615 //! <td>0</td> 1616 //! <td>0</td> 1617 //! </tr> 1618 //! <tr> 1619 //! <td>AVC w/o LF</td> 1620 //! <td>420 (NV12)</td> 1621 //! <td>1</td> 1622 //! <td>0</td> 1623 //! </tr> 1624 //! <tr> 1625 //! <td>AVC with LF</td> 1626 //! <td>Monochrome</td> 1627 //! <td>0</td> 1628 //! <td>1</td> 1629 //! </tr> 1630 //! <tr> 1631 //! <td>AVC/VP8 with LF</td> 1632 //! <td>420 (NV12)</td> 1633 //! <td>1</td> 1634 //! <td>1</td> 1635 //! </tr> 1636 //! <tr> 1637 //! <td>VP8 w/o LF</td> 1638 //! <td>420 (NV12)</td> 1639 //! <td>1</td> 1640 //! <td>4</td> 1641 //! </tr> 1642 //! <tr> 1643 //! <td>JPEG (YUV Interleaved)</td> 1644 //! <td>Monochrome</td> 1645 //! <td>0</td> 1646 //! <td>2</td> 1647 //! </tr> 1648 //! <tr> 1649 //! <td>JPEG (YUV Interleaved)</td> 1650 //! <td>420</td> 1651 //! <td>1</td> 1652 //! <td>3</td> 1653 //! </tr> 1654 //! <tr> 1655 //! <td>JPEG (YUV Interleaved)</td> 1656 //! <td>422H_2Y</td> 1657 //! <td>2</td> 1658 //! <td>2</td> 1659 //! </tr> 1660 //! <tr> 1661 //! <td>JPEG (YUV Interleaved)</td> 1662 //! <td>422H_4Y</td> 1663 //! <td>2</td> 1664 //! <td>3</td> 1665 //! </tr> 1666 //! <tr> 1667 //! <td>JPEG (YUV Interleaved)</td> 1668 //! <td>444</td> 1669 //! <td>4</td> 1670 //! <td>2</td> 1671 //! </tr> 1672 //! </tbody> 1673 //! </table> 1674 //! This field shall be programmed according to Image enhancement modes used 1675 //! in VEBOX. 1676 //! 1677 //! <table border="1"> 1678 //! <tbody> 1679 //! <tr> 1680 //! <td>VEBOX MODE</td> 1681 //! <td>Surface Format</td> 1682 //! <td>SFC Input Chroma Sub Sampling</td> 1683 //! <td>VD/VE Input Ordering Mode</td> 1684 //! </tr> 1685 //! <tr> 1686 //! <td>Legacy DN/DI/IECP features</td> 1687 //! <td>Monochrome</td> 1688 //! <td>0</td> 1689 //! <td>0</td> 1690 //! </tr> 1691 //! <tr> 1692 //! <td>Legacy DN/DI/IECP features</td> 1693 //! <td>420 (NV12)</td> 1694 //! <td>1</td> 1695 //! <td>0</td> 1696 //! </tr> 1697 //! <tr> 1698 //! <td>Legacy DN/DI/IECP features</td> 1699 //! <td>422H</td> 1700 //! <td>2</td> 1701 //! <td>0</td> 1702 //! </tr> 1703 //! <tr> 1704 //! <td>Legacy DN/DI/IECP features</td> 1705 //! <td>444</td> 1706 //! <td>4</td> 1707 //! <td>0</td> 1708 //! </tr> 1709 //! <tr> 1710 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1711 //! <td>Monochrome</td> 1712 //! <td>0</td> 1713 //! <td>1</td> 1714 //! </tr> 1715 //! <tr> 1716 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1717 //! <td>420 (NV12)</td> 1718 //! <td>1</td> 1719 //! <td>1</td> 1720 //! </tr> 1721 //! <tr> 1722 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1723 //! <td>422H</td> 1724 //! <td>2</td> 1725 //! <td>1</td> 1726 //! </tr> 1727 //! <tr> 1728 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1729 //! <td>444</td> 1730 //! <td>4</td> 1731 //! <td>1</td> 1732 //! </tr> 1733 //! </tbody> 1734 //! </table> 1735 enum SFC_INPUT_CHROMA_SUB_SAMPLING 1736 { 1737 SFC_INPUT_CHROMA_SUB_SAMPLING_400 = 0, //!< SFC to insert UV channels 1738 SFC_INPUT_CHROMA_SUB_SAMPLING_420 = 1, //!< No additional details 1739 SFC_INPUT_CHROMA_SUB_SAMPLING_422HORIZONATAL = 2, //!< VD: 2:1:1 1740 SFC_INPUT_CHROMA_SUB_SAMPLING_4_4_4PROGRESSIVEINTERLEAVED = 4, //!< No additional details 1741 }; 1742 1743 //! \brief VDVE_INPUT_ORDERING_MODE 1744 //! \details 1745 //! <ul> 1746 //! <li>VD mode: (SFC pipe mode set as "0")</li> 1747 //! <li> VE mode: (pipe mode set as "1 and 4")</li> 1748 //! </ul> 1749 //! For values for each mode, please refer to the table below: 1750 enum VDVE_INPUT_ORDERING_MODE 1751 { 1752 VDVE_INPUT_ORDERING_MODE_UNNAMED0 = 0, //!< 16x16 block z-scan order - no shift 1753 //!< 8x4 block column order, 64 pixel column 1754 VDVE_INPUT_ORDERING_MODE_UNNAMED1 = 1, //!< 16x16 block z-scan order - 4 pixels shift upward 1755 //!< 4x4 block column order, 64 pixel column 1756 VDVE_INPUT_ORDERING_MODE_UNNAMED2 = 2, //!< 8x8 block jpeg z-scan order 1757 //!< 8x4 block column order, 128 pixel column 1758 VDVE_INPUT_ORDERING_MODE_UNNAMED3 = 3, //!< 16x16 block jpeg z-scan order 1759 //!< 4x4 block column order, 128 pixel column 1760 VDVE_INPUT_ORDERING_MODE_UNNAMED_4 = 4, //!< 16x16 block VP8 row-scan order - no shift 1761 }; 1762 1763 //! \brief OUTPUT_SURFACE_FORMAT_TYPE 1764 //! \details 1765 //! SFC output surface format type. 1766 enum OUTPUT_SURFACE_FORMAT_TYPE 1767 { 1768 OUTPUT_SURFACE_FORMAT_TYPE_AYUV = 0, //!< AYUV 4:4:4 (8:8:8:8 MSB-A:Y:U:V) 1769 OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8 = 1, //!< RGBA8 4:4:4:4 (8:8:8:8 MSB-A:B:G:R) 1770 OUTPUT_SURFACE_FORMAT_TYPE_A2R10G10B10 = 2, //!< RGBA10 10:10:10:2 (2:10:10:10 MSB-A:R:G:B) 1771 OUTPUT_SURFACE_FORMAT_TYPE_R5G6B5 = 3, //!< RGB 5:6:5 (5:6:5 MSB-R:G:B) 1772 OUTPUT_SURFACE_FORMAT_TYPE_NV12 = 4, //!< Planar NV12 4:2:0 8-bit 1773 OUTPUT_SURFACE_FORMAT_TYPE_YUYV = 5, //!< Packed YUYV 4:2:2 8-bit 1774 OUTPUT_SURFACE_FORMAT_TYPE_UYVY = 6, //!< Packed UYVY 4:2:2 8-bit 1775 OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_32 = 7, //!< Packed integral Image 32-bit 1776 OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_64 = 8, //!< Packed integral Image 64-bit 1777 OUTPUT_SURFACE_FORMAT_TYPE_P016 = 9, //!< P016 format 1778 }; 1779 1780 //! \brief RGBA_CHANNEL_SWAP_ENABLE 1781 //! \details 1782 //! This bit should only be used with RGB output formats and CSC conversion 1783 //! is turned on. When this bit is set, 1784 //! the R and B channels are swapped into the output RGB channels as 1785 //! shown in the following table: 1786 //! <table> 1787 //! <tr> 1788 //! <th>Name</th> 1789 //! <th>Bits</th> 1790 //! <th>MSB Color Order</th> 1791 //! <th>Swapped</th> 1792 //! </tr> 1793 //! <tr> 1794 //! <td>RGBA8</td> 1795 //! <td>8:8:8:8</td> 1796 //! <td>A:B:G:R</td> 1797 //! <td>A:R:G:B</td> 1798 //! </tr> 1799 //! <tr> 1800 //! <td>RGBA10</td> 1801 //! <td>2:10:10:10</td> 1802 //! <td>A:R:G:B</td> 1803 //! <td>A:B:G:R</td> 1804 //! </tr> 1805 //! <tr> 1806 //! <td>RGB 5:6:5</td> 1807 //! <td>5:6:5</td> 1808 //! <td>R:G:B</td> 1809 //! <td>B:G:R</td> 1810 //! </tr> 1811 //! </table> 1812 enum RGBA_CHANNEL_SWAP_ENABLE 1813 { 1814 RGBA_CHANNEL_SWAP_ENABLE_UNNAMED0 = 0, //!< No additional details 1815 }; 1816 1817 //! \brief OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION 1818 //! \details 1819 //! This field specifies the fractional position of the bilinear filter for 1820 //! chroma downsampling. In the Y-axis. 1821 enum OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION 1822 { 1823 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_08_LEFTFULLPIXEL = 0, //!< 0 (fraction_in_integer) 1824 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_18 = 1, //!< 1 (fraction_in_integer) 1825 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_1_4_28 = 2, //!< 2 (fraction_in_integer) 1826 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_38 = 3, //!< 3 (fraction_in_integer) 1827 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_12_48 = 4, //!< 4 (fraction_in_integer) 1828 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_58 = 5, //!< 5 (fraction_in_integer) 1829 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_3_4_68 = 6, //!< 6 (fraction_in_integer) 1830 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_78 = 7, //!< 7 (fraction_in_integer) 1831 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_VERTICAL_DIRECTION_88 = 8, //!< No additional details 1832 }; 1833 1834 //! \brief OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION 1835 //! \details 1836 //! This field specifies the fractional position of the bilinear filter for 1837 //! chroma downsampling. In the X-axis. 1838 enum OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION 1839 { 1840 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_08_LEFTFULLPIXEL = 0, //!< 0 (fraction_in_integer) 1841 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_18 = 1, //!< 1 (fraction_in_integer) 1842 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_1_4_28 = 2, //!< 2 (fraction_in_integer) 1843 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_38 = 3, //!< 3 (fraction_in_integer) 1844 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_12_48 = 4, //!< 4 (fraction_in_integer) 1845 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_58 = 5, //!< 5 (fraction_in_integer) 1846 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_3_4_68 = 6, //!< 6 (fraction_in_integer) 1847 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_78 = 7, //!< 7 (fraction_in_integer) 1848 OUTPUT_CHROMA_DOWNSAMPLING_CO_SITING_POSITION_HORIZONTAL_DIRECTION_88 = 8, //!< No additional details 1849 }; 1850 1851 //! \brief IEF_ENABLE 1852 //! \details 1853 //! Restriction : For Integral Image Mode and VD Mode, this field is 1854 //! Reserved and MBZ. 1855 enum IEF_ENABLE 1856 { 1857 IEF_ENABLE_DISABLE = 0, //!< IEF Filter is Disabled 1858 IEF_ENABLE_ENABLE = 1, //!< IEF Filter is Enabled 1859 }; 1860 1861 //! \brief IEF4SMOOTH_ENABLE_ 1862 //! \details 1863 //! Restriction : For Integral Image Mode, this field is Reserved and MBZ. 1864 enum IEF4SMOOTH_ENABLE_ 1865 { 1866 IEF4SMOOTH_ENABLE_UNNAMED0 = 0, //!< IEF is operating as a content adaptive detail filter based on 5x5 region. 1867 IEF4SMOOTH_ENABLE_UNNAMED1 = 1, //!< IEF is operating as a content adaptive smooth filter based on 3x3 region 1868 }; 1869 1870 //! \brief AVS_FILTER_MODE 1871 //! \details 1872 //! In VD-to-SFC mode, value of 1 is not allowed. 1873 enum AVS_FILTER_MODE 1874 { 1875 AVS_FILTER_MODE_5X5POLY_PHASEFILTERBILINEAR_ADAPTIVE = 0, //!< No additional details 1876 AVS_FILTER_MODE_8X8POLY_PHASEFILTERBILINEAR_ADAPTIVE = 1, //!< No additional details 1877 AVS_FILTER_MODE_BILINEARFILTERONLY = 2, //!< No additional details 1878 }; 1879 1880 enum ADAPTIVE_FILTER_FOR_ALL_CHANNELS 1881 { 1882 ADAPTIVE_FILTER_FOR_ALL_CHANNELS_DISABLEADAPTIVEFILTERONUVRBCHANNELS = 0, //!< No additional details 1883 ADAPTIVE_FILTER_FOR_ALL_CHANNELS_ENABLEADAPTIVEFILTERONUVRBCHANNELS = 1, //!< 8-tap Adaptive Filter Mode is on 1884 }; 1885 1886 enum AVS_SCALING_ENABLE 1887 { 1888 AVS_SCALING_ENABLE_DISABLE = 0, //!< The scaling factor is ignored and a scaling ratio of 1:1 is assumed. 1889 AVS_SCALING_ENABLE_ENABLE = 1, //!< No additional details 1890 }; 1891 1892 enum BYPASS_Y_ADAPTIVE_FILTERING 1893 { 1894 BYPASS_Y_ADAPTIVE_FILTERING_ENABLEYADAPTIVEFILTERING = 0, //!< No additional details 1895 BYPASS_Y_ADAPTIVE_FILTERING_DISABLEYADAPTIVEFILTERING = 1, //!< The Y direction will use Default Sharpness Level to blend between the smooth and sharp filters rather than the calculated value. 1896 }; 1897 1898 enum BYPASS_X_ADAPTIVE_FILTERING 1899 { 1900 BYPASS_X_ADAPTIVE_FILTERING_ENABLEXADAPTIVEFILTERING = 0, //!< No additional details 1901 BYPASS_X_ADAPTIVE_FILTERING_DISABLEXADAPTIVEFILTERING = 1, //!< The X direction will use Default Sharpness Level to blend between the smooth and sharp filters rather than the calculated value. 1902 }; 1903 1904 //! \brief ROTATION_MODE 1905 //! \details 1906 //! <p>SFC rotation (90, 180 and 270) should be set only on VEBox input mode 1907 //! and SFC output set to TileY.</p> 1908 //! Restriction: 1909 //! <ul> 1910 //! <li>For Integral Image Mode, this field is Reserved and MBZ.</li> 1911 //! <li>For VDBox Mode, this field is Reserved and MBZ.</li> 1912 //! <li>For linear or TileX SFC output, this field is Reserved and 1913 //! MBZ.</li> 1914 //! </ul> 1915 enum ROTATION_MODE 1916 { 1917 ROTATION_MODE_0_DEGREES = 0, //!< No additional details 1918 ROTATION_MODE_90CLOCKWISE = 1, //!< No additional details 1919 ROTATION_MODE_180CLOCKWISE = 2, //!< No additional details 1920 ROTATION_MODE_270CLOCKWISE = 3, //!< No additional details 1921 }; 1922 1923 //! \brief BITDEPTH 1924 //! \details 1925 //! This field is valid only for output formats P016. This field is used to 1926 //! specify how many of the LSB bits have valid data. 1927 enum BITDEPTH 1928 { 1929 BITDEPTH_10BITFORMAT = 0, //!< Higher 10 bits are valid and lower 6 bits are 0 1930 }; 1931 1932 //! \brief SCALING_FACTOR_HEIGHT 1933 //! \details 1934 //! <p>This field specifies the scaling ratio of the vertical sizes between 1935 //! the crop/source region and the scaled region. 1936 //! The destination pixel coordinate, y-axis, is multiplied with this 1937 //! scaling factor to mapping back to the source input pixel coordinate.</p> 1938 //! <p>The field specifies the ratio of crop height resolution/ scaled 1939 //! height resolution. This implies 1/<i>sf<sub>u</sub></i> in the 1940 //! equation.</p> 1941 enum SCALING_FACTOR_HEIGHT 1942 { 1943 SCALING_FACTOR_HEIGHT_UNNAMED0 = 0, //!< Reserved 1944 }; 1945 1946 //! \brief SCALING_FACTOR_WIDTH 1947 //! \details 1948 //! <p>This field specifies the scaling ratio of the horizontal sizes 1949 //! between the crop/source region and the scaled region. 1950 //! The destination pixel coordinate, x-axis, is multiplied with this 1951 //! scaling factor to mapping back to the source input pixel coordinate. 1952 //! </p> 1953 //! <p>The field specifies the ratio of crop width resolution/ scaled 1954 //! width resolution. This implies 1/<i>sf<sub>u</sub></i> in the equations 1955 //! above.</p> 1956 enum SCALING_FACTOR_WIDTH 1957 { 1958 SCALING_FACTOR_WIDTH_UNNAMED0 = 0, //!< Reserved 1959 }; 1960 1961 //! \brief OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1962 //! \details 1963 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1964 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 1965 //! vertical from horizontal compression. Please refer to vol1a</span><b 1966 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1967 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 1968 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 1969 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 1970 //! normal;">media Memory Compression for more details.</span> 1971 enum OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1972 { 1973 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_VERTICALCOMPRESSION = 0, //!< No additional details 1974 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_HORIZONTALCOMPRESSION = 1, //!< No additional details 1975 }; 1976 1977 //! \brief OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1978 //! \details 1979 //! This must be set to 0 1980 enum OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1981 { 1982 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_DISABLE = 0, //!< This field must be programmed to 0 1983 }; 1984 1985 //! \brief OUTPUT_SURFACE_TILED_MODE 1986 //! \details 1987 //! <b>For Media Surfaces:</b> 1988 //! This field specifies the tiled resource mode. 1989 enum OUTPUT_SURFACE_TILED_MODE 1990 { 1991 OUTPUT_SURFACE_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 1992 OUTPUT_SURFACE_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 1993 OUTPUT_SURFACE_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 1994 }; 1995 1996 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1997 //! \details 1998 //! This bit control memory compression for this surface 1999 enum AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 2000 { 2001 AVS_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_ENABLE_DISABLE = 0, //!< No additional details 2002 }; 2003 2004 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 2005 //! \details 2006 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2007 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 2008 //! vertical from horizontal compression. Please refer to vol1a�</span><b 2009 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2010 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 2011 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 2012 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 2013 //! normal;">�media Memory Compression for more details.</span> 2014 enum AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 2015 { 2016 AVS_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_HORIZONTALCOMPRESSIONMODE = 0, //!< No additional details 2017 }; 2018 2019 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 2020 //! \details 2021 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2022 //! font-size: 13.3333330154419px; line-height: normal;">This field controls 2023 //! if the Row Store is going to store inside Media Cache (rowstore cache) 2024 //! or to LLC.</span> 2025 enum AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 2026 { 2027 AVS_LINE_BUFFER_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_LLC = 0, //!< Buffer going to LLC 2028 }; 2029 2030 //! \brief AVS_LINE_BUFFER_TILED_MODE 2031 //! \details 2032 //! <b>For Media Surfaces:</b> 2033 //! This field specifies the tiled resource mode. 2034 enum AVS_LINE_BUFFER_TILED_MODE 2035 { 2036 AVS_LINE_BUFFER_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 2037 AVS_LINE_BUFFER_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 2038 AVS_LINE_BUFFER_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 2039 }; 2040 2041 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 2042 //! \details 2043 //! <p><span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2044 //! font-size: 13.3333330154419px; line-height: normal;">Memory compression 2045 //! is not supported for this surface</span></p> 2046 //! <p><span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2047 //! font-size: 13.3333330154419px; line-height: normal;">Must be 2048 //! 0.</span></p> 2049 //! <p></p> 2050 enum IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 2051 { 2052 IEF_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_ENABLE_DISABLE = 0, //!< No additional details 2053 }; 2054 2055 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 2056 //! \details 2057 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2058 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 2059 //! vertical from horizontal compression. Please refer to vol1a�</span><b 2060 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2061 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 2062 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 2063 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 2064 //! normal;">�media Memory Compression for more details.</span> 2065 enum IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 2066 { 2067 IEF_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_UNNAMED0 = 0, //!< No additional details 2068 }; 2069 2070 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 2071 //! \details 2072 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 2073 //! font-size: 13.3333330154419px; line-height: normal;">This field controls 2074 //! if the Row Store is going to store inside Media Cache (rowstore cache) 2075 //! or to LLC.</span> 2076 enum IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 2077 { 2078 IEF_LINE_BUFFER_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_LLC = 0, //!< Buffer going to LLC 2079 }; 2080 2081 //! \brief IEF_LINE_BUFFER_TILED_MODE 2082 //! \details 2083 //! <b>For Media Surfaces:</b> 2084 //! This field specifies the tiled resource mode. 2085 enum IEF_LINE_BUFFER_TILED_MODE 2086 { 2087 IEF_LINE_BUFFER_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 2088 IEF_LINE_BUFFER_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 2089 IEF_LINE_BUFFER_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 2090 }; 2091 2092 //! \brief OUTPUT_SURFACE_TILE_WALK 2093 //! \details 2094 //! This field specifies the type of memory tiling (XMajor or YMajor) 2095 //! employed to tile this surface. See <i>Memory Interface Functions</i> for 2096 //! details on memory tiling and restrictions. 2097 enum OUTPUT_SURFACE_TILE_WALK 2098 { 2099 OUTPUT_SURFACE_TILE_WALK_TILEWALKXMAJOR = 0, //!< No additional details 2100 OUTPUT_SURFACE_TILE_WALK_TILEWALKYMAJOR = 1, //!< No additional details 2101 }; 2102 2103 //! \brief OUTPUT_SURFACE_TILED 2104 //! \details 2105 //! This field specifies whether the surface is tiled. 2106 enum OUTPUT_SURFACE_TILED 2107 { 2108 OUTPUT_SURFACE_TILED_FALSE = 0, //!< Linear 2109 OUTPUT_SURFACE_TILED_TRUE = 1, //!< Tiled 2110 }; 2111 2112 //! \name Initializations 2113 2114 //! \brief Explicit member initialization function 2115 SFC_STATE_CMD(); 2116 2117 static const size_t dwSize = 34; 2118 static const size_t byteSize = 136; 2119 }; 2120 2121 //! 2122 //! \brief SFC_AVS_LUMA_Coeff_Table 2123 //! \details 2124 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 2125 //! each frame once the lock request is granted. 2126 //! 2127 struct SFC_AVS_LUMA_Coeff_Table_CMD 2128 { 2129 union 2130 { 2131 //!< DWORD 0 2132 struct 2133 { 2134 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2135 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2136 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 2137 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 2138 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 2139 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 2140 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2141 }; 2142 uint32_t Value; 2143 } DW0; 2144 union 2145 { 2146 //!< DWORD 1 2147 struct 2148 { 2149 uint32_t Table0XFilterCoefficientN0 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],0] 2150 uint32_t Table0YFilterCoefficientN0 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],0] 2151 uint32_t Table0XFilterCoefficientN1 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],1] 2152 uint32_t Table0YFilterCoefficientN1 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],1] 2153 }; 2154 uint32_t Value; 2155 } DW1; 2156 union 2157 { 2158 //!< DWORD 2 2159 struct 2160 { 2161 uint32_t Table0XFilterCoefficientN2 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],2] 2162 uint32_t Table0YFilterCoefficientN2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],2] 2163 uint32_t Table0XFilterCoefficientN3 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],3] 2164 uint32_t Table0YFilterCoefficientN3 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],3] 2165 }; 2166 uint32_t Value; 2167 } DW2; 2168 union 2169 { 2170 //!< DWORD 3 2171 struct 2172 { 2173 uint32_t Table0XFilterCoefficientN4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],4] 2174 uint32_t Table0YFilterCoefficientN4 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],4] 2175 uint32_t Table0XFilterCoefficientN5 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],5] 2176 uint32_t Table0YFilterCoefficientN5 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],5] 2177 }; 2178 uint32_t Value; 2179 } DW3; 2180 union 2181 { 2182 //!< DWORD 4 2183 struct 2184 { 2185 uint32_t Table0XFilterCoefficientN6 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],6] 2186 uint32_t Table0YFilterCoefficientN6 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],6] 2187 uint32_t Table0XFilterCoefficientN7 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],7] 2188 uint32_t Table0YFilterCoefficientN7 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],7] 2189 }; 2190 uint32_t Value; 2191 } DW4; 2192 2193 uint32_t FilterCoefficients[124]; //!< Filter Coefficients 2194 2195 //! \name Local enumerations 2196 2197 enum SUBOPCODEB 2198 { 2199 SUBOPCODEB_SFCAVSLUMACOEFFTABLE = 5, //!< No additional details 2200 }; 2201 2202 enum SUBOPCODEA 2203 { 2204 SUBOPCODEA_COMMON = 0, //!< No additional details 2205 }; 2206 2207 enum MEDIA_COMMAND_OPCODE 2208 { 2209 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 2210 }; 2211 2212 enum PIPELINE 2213 { 2214 PIPELINE_MEDIA = 2, //!< No additional details 2215 }; 2216 2217 enum COMMAND_TYPE 2218 { 2219 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2220 }; 2221 2222 //! \name Initializations 2223 2224 //! \brief Explicit member initialization function 2225 SFC_AVS_LUMA_Coeff_Table_CMD(); 2226 2227 static const size_t dwSize = 129; 2228 static const size_t byteSize = 516; 2229 }; 2230 2231 //! 2232 //! \brief SFC_AVS_CHROMA_Coeff_Table 2233 //! \details 2234 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 2235 //! each frame once the lock request is granted. 2236 //! 2237 struct SFC_AVS_CHROMA_Coeff_Table_CMD 2238 { 2239 union 2240 { 2241 //!< DWORD 0 2242 struct 2243 { 2244 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2245 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2246 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 2247 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 2248 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 2249 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 2250 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2251 }; 2252 uint32_t Value; 2253 } DW0; 2254 union 2255 { 2256 //!< DWORD 1 2257 struct 2258 { 2259 uint32_t Table1XFilterCoefficientN2 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 1X Filter Coefficient[[n],2] 2260 uint32_t Table1YFilterCoefficientN2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 1Y Filter Coefficient[[n],2] 2261 uint32_t Table1XFilterCoefficientN3 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 1X Filter Coefficient[[n],3] 2262 uint32_t Table1YFilterCoefficientN3 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 1Y Filter Coefficient[[n],3] 2263 }; 2264 uint32_t Value; 2265 } DW1; 2266 union 2267 { 2268 //!< DWORD 2 2269 struct 2270 { 2271 uint32_t Table1XFilterCoefficientN4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 1X Filter Coefficient[[n],4] 2272 uint32_t Table1YFilterCoefficientN4 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 1Y Filter Coefficient[[n],4] 2273 uint32_t Table1XFilterCoefficientN5 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 1X Filter Coefficient[[n],5] 2274 uint32_t Table1YFilterCoefficientN5 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 1Y Filter Coefficient[[n],5] 2275 }; 2276 uint32_t Value; 2277 } DW2; 2278 2279 uint32_t FilterCoefficients[62]; //!< Filter Coefficients 2280 2281 //! \name Local enumerations 2282 2283 enum SUBOPCODEB 2284 { 2285 SUBOPCODEB_SFCAVSCHROMACOEFFTABLE = 6, //!< No additional details 2286 }; 2287 2288 enum SUBOPCODEA 2289 { 2290 SUBOPCODEA_COMMON = 0, //!< No additional details 2291 }; 2292 2293 enum MEDIA_COMMAND_OPCODE 2294 { 2295 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 2296 }; 2297 2298 enum PIPELINE 2299 { 2300 PIPELINE_MEDIA = 2, //!< No additional details 2301 }; 2302 2303 enum COMMAND_TYPE 2304 { 2305 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2306 }; 2307 2308 //! \name Initializations 2309 2310 //! \brief Explicit member initialization function 2311 SFC_AVS_CHROMA_Coeff_Table_CMD(); 2312 2313 static const size_t dwSize = 65; 2314 static const size_t byteSize = 260; 2315 }; 2316 2317 }; 2318 2319 #pragma pack() 2320 2321 #endif // __MHW_SFC_HWCMD_G11_X_H__