1 /* 2 * Copyright (c) 2018, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_vebox_hwcmd_g8_X.h 24 //! \brief Auto-generated constructors for MHW and states. 25 //! \details This file may not be included outside of g8_X as other components 26 //! should use MHW interface to interact with MHW commands and states. 27 //! 28 #ifndef __MHW_VEBOX_HWCMD_G8_X_H__ 29 #define __MHW_VEBOX_HWCMD_G8_X_H__ 30 31 #pragma once 32 #pragma pack(1) 33 34 #include <cstdint> 35 #include <cstddef> 36 37 class mhw_vebox_g8_X 38 { 39 public: 40 // Internal Macros 41 #define __CODEGEN_MAX(_a, _b) (((_a) > (_b)) ? (_a) : (_b)) 42 #define __CODEGEN_BITFIELD(l, h) (h) - (l) + 1 43 #define __CODEGEN_OP_LENGTH_BIAS 2 44 #define __CODEGEN_OP_LENGTH(x) (uint32_t)((__CODEGEN_MAX(x, __CODEGEN_OP_LENGTH_BIAS)) - __CODEGEN_OP_LENGTH_BIAS) 45 GetOpLength(uint32_t uiLength)46 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 47 48 //! 49 //! \brief VEBOX_ACE_LACE_STATE 50 //! \details 51 //! This state structure contains the IECP State Table Contents for ACE 52 //! state. 53 //! 54 struct VEBOX_ACE_LACE_STATE_CMD 55 { 56 union 57 { 58 //!< DWORD 0 59 struct 60 { 61 uint32_t AceEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< ACE Enable 62 uint32_t FullImageHistogram : __CODEGEN_BITFIELD( 1, 1) ; //!< FULL_IMAGE_HISTOGRAM 63 uint32_t SkinThreshold : __CODEGEN_BITFIELD( 2, 6) ; //!< SKIN_THRESHOLD 64 uint32_t Reserved7 : __CODEGEN_BITFIELD( 7, 31) ; //!< Reserved 65 }; 66 uint32_t Value; 67 } DW0; 68 union 69 { 70 //!< DWORD 1 71 struct 72 { 73 uint32_t Ymin : __CODEGEN_BITFIELD( 0, 7) ; //!< YMIN 74 uint32_t Y1 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y1 75 uint32_t Y2 : __CODEGEN_BITFIELD(16, 23) ; //!< Y2 76 uint32_t Y3 : __CODEGEN_BITFIELD(24, 31) ; //!< Y3 77 }; 78 uint32_t Value; 79 } DW1; 80 union 81 { 82 //!< DWORD 2 83 struct 84 { 85 uint32_t Y4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Y4 86 uint32_t Y5 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y5 87 uint32_t Y6 : __CODEGEN_BITFIELD(16, 23) ; //!< Y6 88 uint32_t Y7 : __CODEGEN_BITFIELD(24, 31) ; //!< Y7 89 }; 90 uint32_t Value; 91 } DW2; 92 union 93 { 94 //!< DWORD 3 95 struct 96 { 97 uint32_t Y8 : __CODEGEN_BITFIELD( 0, 7) ; //!< Y8 98 uint32_t Y9 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y9 99 uint32_t Y10 : __CODEGEN_BITFIELD(16, 23) ; //!< Y10 100 uint32_t Ymax : __CODEGEN_BITFIELD(24, 31) ; //!< YMAX 101 }; 102 uint32_t Value; 103 } DW3; 104 union 105 { 106 //!< DWORD 4 107 struct 108 { 109 uint32_t B1 : __CODEGEN_BITFIELD( 0, 7) ; //!< B1 110 uint32_t B2 : __CODEGEN_BITFIELD( 8, 15) ; //!< B2 111 uint32_t B3 : __CODEGEN_BITFIELD(16, 23) ; //!< B3 112 uint32_t B4 : __CODEGEN_BITFIELD(24, 31) ; //!< B4 113 }; 114 uint32_t Value; 115 } DW4; 116 union 117 { 118 //!< DWORD 5 119 struct 120 { 121 uint32_t B5 : __CODEGEN_BITFIELD( 0, 7) ; //!< B5 122 uint32_t B6 : __CODEGEN_BITFIELD( 8, 15) ; //!< B6 123 uint32_t B7 : __CODEGEN_BITFIELD(16, 23) ; //!< B7 124 uint32_t B8 : __CODEGEN_BITFIELD(24, 31) ; //!< B8 125 }; 126 uint32_t Value; 127 } DW5; 128 union 129 { 130 //!< DWORD 6 131 struct 132 { 133 uint32_t B9 : __CODEGEN_BITFIELD( 0, 7) ; //!< B9 134 uint32_t B10 : __CODEGEN_BITFIELD( 8, 15) ; //!< B10 135 uint32_t Reserved208 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 136 }; 137 uint32_t Value; 138 } DW6; 139 union 140 { 141 //!< DWORD 7 142 struct 143 { 144 uint32_t S0 : __CODEGEN_BITFIELD( 0, 10) ; //!< S0 145 uint32_t Reserved235 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 146 uint32_t S1 : __CODEGEN_BITFIELD(16, 26) ; //!< S1 147 uint32_t Reserved251 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 148 }; 149 uint32_t Value; 150 } DW7; 151 union 152 { 153 //!< DWORD 8 154 struct 155 { 156 uint32_t S2 : __CODEGEN_BITFIELD( 0, 10) ; //!< S2 157 uint32_t Reserved267 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 158 uint32_t S3 : __CODEGEN_BITFIELD(16, 26) ; //!< S3 159 uint32_t Reserved283 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 160 }; 161 uint32_t Value; 162 } DW8; 163 union 164 { 165 //!< DWORD 9 166 struct 167 { 168 uint32_t S4 : __CODEGEN_BITFIELD( 0, 10) ; //!< S4 169 uint32_t Reserved299 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 170 uint32_t S5 : __CODEGEN_BITFIELD(16, 26) ; //!< S5 171 uint32_t Reserved315 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 172 }; 173 uint32_t Value; 174 } DW9; 175 union 176 { 177 //!< DWORD 10 178 struct 179 { 180 uint32_t S6 : __CODEGEN_BITFIELD( 0, 10) ; //!< S6 181 uint32_t Reserved331 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 182 uint32_t S7 : __CODEGEN_BITFIELD(16, 26) ; //!< S7 183 uint32_t Reserved347 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 184 }; 185 uint32_t Value; 186 } DW10; 187 union 188 { 189 //!< DWORD 11 190 struct 191 { 192 uint32_t S8 : __CODEGEN_BITFIELD( 0, 10) ; //!< S8 193 uint32_t Reserved363 : __CODEGEN_BITFIELD(11, 15) ; //!< Reserved 194 uint32_t S9 : __CODEGEN_BITFIELD(16, 26) ; //!< S9 195 uint32_t Reserved379 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 196 }; 197 uint32_t Value; 198 } DW11; 199 union 200 { 201 //!< DWORD 12 202 struct 203 { 204 uint32_t S10 : __CODEGEN_BITFIELD( 0, 10) ; //!< S10 205 uint32_t Reserved395 : __CODEGEN_BITFIELD(11, 31) ; //!< Reserved 206 }; 207 uint32_t Value; 208 } DW12; 209 210 //! \name Local enumerations 211 212 //! \brief FULL_IMAGE_HISTOGRAM 213 //! \details 214 //! Used to ignore the area of interest for full image histogram. This 215 //! applies to all statistics that are affected by AOI (Area of Interest). 216 enum FULL_IMAGE_HISTOGRAM 217 { 218 FULL_IMAGE_HISTOGRAM_UNNAMED0 = 0, //!< No additional details 219 }; 220 221 //! \brief SKIN_THRESHOLD 222 //! \details 223 //! Used for Y analysis (min/max) for pixels which are higher than skin 224 //! threshold. 225 enum SKIN_THRESHOLD 226 { 227 SKIN_THRESHOLD_UNNAMED26 = 26, //!< No additional details 228 }; 229 230 //! \brief YMIN 231 //! \details 232 //! The value of the y_pixel for point 0 in PWL. 233 enum YMIN 234 { 235 YMIN_UNNAMED16 = 16, //!< No additional details 236 }; 237 238 //! \brief Y1 239 //! \details 240 //! The value of the y_pixel for point 1 in PWL. 241 enum Y1 242 { 243 Y1_UNNAMED36 = 36, //!< No additional details 244 }; 245 246 //! \brief Y2 247 //! \details 248 //! The value of the y_pixel for point 2 in PWL. 249 enum Y2 250 { 251 Y2_UNNAMED56 = 56, //!< No additional details 252 }; 253 254 //! \brief Y3 255 //! \details 256 //! The value of the y_pixel for point 3 in PWL. 257 enum Y3 258 { 259 Y3_UNNAMED76 = 76, //!< No additional details 260 }; 261 262 //! \brief Y4 263 //! \details 264 //! The value of the y_pixel for point 4 in PWL. 265 enum Y4 266 { 267 Y4_UNNAMED96 = 96, //!< No additional details 268 }; 269 270 //! \brief Y5 271 //! \details 272 //! The value of the y_pixel for point 5 in PWL. 273 enum Y5 274 { 275 Y5_UNNAMED116 = 116, //!< No additional details 276 }; 277 278 //! \brief Y6 279 //! \details 280 //! The value of the y_pixel for point 6 in PWL. 281 enum Y6 282 { 283 Y6_UNNAMED136 = 136, //!< No additional details 284 }; 285 286 //! \brief Y7 287 //! \details 288 //! The value of the y_pixel for point 7 in PWL. 289 enum Y7 290 { 291 Y7_UNNAMED156 = 156, //!< No additional details 292 }; 293 294 //! \brief Y8 295 //! \details 296 //! The value of the y_pixel for point 8 in PWL. 297 enum Y8 298 { 299 Y8_UNNAMED176 = 176, //!< No additional details 300 }; 301 302 //! \brief Y9 303 //! \details 304 //! The value of the y_pixel for point 9 in PWL. 305 enum Y9 306 { 307 Y9_UNNAMED196 = 196, //!< No additional details 308 }; 309 310 //! \brief Y10 311 //! \details 312 //! The value of the y_pixel for point 10 in PWL. 313 enum Y10 314 { 315 Y10_UNNAMED216 = 216, //!< No additional details 316 }; 317 318 //! \brief YMAX 319 //! \details 320 //! The value of the y_pixel for point 11 in PWL. 321 enum YMAX 322 { 323 YMAX_UNNAMED235 = 235, //!< No additional details 324 }; 325 326 //! \brief B1 327 //! \details 328 //! The value of the bias for point 1 in PWL. 329 enum B1 330 { 331 B1_UNNAMED36 = 36, //!< No additional details 332 }; 333 334 //! \brief B2 335 //! \details 336 //! The value of the bias for point 2 in PWL. 337 enum B2 338 { 339 B2_UNNAMED56 = 56, //!< No additional details 340 }; 341 342 //! \brief B3 343 //! \details 344 //! The value of the bias for point 3 in PWL. 345 enum B3 346 { 347 B3_UNNAMED76 = 76, //!< No additional details 348 }; 349 350 //! \brief B4 351 //! \details 352 //! The value of the bias for point 4 in PWL. 353 enum B4 354 { 355 B4_UNNAMED96 = 96, //!< No additional details 356 }; 357 358 //! \brief B5 359 //! \details 360 //! The value of the bias for point 5 in PWL. 361 enum B5 362 { 363 B5_UNNAMED116 = 116, //!< No additional details 364 }; 365 366 //! \brief B6 367 //! \details 368 //! The value of the bias for point 6 in PWL. 369 enum B6 370 { 371 B6_UNNAMED136 = 136, //!< No additional details 372 }; 373 374 //! \brief B7 375 //! \details 376 //! The value of the bias for point 7 in PWL. 377 enum B7 378 { 379 B7_UNNAMED156 = 156, //!< No additional details 380 }; 381 382 //! \brief B8 383 //! \details 384 //! The value of the bias for point 8 in PWL. 385 enum B8 386 { 387 B8_UNNAMED176 = 176, //!< No additional details 388 }; 389 390 //! \brief B9 391 //! \details 392 //! The value of the bias for point 9 in PWL. 393 enum B9 394 { 395 B9_UNNAMED196 = 196, //!< No additional details 396 }; 397 398 //! \brief B10 399 //! \details 400 //! The value of the bias for point 10 in PWL. 401 enum B10 402 { 403 B10_UNNAMED216 = 216, //!< No additional details 404 }; 405 406 //! \brief S0 407 //! \details 408 //! The value of the slope for point 0 in PWL 409 enum S0 410 { 411 S0_UNNAMED1024 = 1024, //!< No additional details 412 }; 413 414 //! \brief S1 415 //! \details 416 //! The value of the slope for point 1 in PWL 417 enum S1 418 { 419 S1_UNNAMED1024 = 1024, //!< No additional details 420 }; 421 422 //! \brief S2 423 //! \details 424 //! The value of the slope for point 2 in PWL 425 enum S2 426 { 427 S2_UNNAMED1024 = 1024, //!< No additional details 428 }; 429 430 //! \brief S3 431 //! \details 432 //! The value of the slope for point 3 in PWL 433 enum S3 434 { 435 S3_UNNAMED1024 = 1024, //!< No additional details 436 }; 437 438 //! \brief S4 439 //! \details 440 //! The value of the slope for point 4 in PWL 441 enum S4 442 { 443 S4_UNNAMED1024 = 1024, //!< No additional details 444 }; 445 446 //! \brief S5 447 //! \details 448 //! The value of the slope for point 5 in PWL 449 enum S5 450 { 451 S5_UNNAMED1024 = 1024, //!< No additional details 452 }; 453 454 //! \brief S6 455 //! \details 456 //! The default is 1024/1024 457 enum S6 458 { 459 S6_UNNAMED1024 = 1024, //!< No additional details 460 }; 461 462 //! \brief S7 463 //! \details 464 //! The value of the slope for point 7 in PWL 465 enum S7 466 { 467 S7_UNNAMED1024 = 1024, //!< No additional details 468 }; 469 470 //! \brief S8 471 //! \details 472 //! The value of the slope for point 8 in PWL 473 enum S8 474 { 475 S8_UNNAMED1024 = 1024, //!< No additional details 476 }; 477 478 //! \brief S9 479 //! \details 480 //! The value of the slope for point 9 in PWL 481 enum S9 482 { 483 S9_UNNAMED1024 = 1024, //!< No additional details 484 }; 485 486 //! \brief S10 487 //! \details 488 //! The value of the slope for point 10 in PWL. 489 enum S10 490 { 491 S10_UNNAMED1024 = 1024, //!< No additional details 492 }; 493 494 //! \name Initializations 495 496 //! \brief Explicit member initialization function 497 VEBOX_ACE_LACE_STATE_CMD(); 498 499 static const size_t dwSize = 13; 500 static const size_t byteSize = 52; 501 }; 502 503 //! 504 //! \brief VEBOX_ALPHA_AOI_STATE 505 //! \details 506 //! This state structure contains the IECP State Table Contents for Fixed 507 //! Alpha and Area of Interest state. 508 //! 509 struct VEBOX_ALPHA_AOI_STATE_CMD 510 { 511 union 512 { 513 //!< DWORD 0 514 struct 515 { 516 uint32_t ColorPipeAlpha : __CODEGEN_BITFIELD( 0, 11) ; //!< Color Pipe Alpha 517 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 518 uint32_t AlphaFromStateSelect : __CODEGEN_BITFIELD(16, 16) ; //!< ALPHA_FROM_STATE_SELECT 519 uint32_t Reserved17 : __CODEGEN_BITFIELD(17, 31) ; //!< Reserved 520 }; 521 uint32_t Value; 522 } DW0; 523 union 524 { 525 //!< DWORD 1 526 struct 527 { 528 uint32_t AoiMinX : __CODEGEN_BITFIELD( 0, 13) ; //!< AOI_MIN_X 529 uint32_t Reserved46 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 530 uint32_t AoiMaxX : __CODEGEN_BITFIELD(16, 29) ; //!< AOI_MAX_X 531 uint32_t Reserved62 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 532 }; 533 uint32_t Value; 534 } DW1; 535 union 536 { 537 //!< DWORD 2 538 struct 539 { 540 uint32_t AoiMinY : __CODEGEN_BITFIELD( 0, 13) ; //!< AOI_MIN_Y 541 uint32_t Reserved78 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 542 uint32_t AoiMaxY : __CODEGEN_BITFIELD(16, 29) ; //!< AOI_MAX_Y 543 uint32_t Reserved94 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 544 }; 545 uint32_t Value; 546 } DW2; 547 548 //! \name Local enumerations 549 550 //! \brief ALPHA_FROM_STATE_SELECT 551 //! \details 552 //! If the input format does not have alpha available and the output format 553 //! provides alpha, this bit should be set to 1. This should be 0 when Alpha 554 //! Plane Enable is 1. 555 enum ALPHA_FROM_STATE_SELECT 556 { 557 ALPHA_FROM_STATE_SELECT_ALPHAISTAKENFROMMESSAGE = 0, //!< No additional details 558 ALPHA_FROM_STATE_SELECT_ALPHAISTAKENFROMSTATE = 1, //!< No additional details 559 }; 560 561 //! \brief AOI_MIN_X 562 //! \details 563 //! This value must be a multiple of 4. 564 enum AOI_MIN_X 565 { 566 AOI_MIN_X_UNNAMED0 = 0, //!< No additional details 567 }; 568 569 //! \brief AOI_MAX_X 570 //! \details 571 //! Area of Interest Minimum X - The ACE histogram and Skin Tone Detection 572 //! statistic gathering will occur within the MinX/MinY to MaxX/MaxY area 573 //! (inclusive). 574 //! This value must be a multiple of 4 minus 1. 575 enum AOI_MAX_X 576 { 577 AOI_MAX_X_UNNAMED3 = 3, //!< No additional details 578 }; 579 580 //! \brief AOI_MIN_Y 581 //! \details 582 //! This value must be a multiple of 4. 583 enum AOI_MIN_Y 584 { 585 AOI_MIN_Y_UNNAMED0 = 0, //!< No additional details 586 }; 587 588 //! \brief AOI_MAX_Y 589 //! \details 590 //! This value must be a multiple of 4 minus 1. 591 enum AOI_MAX_Y 592 { 593 AOI_MAX_Y_UNNAMED3 = 3, //!< No additional details 594 }; 595 596 //! \name Initializations 597 598 //! \brief Explicit member initialization function 599 VEBOX_ALPHA_AOI_STATE_CMD(); 600 601 static const size_t dwSize = 3; 602 static const size_t byteSize = 12; 603 }; 604 605 //! 606 //! \brief VEBOX_CAPTURE_PIPE_STATE 607 //! \details 608 //! This command contains variables for controlling Demosaic and the White 609 //! Balance Statistics. 610 //! 611 struct VEBOX_CAPTURE_PIPE_STATE_CMD 612 { 613 union 614 { 615 //!< DWORD 0 616 struct 617 { 618 uint32_t AverageMinCostThreshold : __CODEGEN_BITFIELD( 0, 7) ; //!< AVERAGE_MIN_COST_THRESHOLD 619 uint32_t AverageColorThreshold : __CODEGEN_BITFIELD( 8, 15) ; //!< AVERAGE_COLOR_THRESHOLD 620 uint32_t ScaleForAverageMinCost : __CODEGEN_BITFIELD(16, 19) ; //!< SCALE_FOR_AVERAGE_MIN_COST 621 uint32_t ShiftMinCost : __CODEGEN_BITFIELD(20, 22) ; //!< SHIFT_MIN_COST 622 uint32_t Reserved23 : __CODEGEN_BITFIELD(23, 23) ; //!< Reserved 623 uint32_t GoodPixelThreshold : __CODEGEN_BITFIELD(24, 29) ; //!< GOOD_PIXEL_THRESHOLD 624 uint32_t Reserved30 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 625 }; 626 uint32_t Value; 627 } DW0; 628 union 629 { 630 //!< DWORD 1 631 struct 632 { 633 uint32_t BadColorThreshold3 : __CODEGEN_BITFIELD( 0, 3) ; //!< BAD_COLOR_THRESHOLD_3 634 uint32_t Reserved36 : __CODEGEN_BITFIELD( 4, 7) ; //!< Reserved 635 uint32_t BadColorThreshold2 : __CODEGEN_BITFIELD( 8, 15) ; //!< BAD_COLOR_THRESHOLD_2 636 uint32_t BadColorThreshold1 : __CODEGEN_BITFIELD(16, 23) ; //!< BAD_COLOR_THRESHOLD_1 637 uint32_t Reserved56 : __CODEGEN_BITFIELD(24, 27) ; //!< Reserved 638 uint32_t ScaleForMinCost : __CODEGEN_BITFIELD(28, 31) ; //!< SCALE_FOR_MIN_COST 639 }; 640 uint32_t Value; 641 } DW1; 642 union 643 { 644 //!< DWORD 2 645 struct 646 { 647 uint32_t Reserved64 : __CODEGEN_BITFIELD( 0, 7) ; //!< Reserved 648 uint32_t UvThresholdValue : __CODEGEN_BITFIELD( 8, 15) ; //!< UV_THRESHOLD_VALUE 649 uint32_t YOutlierValue : __CODEGEN_BITFIELD(16, 23) ; //!< Y_OUTLIER_VALUE 650 uint32_t YBrightValue : __CODEGEN_BITFIELD(24, 31) ; //!< Y_BRIGHT_VALUE 651 }; 652 uint32_t Value; 653 } DW2; 654 655 //! \name Local enumerations 656 657 //! \brief AVERAGE_MIN_COST_THRESHOLD 658 //! \details 659 //! The threshold for the H and V Min_cost beyond which the Avg 660 //! interpolation will be used. 661 enum AVERAGE_MIN_COST_THRESHOLD 662 { 663 AVERAGE_MIN_COST_THRESHOLD_UNNAMED75 = 75, //!< No additional details 664 }; 665 666 //! \brief AVERAGE_COLOR_THRESHOLD 667 //! \details 668 //! The threshold between two colors in a pixel for the Avg interpolation to 669 //! be considered. 670 enum AVERAGE_COLOR_THRESHOLD 671 { 672 AVERAGE_COLOR_THRESHOLD_UNNAMED100 = 100, //!< No additional details 673 }; 674 675 //! \brief SCALE_FOR_AVERAGE_MIN_COST 676 //! \details 677 //! The amount to scale the min_cost difference during the Avg interpolation 678 //! decision 679 enum SCALE_FOR_AVERAGE_MIN_COST 680 { 681 SCALE_FOR_AVERAGE_MIN_COST_UNNAMED2 = 2, //!< No additional details 682 }; 683 684 //! \brief SHIFT_MIN_COST 685 //! \details 686 //! The amount to shift the H2/V2 versions of min_cost. 687 enum SHIFT_MIN_COST 688 { 689 SHIFT_MIN_COST_UNNAMED1 = 1, //!< No additional details 690 }; 691 692 //! \brief GOOD_PIXEL_THRESHOLD 693 //! \details 694 //! The difference threshold between adjacent pixels for a pixel to be 695 //! considered "good". 696 enum GOOD_PIXEL_THRESHOLD 697 { 698 GOOD_PIXEL_THRESHOLD_UNNAMED15 = 15, //!< No additional details 699 }; 700 701 //! \brief BAD_COLOR_THRESHOLD_3 702 //! \details 703 //! Color value threshold used during the bad pixel check. 704 enum BAD_COLOR_THRESHOLD_3 705 { 706 BAD_COLOR_THRESHOLD_3_UNNAMED10 = 10, //!< No additional details 707 }; 708 709 //! \brief BAD_COLOR_THRESHOLD_2 710 //! \details 711 //! Color value threshold used during the bad pixel check. 712 enum BAD_COLOR_THRESHOLD_2 713 { 714 BAD_COLOR_THRESHOLD_2_UNNAMED175 = 175, //!< No additional details 715 }; 716 717 //! \brief BAD_COLOR_THRESHOLD_1 718 //! \details 719 //! Color value threshold used during the bad pixel check. 720 enum BAD_COLOR_THRESHOLD_1 721 { 722 BAD_COLOR_THRESHOLD_1_UNNAMED100 = 100, //!< No additional details 723 }; 724 725 //! \brief SCALE_FOR_MIN_COST 726 //! \details 727 //! The amount to scale the min_cost difference during the confidence check. 728 enum SCALE_FOR_MIN_COST 729 { 730 SCALE_FOR_MIN_COST_UNNAMED10 = 10, //!< No additional details 731 }; 732 733 //! \brief UV_THRESHOLD_VALUE 734 //! \details 735 //! The value denotes the maximum threshold of the ratio between U+V to Y 736 //! can have to be considered a gray point. 737 enum UV_THRESHOLD_VALUE 738 { 739 UV_THRESHOLD_VALUE_UNNAMED64 = 64, //!< 0.25 * 255 = 64 740 }; 741 742 //! \brief Y_OUTLIER_VALUE 743 //! \details 744 //! The outlier threshold percentile in the Y histogram. Any pixel with Y 745 //! value above this either clipped or an outlier in the image. These points 746 //! will not be included in the white patch calculation. 747 enum Y_OUTLIER_VALUE 748 { 749 Y_OUTLIER_VALUE_UNNAMED253 = 253, //!< No additional details 750 }; 751 752 //! \brief Y_BRIGHT_VALUE 753 //! \details 754 //! The whitepoint threshold percentile in the Y histogram. Any pixel with Y 755 //! value above this could be a whitepoint. 756 //! This is the larger of the calculated Ybright value 757 //! and the Ythreshold value, which is the minimum Y required to be 758 //! considered a white point. 759 enum Y_BRIGHT_VALUE 760 { 761 Y_BRIGHT_VALUE_UNNAMED230 = 230, //!< No additional details 762 }; 763 764 //! \name Initializations 765 766 //! \brief Explicit member initialization function 767 VEBOX_CAPTURE_PIPE_STATE_CMD(); 768 769 static const size_t dwSize = 3; 770 static const size_t byteSize = 12; 771 }; 772 773 //! 774 //! \brief VEBOX_CCM_STATE 775 //! \details 776 //! This state structure contains the IECP State Table Contents for Color 777 //! Correction Matrix State. 778 //! 779 struct VEBOX_CCM_STATE_CMD 780 { 781 union 782 { 783 //!< DWORD 0 784 struct 785 { 786 uint32_t C1CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C1_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 787 uint32_t Reserved21 : __CODEGEN_BITFIELD(21, 29) ; //!< Reserved 788 uint32_t VignetteCorrectionFormat : __CODEGEN_BITFIELD(30, 30) ; //!< VIGNETTE_CORRECTION_FORMAT 789 uint32_t ColorCorrectionMatrixEnable : __CODEGEN_BITFIELD(31, 31) ; //!< Color Correction Matrix Enable 790 }; 791 uint32_t Value; 792 } DW0; 793 union 794 { 795 //!< DWORD 1 796 struct 797 { 798 uint32_t C0CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C0_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 799 uint32_t Reserved53 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 800 }; 801 uint32_t Value; 802 } DW1; 803 union 804 { 805 //!< DWORD 2 806 struct 807 { 808 uint32_t C3CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C3_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 809 uint32_t Reserved85 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 810 }; 811 uint32_t Value; 812 } DW2; 813 union 814 { 815 //!< DWORD 3 816 struct 817 { 818 uint32_t C2CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C2_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 819 uint32_t Reserved117 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 820 }; 821 uint32_t Value; 822 } DW3; 823 union 824 { 825 //!< DWORD 4 826 struct 827 { 828 uint32_t C5CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C5_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 829 uint32_t Reserved149 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 830 }; 831 uint32_t Value; 832 } DW4; 833 union 834 { 835 //!< DWORD 5 836 struct 837 { 838 uint32_t C4CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C4_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 839 uint32_t Reserved181 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 840 }; 841 uint32_t Value; 842 } DW5; 843 union 844 { 845 //!< DWORD 6 846 struct 847 { 848 uint32_t C7CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C7_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 849 uint32_t Reserved213 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 850 }; 851 uint32_t Value; 852 } DW6; 853 union 854 { 855 //!< DWORD 7 856 struct 857 { 858 uint32_t C6CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C6_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 859 uint32_t Reserved245 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 860 }; 861 uint32_t Value; 862 } DW7; 863 union 864 { 865 //!< DWORD 8 866 struct 867 { 868 uint32_t C8CoefficientOf3X3TransformMatrix : __CODEGEN_BITFIELD( 0, 20) ; //!< C8_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 869 uint32_t Reserved277 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 870 }; 871 uint32_t Value; 872 } DW8; 873 874 //! \name Local enumerations 875 876 enum C1_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 877 { 878 C1_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_11414096 = 1141, //!< No additional details 879 }; 880 881 //! \brief VIGNETTE_CORRECTION_FORMAT 882 //! \details 883 //! Defines what shift should be assumed for the Vignette. 884 enum VIGNETTE_CORRECTION_FORMAT 885 { 886 VIGNETTE_CORRECTION_FORMAT_U88 = 0, //!< No additional details 887 VIGNETTE_CORRECTION_FORMAT_U412 = 1, //!< No additional details 888 }; 889 890 enum C0_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 891 { 892 C0_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_27924096 = 2792, //!< No additional details 893 }; 894 895 enum C3_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 896 { 897 C3_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_714096 = 71, //!< No additional details 898 }; 899 900 enum C2_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 901 { 902 C2_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_344096 = 34, //!< No additional details 903 }; 904 905 enum C5_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 906 { 907 C5_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_524096 = 2097100, //!< No additional details 908 }; 909 910 enum C4_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 911 { 912 C4_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_33634096 = 3363, //!< No additional details 913 }; 914 915 enum C7_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 916 { 917 C7_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_1684096 = 168, //!< No additional details 918 }; 919 920 enum C6_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 921 { 922 C6_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_124096 = 2097140, //!< No additional details 923 }; 924 925 enum C8_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX 926 { 927 C8_COEFFICIENT_OF_3X3_TRANSFORM_MATRIX_34344096 = 3434, //!< No additional details 928 }; 929 930 //! \name Initializations 931 932 //! \brief Explicit member initialization function 933 VEBOX_CCM_STATE_CMD(); 934 935 static const size_t dwSize = 9; 936 static const size_t byteSize = 36; 937 }; 938 939 //! 940 //! \brief VEBOX_CSC_STATE 941 //! \details 942 //! This state structure contains the IECP State Table Contents for CSC 943 //! state. 944 //! 945 struct VEBOX_CSC_STATE_CMD 946 { 947 union 948 { 949 //!< DWORD 0 950 struct 951 { 952 uint32_t TransformEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< Transform Enable 953 uint32_t YuvChannelSwap : __CODEGEN_BITFIELD( 1, 1) ; //!< YUV_CHANNEL_SWAP 954 uint32_t Reserved2 : __CODEGEN_BITFIELD( 2, 2) ; //!< Reserved 955 uint32_t C0 : __CODEGEN_BITFIELD( 3, 15) ; //!< C0 956 uint32_t C1 : __CODEGEN_BITFIELD(16, 28) ; //!< C1 957 uint32_t Reserved29 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 958 }; 959 uint32_t Value; 960 } DW0; 961 union 962 { 963 //!< DWORD 1 964 struct 965 { 966 uint32_t C2 : __CODEGEN_BITFIELD( 0, 12) ; //!< C2 967 uint32_t C3 : __CODEGEN_BITFIELD(13, 25) ; //!< C3 968 uint32_t Reserved58 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 969 }; 970 uint32_t Value; 971 } DW1; 972 union 973 { 974 //!< DWORD 2 975 struct 976 { 977 uint32_t C4 : __CODEGEN_BITFIELD( 0, 12) ; //!< C4 978 uint32_t C5 : __CODEGEN_BITFIELD(13, 25) ; //!< C5 979 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 980 }; 981 uint32_t Value; 982 } DW2; 983 union 984 { 985 //!< DWORD 3 986 struct 987 { 988 uint32_t C6 : __CODEGEN_BITFIELD( 0, 12) ; //!< C6 989 uint32_t C7 : __CODEGEN_BITFIELD(13, 25) ; //!< C7 990 uint32_t Reserved122 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 991 }; 992 uint32_t Value; 993 } DW3; 994 union 995 { 996 //!< DWORD 4 997 struct 998 { 999 uint32_t C8 : __CODEGEN_BITFIELD( 0, 12) ; //!< C8 1000 uint32_t Reserved141 : __CODEGEN_BITFIELD(13, 31) ; //!< Reserved 1001 }; 1002 uint32_t Value; 1003 } DW4; 1004 union 1005 { 1006 //!< DWORD 5 1007 struct 1008 { 1009 uint32_t OffsetIn1 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_1 1010 uint32_t OffsetOut1 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_1 1011 uint32_t Reserved182 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1012 }; 1013 uint32_t Value; 1014 } DW5; 1015 union 1016 { 1017 //!< DWORD 6 1018 struct 1019 { 1020 uint32_t OffsetIn2 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_2 1021 uint32_t OffsetOut2 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_2 1022 uint32_t Reserved214 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1023 }; 1024 uint32_t Value; 1025 } DW6; 1026 union 1027 { 1028 //!< DWORD 7 1029 struct 1030 { 1031 uint32_t OffsetIn3 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_3 1032 uint32_t OffsetOut3 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_3 1033 uint32_t Reserved246 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1034 }; 1035 uint32_t Value; 1036 } DW7; 1037 1038 //! \name Local enumerations 1039 1040 //! \brief YUV_CHANNEL_SWAP 1041 //! \details 1042 //! This bit should only be used with RGB output formats. When this bit is 1043 //! set, the YUV channels are swapped into the output RGB channels as shown 1044 //! in the following table: 1045 //! 1046 //! <table style="border: black solid 1px;"> 1047 //! <tr> 1048 //! <td>�</td> 1049 //! <td colspan="2">YUV_Channel_Swap</td> 1050 //! </tr> 1051 //! <tr> 1052 //! <td>�</td> 1053 //! <td style="border: black solid 1px;">0</td> 1054 //! <td style="border: black solid 1px;">1</td> 1055 //! </tr> 1056 //! <tr> 1057 //! <td style="border: black solid 1px;">Y</td> 1058 //! <td style="border: black solid 1px;">R</td> 1059 //! <td style="border: black solid 1px;">G</td> 1060 //! </tr> 1061 //! <tr> 1062 //! <td style="border: black solid 1px;">U</td> 1063 //! <td style="border: black solid 1px;">G</td> 1064 //! <td style="border: black solid 1px;">B</td> 1065 //! </tr> 1066 //! <tr> 1067 //! <td style="border: black solid 1px;">V</td> 1068 //! <td style="border: black solid 1px;">B</td> 1069 //! <td style="border: black solid 1px;">R</td> 1070 //! </tr> 1071 //! </table> 1072 enum YUV_CHANNEL_SWAP 1073 { 1074 YUV_CHANNEL_SWAP_UNNAMED0 = 0, //!< No additional details 1075 }; 1076 1077 //! \brief C0 1078 //! \details 1079 //! Transform coefficient. 1080 enum C0 1081 { 1082 C0_UNNAMED1024 = 1024, //!< No additional details 1083 }; 1084 1085 //! \brief C1 1086 //! \details 1087 //! Transform coefficient. 1088 enum C1 1089 { 1090 C1_UNNAMED0 = 0, //!< No additional details 1091 }; 1092 1093 //! \brief C2 1094 //! \details 1095 //! Transform coefficient. 1096 enum C2 1097 { 1098 C2_UNNAMED0 = 0, //!< No additional details 1099 }; 1100 1101 //! \brief C3 1102 //! \details 1103 //! Transform coefficient. 1104 enum C3 1105 { 1106 C3_UNNAMED0 = 0, //!< No additional details 1107 }; 1108 1109 //! \brief C4 1110 //! \details 1111 //! Transform coefficient. 1112 enum C4 1113 { 1114 C4_UNNAMED1024 = 1024, //!< No additional details 1115 }; 1116 1117 //! \brief C5 1118 //! \details 1119 //! Transform coefficient. 1120 enum C5 1121 { 1122 C5_UNNAMED0 = 0, //!< No additional details 1123 }; 1124 1125 //! \brief C6 1126 //! \details 1127 //! Transform coefficient. 1128 enum C6 1129 { 1130 C6_UNNAMED0 = 0, //!< No additional details 1131 }; 1132 1133 //! \brief C7 1134 //! \details 1135 //! Transform coefficient. 1136 enum C7 1137 { 1138 C7_UNNAMED0 = 0, //!< No additional details 1139 }; 1140 1141 //! \brief C8 1142 //! \details 1143 //! Transform coefficient. 1144 enum C8 1145 { 1146 C8_UNNAMED1024 = 1024, //!< No additional details 1147 }; 1148 1149 //! \brief OFFSET_IN_1 1150 //! \details 1151 //! Offset in for Y/R. 1152 enum OFFSET_IN_1 1153 { 1154 OFFSET_IN_1_UNNAMED0 = 0, //!< No additional details 1155 }; 1156 1157 //! \brief OFFSET_OUT_1 1158 //! \details 1159 //! Offset out for Y/R. 1160 enum OFFSET_OUT_1 1161 { 1162 OFFSET_OUT_1_UNNAMED0 = 0, //!< No additional details 1163 }; 1164 1165 //! \brief OFFSET_IN_2 1166 //! \details 1167 //! Offset in for U/G. 1168 enum OFFSET_IN_2 1169 { 1170 OFFSET_IN_2_UNNAMED0 = 0, //!< No additional details 1171 }; 1172 1173 //! \brief OFFSET_OUT_2 1174 //! \details 1175 //! Offset out for U/G. 1176 enum OFFSET_OUT_2 1177 { 1178 OFFSET_OUT_2_UNNAMED0 = 0, //!< No additional details 1179 }; 1180 1181 //! \brief OFFSET_IN_3 1182 //! \details 1183 //! Offset in for V/B. 1184 enum OFFSET_IN_3 1185 { 1186 OFFSET_IN_3_UNNAMED0 = 0, //!< No additional details 1187 }; 1188 1189 //! \brief OFFSET_OUT_3 1190 //! \details 1191 //! Offset out for V/B. 1192 enum OFFSET_OUT_3 1193 { 1194 OFFSET_OUT_3_UNNAMED0 = 0, //!< No additional details 1195 }; 1196 1197 //! \name Initializations 1198 1199 //! \brief Explicit member initialization function 1200 VEBOX_CSC_STATE_CMD(); 1201 1202 static const size_t dwSize = 8; 1203 static const size_t byteSize = 32; 1204 }; 1205 1206 //! 1207 //! \brief VEBOX_DNDI_STATE 1208 //! \details 1209 //! This state table is used by the Denoise and Deinterlacer Functions. 1210 //! When DN is used in 12-bit mode with the Capture Pipe all the DN pixel 1211 //! thresholds (temporal_diff_th, temp_diff_low, good_neighbor_th) are 1212 //! compared with the 8 MSBs of the 12-bit pixels. 1213 //! 1214 struct VEBOX_DNDI_STATE_CMD 1215 { 1216 union 1217 { 1218 //!< DWORD 0 1219 struct 1220 { 1221 uint32_t DenoiseAsdThreshold : __CODEGEN_BITFIELD( 0, 7) ; //!< Denoise ASD Threshold 1222 uint32_t DenoiseHistoryIncrease : __CODEGEN_BITFIELD( 8, 11) ; //!< DENOISE_HISTORY_INCREASE 1223 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1224 uint32_t DenoiseMaximumHistory : __CODEGEN_BITFIELD(16, 23) ; //!< Denoise Maximum History 1225 uint32_t DenoiseStadThreshold : __CODEGEN_BITFIELD(24, 31) ; //!< Denoise STAD Threshold 1226 }; 1227 uint32_t Value; 1228 } DW0; 1229 union 1230 { 1231 //!< DWORD 1 1232 struct 1233 { 1234 uint32_t DenoiseThresholdForSumOfComplexityMeasure : __CODEGEN_BITFIELD( 0, 7) ; //!< Denoise Threshold for Sum of Complexity Measure 1235 uint32_t DenoiseMovingPixelThreshold : __CODEGEN_BITFIELD( 8, 12) ; //!< Denoise Moving Pixel Threshold 1236 uint32_t StmmC2 : __CODEGEN_BITFIELD(13, 15) ; //!< STMM C2 1237 uint32_t LowTemporalDifferenceThreshold : __CODEGEN_BITFIELD(16, 21) ; //!< Low Temporal Difference Threshold 1238 uint32_t Reserved54 : __CODEGEN_BITFIELD(22, 23) ; //!< Reserved 1239 uint32_t TemporalDifferenceThreshold : __CODEGEN_BITFIELD(24, 29) ; //!< Temporal Difference Threshold 1240 uint32_t Reserved62 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1241 }; 1242 uint32_t Value; 1243 } DW1; 1244 union 1245 { 1246 //!< DWORD 2 1247 struct 1248 { 1249 uint32_t BlockNoiseEstimateNoiseThreshold : __CODEGEN_BITFIELD( 0, 7) ; //!< Block Noise Estimate Noise Threshold 1250 uint32_t BlockNoiseEstimateEdgeThreshold : __CODEGEN_BITFIELD( 8, 11) ; //!< BLOCK_NOISE_ESTIMATE_EDGE_THRESHOLD 1251 uint32_t Reserved76 : __CODEGEN_BITFIELD(12, 13) ; //!< Reserved 1252 uint32_t SmoothMvThreshold : __CODEGEN_BITFIELD(14, 15) ; //!< Smooth MV Threshold 1253 uint32_t SadTightThreshold : __CODEGEN_BITFIELD(16, 19) ; //!< SAD_TIGHT_THRESHOLD 1254 uint32_t ContentAdaptiveThresholdSlope : __CODEGEN_BITFIELD(20, 23) ; //!< CONTENT_ADAPTIVE_THRESHOLD_SLOPE 1255 uint32_t GoodNeighborThreshold : __CODEGEN_BITFIELD(24, 29) ; //!< GOOD_NEIGHBOR_THRESHOLD 1256 uint32_t Reserved94 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1257 }; 1258 uint32_t Value; 1259 } DW2; 1260 union 1261 { 1262 //!< DWORD 3 1263 struct 1264 { 1265 uint32_t MaximumStmm : __CODEGEN_BITFIELD( 0, 7) ; //!< Maximum STMM 1266 uint32_t MultiplierForVecm : __CODEGEN_BITFIELD( 8, 13) ; //!< Multiplier for VECM 1267 uint32_t Reserved110 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 1268 uint32_t BlendingConstantAcrossTimeForSmallValuesOfStmm : __CODEGEN_BITFIELD(16, 23) ; //!< BLENDING_CONSTANT_ACROSS_TIME_FOR_SMALL_VALUES_OF_STMM 1269 uint32_t BlendingConstantAcrossTimeForLargeValuesOfStmm : __CODEGEN_BITFIELD(24, 30) ; //!< BLENDING_CONSTANT_ACROSS_TIME_FOR_LARGE_VALUES_OF_STMM 1270 uint32_t StmmBlendingConstantSelect : __CODEGEN_BITFIELD(31, 31) ; //!< STMM_BLENDING_CONSTANT_SELECT 1271 }; 1272 uint32_t Value; 1273 } DW3; 1274 union 1275 { 1276 //!< DWORD 4 1277 struct 1278 { 1279 uint32_t SdiDelta : __CODEGEN_BITFIELD( 0, 7) ; //!< SDI Delta 1280 uint32_t SdiThreshold : __CODEGEN_BITFIELD( 8, 15) ; //!< SDI Threshold 1281 uint32_t StmmOutputShift : __CODEGEN_BITFIELD(16, 19) ; //!< STMM Output Shift 1282 uint32_t StmmShiftUp : __CODEGEN_BITFIELD(20, 21) ; //!< STMM_SHIFT_UP 1283 uint32_t StmmShiftDown : __CODEGEN_BITFIELD(22, 23) ; //!< STMM_SHIFT_DOWN 1284 uint32_t MinimumStmm : __CODEGEN_BITFIELD(24, 31) ; //!< Minimum STMM 1285 }; 1286 uint32_t Value; 1287 } DW4; 1288 union 1289 { 1290 //!< DWORD 5 1291 struct 1292 { 1293 uint32_t FmdTemporalDifferenceThreshold : __CODEGEN_BITFIELD( 0, 7) ; //!< FMD Temporal Difference Threshold 1294 uint32_t SdiFallbackMode2ConstantAngle2X1 : __CODEGEN_BITFIELD( 8, 15) ; //!< SDI Fallback Mode 2 Constant (Angle2x1) 1295 uint32_t SdiFallbackMode1T2Constant : __CODEGEN_BITFIELD(16, 23) ; //!< SDI Fallback Mode 1 T2 Constant 1296 uint32_t SdiFallbackMode1T1Constant : __CODEGEN_BITFIELD(24, 31) ; //!< SDI Fallback Mode 1 T1 Constant 1297 }; 1298 uint32_t Value; 1299 } DW5; 1300 union 1301 { 1302 //!< DWORD 6 1303 struct 1304 { 1305 uint32_t Reserved192 : __CODEGEN_BITFIELD( 0, 2) ; //!< Reserved 1306 uint32_t DnDiTopFirst : __CODEGEN_BITFIELD( 3, 3) ; //!< DNDI_TOP_FIRST 1307 uint32_t Reserved196 : __CODEGEN_BITFIELD( 4, 5) ; //!< Reserved 1308 uint32_t ProgressiveDn : __CODEGEN_BITFIELD( 6, 6) ; //!< PROGRESSIVE_DN 1309 uint32_t McdiEnable : __CODEGEN_BITFIELD( 7, 7) ; //!< MCDI Enable 1310 uint32_t FmdTearThreshold : __CODEGEN_BITFIELD( 8, 13) ; //!< FMD Tear Threshold 1311 uint32_t CatThreshold : __CODEGEN_BITFIELD(14, 15) ; //!< CAT_THRESHOLD 1312 uint32_t Fmd2VerticalDifferenceThreshold : __CODEGEN_BITFIELD(16, 23) ; //!< FMD #2 Vertical Difference Threshold 1313 uint32_t Fmd1VerticalDifferenceThreshold : __CODEGEN_BITFIELD(24, 31) ; //!< FMD #1 Vertical Difference Threshold 1314 }; 1315 uint32_t Value; 1316 } DW6; 1317 union 1318 { 1319 //!< DWORD 7 1320 struct 1321 { 1322 uint32_t SadTha : __CODEGEN_BITFIELD( 0, 3) ; //!< SAD_THA 1323 uint32_t SadThb : __CODEGEN_BITFIELD( 4, 7) ; //!< SAD_THB 1324 uint32_t ProgressiveCadenceReconstructionFor1StFieldOfCurrentFrame : __CODEGEN_BITFIELD( 8, 9) ; //!< PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_1ST_FIELD_OF_CURRENT_FRAME 1325 uint32_t McPixelConsistencyThreshold : __CODEGEN_BITFIELD(10, 15) ; //!< MC_PIXEL_CONSISTENCY_THRESHOLD 1326 uint32_t ProgressiveCadenceReconstructionFor2NdFieldOfPreviousFrame : __CODEGEN_BITFIELD(16, 17) ; //!< PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_2ND_FIELD_OF_PREVIOUS_FRAME 1327 uint32_t Reserved242 : __CODEGEN_BITFIELD(18, 18) ; //!< Reserved 1328 uint32_t NeighborPixelThreshold : __CODEGEN_BITFIELD(19, 22) ; //!< NEIGHBOR_PIXEL_THRESHOLD 1329 uint32_t InitialDenoiseHistory : __CODEGEN_BITFIELD(23, 28) ; //!< INITIAL_DENOISE_HISTORY 1330 uint32_t Reserved253 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1331 }; 1332 uint32_t Value; 1333 } DW7; 1334 union 1335 { 1336 //!< DWORD 8 1337 struct 1338 { 1339 uint32_t ChromaLowTemporalDifferenceThreshold : __CODEGEN_BITFIELD( 0, 5) ; //!< Chroma Low Temporal Difference Threshold 1340 uint32_t ChromaTemporalDifferenceThreshold : __CODEGEN_BITFIELD( 6, 11) ; //!< Chroma Temporal Difference Threshold 1341 uint32_t ChromaDenoiseEnable : __CODEGEN_BITFIELD(12, 12) ; //!< CHROMA_DENOISE_ENABLE 1342 uint32_t Reserved269 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1343 uint32_t ChromaDenoiseStadThreshold : __CODEGEN_BITFIELD(16, 23) ; //!< Chroma Denoise STAD Threshold 1344 uint32_t Reserved280 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 1345 }; 1346 uint32_t Value; 1347 } DW8; 1348 union 1349 { 1350 //!< DWORD 9 1351 struct 1352 { 1353 uint32_t HotPixelThreshold : __CODEGEN_BITFIELD( 0, 7) ; //!< Hot Pixel Threshold 1354 uint32_t HotPixelCount : __CODEGEN_BITFIELD( 8, 11) ; //!< Hot Pixel Count 1355 uint32_t Reserved300 : __CODEGEN_BITFIELD(12, 31) ; //!< Reserved 1356 }; 1357 uint32_t Value; 1358 } DW9; 1359 1360 //! \name Local enumerations 1361 1362 //! \brief DENOISE_HISTORY_INCREASE 1363 //! \details 1364 //! Amount that denoise_history is increased 1365 //! MAX:15 1366 enum DENOISE_HISTORY_INCREASE 1367 { 1368 DENOISE_HISTORY_INCREASE_UNNAMED8 = 8, //!< No additional details 1369 }; 1370 1371 //! \brief BLOCK_NOISE_ESTIMATE_EDGE_THRESHOLD 1372 //! \details 1373 //! Threshold for detecting an edge in block noise estimate. 1374 //! MAX:15 1375 enum BLOCK_NOISE_ESTIMATE_EDGE_THRESHOLD 1376 { 1377 BLOCK_NOISE_ESTIMATE_EDGE_THRESHOLD_UNNAMED1 = 1, //!< No additional details 1378 }; 1379 1380 enum SAD_TIGHT_THRESHOLD 1381 { 1382 SAD_TIGHT_THRESHOLD_UNNAMED5 = 5, //!< No additional details 1383 }; 1384 1385 //! \brief CONTENT_ADAPTIVE_THRESHOLD_SLOPE 1386 //! \details 1387 //! Determines the slope of the Content Adaptive Threshold. +1 added 1388 //! internally to get CAT_slope. 1389 enum CONTENT_ADAPTIVE_THRESHOLD_SLOPE 1390 { 1391 CONTENT_ADAPTIVE_THRESHOLD_SLOPE_UNNAMED9 = 9, //!< CAT_slope value = 10 1392 }; 1393 1394 //! \brief GOOD_NEIGHBOR_THRESHOLD 1395 //! \details 1396 //! Difference from current pixel for neighboring pixels to be considered a 1397 //! good neighbor. 1398 //! MAX:63 1399 enum GOOD_NEIGHBOR_THRESHOLD 1400 { 1401 GOOD_NEIGHBOR_THRESHOLD_UNNAMED4 = 4, //!< Depending on GNE of previous frame 1402 }; 1403 1404 enum BLENDING_CONSTANT_ACROSS_TIME_FOR_SMALL_VALUES_OF_STMM 1405 { 1406 BLENDING_CONSTANT_ACROSS_TIME_FOR_SMALL_VALUES_OF_STMM_UNNAMED125 = 125, //!< No additional details 1407 }; 1408 1409 enum BLENDING_CONSTANT_ACROSS_TIME_FOR_LARGE_VALUES_OF_STMM 1410 { 1411 BLENDING_CONSTANT_ACROSS_TIME_FOR_LARGE_VALUES_OF_STMM_UNNAMED64 = 64, //!< No additional details 1412 }; 1413 1414 enum STMM_BLENDING_CONSTANT_SELECT 1415 { 1416 STMM_BLENDING_CONSTANT_SELECT_USETHEBLENDINGCONSTANTFORSMALLVALUESOFSTMMFORSTMMMDTH = 0, //!< No additional details 1417 STMM_BLENDING_CONSTANT_SELECT_USETHEBLENDINGCONSTANTFORLARGEVALUESOFSTMMFORSTMMMDTH = 1, //!< No additional details 1418 }; 1419 1420 //! \brief STMM_SHIFT_UP 1421 //! \details 1422 //! Amount to shift STMM up (set range). 1423 enum STMM_SHIFT_UP 1424 { 1425 STMM_SHIFT_UP_SHIFTBY6 = 0, //!< No additional details 1426 STMM_SHIFT_UP_SHIFTBY7 = 1, //!< No additional details 1427 STMM_SHIFT_UP_SHIFTBY8 = 2, //!< No additional details 1428 }; 1429 1430 //! \brief STMM_SHIFT_DOWN 1431 //! \details 1432 //! Amount to shift STMM down (quantize to fewer bits) 1433 enum STMM_SHIFT_DOWN 1434 { 1435 STMM_SHIFT_DOWN_SHIFTBY4 = 0, //!< No additional details 1436 STMM_SHIFT_DOWN_SHIFTBY5 = 1, //!< No additional details 1437 STMM_SHIFT_DOWN_SHIFTBY6 = 2, //!< No additional details 1438 }; 1439 1440 //! \brief DNDI_TOP_FIRST 1441 //! \details 1442 //! Indicates the top field is first in sequence, otherwise bottom is first 1443 enum DNDI_TOP_FIRST 1444 { 1445 DNDI_TOP_FIRST_BOTTOMFIELDOCCURSFIRSTINSEQUENCE = 0, //!< No additional details 1446 DNDI_TOP_FIRST_TOPFIELDOCCURSFIRSTINSEQUENCE = 1, //!< No additional details 1447 }; 1448 1449 //! \brief PROGRESSIVE_DN 1450 //! \details 1451 //! Indicates that the denoise algorithm should assume progressive input 1452 //! when filtering neighboring pixels. <b>DI Enable</b> must be disabled 1453 //! when this field is enabled 1454 enum PROGRESSIVE_DN 1455 { 1456 PROGRESSIVE_DN_DNASSUMESINTERLACEDVIDEOANDFILTERSALTERNATELINESTOGETHER = 0, //!< No additional details 1457 PROGRESSIVE_DN_DNASSUMESPROGRESSIVEVIDEOANDFILTERSNEIGHBORINGLINESTOGETHER = 1, //!< No additional details 1458 }; 1459 1460 enum CAT_THRESHOLD 1461 { 1462 CAT_THRESHOLD_UNNAMED0 = 0, //!< No additional details 1463 }; 1464 1465 enum SAD_THA 1466 { 1467 SAD_THA_UNNAMED5 = 5, //!< No additional details 1468 }; 1469 1470 enum SAD_THB 1471 { 1472 SAD_THB_UNNAMED10 = 10, //!< No additional details 1473 }; 1474 1475 enum PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_1ST_FIELD_OF_CURRENT_FRAME 1476 { 1477 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_1ST_FIELD_OF_CURRENT_FRAME_DEINTERLACE = 0, //!< No additional details 1478 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_1ST_FIELD_OF_CURRENT_FRAME_PUTTOGETHERWITHPREVIOUSFIELDINSEQUENCE = 1, //!< 2nd field of previous frame 1479 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_1ST_FIELD_OF_CURRENT_FRAME_PUTTOGETHERWITHNEXTFIELDINSEQUENCE = 2, //!< 2nd field of current frame 1480 }; 1481 1482 enum MC_PIXEL_CONSISTENCY_THRESHOLD 1483 { 1484 MC_PIXEL_CONSISTENCY_THRESHOLD_UNNAMED25 = 25, //!< No additional details 1485 }; 1486 1487 enum PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_2ND_FIELD_OF_PREVIOUS_FRAME 1488 { 1489 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_2ND_FIELD_OF_PREVIOUS_FRAME_DEINTERLACE = 0, //!< No additional details 1490 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_2ND_FIELD_OF_PREVIOUS_FRAME_PUTTOGETHERWITHPREVIOUSFIELDINSEQUENCE = 1, //!< 1st field of previous frame 1491 PROGRESSIVE_CADENCE_RECONSTRUCTION_FOR_2ND_FIELD_OF_PREVIOUS_FRAME_PUTTOGETHERWITHNEXTFIELDINSEQUENCE = 2, //!< 1st field of current frame 1492 }; 1493 1494 enum NEIGHBOR_PIXEL_THRESHOLD 1495 { 1496 NEIGHBOR_PIXEL_THRESHOLD_UNNAMED10 = 10, //!< No additional details 1497 }; 1498 1499 //! \brief INITIAL_DENOISE_HISTORY 1500 //! \details 1501 //! Initial value for Denoise history for both Luma and Chroma. 1502 enum INITIAL_DENOISE_HISTORY 1503 { 1504 INITIAL_DENOISE_HISTORY_UNNAMED32 = 32, //!< No additional details 1505 }; 1506 1507 enum CHROMA_DENOISE_ENABLE 1508 { 1509 CHROMA_DENOISE_ENABLE_THEUANDVCHANNELSWILLBEPASSEDTOTHENEXTSTAGEAFTERDNUNCHANGED = 0, //!< No additional details 1510 CHROMA_DENOISE_ENABLE_THEUANDVCHROMACHANNELSWILLBEDENOISEFILTERED = 1, //!< No additional details 1511 }; 1512 1513 //! \name Initializations 1514 1515 //! \brief Explicit member initialization function 1516 VEBOX_DNDI_STATE_CMD(); 1517 1518 static const size_t dwSize = 10; 1519 static const size_t byteSize = 40; 1520 }; 1521 1522 //! 1523 //! \brief VEBOX_FRONT_END_CSC_STATE 1524 //! \details 1525 //! This state structure contains the IECP State Table Contents for 1526 //! Front-end CSC state. 1527 //! 1528 struct VEBOX_FRONT_END_CSC_STATE_CMD 1529 { 1530 union 1531 { 1532 //!< DWORD 0 1533 struct 1534 { 1535 uint32_t FfrontEndCScTransformEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< FFront End C SC Transform Enable 1536 uint32_t Reserved1 : __CODEGEN_BITFIELD( 1, 2) ; //!< Reserved 1537 uint32_t FecscC0TransformCoefficient : __CODEGEN_BITFIELD( 3, 15) ; //!< FECSC_C0_TRANSFORM_COEFFICIENT 1538 uint32_t FecscC1TransformCoefficient : __CODEGEN_BITFIELD(16, 28) ; //!< FECSC_C1_TRANSFORM_COEFFICIENT 1539 uint32_t Reserved29 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1540 }; 1541 uint32_t Value; 1542 } DW0; 1543 union 1544 { 1545 //!< DWORD 1 1546 struct 1547 { 1548 uint32_t FecScC2TransformCoefficient : __CODEGEN_BITFIELD( 0, 12) ; //!< FEC_SC_C2_TRANSFORM_COEFFICIENT 1549 uint32_t FecScC3TransformCoefficient : __CODEGEN_BITFIELD(13, 25) ; //!< FEC_SC_C3_TRANSFORM_COEFFICIENT 1550 uint32_t Reserved58 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1551 }; 1552 uint32_t Value; 1553 } DW1; 1554 union 1555 { 1556 //!< DWORD 2 1557 struct 1558 { 1559 uint32_t FecScC4TransformCoefficient : __CODEGEN_BITFIELD( 0, 12) ; //!< FEC_SC_C4_TRANSFORM_COEFFICIENT 1560 uint32_t FecScC5TransformCoefficient : __CODEGEN_BITFIELD(13, 25) ; //!< FEC_SC_C5_TRANSFORM_COEFFICIENT 1561 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1562 }; 1563 uint32_t Value; 1564 } DW2; 1565 union 1566 { 1567 //!< DWORD 3 1568 struct 1569 { 1570 uint32_t FecScC6TransformCoefficient : __CODEGEN_BITFIELD( 0, 12) ; //!< FEC_SC_C6_TRANSFORM_COEFFICIENT 1571 uint32_t FecScC7TransformCoefficient : __CODEGEN_BITFIELD(13, 25) ; //!< FEC_SC_C7_TRANSFORM_COEFFICIENT 1572 uint32_t Reserved122 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1573 }; 1574 uint32_t Value; 1575 } DW3; 1576 union 1577 { 1578 //!< DWORD 4 1579 struct 1580 { 1581 uint32_t FecScC8TransformCoefficient : __CODEGEN_BITFIELD( 0, 12) ; //!< FEC_SC_C8_TRANSFORM_COEFFICIENT 1582 uint32_t Reserved141 : __CODEGEN_BITFIELD(13, 31) ; //!< Reserved 1583 }; 1584 uint32_t Value; 1585 } DW4; 1586 union 1587 { 1588 //!< DWORD 5 1589 struct 1590 { 1591 uint32_t FecScOffsetIn1OffsetInForYR : __CODEGEN_BITFIELD( 0, 10) ; //!< FEC_SC_OFFSET_IN_1_OFFSET_IN_FOR_YR 1592 uint32_t FecScOffsetOut1OffsetOutForYR : __CODEGEN_BITFIELD(11, 21) ; //!< FEC_SC_OFFSET_OUT_1_OFFSET_OUT_FOR_YR 1593 uint32_t Reserved182 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1594 }; 1595 uint32_t Value; 1596 } DW5; 1597 union 1598 { 1599 //!< DWORD 6 1600 struct 1601 { 1602 uint32_t FecScOffsetIn2OffsetInForUG : __CODEGEN_BITFIELD( 0, 10) ; //!< FEC_SC_OFFSET_IN_2_OFFSET_IN_FOR_UG 1603 uint32_t FecScOffsetOut2OffsetOutForUG : __CODEGEN_BITFIELD(11, 21) ; //!< FEC_SC_OFFSET_OUT_2_OFFSET_OUT_FOR_UG 1604 uint32_t Reserved214 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1605 }; 1606 uint32_t Value; 1607 } DW6; 1608 union 1609 { 1610 //!< DWORD 7 1611 struct 1612 { 1613 uint32_t FecScOffsetIn3OffsetInForVB : __CODEGEN_BITFIELD( 0, 10) ; //!< FEC_SC_OFFSET_IN_3_OFFSET_IN_FOR_VB 1614 uint32_t FecScOffsetOut3OffsetOutForVB : __CODEGEN_BITFIELD(11, 21) ; //!< FEC_SC_OFFSET_OUT_3_OFFSET_OUT_FOR_VB 1615 uint32_t Reserved246 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 1616 }; 1617 uint32_t Value; 1618 } DW7; 1619 1620 //! \name Local enumerations 1621 1622 enum FECSC_C0_TRANSFORM_COEFFICIENT 1623 { 1624 FECSC_C0_TRANSFORM_COEFFICIENT_1024 = 1024, //!< No additional details 1625 }; 1626 1627 enum FECSC_C1_TRANSFORM_COEFFICIENT 1628 { 1629 FECSC_C1_TRANSFORM_COEFFICIENT_0 = 0, //!< No additional details 1630 }; 1631 1632 enum FEC_SC_C2_TRANSFORM_COEFFICIENT 1633 { 1634 FEC_SC_C2_TRANSFORM_COEFFICIENT_UNNAMED0 = 0, //!< No additional details 1635 }; 1636 1637 enum FEC_SC_C3_TRANSFORM_COEFFICIENT 1638 { 1639 FEC_SC_C3_TRANSFORM_COEFFICIENT_UNNAMED0 = 0, //!< No additional details 1640 }; 1641 1642 enum FEC_SC_C4_TRANSFORM_COEFFICIENT 1643 { 1644 FEC_SC_C4_TRANSFORM_COEFFICIENT_1024 = 1024, //!< No additional details 1645 }; 1646 1647 enum FEC_SC_C5_TRANSFORM_COEFFICIENT 1648 { 1649 FEC_SC_C5_TRANSFORM_COEFFICIENT_UNNAMED0 = 0, //!< No additional details 1650 }; 1651 1652 enum FEC_SC_C6_TRANSFORM_COEFFICIENT 1653 { 1654 FEC_SC_C6_TRANSFORM_COEFFICIENT_UNNAMED0 = 0, //!< No additional details 1655 }; 1656 1657 enum FEC_SC_C7_TRANSFORM_COEFFICIENT 1658 { 1659 FEC_SC_C7_TRANSFORM_COEFFICIENT_UNNAMED0 = 0, //!< No additional details 1660 }; 1661 1662 enum FEC_SC_C8_TRANSFORM_COEFFICIENT 1663 { 1664 FEC_SC_C8_TRANSFORM_COEFFICIENT_1024 = 1024, //!< No additional details 1665 }; 1666 1667 enum FEC_SC_OFFSET_IN_1_OFFSET_IN_FOR_YR 1668 { 1669 FEC_SC_OFFSET_IN_1_OFFSET_IN_FOR_YR_UNNAMED0 = 0, //!< No additional details 1670 }; 1671 1672 enum FEC_SC_OFFSET_OUT_1_OFFSET_OUT_FOR_YR 1673 { 1674 FEC_SC_OFFSET_OUT_1_OFFSET_OUT_FOR_YR_UNNAMED0 = 0, //!< No additional details 1675 }; 1676 1677 enum FEC_SC_OFFSET_IN_2_OFFSET_IN_FOR_UG 1678 { 1679 FEC_SC_OFFSET_IN_2_OFFSET_IN_FOR_UG_UNNAMED0 = 0, //!< No additional details 1680 }; 1681 1682 enum FEC_SC_OFFSET_OUT_2_OFFSET_OUT_FOR_UG 1683 { 1684 FEC_SC_OFFSET_OUT_2_OFFSET_OUT_FOR_UG_UNNAMED0 = 0, //!< No additional details 1685 }; 1686 1687 enum FEC_SC_OFFSET_IN_3_OFFSET_IN_FOR_VB 1688 { 1689 FEC_SC_OFFSET_IN_3_OFFSET_IN_FOR_VB_UNNAMED0 = 0, //!< No additional details 1690 }; 1691 1692 enum FEC_SC_OFFSET_OUT_3_OFFSET_OUT_FOR_VB 1693 { 1694 FEC_SC_OFFSET_OUT_3_OFFSET_OUT_FOR_VB_UNNAMED0 = 0, //!< No additional details 1695 }; 1696 1697 //! \name Initializations 1698 1699 //! \brief Explicit member initialization function 1700 VEBOX_FRONT_END_CSC_STATE_CMD(); 1701 1702 static const size_t dwSize = 8; 1703 static const size_t byteSize = 32; 1704 }; 1705 1706 //! 1707 //! \brief VEBOX_GAMUT_STATE 1708 //! \details 1709 //! 1710 //! 1711 struct VEBOX_GAMUT_STATE_CMD 1712 { 1713 union 1714 { 1715 //!< DWORD 0 1716 struct 1717 { 1718 uint32_t CmW : __CODEGEN_BITFIELD( 0, 9) ; //!< CM(w) 1719 uint32_t Reserved10 : __CODEGEN_BITFIELD(10, 14) ; //!< Reserved 1720 uint32_t GlobalModeEnable : __CODEGEN_BITFIELD(15, 15) ; //!< GLOBAL_MODE_ENABLE 1721 uint32_t AR : __CODEGEN_BITFIELD(16, 24) ; //!< AR 1722 uint32_t Reserved25 : __CODEGEN_BITFIELD(25, 31) ; //!< Reserved 1723 }; 1724 uint32_t Value; 1725 } DW0; 1726 union 1727 { 1728 //!< DWORD 1 1729 struct 1730 { 1731 uint32_t AB : __CODEGEN_BITFIELD( 0, 6) ; //!< A(b) 1732 uint32_t Reserved39 : __CODEGEN_BITFIELD( 7, 7) ; //!< Reserved 1733 uint32_t AG : __CODEGEN_BITFIELD( 8, 14) ; //!< A(g) 1734 uint32_t Reserved47 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 1735 uint32_t CmS : __CODEGEN_BITFIELD(16, 25) ; //!< CM(s) 1736 uint32_t Reserved58 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1737 }; 1738 uint32_t Value; 1739 } DW1; 1740 union 1741 { 1742 //!< DWORD 2 1743 struct 1744 { 1745 uint32_t RI : __CODEGEN_BITFIELD( 0, 7) ; //!< R(i) 1746 uint32_t CmI : __CODEGEN_BITFIELD( 8, 15) ; //!< CM(i) 1747 uint32_t RS : __CODEGEN_BITFIELD(16, 25) ; //!< R(s) 1748 uint32_t Reserved90 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1749 }; 1750 uint32_t Value; 1751 } DW2; 1752 union 1753 { 1754 //!< DWORD 3 1755 struct 1756 { 1757 uint32_t C0 : __CODEGEN_BITFIELD( 0, 14) ; //!< C0 1758 uint32_t Reserved111 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 1759 uint32_t C1 : __CODEGEN_BITFIELD(16, 30) ; //!< C1 1760 uint32_t Reserved127 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 1761 }; 1762 uint32_t Value; 1763 } DW3; 1764 union 1765 { 1766 //!< DWORD 4 1767 struct 1768 { 1769 uint32_t C2 : __CODEGEN_BITFIELD( 0, 14) ; //!< C2 1770 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 1771 uint32_t C3 : __CODEGEN_BITFIELD(16, 30) ; //!< C3 1772 uint32_t Reserved159 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 1773 }; 1774 uint32_t Value; 1775 } DW4; 1776 union 1777 { 1778 //!< DWORD 5 1779 struct 1780 { 1781 uint32_t C4 : __CODEGEN_BITFIELD( 0, 14) ; //!< C4 1782 uint32_t Reserved175 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 1783 uint32_t C5 : __CODEGEN_BITFIELD(16, 30) ; //!< C5 1784 uint32_t Reserved191 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 1785 }; 1786 uint32_t Value; 1787 } DW5; 1788 union 1789 { 1790 //!< DWORD 6 1791 struct 1792 { 1793 uint32_t C6 : __CODEGEN_BITFIELD( 0, 14) ; //!< C6 1794 uint32_t Reserved207 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 1795 uint32_t C7 : __CODEGEN_BITFIELD(16, 30) ; //!< C7 1796 uint32_t Reserved223 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 1797 }; 1798 uint32_t Value; 1799 } DW6; 1800 union 1801 { 1802 //!< DWORD 7 1803 struct 1804 { 1805 uint32_t C8 : __CODEGEN_BITFIELD( 0, 14) ; //!< C8 1806 uint32_t Reserved239 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1807 }; 1808 uint32_t Value; 1809 } DW7; 1810 union 1811 { 1812 //!< DWORD 8 1813 struct 1814 { 1815 uint32_t PwlGammaPoint1 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_POINT_1 1816 uint32_t PwlGammaPoint2 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_POINT_2 1817 uint32_t PwlGammaPoint3 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_POINT_3 1818 uint32_t PwlGammaPoint4 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_GAMMA_POINT_4 1819 }; 1820 uint32_t Value; 1821 } DW8; 1822 union 1823 { 1824 //!< DWORD 9 1825 struct 1826 { 1827 uint32_t PwlGammaPoint5 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_POINT_5 1828 uint32_t PwlGammaPoint6 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_POINT_6 1829 uint32_t PwlGammaPoint7 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_POINT_7 1830 uint32_t PwlGammaPoint8 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_GAMMA_POINT_8 1831 }; 1832 uint32_t Value; 1833 } DW9; 1834 union 1835 { 1836 //!< DWORD 10 1837 struct 1838 { 1839 uint32_t PwlGammaPoint9 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_POINT_9 1840 uint32_t PwlGammaPoint10 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_POINT_10 1841 uint32_t PwlGammaPoint11 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_POINT_11 1842 uint32_t Reserved344 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 1843 }; 1844 uint32_t Value; 1845 } DW10; 1846 union 1847 { 1848 //!< DWORD 11 1849 struct 1850 { 1851 uint32_t PwlGammaBias1 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_BIAS_1 1852 uint32_t PwlGammaBias2 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_BIAS_2 1853 uint32_t PwlGammaBias3 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_BIAS_3 1854 uint32_t PwlGammaBias4 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_GAMMA_BIAS_4 1855 }; 1856 uint32_t Value; 1857 } DW11; 1858 union 1859 { 1860 //!< DWORD 12 1861 struct 1862 { 1863 uint32_t PwlGammaBias5 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_BIAS_5 1864 uint32_t PwlGammaBias6 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_BIAS_6 1865 uint32_t PwlGammaBias7 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_BIAS_7 1866 uint32_t PwlGammaBias8 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_GAMMA_BIAS_8 1867 }; 1868 uint32_t Value; 1869 } DW12; 1870 union 1871 { 1872 //!< DWORD 13 1873 struct 1874 { 1875 uint32_t PwlGammaBias9 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_GAMMA_BIAS_9 1876 uint32_t PwlGammaBias10 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_GAMMA_BIAS_10 1877 uint32_t PwlGammaBias11 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_GAMMA_BIAS_11 1878 uint32_t Reserved440 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 1879 }; 1880 uint32_t Value; 1881 } DW13; 1882 union 1883 { 1884 //!< DWORD 14 1885 struct 1886 { 1887 uint32_t PwlGammaSlope0 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_0 1888 uint32_t Reserved460 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1889 uint32_t PwlGammaSlope1 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_1 1890 uint32_t Reserved476 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1891 }; 1892 uint32_t Value; 1893 } DW14; 1894 union 1895 { 1896 //!< DWORD 15 1897 struct 1898 { 1899 uint32_t PwlGammaSlope2 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_2 1900 uint32_t Reserved492 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1901 uint32_t PwlGammaSlope3 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_3 1902 uint32_t Reserved508 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1903 }; 1904 uint32_t Value; 1905 } DW15; 1906 union 1907 { 1908 //!< DWORD 16 1909 struct 1910 { 1911 uint32_t PwlGammaSlope4 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_4 1912 uint32_t Reserved524 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1913 uint32_t PwlGammaSlope5 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_5 1914 uint32_t Reserved540 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1915 }; 1916 uint32_t Value; 1917 } DW16; 1918 union 1919 { 1920 //!< DWORD 17 1921 struct 1922 { 1923 uint32_t PwlGammaSlope6 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_6 1924 uint32_t Reserved556 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1925 uint32_t PwlGammaSlope7 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_7 1926 uint32_t Reserved572 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1927 }; 1928 uint32_t Value; 1929 } DW17; 1930 union 1931 { 1932 //!< DWORD 18 1933 struct 1934 { 1935 uint32_t PwlGammaSlope8 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_8 1936 uint32_t Reserved588 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1937 uint32_t PwlGammaSlope9 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_9 1938 uint32_t Reserved604 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1939 }; 1940 uint32_t Value; 1941 } DW18; 1942 union 1943 { 1944 //!< DWORD 19 1945 struct 1946 { 1947 uint32_t PwlGammaSlope10 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_Gamma_ Slope_10 1948 uint32_t Reserved620 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1949 uint32_t PwlGammaSlope11 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_Gamma_ Slope_11 1950 uint32_t Reserved636 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1951 }; 1952 uint32_t Value; 1953 } DW19; 1954 union 1955 { 1956 //!< DWORD 20 1957 struct 1958 { 1959 uint32_t PwlInvGammaPoint1 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_POINT_1 1960 uint32_t PwlInvGammaPoint2 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_POINT_2 1961 uint32_t PwlInvGammaPoint3 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_POINT_3 1962 uint32_t PwlInvGammaPoint4 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_INV_GAMMA_POINT_4 1963 }; 1964 uint32_t Value; 1965 } DW20; 1966 union 1967 { 1968 //!< DWORD 21 1969 struct 1970 { 1971 uint32_t PwlInvGammaPoint5 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_POINT_5 1972 uint32_t PwlInvGammaPoint6 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_POINT_6 1973 uint32_t PwlInvGammaPoint7 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_POINT_7 1974 uint32_t PwlInvGammaPoint8 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_INV_GAMMA_POINT_8 1975 }; 1976 uint32_t Value; 1977 } DW21; 1978 union 1979 { 1980 //!< DWORD 22 1981 struct 1982 { 1983 uint32_t PwlInvGammaPoint9 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_POINT_9 1984 uint32_t PwlInvGammaPoint10 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_POINT_10 1985 uint32_t PwlInvGammaPoint11 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_POINT_11 1986 uint32_t Reserved728 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 1987 }; 1988 uint32_t Value; 1989 } DW22; 1990 union 1991 { 1992 //!< DWORD 23 1993 struct 1994 { 1995 uint32_t PwlInvGammaBias1 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_BIAS_1 1996 uint32_t PwlInvGammaBias2 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_BIAS_2 1997 uint32_t PwlInvGammaBias3 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_BIAS_3 1998 uint32_t PwlInvGammaBias4 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_INV_GAMMA_BIAS_4 1999 }; 2000 uint32_t Value; 2001 } DW23; 2002 union 2003 { 2004 //!< DWORD 24 2005 struct 2006 { 2007 uint32_t PwlInvGammaBias5 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_BIAS_5 2008 uint32_t PwlInvGammaBias6 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_BIAS_6 2009 uint32_t PwlInvGammaBias7 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_BIAS_7 2010 uint32_t PwlInvGammaBias8 : __CODEGEN_BITFIELD(24, 31) ; //!< PWL_INV_GAMMA_BIAS_8 2011 }; 2012 uint32_t Value; 2013 } DW24; 2014 union 2015 { 2016 //!< DWORD 25 2017 struct 2018 { 2019 uint32_t PwlInvGammaBias9 : __CODEGEN_BITFIELD( 0, 7) ; //!< PWL_INV_GAMMA_BIAS_9 2020 uint32_t PwlInvGammaBias10 : __CODEGEN_BITFIELD( 8, 15) ; //!< PWL_INV_GAMMA_BIAS_10 2021 uint32_t PwlInvGammaBias11 : __CODEGEN_BITFIELD(16, 23) ; //!< PWL_INV_GAMMA_BIAS_11 2022 uint32_t Reserved824 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 2023 }; 2024 uint32_t Value; 2025 } DW25; 2026 union 2027 { 2028 //!< DWORD 26 2029 struct 2030 { 2031 uint32_t PwlInvGammaSlope0 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_0 2032 uint32_t Reserved844 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2033 uint32_t PwlInvGammaSlope1 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_1 2034 uint32_t Reserved860 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2035 }; 2036 uint32_t Value; 2037 } DW26; 2038 union 2039 { 2040 //!< DWORD 27 2041 struct 2042 { 2043 uint32_t PwlInvGammaSlope2 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_2 2044 uint32_t Reserved876 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2045 uint32_t PwlInvGammaSlope3 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_3 2046 uint32_t Reserved892 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2047 }; 2048 uint32_t Value; 2049 } DW27; 2050 union 2051 { 2052 //!< DWORD 28 2053 struct 2054 { 2055 uint32_t PwlInvGammaSlope4 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_4 2056 uint32_t Reserved908 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2057 uint32_t PwlInvGammaSlope5 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_5 2058 uint32_t Reserved924 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2059 }; 2060 uint32_t Value; 2061 } DW28; 2062 union 2063 { 2064 //!< DWORD 29 2065 struct 2066 { 2067 uint32_t PwlInvGammaSlope6 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_6 2068 uint32_t Reserved940 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2069 uint32_t PwlInvGammaSlope7 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_7 2070 uint32_t Reserved956 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2071 }; 2072 uint32_t Value; 2073 } DW29; 2074 union 2075 { 2076 //!< DWORD 30 2077 struct 2078 { 2079 uint32_t PwlInvGammaSlope8 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_8 2080 uint32_t Reserved972 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2081 uint32_t PwlInvGammaSlope9 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_9 2082 uint32_t Reserved988 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2083 }; 2084 uint32_t Value; 2085 } DW30; 2086 union 2087 { 2088 //!< DWORD 31 2089 struct 2090 { 2091 uint32_t PwlInvGammaSlope10 : __CODEGEN_BITFIELD( 0, 11) ; //!< PWL_INV_GAMMA_ Slope_10 2092 uint32_t Reserved1004 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2093 uint32_t PwlInvGammaSlope11 : __CODEGEN_BITFIELD(16, 27) ; //!< PWL_INV_GAMMA_ Slope_11 2094 uint32_t Reserved1020 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2095 }; 2096 uint32_t Value; 2097 } DW31; 2098 union 2099 { 2100 //!< DWORD 32 2101 struct 2102 { 2103 uint32_t OffsetInR : __CODEGEN_BITFIELD( 0, 14) ; //!< OFFSET_IN_R 2104 uint32_t Reserved1039 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 2105 uint32_t OffsetInG : __CODEGEN_BITFIELD(16, 30) ; //!< OFFSET_IN_G 2106 uint32_t Reserved1055 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2107 }; 2108 uint32_t Value; 2109 } DW32; 2110 union 2111 { 2112 //!< DWORD 33 2113 struct 2114 { 2115 uint32_t OffsetInB : __CODEGEN_BITFIELD( 0, 14) ; //!< OFFSET_IN_B 2116 uint32_t Reserved1071 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 2117 uint32_t OffsetOutB : __CODEGEN_BITFIELD(16, 30) ; //!< Offset_out_B 2118 uint32_t Reserved1087 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2119 }; 2120 uint32_t Value; 2121 } DW33; 2122 union 2123 { 2124 //!< DWORD 34 2125 struct 2126 { 2127 uint32_t OffsetOutR : __CODEGEN_BITFIELD( 0, 14) ; //!< Offset_out_R 2128 uint32_t Reserved1103 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 2129 uint32_t OffsetOutG : __CODEGEN_BITFIELD(16, 30) ; //!< Offset_out_G 2130 uint32_t Reserved1119 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2131 }; 2132 uint32_t Value; 2133 } DW34; 2134 union 2135 { 2136 //!< DWORD 35 2137 struct 2138 { 2139 uint32_t D1Out : __CODEGEN_BITFIELD( 0, 9) ; //!< D1OUT 2140 uint32_t DOutDefault : __CODEGEN_BITFIELD(10, 19) ; //!< DOUT_DEFAULT 2141 uint32_t DInDefault : __CODEGEN_BITFIELD(20, 29) ; //!< DINDEFAULT 2142 uint32_t Fullrangemappingenable : __CODEGEN_BITFIELD(30, 30) ; //!< FULLRANGEMAPPINGENABLE 2143 uint32_t Reserved1151 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2144 }; 2145 uint32_t Value; 2146 } DW35; 2147 union 2148 { 2149 //!< DWORD 36 2150 struct 2151 { 2152 uint32_t D1In : __CODEGEN_BITFIELD( 0, 9) ; //!< D1IN 2153 uint32_t Reserved1162 : __CODEGEN_BITFIELD(10, 27) ; //!< Reserved 2154 uint32_t Compressionlineshift : __CODEGEN_BITFIELD(28, 30) ; //!< COMPRESSIONLINESHIFT 2155 uint32_t Xvyccdecencenable : __CODEGEN_BITFIELD(31, 31) ; //!< XVYCCDECENCENABLE 2156 }; 2157 uint32_t Value; 2158 } DW36; 2159 union 2160 { 2161 //!< DWORD 37 2162 struct 2163 { 2164 uint32_t CpiOverride : __CODEGEN_BITFIELD( 0, 0) ; //!< CPI_OVERRIDE 2165 uint32_t Reserved1185 : __CODEGEN_BITFIELD( 1, 10) ; //!< Reserved 2166 uint32_t Basicmodescalingfactor : __CODEGEN_BITFIELD(11, 24) ; //!< BasicModeScalingFactor 2167 uint32_t Reserved1209 : __CODEGEN_BITFIELD(25, 28) ; //!< Reserved 2168 uint32_t Lumachormaonlycorrection : __CODEGEN_BITFIELD(29, 29) ; //!< LUMACHORMAONLYCORRECTION 2169 uint32_t GccBasicmodeselection : __CODEGEN_BITFIELD(30, 31) ; //!< GCC_BASICMODESELECTION 2170 }; 2171 uint32_t Value; 2172 } DW37; 2173 2174 //! \name Local enumerations 2175 2176 //! \brief GLOBAL_MODE_ENABLE 2177 //! \details 2178 //! The gain factor derived from state CM(w) 2179 enum GLOBAL_MODE_ENABLE 2180 { 2181 GLOBAL_MODE_ENABLE_ADVANCEMODE = 0, //!< No additional details 2182 GLOBAL_MODE_ENABLE_BASICMODE = 1, //!< No additional details 2183 }; 2184 2185 //! \brief AR 2186 //! \details 2187 //! Gain_factor_R (default: 436, preferred range: 256-511) 2188 enum AR 2189 { 2190 AR_UNNAMED436 = 436, //!< No additional details 2191 }; 2192 2193 //! \brief PWL_GAMMA_POINT_1 2194 //! \details 2195 //! Point 1 for PWL for gamma correction 2196 enum PWL_GAMMA_POINT_1 2197 { 2198 PWL_GAMMA_POINT_1_UNNAMED1 = 1, //!< No additional details 2199 }; 2200 2201 //! \brief PWL_GAMMA_POINT_2 2202 //! \details 2203 //! Point 2 for PWL for gamma correction 2204 enum PWL_GAMMA_POINT_2 2205 { 2206 PWL_GAMMA_POINT_2_UNNAMED2 = 2, //!< No additional details 2207 }; 2208 2209 //! \brief PWL_GAMMA_POINT_3 2210 //! \details 2211 //! Point 3 for PWL for gamma correction 2212 enum PWL_GAMMA_POINT_3 2213 { 2214 PWL_GAMMA_POINT_3_UNNAMED5 = 5, //!< No additional details 2215 }; 2216 2217 //! \brief PWL_GAMMA_POINT_4 2218 //! \details 2219 //! Point 4 for PWL for gamma correction 2220 enum PWL_GAMMA_POINT_4 2221 { 2222 PWL_GAMMA_POINT_4_UNNAMED9 = 9, //!< No additional details 2223 }; 2224 2225 //! \brief PWL_GAMMA_POINT_5 2226 //! \details 2227 //! Point 5 for PWL for gamma correction 2228 enum PWL_GAMMA_POINT_5 2229 { 2230 PWL_GAMMA_POINT_5_UNNAMED16 = 16, //!< No additional details 2231 }; 2232 2233 //! \brief PWL_GAMMA_POINT_6 2234 //! \details 2235 //! Point 6 for PWL for gamma correction 2236 enum PWL_GAMMA_POINT_6 2237 { 2238 PWL_GAMMA_POINT_6_UNNAMED26 = 26, //!< No additional details 2239 }; 2240 2241 //! \brief PWL_GAMMA_POINT_7 2242 //! \details 2243 //! Point 7 for PWL for gamma correction 2244 enum PWL_GAMMA_POINT_7 2245 { 2246 PWL_GAMMA_POINT_7_UNNAMED42 = 42, //!< No additional details 2247 }; 2248 2249 //! \brief PWL_GAMMA_POINT_8 2250 //! \details 2251 //! Point 8 for PWL for gamma correction 2252 enum PWL_GAMMA_POINT_8 2253 { 2254 PWL_GAMMA_POINT_8_UNNAMED65 = 65, //!< No additional details 2255 }; 2256 2257 //! \brief PWL_GAMMA_POINT_9 2258 //! \details 2259 //! Point 9 for PWL for gamma correction 2260 enum PWL_GAMMA_POINT_9 2261 { 2262 PWL_GAMMA_POINT_9_UNNAMED96 = 96, //!< No additional details 2263 }; 2264 2265 //! \brief PWL_GAMMA_POINT_10 2266 //! \details 2267 //! Point 10 for PWL for gamma correction 2268 enum PWL_GAMMA_POINT_10 2269 { 2270 PWL_GAMMA_POINT_10_UNNAMED136 = 136, //!< No additional details 2271 }; 2272 2273 //! \brief PWL_GAMMA_POINT_11 2274 //! \details 2275 //! Point 11 for PWL for gamma correction 2276 enum PWL_GAMMA_POINT_11 2277 { 2278 PWL_GAMMA_POINT_11_UNNAMED187 = 187, //!< No additional details 2279 }; 2280 2281 //! \brief PWL_GAMMA_BIAS_1 2282 //! \details 2283 //! Bias 1 for PWL for gamma correction 2284 enum PWL_GAMMA_BIAS_1 2285 { 2286 PWL_GAMMA_BIAS_1_UNNAMED13 = 13, //!< No additional details 2287 }; 2288 2289 //! \brief PWL_GAMMA_BIAS_2 2290 //! \details 2291 //! Bias 2 for PWL for gamma correction 2292 enum PWL_GAMMA_BIAS_2 2293 { 2294 PWL_GAMMA_BIAS_2_UNNAMED23 = 23, //!< No additional details 2295 }; 2296 2297 //! \brief PWL_GAMMA_BIAS_3 2298 //! \details 2299 //! Bias 3 for PWL for gamma correction 2300 enum PWL_GAMMA_BIAS_3 2301 { 2302 PWL_GAMMA_BIAS_3_UNNAMED38 = 38, //!< No additional details 2303 }; 2304 2305 //! \brief PWL_GAMMA_BIAS_4 2306 //! \details 2307 //! Bias 4 for PWL for gamma correction 2308 enum PWL_GAMMA_BIAS_4 2309 { 2310 PWL_GAMMA_BIAS_4_UNNAMED53 = 53, //!< No additional details 2311 }; 2312 2313 //! \brief PWL_GAMMA_BIAS_5 2314 //! \details 2315 //! Bias 5 for PWL for gamma correction 2316 enum PWL_GAMMA_BIAS_5 2317 { 2318 PWL_GAMMA_BIAS_5_UNNAMED71 = 71, //!< No additional details 2319 }; 2320 2321 //! \brief PWL_GAMMA_BIAS_6 2322 //! \details 2323 //! Bias 6 for PWL for gamma correction 2324 enum PWL_GAMMA_BIAS_6 2325 { 2326 PWL_GAMMA_BIAS_6_UNNAMED91 = 91, //!< No additional details 2327 }; 2328 2329 //! \brief PWL_GAMMA_BIAS_7 2330 //! \details 2331 //! Bias 7 for PWL for gamma correction 2332 enum PWL_GAMMA_BIAS_7 2333 { 2334 PWL_GAMMA_BIAS_7_UNNAMED114 = 114, //!< No additional details 2335 }; 2336 2337 //! \brief PWL_GAMMA_BIAS_8 2338 //! \details 2339 //! Bias 8 for PWL for gamma correction 2340 enum PWL_GAMMA_BIAS_8 2341 { 2342 PWL_GAMMA_BIAS_8_UNNAMED139 = 139, //!< No additional details 2343 }; 2344 2345 //! \brief PWL_GAMMA_BIAS_9 2346 //! \details 2347 //! Bias 9 for PWL for gamma correction 2348 enum PWL_GAMMA_BIAS_9 2349 { 2350 PWL_GAMMA_BIAS_9_UNNAMED165 = 165, //!< No additional details 2351 }; 2352 2353 //! \brief PWL_GAMMA_BIAS_10 2354 //! \details 2355 //! Bias 10 for PWL for gamma correction 2356 enum PWL_GAMMA_BIAS_10 2357 { 2358 PWL_GAMMA_BIAS_10_UNNAMED193 = 193, //!< No additional details 2359 }; 2360 2361 //! \brief PWL_GAMMA_BIAS_11 2362 //! \details 2363 //! Bias 11 for PWL for gamma correction 2364 enum PWL_GAMMA_BIAS_11 2365 { 2366 PWL_GAMMA_BIAS_11_UNNAMED223 = 223, //!< No additional details 2367 }; 2368 2369 //! \brief PWL_INV_GAMMA_POINT_1 2370 //! \details 2371 //! Point 1 for PWL for inverse gamma correction 2372 enum PWL_INV_GAMMA_POINT_1 2373 { 2374 PWL_INV_GAMMA_POINT_1_UNNAMED30 = 30, //!< No additional details 2375 }; 2376 2377 //! \brief PWL_INV_GAMMA_POINT_2 2378 //! \details 2379 //! Point 2 for PWL for inverse gamma correction 2380 enum PWL_INV_GAMMA_POINT_2 2381 { 2382 PWL_INV_GAMMA_POINT_2_UNNAMED55 = 55, //!< No additional details 2383 }; 2384 2385 //! \brief PWL_INV_GAMMA_POINT_3 2386 //! \details 2387 //! Point 3 for PWL for inverse gamma correction 2388 enum PWL_INV_GAMMA_POINT_3 2389 { 2390 PWL_INV_GAMMA_POINT_3_UNNAMED79 = 79, //!< No additional details 2391 }; 2392 2393 //! \brief PWL_INV_GAMMA_POINT_4 2394 //! \details 2395 //! Point 4 for PWL for inverse gamma correction 2396 enum PWL_INV_GAMMA_POINT_4 2397 { 2398 PWL_INV_GAMMA_POINT_4_UNNAMED101 = 101, //!< No additional details 2399 }; 2400 2401 //! \brief PWL_INV_GAMMA_POINT_5 2402 //! \details 2403 //! Point 5 for PWL for inverse gamma correction 2404 enum PWL_INV_GAMMA_POINT_5 2405 { 2406 PWL_INV_GAMMA_POINT_5_UNNAMED122 = 122, //!< No additional details 2407 }; 2408 2409 //! \brief PWL_INV_GAMMA_POINT_6 2410 //! \details 2411 //! Point 6 for PWL for inverse gamma correction 2412 enum PWL_INV_GAMMA_POINT_6 2413 { 2414 PWL_INV_GAMMA_POINT_6_UNNAMED141 = 141, //!< No additional details 2415 }; 2416 2417 //! \brief PWL_INV_GAMMA_POINT_7 2418 //! \details 2419 //! Point 7 for PWL for inverse gamma correction 2420 enum PWL_INV_GAMMA_POINT_7 2421 { 2422 PWL_INV_GAMMA_POINT_7_UNNAMED162 = 162, //!< No additional details 2423 }; 2424 2425 //! \brief PWL_INV_GAMMA_POINT_8 2426 //! \details 2427 //! Point 8 for PWL for inverse gamma correction 2428 enum PWL_INV_GAMMA_POINT_8 2429 { 2430 PWL_INV_GAMMA_POINT_8_UNNAMED181 = 181, //!< No additional details 2431 }; 2432 2433 //! \brief PWL_INV_GAMMA_POINT_9 2434 //! \details 2435 //! Point 9 for PWL for inverse gamma correction 2436 enum PWL_INV_GAMMA_POINT_9 2437 { 2438 PWL_INV_GAMMA_POINT_9_UNNAMED200 = 200, //!< No additional details 2439 }; 2440 2441 //! \brief PWL_INV_GAMMA_POINT_10 2442 //! \details 2443 //! Point 10 for PWL for inverse gamma correction 2444 enum PWL_INV_GAMMA_POINT_10 2445 { 2446 PWL_INV_GAMMA_POINT_10_UNNAMED219 = 219, //!< No additional details 2447 }; 2448 2449 //! \brief PWL_INV_GAMMA_POINT_11 2450 //! \details 2451 //! Point 11 for PWL for inverse gamma correction 2452 enum PWL_INV_GAMMA_POINT_11 2453 { 2454 PWL_INV_GAMMA_POINT_11_UNNAMED237 = 237, //!< No additional details 2455 }; 2456 2457 //! \brief PWL_INV_GAMMA_BIAS_1 2458 //! \details 2459 //! Bias 1 for PWL for inverse gamma correction 2460 enum PWL_INV_GAMMA_BIAS_1 2461 { 2462 PWL_INV_GAMMA_BIAS_1_UNNAMED3 = 3, //!< No additional details 2463 }; 2464 2465 //! \brief PWL_INV_GAMMA_BIAS_2 2466 //! \details 2467 //! Bias 2 for PWL for inverse gamma correction 2468 enum PWL_INV_GAMMA_BIAS_2 2469 { 2470 PWL_INV_GAMMA_BIAS_2_UNNAMED10 = 10, //!< No additional details 2471 }; 2472 2473 //! \brief PWL_INV_GAMMA_BIAS_3 2474 //! \details 2475 //! Bias 3 for PWL for inverse gamma correction 2476 enum PWL_INV_GAMMA_BIAS_3 2477 { 2478 PWL_INV_GAMMA_BIAS_3_UNNAMED20 = 20, //!< No additional details 2479 }; 2480 2481 //! \brief PWL_INV_GAMMA_BIAS_4 2482 //! \details 2483 //! Bias 4 for PWL for inverse gamma correction 2484 enum PWL_INV_GAMMA_BIAS_4 2485 { 2486 PWL_INV_GAMMA_BIAS_4_UNNAMED33 = 33, //!< No additional details 2487 }; 2488 2489 //! \brief PWL_INV_GAMMA_BIAS_5 2490 //! \details 2491 //! Bias 5 for PWL for inverse gamma correction 2492 enum PWL_INV_GAMMA_BIAS_5 2493 { 2494 PWL_INV_GAMMA_BIAS_5_UNNAMED49 = 49, //!< No additional details 2495 }; 2496 2497 //! \brief PWL_INV_GAMMA_BIAS_6 2498 //! \details 2499 //! Bias 6 for PWL for inverse gamma correction 2500 enum PWL_INV_GAMMA_BIAS_6 2501 { 2502 PWL_INV_GAMMA_BIAS_6_UNNAMED67 = 67, //!< No additional details 2503 }; 2504 2505 //! \brief PWL_INV_GAMMA_BIAS_7 2506 //! \details 2507 //! Bias 7 for PWL for inverse gamma correction 2508 enum PWL_INV_GAMMA_BIAS_7 2509 { 2510 PWL_INV_GAMMA_BIAS_7_UNNAMED92 = 92, //!< No additional details 2511 }; 2512 2513 //! \brief PWL_INV_GAMMA_BIAS_8 2514 //! \details 2515 //! Bias 8 for PWL for inverse gamma correction 2516 enum PWL_INV_GAMMA_BIAS_8 2517 { 2518 PWL_INV_GAMMA_BIAS_8_UNNAMED117 = 117, //!< No additional details 2519 }; 2520 2521 //! \brief PWL_INV_GAMMA_BIAS_9 2522 //! \details 2523 //! Bias 9 for PWL for inverse gamma correction 2524 enum PWL_INV_GAMMA_BIAS_9 2525 { 2526 PWL_INV_GAMMA_BIAS_9_UNNAMED147 = 147, //!< No additional details 2527 }; 2528 2529 //! \brief PWL_INV_GAMMA_BIAS_10 2530 //! \details 2531 //! Bias 10 for PWL for inverse gamma correction 2532 enum PWL_INV_GAMMA_BIAS_10 2533 { 2534 PWL_INV_GAMMA_BIAS_10_UNNAMED180 = 180, //!< No additional details 2535 }; 2536 2537 //! \brief PWL_INV_GAMMA_BIAS_11 2538 //! \details 2539 //! Bias 11 for PWL for inverse gamma correction 2540 enum PWL_INV_GAMMA_BIAS_11 2541 { 2542 PWL_INV_GAMMA_BIAS_11_UNNAMED215 = 215, //!< No additional details 2543 }; 2544 2545 //! \brief OFFSET_IN_R 2546 //! \details 2547 //! The input offset for red component 2548 enum OFFSET_IN_R 2549 { 2550 OFFSET_IN_R_UNNAMED0 = 0, //!< No additional details 2551 }; 2552 2553 //! \brief OFFSET_IN_G 2554 //! \details 2555 //! The input offset for green component 2556 enum OFFSET_IN_G 2557 { 2558 OFFSET_IN_G_UNNAMED0 = 0, //!< No additional details 2559 }; 2560 2561 //! \brief OFFSET_IN_B 2562 //! \details 2563 //! The input offset for red component 2564 enum OFFSET_IN_B 2565 { 2566 OFFSET_IN_B_UNNAMED0 = 0, //!< No additional details 2567 }; 2568 2569 //! \brief D1OUT 2570 //! \details 2571 //! OuterTriangleMappingLengthBelow 2572 enum D1OUT 2573 { 2574 D1OUT_UNNAMED287 = 287, //!< No additional details 2575 }; 2576 2577 //! \brief DOUT_DEFAULT 2578 //! \details 2579 //! OuterTriangleMappingLength 2580 enum DOUT_DEFAULT 2581 { 2582 DOUT_DEFAULT_UNNAMED164 = 164, //!< No additional details 2583 }; 2584 2585 //! \brief DINDEFAULT 2586 //! \details 2587 //! InnerTriangleMappingLength 2588 enum DINDEFAULT 2589 { 2590 DINDEFAULT_UNNAMED205 = 205, //!< No additional details 2591 }; 2592 2593 enum FULLRANGEMAPPINGENABLE 2594 { 2595 FULLRANGEMAPPINGENABLE_BASICMODE = 0, //!< No additional details 2596 FULLRANGEMAPPINGENABLE_ADVANCEMODE = 1, //!< No additional details 2597 }; 2598 2599 //! \brief D1IN 2600 //! \details 2601 //! InnerTriangleMappingLengthBelow 2602 enum D1IN 2603 { 2604 D1IN_UNNAMED820 = 820, //!< No additional details 2605 }; 2606 2607 enum COMPRESSIONLINESHIFT 2608 { 2609 COMPRESSIONLINESHIFT_UNNAMED3 = 3, //!< No additional details 2610 }; 2611 2612 //! \brief XVYCCDECENCENABLE 2613 //! \details 2614 //! This bit is valid only when ColorGamutCompressionnEnable is on. 2615 enum XVYCCDECENCENABLE 2616 { 2617 XVYCCDECENCENABLE_TODISABLEBOTHXVYCCDECODEANDXVYCCENCODE = 0, //!< No additional details 2618 XVYCCDECENCENABLE_BOTHXVYCCDECODEANDXVYCCENCODEAREENABLED = 1, //!< No additional details 2619 }; 2620 2621 enum CPI_OVERRIDE 2622 { 2623 CPI_OVERRIDE_UNNAMED0 = 0, //!< No additional details 2624 CPI_OVERRIDE_OVERRIDECPICALCULATION = 1, //!< No additional details 2625 }; 2626 2627 enum LUMACHORMAONLYCORRECTION 2628 { 2629 LUMACHORMAONLYCORRECTION_LUMAONLYCORRECTION = 0, //!< No additional details 2630 LUMACHORMAONLYCORRECTION_CHORMAONLYCORRECTION = 1, //!< No additional details 2631 }; 2632 2633 enum GCC_BASICMODESELECTION 2634 { 2635 GCC_BASICMODESELECTION_DEFAULT = 0, //!< No additional details 2636 GCC_BASICMODESELECTION_SCALINGFACTOR = 1, //!< Used along with Dword66 Bits 28:11 2637 GCC_BASICMODESELECTION_SINGLEAXISGAMMACORRECTION = 2, //!< Used along with Dword67 Bit 29 2638 GCC_BASICMODESELECTION_SCALINGFACTORWITHFIXEDLUMA = 3, //!< Used along with Dword37 Bits 28:11 2639 }; 2640 2641 //! \name Initializations 2642 2643 //! \brief Explicit member initialization function 2644 VEBOX_GAMUT_STATE_CMD(); 2645 2646 static const size_t dwSize = 38; 2647 static const size_t byteSize = 152; 2648 }; 2649 2650 //! 2651 //! \brief VEBOX_STD_STE_STATE 2652 //! \details 2653 //! This state structure contains the state used by the STD/STE function. 2654 //! 2655 struct VEBOX_STD_STE_STATE_CMD 2656 { 2657 union 2658 { 2659 struct 2660 { 2661 uint32_t StdEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< STD Enable 2662 uint32_t SteEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< STE Enable 2663 uint32_t OutputControl : __CODEGEN_BITFIELD( 2, 2) ; //!< OUTPUT_CONTROL 2664 uint32_t Reserved3 : __CODEGEN_BITFIELD( 3, 3) ; //!< Reserved 2665 uint32_t SatMax : __CODEGEN_BITFIELD( 4, 9) ; //!< SAT_MAX 2666 uint32_t HueMax : __CODEGEN_BITFIELD(10, 15) ; //!< HUE_MAX 2667 uint32_t UMid : __CODEGEN_BITFIELD(16, 23) ; //!< U_MID 2668 uint32_t VMid : __CODEGEN_BITFIELD(24, 31) ; //!< V_MID 2669 }; 2670 uint32_t Value; 2671 } DW0; 2672 union 2673 { 2674 struct 2675 { 2676 uint32_t Sin : __CODEGEN_BITFIELD( 0, 7) ; //!< SIN 2677 uint32_t Reserved40 : __CODEGEN_BITFIELD( 8, 9) ; //!< Reserved 2678 uint32_t Cos : __CODEGEN_BITFIELD(10, 17) ; //!< COS 2679 uint32_t HsMargin : __CODEGEN_BITFIELD(18, 20) ; //!< HS_MARGIN 2680 uint32_t DiamondDu : __CODEGEN_BITFIELD(21, 27) ; //!< DIAMOND_DU 2681 uint32_t DiamondMargin : __CODEGEN_BITFIELD(28, 30) ; //!< DIAMOND_MARGIN 2682 uint32_t Reserved63 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2683 }; 2684 uint32_t Value; 2685 } DW1; 2686 union 2687 { 2688 struct 2689 { 2690 uint32_t DiamondDv : __CODEGEN_BITFIELD( 0, 6) ; //!< DIAMOND_DV 2691 uint32_t DiamondTh : __CODEGEN_BITFIELD( 7, 12) ; //!< DIAMOND_TH 2692 uint32_t DiamondAlpha : __CODEGEN_BITFIELD(13, 20) ; //!< DIAMOND_ALPHA 2693 uint32_t Reserved85 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 2694 }; 2695 uint32_t Value; 2696 } DW2; 2697 union 2698 { 2699 struct 2700 { 2701 uint32_t Reserved96 : __CODEGEN_BITFIELD( 0, 6) ; //!< Reserved 2702 uint32_t VyStdEnable : __CODEGEN_BITFIELD( 7, 7) ; //!< VY_STD_Enable 2703 uint32_t YPoint1 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y_POINT_1 2704 uint32_t YPoint2 : __CODEGEN_BITFIELD(16, 23) ; //!< Y_POINT_2 2705 uint32_t YPoint3 : __CODEGEN_BITFIELD(24, 31) ; //!< Y_POINT_3 2706 }; 2707 uint32_t Value; 2708 } DW3; 2709 union 2710 { 2711 struct 2712 { 2713 uint32_t YPoint4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Y_POINT_4 2714 uint32_t YSlope1 : __CODEGEN_BITFIELD( 8, 12) ; //!< Y_SLOPE_1 2715 uint32_t YSlope2 : __CODEGEN_BITFIELD(13, 17) ; //!< Y_SLOPE_2 2716 uint32_t Reserved146 : __CODEGEN_BITFIELD(18, 31) ; //!< Reserved 2717 }; 2718 uint32_t Value; 2719 } DW4; 2720 union 2721 { 2722 struct 2723 { 2724 uint32_t InvMarginVyl : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_Margin_VYL 2725 uint32_t InvSkinTypesMargin : __CODEGEN_BITFIELD(16, 31) ; //!< INV_SKIN_TYPES_MARGIN 2726 }; 2727 uint32_t Value; 2728 } DW5; 2729 union 2730 { 2731 struct 2732 { 2733 uint32_t InvMarginVyu : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_MARGIN_VYU 2734 uint32_t P0L : __CODEGEN_BITFIELD(16, 23) ; //!< P0L 2735 uint32_t P1L : __CODEGEN_BITFIELD(24, 31) ; //!< P1L 2736 }; 2737 uint32_t Value; 2738 } DW6; 2739 union 2740 { 2741 struct 2742 { 2743 uint32_t P2L : __CODEGEN_BITFIELD( 0, 7) ; //!< P2L 2744 uint32_t P3L : __CODEGEN_BITFIELD( 8, 15) ; //!< P3L 2745 uint32_t B0L : __CODEGEN_BITFIELD(16, 23) ; //!< B0L 2746 uint32_t B1L : __CODEGEN_BITFIELD(24, 31) ; //!< B1L 2747 }; 2748 uint32_t Value; 2749 } DW7; 2750 union 2751 { 2752 struct 2753 { 2754 uint32_t B2L : __CODEGEN_BITFIELD( 0, 7) ; //!< B2L 2755 uint32_t B3L : __CODEGEN_BITFIELD( 8, 15) ; //!< B3L 2756 uint32_t S0L : __CODEGEN_BITFIELD(16, 26) ; //!< S0L 2757 uint32_t Reserved283 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 2758 }; 2759 uint32_t Value; 2760 } DW8; 2761 union 2762 { 2763 struct 2764 { 2765 uint32_t S1L : __CODEGEN_BITFIELD( 0, 10) ; //!< S1L 2766 uint32_t S2L : __CODEGEN_BITFIELD(11, 21) ; //!< S2L 2767 uint32_t Reserved310 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2768 }; 2769 uint32_t Value; 2770 } DW9; 2771 union 2772 { 2773 struct 2774 { 2775 uint32_t S3L : __CODEGEN_BITFIELD( 0, 10) ; //!< S3L 2776 uint32_t P0U : __CODEGEN_BITFIELD(11, 18) ; //!< P0U 2777 uint32_t P1U : __CODEGEN_BITFIELD(19, 26) ; //!< P1U 2778 uint32_t Reserved347 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 2779 }; 2780 uint32_t Value; 2781 } DW10; 2782 union 2783 { 2784 struct 2785 { 2786 uint32_t P2U : __CODEGEN_BITFIELD( 0, 7) ; //!< P2U 2787 uint32_t P3U : __CODEGEN_BITFIELD( 8, 15) ; //!< P3U 2788 uint32_t B0U : __CODEGEN_BITFIELD(16, 23) ; //!< B0U 2789 uint32_t B1U : __CODEGEN_BITFIELD(24, 31) ; //!< B1U 2790 }; 2791 uint32_t Value; 2792 } DW11; 2793 union 2794 { 2795 struct 2796 { 2797 uint32_t B2U : __CODEGEN_BITFIELD( 0, 7) ; //!< B2U 2798 uint32_t B3U : __CODEGEN_BITFIELD( 8, 15) ; //!< B3U 2799 uint32_t S0U : __CODEGEN_BITFIELD(16, 26) ; //!< S0U 2800 uint32_t Reserved411 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 2801 }; 2802 uint32_t Value; 2803 } DW12; 2804 union 2805 { 2806 struct 2807 { 2808 uint32_t S1U : __CODEGEN_BITFIELD( 0, 10) ; //!< S1U 2809 uint32_t S2U : __CODEGEN_BITFIELD(11, 21) ; //!< S2U 2810 uint32_t Reserved438 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2811 }; 2812 uint32_t Value; 2813 } DW13; 2814 union 2815 { 2816 struct 2817 { 2818 uint32_t S3U : __CODEGEN_BITFIELD( 0, 10) ; //!< S3U 2819 uint32_t SkinTypesEnable : __CODEGEN_BITFIELD(11, 11) ; //!< SKIN_TYPES_ENABLE 2820 uint32_t SkinTypesThresh : __CODEGEN_BITFIELD(12, 19) ; //!< SKIN_TYPES_THRESH 2821 uint32_t SkinTypesMargin : __CODEGEN_BITFIELD(20, 27) ; //!< SKIN_TYPES_MARGIN 2822 uint32_t Reserved476 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 2823 }; 2824 uint32_t Value; 2825 } DW14; 2826 union 2827 { 2828 struct 2829 { 2830 uint32_t Satp1 : __CODEGEN_BITFIELD( 0, 6) ; //!< SATP1 2831 uint32_t Satp2 : __CODEGEN_BITFIELD( 7, 13) ; //!< SATP2 2832 uint32_t Satp3 : __CODEGEN_BITFIELD(14, 20) ; //!< SATP3 2833 uint32_t Satb1 : __CODEGEN_BITFIELD(21, 30) ; //!< SATB1 2834 uint32_t Reserved511 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2835 }; 2836 uint32_t Value; 2837 } DW15; 2838 union 2839 { 2840 struct 2841 { 2842 uint32_t Satb2 : __CODEGEN_BITFIELD( 0, 9) ; //!< SATB2 2843 uint32_t Satb3 : __CODEGEN_BITFIELD(10, 19) ; //!< SATB3 2844 uint32_t Sats0 : __CODEGEN_BITFIELD(20, 30) ; //!< SATS0 2845 uint32_t Reserved543 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2846 }; 2847 uint32_t Value; 2848 } DW16; 2849 union 2850 { 2851 struct 2852 { 2853 uint32_t Sats1 : __CODEGEN_BITFIELD( 0, 10) ; //!< SATS1 2854 uint32_t Sats2 : __CODEGEN_BITFIELD(11, 21) ; //!< SATS2 2855 uint32_t Reserved566 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2856 }; 2857 uint32_t Value; 2858 } DW17; 2859 union 2860 { 2861 struct 2862 { 2863 uint32_t Sats3 : __CODEGEN_BITFIELD( 0, 10) ; //!< SATS3 2864 uint32_t Huep1 : __CODEGEN_BITFIELD(11, 17) ; //!< HUEP1 2865 uint32_t Huep2 : __CODEGEN_BITFIELD(18, 24) ; //!< HUEP2 2866 uint32_t Huep3 : __CODEGEN_BITFIELD(25, 31) ; //!< HUEP3 2867 }; 2868 uint32_t Value; 2869 } DW18; 2870 union 2871 { 2872 struct 2873 { 2874 uint32_t Hueb1 : __CODEGEN_BITFIELD( 0, 9) ; //!< HUEB1 2875 uint32_t Hueb2 : __CODEGEN_BITFIELD(10, 19) ; //!< HUEB2 2876 uint32_t Hueb3 : __CODEGEN_BITFIELD(20, 29) ; //!< HUEB3 2877 uint32_t Reserved638 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 2878 }; 2879 uint32_t Value; 2880 } DW19; 2881 union 2882 { 2883 struct 2884 { 2885 uint32_t Hues0 : __CODEGEN_BITFIELD( 0, 10) ; //!< HUES0 2886 uint32_t Hues1 : __CODEGEN_BITFIELD(11, 21) ; //!< HUES1 2887 uint32_t Reserved662 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2888 }; 2889 uint32_t Value; 2890 } DW20; 2891 union 2892 { 2893 struct 2894 { 2895 uint32_t Hues2 : __CODEGEN_BITFIELD( 0, 10) ; //!< HUES2 2896 uint32_t Hues3 : __CODEGEN_BITFIELD(11, 21) ; //!< HUES3 2897 uint32_t Reserved694 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2898 }; 2899 uint32_t Value; 2900 } DW21; 2901 union 2902 { 2903 struct 2904 { 2905 uint32_t Satp1Dark : __CODEGEN_BITFIELD( 0, 6) ; //!< SATP1_DARK 2906 uint32_t Satp2Dark : __CODEGEN_BITFIELD( 7, 13) ; //!< SATP2_DARK 2907 uint32_t Satp3Dark : __CODEGEN_BITFIELD(14, 20) ; //!< SATP3_DARK 2908 uint32_t Satb1Dark : __CODEGEN_BITFIELD(21, 30) ; //!< SATB1_DARK 2909 uint32_t Reserved735 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2910 }; 2911 uint32_t Value; 2912 } DW22; 2913 union 2914 { 2915 struct 2916 { 2917 uint32_t Satb2Dark : __CODEGEN_BITFIELD( 0, 9) ; //!< SATB2_DARK 2918 uint32_t Satb3Dark : __CODEGEN_BITFIELD(10, 19) ; //!< SATB3_DARK 2919 uint32_t Sats0Dark : __CODEGEN_BITFIELD(20, 30) ; //!< SATS0_DARK 2920 uint32_t Reserved767 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 2921 }; 2922 uint32_t Value; 2923 } DW23; 2924 union 2925 { 2926 struct 2927 { 2928 uint32_t Sats1Dark : __CODEGEN_BITFIELD( 0, 10) ; //!< SATS1_DARK 2929 uint32_t Sats2Dark : __CODEGEN_BITFIELD(11, 21) ; //!< SATS2_DARK 2930 uint32_t Reserved790 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2931 }; 2932 uint32_t Value; 2933 } DW24; 2934 union 2935 { 2936 struct 2937 { 2938 uint32_t Sats3Dark : __CODEGEN_BITFIELD( 0, 10) ; //!< SATS3_DARK 2939 uint32_t Huep1Dark : __CODEGEN_BITFIELD(11, 17) ; //!< HUEP1_DARK 2940 uint32_t Huep2Dark : __CODEGEN_BITFIELD(18, 24) ; //!< HUEP2_DARK 2941 uint32_t Huep3Dark : __CODEGEN_BITFIELD(25, 31) ; //!< HUEP3_DARK 2942 }; 2943 uint32_t Value; 2944 } DW25; 2945 union 2946 { 2947 struct 2948 { 2949 uint32_t Hueb1Dark : __CODEGEN_BITFIELD( 0, 9) ; //!< HUEB1_DARK 2950 uint32_t Hueb2Dark : __CODEGEN_BITFIELD(10, 19) ; //!< HUEB2_DARK 2951 uint32_t Hueb3Dark : __CODEGEN_BITFIELD(20, 29) ; //!< HUEB3_DARK 2952 uint32_t Reserved862 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 2953 }; 2954 uint32_t Value; 2955 } DW26; 2956 union 2957 { 2958 struct 2959 { 2960 uint32_t Hues0Dark : __CODEGEN_BITFIELD( 0, 10) ; //!< HUES0_DARK 2961 uint32_t Hues1Dark : __CODEGEN_BITFIELD(11, 21) ; //!< HUES1_DARK 2962 uint32_t Reserved886 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2963 }; 2964 uint32_t Value; 2965 } DW27; 2966 union 2967 { 2968 struct 2969 { 2970 uint32_t Hues2Dark : __CODEGEN_BITFIELD( 0, 10) ; //!< HUES2_DARK 2971 uint32_t Hues3Dark : __CODEGEN_BITFIELD(11, 21) ; //!< HUES3_DARK 2972 uint32_t Reserved918 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 2973 }; 2974 uint32_t Value; 2975 } DW28; 2976 2977 //! \name Local enumerations 2978 2979 enum OUTPUT_CONTROL 2980 { 2981 OUTPUT_CONTROL_OUTPUTPIXELS = 0, //!< No additional details 2982 OUTPUT_CONTROL_OUTPUTSTDDECISIONS = 1, //!< No additional details 2983 }; 2984 2985 //! \brief SAT_MAX 2986 //! \details 2987 //! Rectangle half length. 2988 enum SAT_MAX 2989 { 2990 SAT_MAX_UNNAMED31 = 31, //!< No additional details 2991 }; 2992 2993 //! \brief HUE_MAX 2994 //! \details 2995 //! Rectangle half width. 2996 enum HUE_MAX 2997 { 2998 HUE_MAX_UNNAMED14 = 14, //!< No additional details 2999 }; 3000 3001 //! \brief U_MID 3002 //! \details 3003 //! Rectangle middle-point U coordinate. 3004 enum U_MID 3005 { 3006 U_MID_UNNAMED110 = 110, //!< No additional details 3007 }; 3008 3009 //! \brief V_MID 3010 //! \details 3011 //! Rectangle middle-point V coordinate. 3012 enum V_MID 3013 { 3014 V_MID_UNNAMED154 = 154, //!< No additional details 3015 }; 3016 3017 //! \brief SIN 3018 //! \details 3019 //! The default is 101/128 3020 enum SIN 3021 { 3022 SIN_UNNAMED101 = 101, //!< No additional details 3023 }; 3024 3025 //! \brief COS 3026 //! \details 3027 //! The default is 79/128 3028 enum COS 3029 { 3030 COS_UNNAMED79 = 79, //!< No additional details 3031 }; 3032 3033 //! \brief HS_MARGIN 3034 //! \details 3035 //! Defines rectangle margin. 3036 enum HS_MARGIN 3037 { 3038 HS_MARGIN_UNNAMED3 = 3, //!< No additional details 3039 }; 3040 3041 //! \brief DIAMOND_DU 3042 //! \details 3043 //! Rhombus center shift in the sat-direction, relative to the rectangle 3044 //! center. 3045 enum DIAMOND_DU 3046 { 3047 DIAMOND_DU_UNNAMED0 = 0, //!< No additional details 3048 }; 3049 3050 enum DIAMOND_MARGIN 3051 { 3052 DIAMOND_MARGIN_UNNAMED4 = 4, //!< No additional details 3053 }; 3054 3055 //! \brief DIAMOND_DV 3056 //! \details 3057 //! Rhombus center shift in the hue-direction, relative to the rectangle 3058 //! center. 3059 enum DIAMOND_DV 3060 { 3061 DIAMOND_DV_UNNAMED0 = 0, //!< No additional details 3062 }; 3063 3064 //! \brief DIAMOND_TH 3065 //! \details 3066 //! Half length of the rhombus axis in the sat-direction. 3067 enum DIAMOND_TH 3068 { 3069 DIAMOND_TH_UNNAMED35 = 35, //!< No additional details 3070 }; 3071 3072 //! \brief DIAMOND_ALPHA 3073 //! \details 3074 //! 1/tan(�) 3075 //! The default is 100/64 3076 enum DIAMOND_ALPHA 3077 { 3078 DIAMOND_ALPHA_UNNAMED100 = 100, //!< No additional details 3079 }; 3080 3081 //! \brief Y_POINT_1 3082 //! \details 3083 //! First point of the Y piecewise linear membership function. 3084 enum Y_POINT_1 3085 { 3086 Y_POINT_1_UNNAMED46 = 46, //!< No additional details 3087 }; 3088 3089 //! \brief Y_POINT_2 3090 //! \details 3091 //! Second point of the Y piecewise linear membership function. 3092 enum Y_POINT_2 3093 { 3094 Y_POINT_2_UNNAMED47 = 47, //!< No additional details 3095 }; 3096 3097 //! \brief Y_POINT_3 3098 //! \details 3099 //! Third point of the Y piecewise linear membership function. 3100 enum Y_POINT_3 3101 { 3102 Y_POINT_3_UNNAMED254 = 254, //!< No additional details 3103 }; 3104 3105 //! \brief Y_POINT_4 3106 //! \details 3107 //! Fourth point of the Y piecewise linear membership function. 3108 enum Y_POINT_4 3109 { 3110 Y_POINT_4_UNNAMED255 = 255, //!< No additional details 3111 }; 3112 3113 //! \brief Y_SLOPE_1 3114 //! \details 3115 //! Slope between points Y1 and Y2. 3116 enum Y_SLOPE_1 3117 { 3118 Y_SLOPE_1_UNNAMED31 = 31, //!< No additional details 3119 }; 3120 3121 //! \brief Y_SLOPE_2 3122 //! \details 3123 //! Slope between points Y3 and Y4. 3124 enum Y_SLOPE_2 3125 { 3126 Y_SLOPE_2_UNNAMED31 = 31, //!< No additional details 3127 }; 3128 3129 //! \brief INV_SKIN_TYPES_MARGIN 3130 //! \details 3131 //! 1/(2* Skin_types_margin) 3132 enum INV_SKIN_TYPES_MARGIN 3133 { 3134 INV_SKIN_TYPES_MARGIN_SKINTYPEMARGIN = 20, //!< No additional details 3135 }; 3136 3137 //! \brief INV_MARGIN_VYU 3138 //! \details 3139 //! 1 / Margin_VYU = 1600/65536 3140 enum INV_MARGIN_VYU 3141 { 3142 INV_MARGIN_VYU_UNNAMED1600 = 1600, //!< No additional details 3143 }; 3144 3145 //! \brief P0L 3146 //! \details 3147 //! Y Point 0 of the lower part of the detection PWLF. 3148 enum P0L 3149 { 3150 P0L_UNNAMED46 = 46, //!< No additional details 3151 }; 3152 3153 //! \brief P1L 3154 //! \details 3155 //! Y Point 1 of the lower part of the detection PWLF. 3156 enum P1L 3157 { 3158 P1L_UNNAMED216 = 216, //!< No additional details 3159 }; 3160 3161 //! \brief P2L 3162 //! \details 3163 //! Y Point 2 of the lower part of the detection PWLF. 3164 enum P2L 3165 { 3166 P2L_UNNAMED236 = 236, //!< No additional details 3167 }; 3168 3169 //! \brief P3L 3170 //! \details 3171 //! Y Point 3 of the lower part of the detection PWLF. 3172 enum P3L 3173 { 3174 P3L_UNNAMED236 = 236, //!< No additional details 3175 }; 3176 3177 //! \brief B0L 3178 //! \details 3179 //! V Bias 0 of the lower part of the detection PWLF. 3180 enum B0L 3181 { 3182 B0L_UNNAMED133 = 133, //!< No additional details 3183 }; 3184 3185 //! \brief B1L 3186 //! \details 3187 //! V Bias 1 of the lower part of the detection PWLF. 3188 enum B1L 3189 { 3190 B1L_UNNAMED130 = 130, //!< No additional details 3191 }; 3192 3193 //! \brief B2L 3194 //! \details 3195 //! V Bias 2 of the lower part of the detection PWLF. 3196 enum B2L 3197 { 3198 B2L_UNNAMED130 = 130, //!< No additional details 3199 }; 3200 3201 //! \brief B3L 3202 //! \details 3203 //! V Bias 3 of the lower part of the detection PWLF. 3204 enum B3L 3205 { 3206 B3L_UNNAMED130 = 130, //!< No additional details 3207 }; 3208 3209 //! \brief S0L 3210 //! \details 3211 //! Slope 0 of the lower part of the detection PWLF. 3212 enum S0L 3213 { 3214 S0L_UNNAMED2043 = 2043, //!< No additional details 3215 }; 3216 3217 //! \brief S1L 3218 //! \details 3219 //! Slope 1 of the lower part of the detection PWLF. 3220 enum S1L 3221 { 3222 S1L_UNNAMED0 = 0, //!< No additional details 3223 }; 3224 3225 //! \brief S2L 3226 //! \details 3227 //! The default is 0/256 3228 enum S2L 3229 { 3230 S2L_UNNAMED0 = 0, //!< No additional details 3231 }; 3232 3233 //! \brief S3L 3234 //! \details 3235 //! Slope 3 of the lower part of the detection PWLF. 3236 enum S3L 3237 { 3238 S3L_UNNAMED0 = 0, //!< No additional details 3239 }; 3240 3241 //! \brief P0U 3242 //! \details 3243 //! Y Point 0 of the upper part of the detection PWLF. 3244 enum P0U 3245 { 3246 P0U_UNNAMED46 = 46, //!< No additional details 3247 }; 3248 3249 //! \brief P1U 3250 //! \details 3251 //! Y Point 1 of the upper part of the detection PWLF. 3252 enum P1U 3253 { 3254 P1U_UNNAMED66 = 66, //!< No additional details 3255 }; 3256 3257 //! \brief P2U 3258 //! \details 3259 //! Y Point 2 of the upper part of the detection PWLF. 3260 enum P2U 3261 { 3262 P2U_UNNAMED150 = 150, //!< No additional details 3263 }; 3264 3265 //! \brief P3U 3266 //! \details 3267 //! Y Point 3 of the upper part of the detection PWLF. 3268 enum P3U 3269 { 3270 P3U_UNNAMED236 = 236, //!< No additional details 3271 }; 3272 3273 //! \brief B0U 3274 //! \details 3275 //! V Bias 0 of the upper part of the detection PWLF. 3276 enum B0U 3277 { 3278 B0U_UNNAMED143 = 143, //!< No additional details 3279 }; 3280 3281 //! \brief B1U 3282 //! \details 3283 //! V Bias 1 of the upper part of the detection PWLF. 3284 enum B1U 3285 { 3286 B1U_UNNAMED163 = 163, //!< No additional details 3287 }; 3288 3289 //! \brief B2U 3290 //! \details 3291 //! V Bias 2 of the upper part of the detection PWLF. 3292 enum B2U 3293 { 3294 B2U_UNNAMED200 = 200, //!< No additional details 3295 }; 3296 3297 //! \brief B3U 3298 //! \details 3299 //! V Bias 3 of the upper part of the detection PWLF. 3300 enum B3U 3301 { 3302 B3U_UNNAMED200 = 200, //!< No additional details 3303 }; 3304 3305 //! \brief S0U 3306 //! \details 3307 //! Slope 0 of the upper part of the detection PWLF. 3308 enum S0U 3309 { 3310 S0U_UNNAMED256 = 256, //!< No additional details 3311 }; 3312 3313 //! \brief S1U 3314 //! \details 3315 //! Slope 1 of the upper part of the detection PWLF. 3316 enum S1U 3317 { 3318 S1U_UNNAMED113 = 113, //!< No additional details 3319 }; 3320 3321 //! \brief S2U 3322 //! \details 3323 //! Slope 2 of the upper part of the detection PWLF. 3324 enum S2U 3325 { 3326 S2U_UNNAMED1869 = 1869, //!< No additional details 3327 }; 3328 3329 //! \brief S3U 3330 //! \details 3331 //! Slope 3 of the upper part of the detection PWLF. 3332 enum S3U 3333 { 3334 S3U_UNNAMED0 = 0, //!< No additional details 3335 }; 3336 3337 //! \brief SKIN_TYPES_ENABLE 3338 //! \details 3339 //! Treat differently bright and dark skin types 3340 enum SKIN_TYPES_ENABLE 3341 { 3342 SKIN_TYPES_ENABLE_DISABLE = 0, //!< No additional details 3343 }; 3344 3345 //! \brief SKIN_TYPES_THRESH 3346 //! \details 3347 //! Skin types Y margin 3348 //! Restrict Skin_types_thresh >= Skin_types_margin > 0 3349 //! Restrict (Skin_types_thresh + Skin_types_margin) <= 255 3350 enum SKIN_TYPES_THRESH 3351 { 3352 SKIN_TYPES_THRESH_UNNAMED120 = 120, //!< No additional details 3353 }; 3354 3355 //! \brief SKIN_TYPES_MARGIN 3356 //! \details 3357 //! Skin types Y margin 3358 //! Restrict Skin_types_thresh >= Skin_types_margin > 0 3359 //! Restrict (Skin_types_thresh + Skin_types_margin) <= 255 3360 enum SKIN_TYPES_MARGIN 3361 { 3362 SKIN_TYPES_MARGIN_UNNAMED20 = 20, //!< No additional details 3363 }; 3364 3365 //! \brief SATP1 3366 //! \details 3367 //! First point for the saturation PWLF (bright skin). 3368 enum SATP1 3369 { 3370 SATP1_UNNAMED6 = 6, //!< No additional details 3371 }; 3372 3373 //! \brief SATP2 3374 //! \details 3375 //! Second point for the saturation PWLF (bright skin). 3376 enum SATP2 3377 { 3378 SATP2_UNNAMED6 = 6, //!< No additional details 3379 }; 3380 3381 //! \brief SATP3 3382 //! \details 3383 //! Third point for the saturation PWLF (bright skin). 3384 enum SATP3 3385 { 3386 SATP3_UNNAMED31 = 31, //!< No additional details 3387 }; 3388 3389 //! \brief SATB1 3390 //! \details 3391 //! First bias for the saturation PWLF (bright skin). 3392 enum SATB1 3393 { 3394 SATB1_UNNAMED8 = 8, //!< No additional details 3395 }; 3396 3397 //! \brief SATB2 3398 //! \details 3399 //! Second bias for the saturation PWLF (bright skin) 3400 enum SATB2 3401 { 3402 SATB2_UNNAMED8 = 8, //!< No additional details 3403 }; 3404 3405 //! \brief SATB3 3406 //! \details 3407 //! Third bias for the saturation PWLF (bright skin) 3408 enum SATB3 3409 { 3410 SATB3_UNNAMED124 = 124, //!< No additional details 3411 }; 3412 3413 //! \brief SATS0 3414 //! \details 3415 //! Zeroth slope for the saturation PWLF (bright skin) 3416 enum SATS0 3417 { 3418 SATS0_UNNAMED297 = 297, //!< No additional details 3419 }; 3420 3421 //! \brief SATS1 3422 //! \details 3423 //! First slope for the saturation PWLF (bright skin) 3424 enum SATS1 3425 { 3426 SATS1_UNNAMED85 = 85, //!< No additional details 3427 }; 3428 3429 //! \brief SATS2 3430 //! \details 3431 //! Second slope for the saturation PWLF (bright skin) 3432 enum SATS2 3433 { 3434 SATS2_UNNAMED297 = 297, //!< No additional details 3435 }; 3436 3437 //! \brief SATS3 3438 //! \details 3439 //! Third slope for the saturation PWLF (bright skin) 3440 enum SATS3 3441 { 3442 SATS3_UNNAMED256 = 256, //!< No additional details 3443 }; 3444 3445 //! \brief HUEP1 3446 //! \details 3447 //! First point for the hue PWLF (bright skin) 3448 enum HUEP1 3449 { 3450 HUEP1_6 = 122, //!< No additional details 3451 }; 3452 3453 //! \brief HUEP2 3454 //! \details 3455 //! Second point for the hue PWLF (bright skin) 3456 enum HUEP2 3457 { 3458 HUEP2_UNNAMED6 = 6, //!< No additional details 3459 }; 3460 3461 //! \brief HUEP3 3462 //! \details 3463 //! Third point for the hue PWLF (bright skin) 3464 enum HUEP3 3465 { 3466 HUEP3_UNNAMED14 = 14, //!< No additional details 3467 }; 3468 3469 //! \brief HUEB1 3470 //! \details 3471 //! First bias for the hue PWLF (bright skin) 3472 enum HUEB1 3473 { 3474 HUEB1_UNNAMED8 = 8, //!< No additional details 3475 }; 3476 3477 //! \brief HUEB2 3478 //! \details 3479 //! Second bias for the hue PWLF (bright skin) 3480 enum HUEB2 3481 { 3482 HUEB2_UNNAMED8 = 8, //!< No additional details 3483 }; 3484 3485 //! \brief HUEB3 3486 //! \details 3487 //! Third bias for the hue PWLF (bright skin) 3488 enum HUEB3 3489 { 3490 HUEB3_UNNAMED56 = 56, //!< No additional details 3491 }; 3492 3493 //! \brief HUES0 3494 //! \details 3495 //! Zeroth slope for the hue PWLF (bright skin) 3496 enum HUES0 3497 { 3498 HUES0_UNNAMED384 = 384, //!< No additional details 3499 }; 3500 3501 //! \brief HUES1 3502 //! \details 3503 //! First slope for the hue PWLF (bright skin) 3504 enum HUES1 3505 { 3506 HUES1_UNNAMED85 = 85, //!< No additional details 3507 }; 3508 3509 //! \brief HUES2 3510 //! \details 3511 //! Second slope for the hue PWLF (bright skin) 3512 enum HUES2 3513 { 3514 HUES2_UNNAMED384 = 384, //!< No additional details 3515 }; 3516 3517 //! \brief HUES3 3518 //! \details 3519 //! Third slope for the hue PWLF (bright skin) 3520 enum HUES3 3521 { 3522 HUES3_UNNAMED256 = 256, //!< No additional details 3523 }; 3524 3525 //! \brief SATP1_DARK 3526 //! \details 3527 //! First point for the saturation PWLF (dark skin) Default Value: -5 3528 enum SATP1_DARK 3529 { 3530 SATP1_DARK_UNNAMED123 = 123, //!< No additional details 3531 }; 3532 3533 //! \brief SATP2_DARK 3534 //! \details 3535 //! Second point for the saturation PWLF (dark skin) 3536 enum SATP2_DARK 3537 { 3538 SATP2_DARK_UNNAMED31 = 31, //!< No additional details 3539 }; 3540 3541 //! \brief SATP3_DARK 3542 //! \details 3543 //! Third point for the saturation PWLF (dark skin) 3544 enum SATP3_DARK 3545 { 3546 SATP3_DARK_UNNAMED31 = 31, //!< No additional details 3547 }; 3548 3549 //! \brief SATB1_DARK 3550 //! \details 3551 //! First bias for the saturation PWLF (dark skin) 3552 enum SATB1_DARK 3553 { 3554 SATB1_DARK_UNNAMED0 = 0, //!< No additional details 3555 }; 3556 3557 //! \brief SATB2_DARK 3558 //! \details 3559 //! Second bias for the saturation PWLF (dark skin) 3560 enum SATB2_DARK 3561 { 3562 SATB2_DARK_UNNAMED124 = 124, //!< No additional details 3563 }; 3564 3565 //! \brief SATB3_DARK 3566 //! \details 3567 //! Third bias for the saturation PWLF (dark skin) 3568 enum SATB3_DARK 3569 { 3570 SATB3_DARK_UNNAMED124 = 124, //!< No additional details 3571 }; 3572 3573 //! \brief SATS0_DARK 3574 //! \details 3575 //! Zeroth slope for the saturation PWLF (dark skin) 3576 enum SATS0_DARK 3577 { 3578 SATS0_DARK_UNNAMED397 = 397, //!< No additional details 3579 }; 3580 3581 //! \brief SATS1_DARK 3582 //! \details 3583 //! First slope for the saturation PWLF (dark skin) 3584 enum SATS1_DARK 3585 { 3586 SATS1_DARK_UNNAMED189 = 189, //!< No additional details 3587 }; 3588 3589 //! \brief SATS2_DARK 3590 //! \details 3591 //! Second slope for the saturation PWLF (dark skin) 3592 enum SATS2_DARK 3593 { 3594 SATS2_DARK_UNNAMED256 = 256, //!< No additional details 3595 }; 3596 3597 //! \brief SATS3_DARK 3598 //! \details 3599 //! Third slope for the saturation PWLF (dark skin) 3600 enum SATS3_DARK 3601 { 3602 SATS3_DARK_UNNAMED256 = 256, //!< No additional details 3603 }; 3604 3605 //! \brief HUEP1_DARK 3606 //! \details 3607 //! First point for the hue PWLF (dark skin). 3608 enum HUEP1_DARK 3609 { 3610 HUEP1_DARK_UNNAMED0 = 0, //!< No additional details 3611 }; 3612 3613 //! \brief HUEP2_DARK 3614 //! \details 3615 //! Second point for the hue PWLF (dark skin). 3616 enum HUEP2_DARK 3617 { 3618 HUEP2_DARK_UNNAMED2 = 2, //!< No additional details 3619 }; 3620 3621 //! \brief HUEP3_DARK 3622 //! \details 3623 //! Third point for the hue PWLF (dark skin). 3624 enum HUEP3_DARK 3625 { 3626 HUEP3_DARK_UNNAMED14 = 14, //!< No additional details 3627 }; 3628 3629 //! \brief HUEB1_DARK 3630 //! \details 3631 //! First bias for the hue PWLF (dark skin). 3632 enum HUEB1_DARK 3633 { 3634 HUEB1_DARK_UNNAMED0 = 0, //!< No additional details 3635 }; 3636 3637 //! \brief HUEB2_DARK 3638 //! \details 3639 //! Second bias for the hue PWLF (dark skin). 3640 enum HUEB2_DARK 3641 { 3642 HUEB2_DARK_UNNAMED0 = 0, //!< No additional details 3643 }; 3644 3645 //! \brief HUEB3_DARK 3646 //! \details 3647 //! Third bias for the hue PWLF (dark skin). 3648 enum HUEB3_DARK 3649 { 3650 HUEB3_DARK_UNNAMED56 = 56, //!< No additional details 3651 }; 3652 3653 //! \brief HUES0_DARK 3654 //! \details 3655 //! Zeroth slope for the hue PWLF (dark skin). 3656 enum HUES0_DARK 3657 { 3658 HUES0_DARK_UNNAMED299 = 299, //!< No additional details 3659 }; 3660 3661 //! \brief HUES1_DARK 3662 //! \details 3663 //! First slope for the hue PWLF (dark skin). 3664 enum HUES1_DARK 3665 { 3666 HUES1_DARK_UNNAMED256 = 256, //!< No additional details 3667 }; 3668 3669 //! \brief HUES2_DARK 3670 //! \details 3671 //! Second slope for the hue PWLF (dark skin). 3672 enum HUES2_DARK 3673 { 3674 HUES2_DARK_UNNAMED299 = 299, //!< No additional details 3675 }; 3676 3677 //! \brief HUES3_DARK 3678 //! \details 3679 //! Third slope for the hue PWLF (dark skin). 3680 enum HUES3_DARK 3681 { 3682 HUES3_DARK_UNNAMED256 = 256, //!< No additional details 3683 }; 3684 3685 //! \name Initializations 3686 3687 //! \brief Explicit member initialization function 3688 VEBOX_STD_STE_STATE_CMD(); 3689 3690 static const size_t dwSize = 29; 3691 static const size_t byteSize = 116; 3692 }; 3693 3694 //! 3695 //! \brief VEBOX_TCC_STATE 3696 //! \details 3697 //! This state structure contains the IECP State Table Contents for TCC 3698 //! state. 3699 //! 3700 struct VEBOX_TCC_STATE_CMD 3701 { 3702 union 3703 { 3704 //!< DWORD 0 3705 struct 3706 { 3707 uint32_t Reserved0 : __CODEGEN_BITFIELD( 0, 6) ; //!< Reserved 3708 uint32_t TccEnable : __CODEGEN_BITFIELD( 7, 7) ; //!< TCC Enable 3709 uint32_t Satfactor1 : __CODEGEN_BITFIELD( 8, 15) ; //!< SATFACTOR1 3710 uint32_t Satfactor2 : __CODEGEN_BITFIELD(16, 23) ; //!< SATFACTOR2 3711 uint32_t Satfactor3 : __CODEGEN_BITFIELD(24, 31) ; //!< SATFACTOR3 3712 }; 3713 uint32_t Value; 3714 } DW0; 3715 union 3716 { 3717 //!< DWORD 1 3718 struct 3719 { 3720 uint32_t Reserved32 : __CODEGEN_BITFIELD( 0, 7) ; //!< Reserved 3721 uint32_t Satfactor4 : __CODEGEN_BITFIELD( 8, 15) ; //!< SATFACTOR4 3722 uint32_t Satfactor5 : __CODEGEN_BITFIELD(16, 23) ; //!< SATFACTOR5 3723 uint32_t Satfactor6 : __CODEGEN_BITFIELD(24, 31) ; //!< SATFACTOR6 3724 }; 3725 uint32_t Value; 3726 } DW1; 3727 union 3728 { 3729 //!< DWORD 2 3730 struct 3731 { 3732 uint32_t Basecolor1 : __CODEGEN_BITFIELD( 0, 9) ; //!< BASECOLOR1 3733 uint32_t Basecolor2 : __CODEGEN_BITFIELD(10, 19) ; //!< BASECOLOR2 3734 uint32_t Basecolor3 : __CODEGEN_BITFIELD(20, 29) ; //!< BASECOLOR3 3735 uint32_t Reserved94 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 3736 }; 3737 uint32_t Value; 3738 } DW2; 3739 union 3740 { 3741 //!< DWORD 3 3742 struct 3743 { 3744 uint32_t Basecolo4 : __CODEGEN_BITFIELD( 0, 9) ; //!< BASECOLO4 3745 uint32_t Basecolor5 : __CODEGEN_BITFIELD(10, 19) ; //!< BASECOLOR5 3746 uint32_t Basecolor6 : __CODEGEN_BITFIELD(20, 29) ; //!< BASECOLOR6 3747 uint32_t Reserved126 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 3748 }; 3749 uint32_t Value; 3750 } DW3; 3751 union 3752 { 3753 //!< DWORD 4 3754 struct 3755 { 3756 uint32_t Colortransitslope2 : __CODEGEN_BITFIELD( 0, 15) ; //!< COLORTRANSITSLOPE2 3757 uint32_t Colortransitslope23 : __CODEGEN_BITFIELD(16, 31) ; //!< COLORTRANSITSLOPE23 3758 }; 3759 uint32_t Value; 3760 } DW4; 3761 union 3762 { 3763 //!< DWORD 5 3764 struct 3765 { 3766 uint32_t Colortransitslope34 : __CODEGEN_BITFIELD( 0, 15) ; //!< COLORTRANSITSLOPE34 3767 uint32_t Colortransitslope45 : __CODEGEN_BITFIELD(16, 31) ; //!< COLORTRANSITSLOPE45 3768 }; 3769 uint32_t Value; 3770 } DW5; 3771 union 3772 { 3773 //!< DWORD 6 3774 struct 3775 { 3776 uint32_t Colortransitslope56 : __CODEGEN_BITFIELD( 0, 15) ; //!< COLORTRANSITSLOPE56 3777 uint32_t Colortransitslope61 : __CODEGEN_BITFIELD(16, 31) ; //!< COLORTRANSITSLOPE61 3778 }; 3779 uint32_t Value; 3780 } DW6; 3781 union 3782 { 3783 //!< DWORD 7 3784 struct 3785 { 3786 uint32_t Reserved224 : __CODEGEN_BITFIELD( 0, 1) ; //!< Reserved 3787 uint32_t Colorbias1 : __CODEGEN_BITFIELD( 2, 11) ; //!< COLORBIAS1 3788 uint32_t Colorbias2 : __CODEGEN_BITFIELD(12, 21) ; //!< COLORBIAS2 3789 uint32_t Colorbias3 : __CODEGEN_BITFIELD(22, 31) ; //!< COLORBIAS3 3790 }; 3791 uint32_t Value; 3792 } DW7; 3793 union 3794 { 3795 //!< DWORD 8 3796 struct 3797 { 3798 uint32_t Reserved256 : __CODEGEN_BITFIELD( 0, 1) ; //!< Reserved 3799 uint32_t Colorbias4 : __CODEGEN_BITFIELD( 2, 11) ; //!< COLORBIAS4 3800 uint32_t Colorbias5 : __CODEGEN_BITFIELD(12, 21) ; //!< COLORBIAS5 3801 uint32_t Colorbias6 : __CODEGEN_BITFIELD(22, 31) ; //!< COLORBIAS6 3802 }; 3803 uint32_t Value; 3804 } DW8; 3805 union 3806 { 3807 //!< DWORD 9 3808 struct 3809 { 3810 uint32_t SteSlopeBits : __CODEGEN_BITFIELD( 0, 2) ; //!< STE_SLOPE_BITS 3811 uint32_t Reserved291 : __CODEGEN_BITFIELD( 3, 7) ; //!< Reserved 3812 uint32_t SteThreshold : __CODEGEN_BITFIELD( 8, 12) ; //!< STE_THRESHOLD 3813 uint32_t Reserved301 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 3814 uint32_t UvThresholdBits : __CODEGEN_BITFIELD(16, 18) ; //!< UV_THRESHOLD_BITS 3815 uint32_t Reserved307 : __CODEGEN_BITFIELD(19, 23) ; //!< Reserved 3816 uint32_t UvThreshold : __CODEGEN_BITFIELD(24, 30) ; //!< UV_THRESHOLD 3817 uint32_t Reserved319 : __CODEGEN_BITFIELD(31, 31) ; //!< Reserved 3818 }; 3819 uint32_t Value; 3820 } DW9; 3821 union 3822 { 3823 //!< DWORD 10 3824 struct 3825 { 3826 uint32_t Uvmaxcolor : __CODEGEN_BITFIELD( 0, 8) ; //!< UVMAXCOLOR 3827 uint32_t Reserved329 : __CODEGEN_BITFIELD( 9, 15) ; //!< Reserved 3828 uint32_t InvUvmaxcolor : __CODEGEN_BITFIELD(16, 31) ; //!< INV_UVMAXCOLOR 3829 }; 3830 uint32_t Value; 3831 } DW10; 3832 3833 //! \name Local enumerations 3834 3835 //! \brief SATFACTOR1 3836 //! \details 3837 //! The saturation factor for magenta. 3838 enum SATFACTOR1 3839 { 3840 SATFACTOR1_UNNAMED220 = 220, //!< No additional details 3841 }; 3842 3843 //! \brief SATFACTOR2 3844 //! \details 3845 //! The saturation factor for red. 3846 enum SATFACTOR2 3847 { 3848 SATFACTOR2_UNNAMED220 = 220, //!< No additional details 3849 }; 3850 3851 //! \brief SATFACTOR3 3852 //! \details 3853 //! The saturation factor for yellow. 3854 enum SATFACTOR3 3855 { 3856 SATFACTOR3_UNNAMED220 = 220, //!< No additional details 3857 }; 3858 3859 //! \brief SATFACTOR4 3860 //! \details 3861 //! The saturation factor for green. 3862 enum SATFACTOR4 3863 { 3864 SATFACTOR4_UNNAMED220 = 220, //!< No additional details 3865 }; 3866 3867 //! \brief SATFACTOR5 3868 //! \details 3869 //! The saturation factor for cyan. 3870 enum SATFACTOR5 3871 { 3872 SATFACTOR5_UNNAMED220 = 220, //!< No additional details 3873 }; 3874 3875 //! \brief SATFACTOR6 3876 //! \details 3877 //! The saturation factor for blue. 3878 enum SATFACTOR6 3879 { 3880 SATFACTOR6_UNNAMED220 = 220, //!< No additional details 3881 }; 3882 3883 //! \brief BASECOLOR1 3884 //! \details 3885 //! Base Color 1 3886 enum BASECOLOR1 3887 { 3888 BASECOLOR1_UNNAMED145 = 145, //!< No additional details 3889 }; 3890 3891 //! \brief BASECOLOR2 3892 //! \details 3893 //! Base Color 2 - this value must be greater than BaseColor1 3894 enum BASECOLOR2 3895 { 3896 BASECOLOR2_UNNAMED307 = 307, //!< No additional details 3897 }; 3898 3899 //! \brief BASECOLOR3 3900 //! \details 3901 //! Base Color 3 - this value must be greater than BaseColor2 3902 enum BASECOLOR3 3903 { 3904 BASECOLOR3_UNNAMED483 = 483, //!< No additional details 3905 }; 3906 3907 //! \brief BASECOLO4 3908 //! \details 3909 //! Base Color 4 - this value must be greater than BaseColor3 3910 enum BASECOLO4 3911 { 3912 BASECOLO4_UNNAMED657 = 657, //!< No additional details 3913 }; 3914 3915 //! \brief BASECOLOR5 3916 //! \details 3917 //! Base Color 5 - this value must be greater than BaseColor4 3918 enum BASECOLOR5 3919 { 3920 BASECOLOR5_UNNAMED819 = 819, //!< No additional details 3921 }; 3922 3923 //! \brief BASECOLOR6 3924 //! \details 3925 //! Base Color 6 - this value must be greater than BaseColor5 3926 enum BASECOLOR6 3927 { 3928 BASECOLOR6_UNNAMED995 = 995, //!< No additional details 3929 }; 3930 3931 //! \brief COLORTRANSITSLOPE2 3932 //! \details 3933 //! The calculation result of 1 / (BC2 - BC1) [1/57] 3934 enum COLORTRANSITSLOPE2 3935 { 3936 COLORTRANSITSLOPE2_UNNAMED405 = 405, //!< No additional details 3937 }; 3938 3939 //! \brief COLORTRANSITSLOPE23 3940 //! \details 3941 //! The calculation result of 1 / (BC3 - BC2) [1/62] 3942 enum COLORTRANSITSLOPE23 3943 { 3944 COLORTRANSITSLOPE23_UNNAMED744 = 744, //!< No additional details 3945 }; 3946 3947 //! \brief COLORTRANSITSLOPE34 3948 //! \details 3949 //! The calculation result of 1 / (BC4 - BC3) [1/61] 3950 enum COLORTRANSITSLOPE34 3951 { 3952 COLORTRANSITSLOPE34_UNNAMED1131 = 1131, //!< No additional details 3953 }; 3954 3955 //! \brief COLORTRANSITSLOPE45 3956 //! \details 3957 //! The calculation result of 1 / (BC5 - BC4) [1/57] 3958 enum COLORTRANSITSLOPE45 3959 { 3960 COLORTRANSITSLOPE45_UNNAMED407 = 407, //!< No additional details 3961 }; 3962 3963 //! \brief COLORTRANSITSLOPE56 3964 //! \details 3965 //! The calculation result of 1 / (BC6 - BC5) [1/62] 3966 enum COLORTRANSITSLOPE56 3967 { 3968 COLORTRANSITSLOPE56_UNNAMED372 = 372, //!< No additional details 3969 }; 3970 3971 //! \brief COLORTRANSITSLOPE61 3972 //! \details 3973 //! The calculation result of 1 / (BC1 - BC6) [1/62] 3974 enum COLORTRANSITSLOPE61 3975 { 3976 COLORTRANSITSLOPE61_UNNAMED377 = 377, //!< No additional details 3977 }; 3978 3979 //! \brief COLORBIAS1 3980 //! \details 3981 //! Color bias for BaseColor1. 3982 enum COLORBIAS1 3983 { 3984 COLORBIAS1_UNNAMED0 = 0, //!< No additional details 3985 }; 3986 3987 //! \brief COLORBIAS2 3988 //! \details 3989 //! Color bias for BaseColor2. 3990 enum COLORBIAS2 3991 { 3992 COLORBIAS2_UNNAMED150 = 150, //!< No additional details 3993 }; 3994 3995 //! \brief COLORBIAS3 3996 //! \details 3997 //! Color bias for BaseColor3. 3998 enum COLORBIAS3 3999 { 4000 COLORBIAS3_UNNAMED0 = 0, //!< No additional details 4001 }; 4002 4003 //! \brief COLORBIAS4 4004 //! \details 4005 //! Color bias for BaseColor4. 4006 enum COLORBIAS4 4007 { 4008 COLORBIAS4_UNNAMED0 = 0, //!< No additional details 4009 }; 4010 4011 //! \brief COLORBIAS5 4012 //! \details 4013 //! Color bias for BaseColor5. 4014 enum COLORBIAS5 4015 { 4016 COLORBIAS5_UNNAMED0 = 0, //!< No additional details 4017 }; 4018 4019 //! \brief COLORBIAS6 4020 //! \details 4021 //! Color bias for BaseColor6. 4022 enum COLORBIAS6 4023 { 4024 COLORBIAS6_UNNAMED0 = 0, //!< No additional details 4025 }; 4026 4027 //! \brief STE_SLOPE_BITS 4028 //! \details 4029 //! Skin tone pixels enhancement slope bits. 4030 enum STE_SLOPE_BITS 4031 { 4032 STE_SLOPE_BITS_UNNAMED0 = 0, //!< No additional details 4033 }; 4034 4035 //! \brief STE_THRESHOLD 4036 //! \details 4037 //! Skin tone pixels enhancement threshold. 4038 enum STE_THRESHOLD 4039 { 4040 STE_THRESHOLD_UNNAMED0 = 0, //!< No additional details 4041 }; 4042 4043 //! \brief UV_THRESHOLD_BITS 4044 //! \details 4045 //! Low UV transition width bits. 4046 enum UV_THRESHOLD_BITS 4047 { 4048 UV_THRESHOLD_BITS_UNNAMED3 = 3, //!< No additional details 4049 }; 4050 4051 //! \brief UV_THRESHOLD 4052 //! \details 4053 //! Low UV threshold. 4054 enum UV_THRESHOLD 4055 { 4056 UV_THRESHOLD_UNNAMED3 = 3, //!< No additional details 4057 }; 4058 4059 //! \brief UVMAXCOLOR 4060 //! \details 4061 //! The maximum absolute value of the legal UV pixels. Used for the SFs2 4062 //! calculation. 4063 enum UVMAXCOLOR 4064 { 4065 UVMAXCOLOR_UNNAMED448 = 448, //!< No additional details 4066 }; 4067 4068 //! \brief INV_UVMAXCOLOR 4069 //! \details 4070 //! 1 / UVMaxColor. Used for the SFs2 calculation. 4071 enum INV_UVMAXCOLOR 4072 { 4073 INV_UVMAXCOLOR_UNNAMED146 = 146, //!< No additional details 4074 }; 4075 4076 //! \name Initializations 4077 4078 //! \brief Explicit member initialization function 4079 VEBOX_TCC_STATE_CMD(); 4080 4081 static const size_t dwSize = 11; 4082 static const size_t byteSize = 44; 4083 }; 4084 4085 //! 4086 //! \brief VEBOX_PROCAMP_STATE 4087 //! \details 4088 //! This state structure contains the IECP State Table Contents for ProcAmp 4089 //! state. 4090 //! 4091 struct VEBOX_PROCAMP_STATE_CMD 4092 { 4093 union 4094 { 4095 //!< DWORD 0 4096 struct 4097 { 4098 uint32_t ProcampEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< PROCAMP_ENABLE 4099 uint32_t Brightness : __CODEGEN_BITFIELD( 1, 12) ; //!< BRIGHTNESS 4100 uint32_t Reserved13 : __CODEGEN_BITFIELD(13, 16) ; //!< Reserved 4101 uint32_t Contrast : __CODEGEN_BITFIELD(17, 27) ; //!< CONTRAST 4102 uint32_t Reserved28 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 4103 }; 4104 uint32_t Value; 4105 } DW0; 4106 union 4107 { 4108 //!< DWORD 1 4109 struct 4110 { 4111 uint32_t SinCS : __CODEGEN_BITFIELD( 0, 15) ; //!< SIN_C_S 4112 uint32_t CosCS : __CODEGEN_BITFIELD(16, 31) ; //!< COS_C_S 4113 }; 4114 uint32_t Value; 4115 } DW1; 4116 4117 //! \name Local enumerations 4118 4119 enum PROCAMP_ENABLE 4120 { 4121 PROCAMP_ENABLE_UNNAMED1 = 1, //!< No additional details 4122 }; 4123 4124 //! \brief BRIGHTNESS 4125 //! \details 4126 //! Brightness magnitude. 4127 enum BRIGHTNESS 4128 { 4129 BRIGHTNESS_OR00 = 0, //!< No additional details 4130 }; 4131 4132 //! \brief CONTRAST 4133 //! \details 4134 //! Contrast magnitude. 4135 enum CONTRAST 4136 { 4137 CONTRAST_10INFIXEDPOINTU47 = 128, //!< No additional details 4138 }; 4139 4140 //! \brief SIN_C_S 4141 //! \details 4142 //! UV multiplication sine factor. 4143 enum SIN_C_S 4144 { 4145 SIN_C_S_UNNAMED0 = 0, //!< No additional details 4146 }; 4147 4148 //! \brief COS_C_S 4149 //! \details 4150 //! UV multiplication cosine factor. 4151 enum COS_C_S 4152 { 4153 COS_C_S_UNNAMED256 = 256, //!< No additional details 4154 }; 4155 4156 //! \name Initializations 4157 4158 //! \brief Explicit member initialization function 4159 VEBOX_PROCAMP_STATE_CMD(); 4160 4161 static const size_t dwSize = 2; 4162 static const size_t byteSize = 8; 4163 }; 4164 4165 //! 4166 //! \brief BLACKLEVELCORRECTIONSTATE_DW75_76 4167 //! \details 4168 //! This state structure contains the IECP State Table Contents for the 4169 //! Black Point State. 4170 //! 4171 struct BLACKLEVELCORRECTIONSTATE_DW75_76_CMD 4172 { 4173 union 4174 { 4175 struct 4176 { 4177 /// DWORD 0 4178 uint32_t BlackPointOffsetR : __CODEGEN_BITFIELD( 0, 12) ; ///< S13 4179 uint32_t Reserved13 : __CODEGEN_BITFIELD(13, 31) ; ///< U19 4180 }; 4181 uint32_t Value; 4182 } DW0; 4183 union 4184 { 4185 struct 4186 { 4187 /// DWORD 1 4188 uint32_t BlackPointOffsetB : __CODEGEN_BITFIELD( 0, 12) ; ///< S13 4189 uint32_t BlackPointOffsetG : __CODEGEN_BITFIELD(13, 25) ; ///< S13 4190 uint32_t Reserved58 : __CODEGEN_BITFIELD(26, 31) ; ///< U6 4191 }; 4192 uint32_t Value; 4193 } DW1; 4194 4195 //! \name Local enumerations 4196 4197 enum BLACK_POINT_OFFSET_R 4198 { 4199 BLACK_POINT_OFFSET_R_UNNAMED0 = 0, ///< 4200 }; 4201 enum BLACK_POINT_OFFSET_B 4202 { 4203 BLACK_POINT_OFFSET_B_UNNAMED0 = 0, ///< 4204 }; 4205 enum BLACK_POINT_OFFSET_G 4206 { 4207 BLACK_POINT_OFFSET_G_UNNAMED0 = 0, ///< 4208 }; 4209 4210 //! \name Initializations 4211 4212 //! \brief Explicit member initialization function 4213 BLACKLEVELCORRECTIONSTATE_DW75_76_CMD(); 4214 4215 static const size_t DW_SIZE = 2; 4216 static const size_t BYTE_SIZE = 8; 4217 }; 4218 4219 //! 4220 //! \brief VEBOX_FORWARD_GAMMA_CORRECTION_STATE 4221 //! \details 4222 //! This state structure contains the Forward Gamma Correction state. 4223 //! 4224 struct VEBOX_FORWARD_GAMMA_CORRECTION_STATE_CMD 4225 { 4226 union 4227 { 4228 struct 4229 { 4230 /// DWORD 0 4231 uint32_t ForwardGammaCorrectionEnable : __CODEGEN_BITFIELD( 0, 0) ; ///< U1 4232 uint32_t Reserved1 : __CODEGEN_BITFIELD( 1, 7) ; ///< U7 4233 uint32_t PwlFwdGammaPoint1 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4234 uint32_t PwlFwdGammaPoint2 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4235 uint32_t PwlFwdGammaPoint3 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4236 }; 4237 uint32_t Value; 4238 } DW0; 4239 union 4240 { 4241 struct 4242 { 4243 /// DWORD 1 4244 uint32_t PwlFwdGammaPoint4 : __CODEGEN_BITFIELD( 0, 7) ; ///< U8 4245 uint32_t PwlFwdGammaPoint5 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4246 uint32_t PwlFwdGammaPoint6 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4247 uint32_t PwlFwdGammaPoint7 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4248 }; 4249 uint32_t Value; 4250 } DW1; 4251 union 4252 { 4253 struct 4254 { 4255 /// DWORD 2 4256 uint32_t PwlFwdGammaPoint8 : __CODEGEN_BITFIELD( 0, 7) ; ///< U8 4257 uint32_t PwlFwdGammaPoint9 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4258 uint32_t PwlFwdGammaPoint10 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4259 uint32_t PwlFwdGammaPoint11 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4260 }; 4261 uint32_t Value; 4262 } DW2; 4263 union 4264 { 4265 struct 4266 { 4267 /// DWORD 3 4268 uint32_t PwlFwdGammaBias1 : __CODEGEN_BITFIELD( 0, 7) ; ///< U8 4269 uint32_t PwlFwdGammaBias2 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4270 uint32_t PwlFwdGammaBias3 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4271 uint32_t PwlFwdGammaBias4 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4272 }; 4273 uint32_t Value; 4274 } DW3; 4275 union 4276 { 4277 struct 4278 { 4279 /// DWORD 4 4280 uint32_t PwlFwdGammaBias5 : __CODEGEN_BITFIELD( 0, 7) ; ///< U8 4281 uint32_t PwlFwdGammaBias6 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4282 uint32_t PwlFwdGammaBias7 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4283 uint32_t PwlFwdGammaBias8 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4284 }; 4285 uint32_t Value; 4286 } DW4; 4287 union 4288 { 4289 struct 4290 { 4291 /// DWORD 5 4292 uint32_t PwlFwdGammaBias9 : __CODEGEN_BITFIELD( 0, 7) ; ///< U8 4293 uint32_t PwlFwdGammaBias10 : __CODEGEN_BITFIELD( 8, 15) ; ///< U8 4294 uint32_t PwlFwdGammaBias11 : __CODEGEN_BITFIELD(16, 23) ; ///< U8 4295 uint32_t Reserved184 : __CODEGEN_BITFIELD(24, 31) ; ///< U8 4296 }; 4297 uint32_t Value; 4298 } DW5; 4299 union 4300 { 4301 struct 4302 { 4303 /// DWORD 6 4304 uint32_t PwlFwdGammaSlope0 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4305 uint32_t Reserved204 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4306 uint32_t PwlFwdGammaSlope1 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4307 uint32_t Reserved220 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4308 }; 4309 uint32_t Value; 4310 } DW6; 4311 union 4312 { 4313 struct 4314 { 4315 /// DWORD 7 4316 uint32_t PwlFwdGammaSlope2 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4317 uint32_t Reserved236 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4318 uint32_t PwlFwdGammaSlope3 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4319 uint32_t Reserved252 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4320 }; 4321 uint32_t Value; 4322 } DW7; 4323 union 4324 { 4325 struct 4326 { 4327 /// DWORD 8 4328 uint32_t PwlFwdGammaSlope4 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4329 uint32_t Reserved268 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4330 uint32_t PwlFwdGammaSlope5 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4331 uint32_t Reserved284 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4332 }; 4333 uint32_t Value; 4334 } DW8; 4335 union 4336 { 4337 struct 4338 { 4339 /// DWORD 9 4340 uint32_t PwlFwdGammaSlope6 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4341 uint32_t Reserved300 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4342 uint32_t PwlFwdGammaSlope7 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4343 uint32_t Reserved316 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4344 }; 4345 uint32_t Value; 4346 } DW9; 4347 union 4348 { 4349 struct 4350 { 4351 /// DWORD 10 4352 uint32_t PwlFwdGammaSlope8 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4353 uint32_t Reserved332 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4354 uint32_t PwlFwdGammaSlope9 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4355 uint32_t Reserved348 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4356 }; 4357 uint32_t Value; 4358 } DW10; 4359 union 4360 { 4361 struct 4362 { 4363 /// DWORD 11 4364 uint32_t PwlFwdGammaSlope10 : __CODEGEN_BITFIELD( 0, 11) ; ///< U48 4365 uint32_t Reserved364 : __CODEGEN_BITFIELD(12, 15) ; ///< U4 4366 uint32_t PwlFwdGammaSlope11 : __CODEGEN_BITFIELD(16, 27) ; ///< U48 4367 uint32_t Reserved380 : __CODEGEN_BITFIELD(28, 31) ; ///< U4 4368 }; 4369 uint32_t Value; 4370 } DW11; 4371 4372 //! \name Local enumerations 4373 4374 enum PWL_FWD_GAMMA_POINT_1 4375 { 4376 PWL_FWD_GAMMA_POINT_1_UNNAMED30 = 30, ///< 4377 }; 4378 enum PWL_FWD_GAMMA_POINT_2 4379 { 4380 PWL_FWD_GAMMA_POINT_2_UNNAMED55 = 55, ///< 4381 }; 4382 enum PWL_FWD_GAMMA_POINT_3 4383 { 4384 PWL_FWD_GAMMA_POINT_3_UNNAMED79 = 79, ///< 4385 }; 4386 enum PWL_FWD_GAMMA_POINT_4 4387 { 4388 PWL_FWD_GAMMA_POINT_4_UNNAMED101 = 101, ///< 4389 }; 4390 enum PWL_FWD_GAMMA_POINT_5 4391 { 4392 PWL_FWD_GAMMA_POINT_5_UNNAMED122 = 122, ///< 4393 }; 4394 enum PWL_FWD_GAMMA_POINT_6 4395 { 4396 PWL_FWD_GAMMA_POINT_6_UNNAMED141 = 141, ///< 4397 }; 4398 enum PWL_FWD_GAMMA_POINT_7 4399 { 4400 PWL_FWD_GAMMA_POINT_7_UNNAMED162 = 162, ///< 4401 }; 4402 enum PWL_FWD_GAMMA_POINT_8 4403 { 4404 PWL_FWD_GAMMA_POINT_8_UNNAMED181 = 181, ///< 4405 }; 4406 enum PWL_FWD_GAMMA_POINT_9 4407 { 4408 PWL_FWD_GAMMA_POINT_9_UNNAMED200 = 200, ///< 4409 }; 4410 enum PWL_FWD_GAMMA_POINT_10 4411 { 4412 PWL_FWD_GAMMA_POINT_10_UNNAMED219 = 219, ///< 4413 }; 4414 enum PWL_FWD_GAMMA_POINT_11 4415 { 4416 PWL_FWD_GAMMA_POINT_11_UNNAMED237 = 237, ///< 4417 }; 4418 enum PWL_FWD_GAMMA_BIAS_1 4419 { 4420 PWL_FWD_GAMMA_BIAS_1_UNNAMED3 = 3, ///< 4421 }; 4422 enum PWL_FWD_GAMMA_BIAS_2 4423 { 4424 PWL_FWD_GAMMA_BIAS_2_UNNAMED10 = 10, ///< 4425 }; 4426 enum PWL_FWD_GAMMA_BIAS_3 4427 { 4428 PWL_FWD_GAMMA_BIAS_3_UNNAMED20 = 20, ///< 4429 }; 4430 enum PWL_FWD_GAMMA_BIAS_4 4431 { 4432 PWL_FWD_GAMMA_BIAS_4_UNNAMED33 = 33, ///< 4433 }; 4434 enum PWL_FWD_GAMMA_BIAS_5 4435 { 4436 PWL_FWD_GAMMA_BIAS_5_UNNAMED49 = 49, ///< 4437 }; 4438 enum PWL_FWD_GAMMA_BIAS_6 4439 { 4440 PWL_FWD_GAMMA_BIAS_6_UNNAMED67 = 67, ///< 4441 }; 4442 enum PWL_FWD_GAMMA_BIAS_7 4443 { 4444 PWL_FWD_GAMMA_BIAS_7_UNNAMED92 = 92, ///< 4445 }; 4446 enum PWL_FWD_GAMMA_BIAS_8 4447 { 4448 PWL_FWD_GAMMA_BIAS_8_UNNAMED117 = 117, ///< 4449 }; 4450 enum PWL_FWD_GAMMA_BIAS_9 4451 { 4452 PWL_FWD_GAMMA_BIAS_9_UNNAMED147 = 147, ///< 4453 }; 4454 enum PWL_FWD_GAMMA_BIAS_10 4455 { 4456 PWL_FWD_GAMMA_BIAS_10_UNNAMED180 = 180, ///< 4457 }; 4458 enum PWL_FWD_GAMMA_BIAS_11 4459 { 4460 PWL_FWD_GAMMA_BIAS_11_UNNAMED215 = 215, ///< 4461 }; 4462 enum PWL_FWD_GAMMA_SLOPE_0 4463 { 4464 PWL_FWD_GAMMA_SLOPE_0_26256 = 26, ///< 4465 }; 4466 enum PWL_FWD_GAMMA_SLOPE_1 4467 { 4468 PWL_FWD_GAMMA_SLOPE_1_72256 = 72, ///< 4469 }; 4470 enum PWL_FWD_GAMMA_SLOPE_2 4471 { 4472 PWL_FWD_GAMMA_SLOPE_2_107256 = 107, ///< 4473 }; 4474 enum PWL_FWD_GAMMA_SLOPE_3 4475 { 4476 PWL_FWD_GAMMA_SLOPE_3_151256 = 151, ///< 4477 }; 4478 enum PWL_FWD_GAMMA_SLOPE_4 4479 { 4480 PWL_FWD_GAMMA_SLOPE_4_195256 = 195, ///< 4481 }; 4482 enum PWL_FWD_GAMMA_SLOPE_5 4483 { 4484 PWL_FWD_GAMMA_SLOPE_5_243256 = 243, ///< 4485 }; 4486 enum PWL_FWD_GAMMA_SLOPE_6 4487 { 4488 PWL_FWD_GAMMA_SLOPE_6_305256 = 305, ///< 4489 }; 4490 enum PWL_FWD_GAMMA_SLOPE_7 4491 { 4492 PWL_FWD_GAMMA_SLOPE_7_337256 = 337, ///< 4493 }; 4494 enum PWL_FWD_GAMMA_SLOPE_8 4495 { 4496 PWL_FWD_GAMMA_SLOPE_8_404256 = 404, ///< 4497 }; 4498 enum PWL_FWD_GAMMA_SLOPE_9 4499 { 4500 PWL_FWD_GAMMA_SLOPE_9_445256 = 445, ///< 4501 }; 4502 enum PWL_FWD_GAMMA_SLOPE_10 4503 { 4504 PWL_FWD_GAMMA_SLOPE_10_498256 = 498, ///< 4505 }; 4506 enum PWL_FWD_GAMMA_SLOPE_11 4507 { 4508 PWL_FWD_GAMMA_SLOPE_11_555256 = 555, ///< 4509 }; 4510 4511 //! \name Initializations 4512 4513 //! \brief Explicit member initialization function 4514 VEBOX_FORWARD_GAMMA_CORRECTION_STATE_CMD(); 4515 4516 static const size_t DW_SIZE = 12; 4517 static const size_t BYTE_SIZE = 48; 4518 }; 4519 4520 //! 4521 //! \brief VEBOX_IECP_STATE 4522 //! \details 4523 //! 4524 //! 4525 struct VEBOX_IECP_STATE_CMD 4526 { 4527 VEBOX_STD_STE_STATE_CMD StdSteState ; ///< VEBOX_STD_STE_STATE 4528 VEBOX_ACE_LACE_STATE_CMD AceState ; ///< VEBOX_ACE_LACE_STATE 4529 VEBOX_TCC_STATE_CMD TccState ; ///< VEBOX_TCC_STATE 4530 VEBOX_PROCAMP_STATE_CMD ProcampState ; ///< VEBOX_PROCAMP_STATE 4531 VEBOX_CSC_STATE_CMD CscState ; ///< VEBOX_CSC_STATE 4532 VEBOX_ALPHA_AOI_STATE_CMD AlphaAoiState ; ///< VEBOX_ALPHA_AOI_STATE 4533 VEBOX_CCM_STATE_CMD CcmState ; ///< VEBOX_CCM_STATE 4534 BLACKLEVELCORRECTIONSTATE_DW75_76_CMD BlackLevelCorrectionState ; ///< Black Level Correction State - DW75..76 4535 VEBOX_FORWARD_GAMMA_CORRECTION_STATE_CMD ForwardGammaCorrection ; ///< VEBOX_FORWARD_GAMMA_CORRECTION_STATE 4536 VEBOX_FRONT_END_CSC_STATE_CMD FrontEndCsc ; ///< VEBOX_FRONT_END_CSC_STATE 4537 4538 //! \name Local enumerations 4539 4540 //! \name Initializations 4541 4542 //! \brief Explicit member initialization function 4543 VEBOX_IECP_STATE_CMD(); 4544 4545 static const size_t DW_SIZE = 97; 4546 static const size_t BYTE_SIZE = 388; 4547 }; 4548 4549 //! 4550 //! \brief VEBOX_STATE 4551 //! \details 4552 //! This command controls the internal functions of the VEBOX. This command 4553 //! has a set of indirect state buffers: DN/DI state 4554 //! IECP general state 4555 //! IECP Gamut Expansion/Compression state 4556 //! IECP Gamut Vertex Table state 4557 //! Capture Pipe state 4558 //! 4559 //! 4560 struct VEBOX_STATE_CMD 4561 { 4562 union 4563 { 4564 //!< DWORD 0 4565 struct 4566 { 4567 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 4568 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 4569 uint32_t SubopcodeB : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODE_B 4570 uint32_t SubopcodeA : __CODEGEN_BITFIELD(21, 23) ; //!< SUBOPCODE_A 4571 uint32_t CommandOpcode : __CODEGEN_BITFIELD(24, 26) ; //!< COMMAND_OPCODE 4572 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 4573 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 4574 }; 4575 uint32_t Value; 4576 } DW0; 4577 union 4578 { 4579 //!< DWORD 1 4580 struct 4581 { 4582 uint32_t ColorGamutExpansionEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< Color Gamut Expansion Enable 4583 uint32_t ColorGamutCompressionEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< Color Gamut Compression Enable 4584 uint32_t GlobalIecpEnable : __CODEGEN_BITFIELD( 2, 2) ; //!< Global IECP Enable 4585 uint32_t DnEnable : __CODEGEN_BITFIELD( 3, 3) ; //!< DN_ENABLE 4586 uint32_t DiEnable : __CODEGEN_BITFIELD( 4, 4) ; //!< DI_ENABLE 4587 uint32_t DnDiFirstFrame : __CODEGEN_BITFIELD( 5, 5) ; //!< DNDI_FIRST_FRAME 4588 uint32_t DownsampleMethod422to420 : __CODEGEN_BITFIELD( 6, 6) ; //!< _422__420_DOWNSAMPLE_METHOD 4589 uint32_t DownsampleMethod444to422 : __CODEGEN_BITFIELD( 7, 7) ; //!< _444__422_DOWNSAMPLE_METHOD 4590 uint32_t DiOutputFrames : __CODEGEN_BITFIELD( 8, 9) ; //!< DI_OUTPUT_FRAMES 4591 uint32_t DemosaicEnable : __CODEGEN_BITFIELD(10, 10) ; //!< Demosaic Enable 4592 uint32_t VignetteEnable : __CODEGEN_BITFIELD(11, 11) ; //!< Vignette Enable 4593 uint32_t AlphaPlaneEnable : __CODEGEN_BITFIELD(12, 12) ; //!< Alpha Plane Enable 4594 uint32_t HotPixelFilteringEnable : __CODEGEN_BITFIELD(13, 13) ; //!< Hot Pixel Filtering Enable 4595 uint32_t SingleSliceVeboxEnable : __CODEGEN_BITFIELD(14, 14) ; //!< Single Slice VEBOX Enable 4596 uint32_t Reserved47 : __CODEGEN_BITFIELD(15, 24) ; //!< Reserved 4597 uint32_t StateSurfaceControlBits : __CODEGEN_BITFIELD(25, 31) ; //!< State Surface Control Bits 4598 }; 4599 uint32_t Value; 4600 } DW1; 4601 union 4602 { 4603 //!< DWORD 2 4604 struct 4605 { 4606 uint32_t Reserved64 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 4607 uint32_t DnDiStatePointerLow : __CODEGEN_BITFIELD(12, 31) ; //!< DN/DI State Pointer Low 4608 }; 4609 uint32_t Value; 4610 } DW2; 4611 union 4612 { 4613 //!< DWORD 3 4614 struct 4615 { 4616 uint32_t DnDiStatePointerHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< DN/DI State Pointer High 4617 uint32_t Reserved112 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 4618 }; 4619 uint32_t Value; 4620 } DW3; 4621 union 4622 { 4623 //!< DWORD 4 4624 struct 4625 { 4626 uint32_t Reserved128 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 4627 uint32_t IecpStatePointerLow : __CODEGEN_BITFIELD(12, 31) ; //!< IECP State Pointer Low 4628 }; 4629 uint32_t Value; 4630 } DW4; 4631 union 4632 { 4633 //!< DWORD 5 4634 struct 4635 { 4636 uint32_t IecpStatePointerHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< IECP State Pointer High 4637 uint32_t Reserved176 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 4638 }; 4639 uint32_t Value; 4640 } DW5; 4641 union 4642 { 4643 //!< DWORD 6 4644 struct 4645 { 4646 uint32_t Reserved192 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 4647 uint32_t GamutStatePointerLow : __CODEGEN_BITFIELD(12, 31) ; //!< Gamut State Pointer Low 4648 }; 4649 uint32_t Value; 4650 } DW6; 4651 union 4652 { 4653 //!< DWORD 7 4654 struct 4655 { 4656 uint32_t GamutStatePointerHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Gamut State Pointer High 4657 uint32_t Reserved240 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 4658 }; 4659 uint32_t Value; 4660 } DW7; 4661 union 4662 { 4663 //!< DWORD 8 4664 struct 4665 { 4666 uint32_t Reserved256 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 4667 uint32_t VertexTableStatePointerLow : __CODEGEN_BITFIELD(12, 31) ; //!< Vertex Table State Pointer Low 4668 }; 4669 uint32_t Value; 4670 } DW8; 4671 union 4672 { 4673 //!< DWORD 9 4674 struct 4675 { 4676 uint32_t VertexTableStatePointerHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Vertex Table State Pointer High 4677 uint32_t Reserved304 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 4678 }; 4679 uint32_t Value; 4680 } DW9; 4681 union 4682 { 4683 //!< DWORD 10 4684 struct 4685 { 4686 uint32_t Reserved320 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 4687 uint32_t CapturePipeStatePointerLow : __CODEGEN_BITFIELD(12, 31) ; //!< Capture Pipe State Pointer Low 4688 }; 4689 uint32_t Value; 4690 } DW10; 4691 union 4692 { 4693 //!< DWORD 11 4694 struct 4695 { 4696 uint32_t CapturePipeStatePointerHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Capture Pipe State Pointer High 4697 uint32_t Reserved368 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 4698 }; 4699 uint32_t Value; 4700 } DW11; 4701 4702 //! \name Local enumerations 4703 4704 enum SUBOPCODE_B 4705 { 4706 SUBOPCODE_B_UNNAMED2 = 2, //!< No additional details 4707 }; 4708 4709 enum SUBOPCODE_A 4710 { 4711 SUBOPCODE_A_UNNAMED0 = 0, //!< No additional details 4712 }; 4713 4714 enum COMMAND_OPCODE 4715 { 4716 COMMAND_OPCODE_VEBOX = 4, //!< No additional details 4717 }; 4718 4719 enum PIPELINE 4720 { 4721 PIPELINE_MEDIA = 2, //!< No additional details 4722 }; 4723 4724 enum COMMAND_TYPE 4725 { 4726 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 4727 }; 4728 4729 //! \brief DN_ENABLE 4730 //! \details 4731 //! Denoise is bypassed if this is low - BNE is still calculated and output, 4732 //! but the denoised fields are not. VDI does not read in the denoised 4733 //! previous frame but uses the pointer for the original previous frame. 4734 enum DN_ENABLE 4735 { 4736 DN_ENABLE_DONOTDENOISEFRAME = 0, //!< No additional details 4737 DN_ENABLE_DENOISEFRAME = 1, //!< No additional details 4738 }; 4739 4740 //! \brief DI_ENABLE 4741 //! \details 4742 //! Deinterlacer is bypassed if this is disabled: the output is the same as 4743 //! the input (same as a 2:2 cadence). 4744 //! FMD and STMM are not calculated and the values in the response 4745 //! message are 0. 4746 enum DI_ENABLE 4747 { 4748 DI_ENABLE_DONOTCALCULATEDI = 0, //!< No additional details 4749 DI_ENABLE_CALCULATEDI = 1, //!< No additional details 4750 }; 4751 4752 //! \brief DNDI_FIRST_FRAME 4753 //! \details 4754 //! Indicates that this is the first frame of the stream, so previous clean 4755 //! is not available. 4756 enum DNDI_FIRST_FRAME 4757 { 4758 DNDI_FIRST_FRAME_NOTFIRSTFIELD_PREVIOUSCLEANSURFACESTATEISVALID = 0, //!< No additional details 4759 DNDI_FIRST_FRAME_FIRSTFIELD_PREVIOUSCLEANSURFACESTATEISINVALID = 1, //!< No additional details 4760 }; 4761 4762 //! \brief _422__420_DOWNSAMPLE_METHOD 4763 //! \details 4764 //! To enable averaging in case of 420 (NV12/P016) output formats, 4765 //! 444->422 and 422->420 should be set. 4766 enum _422__420_DOWNSAMPLE_METHOD 4767 { 4768 _422_420_DOWNSAMPLE_METHOD_DROPLOWERCHROMAOFTHEPAIR = 0, //!< No additional details 4769 _422_420_DOWNSAMPLE_METHOD_AVERAGEVERTICALLYALIGNEDCHROMAS = 1, //!< No additional details 4770 }; 4771 4772 //! \brief _444__422_DOWNSAMPLE_METHOD 4773 //! \details 4774 //! <table border="1"> 4775 //! <tr> 4776 //! <td>444->422</td> 4777 //! <td>422->420</td> 4778 //! <td>Description</td> 4779 //! </tr> 4780 //! <tr> 4781 //! <td>0</td> 4782 //! <td>0</td> 4783 //! <td>No averaging, only down sampling</td> 4784 //! </tr> 4785 //! <tr> 4786 //! <td>0</td> 4787 //! <td>1</td> 4788 //! <td>Not Supported</td> 4789 //! </tr> 4790 //! <tr> 4791 //! <td>1</td> 4792 //! <td>0</td> 4793 //! <td>Only Horizontal averaging</td> 4794 //! </tr> 4795 //! <tr> 4796 //! <td>1</td> 4797 //! <td>1</td> 4798 //! <td>Horizontal and Vertical averaging</td> 4799 //! </tr> 4800 //! </table> 4801 enum _444__422_DOWNSAMPLE_METHOD 4802 { 4803 _444_422_DOWNSAMPLE_METHOD_DROPRIGHTCHROMAOFTHEPAIR = 0, //!< No additional details 4804 _444_422_DOWNSAMPLE_METHOD_AVERAGEHORIZONTALLYALIGNEDCHROMAS = 1, //!< No additional details 4805 }; 4806 4807 //! \brief DI_OUTPUT_FRAMES 4808 //! \details 4809 //! Indicates which frames to output in DI mode. 4810 enum DI_OUTPUT_FRAMES 4811 { 4812 DI_OUTPUT_FRAMES_OUTPUTBOTHFRAMES = 0, //!< No additional details 4813 DI_OUTPUT_FRAMES_OUTPUTPREVIOUSFRAMEONLY = 1, //!< No additional details 4814 DI_OUTPUT_FRAMES_OUTPUTCURRENTFRAMEONLY = 2, //!< No additional details 4815 }; 4816 4817 //! \name Initializations 4818 4819 //! \brief Explicit member initialization function 4820 VEBOX_STATE_CMD(); 4821 4822 static const size_t dwSize = 12; 4823 static const size_t byteSize = 48; 4824 }; 4825 4826 //! 4827 //! \brief VEBOX_SURFACE_STATE 4828 //! \details 4829 //! The input and output data containers accessed are called "surfaces". 4830 //! Surface state is sent to VEBOX via an inline state command rather than 4831 //! using binding tables. SURFACE_STATE contains the parameters defining 4832 //! each surface to be accessed, including its size, format, and offsets to 4833 //! its subsurfaces. The surface's base address is in the execution command. 4834 //! Despite having multiple input and output surfaces, we limit the number 4835 //! of surface states to one for input surfaces and one for output surfaces. 4836 //! The other surfaces are derived from the input/output surface states. 4837 //! 4838 //! The Current Frame Input surface uses the Input SURFACE_STATE 4839 //! 4840 //! The Previous Denoised Input surface uses the Input SURFACE_STATE. (For 4841 //! 12-bit Bayer pattern inputs this will be 8-bit.) 4842 //! 4843 //! The Current Denoised Output surface uses the Input SURFACE_STATE. (For 4844 //! 12-bit Bayer pattern inputs this will be 8-bit.) 4845 //! 4846 //! The STMM/Noise History Input surface uses the Input SURFACE_STATE with 4847 //! Tile-Y and Width/Height a multiple of 4. 4848 //! 4849 //! The STMM/Noise History Output surface uses the Input SURFACE_STATE with 4850 //! Tile-Y and Width/Height a multiple of 4. 4851 //! 4852 //! The Current Deinterlaced/IECP Frame Output surface uses the Output 4853 //! SURFACE_STATE. 4854 //! 4855 //! The Previous Deinterlaced/IECP Frame Output surface uses the Output 4856 //! SURFACE_STATE. 4857 //! 4858 //! The FMD per block output / per Frame Output surface uses the Linear 4859 //! SURFACE_STATE (see note below). 4860 //! 4861 //! The Alpha surface uses the Linear A8 SURFACE_STATE with Width/Height 4862 //! equal to Input Surface. Pitch is width rounded to next 64. 4863 //! 4864 //! The Vignette Correction surface uses the Linear 16-bit SURFACE_STATE 4865 //! with: 4866 //! Width = 4 * ((Input Width 3)/4) 4867 //! Height = ((Input Height 3)/4) 4868 //! Pitch in bytes is (vignette width*2) rounded to next 64. 4869 //! 4870 //! The STMM height is the same as the Input Surface height except when the 4871 //! input Surface Format is Bayer Pattern and the Bayer Pattern Offset is 10 4872 //! or 11, in which case the height is the input height + 4. For Bayer 4873 //! pattern inputs when the Bayer Pattern Offset is 10 or 11, the Current 4874 //! Denoised Output/Previous Denoised Input will also have a height which is 4875 //! the input height + 4. For Bayer pattern inputs only the Current Denoised 4876 //! Output/Previous Denoised Input are in Tile-Y. 4877 //! 4878 //! The linear surface for FMD statistics is linear (not tiled). The height 4879 //! of the per block statistics is (Input Height +3)/4 - the Input Surface 4880 //! height in pixels is rounded up to the next even 4 and divided by 4. The 4881 //! width of the per block section in bytes is equal to the width of the 4882 //! Input Surface in pixels rounded up to the next 16 bytes. The pitch of 4883 //! the per block section in bytes is equal to the width of the Input 4884 //! Surface in pixels rounded up to the next 64 bytes. 4885 //! 4886 //! The STMM surfaces must be identical to the Input surface except for the 4887 //! tiling mode must be Tile-Y and the pitch must be legal for Tile-Y 4888 //! (increased to the next larger legal pitch). If the input surface is 4889 //! packed (Surface Format from 0 to 3 for DN/DI) or 12/10-bit Bayer Pattern 4890 //! then the pitch for the STMM surface is 1/2 the pitch of the input 4891 //! surface (rounded up to the next larger legal Tile-Y pitch). The width 4892 //! and height must be a multiple of 4 rounded up from the input height. 4893 //! 4894 //! VEBOX may write to memory between the surface width and the surface 4895 //! pitch for output surfaces. 4896 //! 4897 //! For 8bit Alpha input, when converting to 16bit output it is padded with 4898 //! 8bit zeros in the LSB. 4899 //! 4900 struct VEBOX_SURFACE_STATE_CMD 4901 { 4902 union 4903 { 4904 //!< DWORD 0 4905 struct 4906 { 4907 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 4908 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 4909 uint32_t SubopcodeB : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODE_B 4910 uint32_t SubopcodeA : __CODEGEN_BITFIELD(21, 23) ; //!< SUBOPCODE_A 4911 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(24, 26) ; //!< MEDIA_COMMAND_OPCODE 4912 uint32_t MediaCommandPipeline : __CODEGEN_BITFIELD(27, 28) ; //!< MEDIA_COMMAND_PIPELINE 4913 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 4914 }; 4915 uint32_t Value; 4916 } DW0; 4917 union 4918 { 4919 //!< DWORD 1 4920 struct 4921 { 4922 uint32_t SurfaceIdentification : __CODEGEN_BITFIELD( 0, 0) ; //!< SURFACE_IDENTIFICATION 4923 uint32_t Reserved33 : __CODEGEN_BITFIELD( 1, 31) ; //!< Reserved 4924 }; 4925 uint32_t Value; 4926 } DW1; 4927 union 4928 { 4929 //!< DWORD 2 4930 struct 4931 { 4932 uint32_t Reserved64 : __CODEGEN_BITFIELD( 0, 3) ; //!< Reserved 4933 uint32_t Width : __CODEGEN_BITFIELD( 4, 17) ; //!< Width 4934 uint32_t Height : __CODEGEN_BITFIELD(18, 31) ; //!< Height 4935 }; 4936 uint32_t Value; 4937 } DW2; 4938 union 4939 { 4940 //!< DWORD 3 4941 struct 4942 { 4943 uint32_t TileWalk : __CODEGEN_BITFIELD( 0, 0) ; //!< TILE_WALK 4944 uint32_t TiledSurface : __CODEGEN_BITFIELD( 1, 1) ; //!< TILED_SURFACE 4945 uint32_t HalfPitchForChroma : __CODEGEN_BITFIELD( 2, 2) ; //!< Half Pitch for Chroma 4946 uint32_t SurfacePitch : __CODEGEN_BITFIELD( 3, 19) ; //!< Surface Pitch 4947 uint32_t Reserved116 : __CODEGEN_BITFIELD(20, 23) ; //!< Reserved 4948 uint32_t BayerPatternFormat : __CODEGEN_BITFIELD(24, 24) ; //!< BAYER_PATTERN_FORMAT 4949 uint32_t BayerPatternOffset : __CODEGEN_BITFIELD(25, 26) ; //!< BAYER_PATTERN_OFFSET 4950 uint32_t InterleaveChroma : __CODEGEN_BITFIELD(27, 27) ; //!< Interleave Chroma 4951 uint32_t SurfaceFormat : __CODEGEN_BITFIELD(28, 31) ; //!< SURFACE_FORMAT 4952 }; 4953 uint32_t Value; 4954 } DW3; 4955 union 4956 { 4957 //!< DWORD 4 4958 struct 4959 { 4960 uint32_t YOffsetForU : __CODEGEN_BITFIELD( 0, 14) ; //!< Y Offset for U 4961 uint32_t Reserved143 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 4962 uint32_t XOffsetForU : __CODEGEN_BITFIELD(16, 28) ; //!< X Offset for U 4963 uint32_t Reserved157 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 4964 }; 4965 uint32_t Value; 4966 } DW4; 4967 union 4968 { 4969 //!< DWORD 5 4970 struct 4971 { 4972 uint32_t YOffsetForV : __CODEGEN_BITFIELD( 0, 14) ; //!< Y Offset for V 4973 uint32_t Reserved175 : __CODEGEN_BITFIELD(15, 15) ; //!< Reserved 4974 uint32_t XOffsetForV : __CODEGEN_BITFIELD(16, 28) ; //!< X Offset for V 4975 uint32_t Reserved189 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 4976 }; 4977 uint32_t Value; 4978 } DW5; 4979 union 4980 { 4981 //!< DWORD 6 4982 struct 4983 { 4984 uint32_t Dword67 ; //!< DWORD6..7 4985 }; 4986 uint32_t Value; 4987 } DW6; 4988 4989 //! \name Local enumerations 4990 4991 enum SUBOPCODE_B 4992 { 4993 SUBOPCODE_B_VEBOX = 0, //!< No additional details 4994 }; 4995 4996 enum SUBOPCODE_A 4997 { 4998 SUBOPCODE_A_VEBOX = 0, //!< No additional details 4999 }; 5000 5001 enum MEDIA_COMMAND_OPCODE 5002 { 5003 MEDIA_COMMAND_OPCODE_VEBOX = 4, //!< No additional details 5004 }; 5005 5006 enum MEDIA_COMMAND_PIPELINE 5007 { 5008 MEDIA_COMMAND_PIPELINE_MEDIA = 2, //!< No additional details 5009 }; 5010 5011 enum COMMAND_TYPE 5012 { 5013 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 5014 }; 5015 5016 //! \brief SURFACE_IDENTIFICATION 5017 //! \details 5018 //! Specifies which set of surfaces this command refers to: 5019 enum SURFACE_IDENTIFICATION 5020 { 5021 SURFACE_IDENTIFICATION_INPUTSURFACEANDDENOISEDCURRENTOUTPUTSURFACE = 0, //!< No additional details 5022 SURFACE_IDENTIFICATION_OUTPUTSURFACE_ALLEXCEPTTHEDENOISEDCURRENTOUTPUTSURFACE = 1, //!< No additional details 5023 }; 5024 5025 //! \brief TILE_WALK 5026 //! \details 5027 //! This field specifies the type of memory tiling (XMajor or YMajor) 5028 //! employed to tile this surface. See <em>Memory Interface Functions</em> 5029 //! for details on memory tiling and restrictions. 5030 //! This field is ignored when the surface is linear. 5031 enum TILE_WALK 5032 { 5033 TILE_WALK_TILEWALKXMAJOR = 0, //!< No additional details 5034 TILE_WALK_TILEWALKYMAJOR = 1, //!< No additional details 5035 }; 5036 5037 //! \brief TILED_SURFACE 5038 //! \details 5039 //! This field specifies whether the surface is tiled. 5040 enum TILED_SURFACE 5041 { 5042 TILED_SURFACE_FALSE = 0, //!< Linear 5043 TILED_SURFACE_TRUE = 1, //!< Tiled 5044 }; 5045 5046 //! \brief BAYER_PATTERN_FORMAT 5047 //! \details 5048 //! Specifies the format of the Bayer Pattern: 5049 enum BAYER_PATTERN_FORMAT 5050 { 5051 BAYER_PATTERN_FORMAT_8_BITINPUTATA8_BITSTRIDE = 0, //!< No additional details 5052 BAYER_PATTERN_FORMAT_12OR10_BITINPUTATA16_BITSTRIDEVALIDDATAISINTHEMSBS = 1, //!< No additional details 5053 }; 5054 5055 //! \brief BAYER_PATTERN_OFFSET 5056 //! \details 5057 //! Specifies the starting pixel offset for the Bayer pattern used for 5058 //! Capture Pipe. 5059 enum BAYER_PATTERN_OFFSET 5060 { 5061 BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISBLUE = 0, //!< No additional details 5062 BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISRED = 1, //!< No additional details 5063 BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISRED = 2, //!< No additional details 5064 BAYER_PATTERN_OFFSET_PIXELATX0_Y0ISGREEN_PIXELATX1_Y0ISBLUE = 3, //!< No additional details 5065 }; 5066 5067 //! \brief SURFACE_FORMAT 5068 //! \details 5069 //! Specifies the format of the surface. All of the Y and G channels will 5070 //! use table 0 and all of the Cr/Cb/R/B channels will use table 1. 5071 enum SURFACE_FORMAT 5072 { 5073 SURFACE_FORMAT_YCRCBNORMAL = 0, //!< No additional details 5074 SURFACE_FORMAT_YCRCBSWAPUVY = 1, //!< No additional details 5075 SURFACE_FORMAT_YCRCBSWAPUV = 2, //!< No additional details 5076 SURFACE_FORMAT_YCRCBSWAPY = 3, //!< No additional details 5077 SURFACE_FORMAT_PLANAR4208 = 4, //!< NV12 with Interleave Chroma set 5078 SURFACE_FORMAT_PACKED444A8 = 5, //!< IECP input/output only 5079 SURFACE_FORMAT_PACKED42216 = 6, //!< IECP input/output only 5080 SURFACE_FORMAT_R10G10B10A2UNORMR10G10B10A2UNORMSRGB = 7, //!< IECP output only 5081 SURFACE_FORMAT_R8G8B8A8UNORMR8G8B8A8UNORMSRGB = 8, //!< IECP input/output only 5082 SURFACE_FORMAT_PACKED44416 = 9, //!< IECP input/output only 5083 SURFACE_FORMAT_PLANAR42216 = 10, //!< IECP input/output only 5084 SURFACE_FORMAT_Y8UNORM = 11, //!< No additional details 5085 SURFACE_FORMAT_PLANAR42016 = 12, //!< IECP input/output only 5086 SURFACE_FORMAT_R16G16B16A16 = 13, //!< IECP input/output only 5087 SURFACE_FORMAT_BAYERPATTERN = 14, //!< Demosaic input only 5088 }; 5089 5090 //! \name Initializations 5091 5092 //! \brief Explicit member initialization function 5093 VEBOX_SURFACE_STATE_CMD(); 5094 5095 static const size_t dwSize = 7; 5096 static const size_t byteSize = 28; 5097 }; 5098 5099 //! 5100 //! \brief VEB_DI_IECP 5101 //! \details 5102 //! The VEB_DI_IECP command causes the VEBOX to start processing the frames 5103 //! specified by VEB_SURFACE_STATE using the parameters specified by 5104 //! VEB_DI_STATE and VEB_IECP_STATE. The processing can start and end at 5105 //! any 64 pixel column in the frame. If Starting X and Ending X are used to 5106 //! split the frame into sections, it should not be split into more than 4 5107 //! sections. 5108 //! Each VEB_DI_IECP command should be preceded by a VEB_STATE command and 5109 //! the input/output VEB_SURFACE_STATE commands. 5110 //! 5111 struct VEB_DI_IECP_CMD 5112 { 5113 union 5114 { 5115 //!< DWORD 0 5116 struct 5117 { 5118 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 5119 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 5120 uint32_t Subopb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPB 5121 uint32_t Subopa : __CODEGEN_BITFIELD(21, 23) ; //!< SUBOPA 5122 uint32_t Opcode : __CODEGEN_BITFIELD(24, 26) ; //!< OPCODE 5123 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 5124 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 5125 }; 5126 uint32_t Value; 5127 } DW0; 5128 union 5129 { 5130 //!< DWORD 1 5131 struct 5132 { 5133 uint32_t EndingX : __CODEGEN_BITFIELD( 0, 13) ; //!< Ending X 5134 uint32_t Reserved46 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 5135 uint32_t StartingX : __CODEGEN_BITFIELD(16, 29) ; //!< Starting X 5136 uint32_t Reserved62 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 5137 }; 5138 uint32_t Value; 5139 } DW1; 5140 union 5141 { 5142 //!< DWORD 2 5143 struct 5144 { 5145 uint32_t CurrentFrameSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5146 uint32_t CurrentFrameSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5147 uint32_t CurrentFrameSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5148 uint32_t CurrentFrameSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5149 uint32_t CurrentFrameSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5150 uint32_t Reserved73 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5151 uint32_t CurrentFrameInputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5152 }; 5153 uint32_t Value; 5154 } DW2; 5155 union 5156 { 5157 //!< DWORD 3 5158 struct 5159 { 5160 uint32_t CurrentFrameInputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Current Frame Input Address High 5161 uint32_t Reserved112 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5162 }; 5163 uint32_t Value; 5164 } DW3; 5165 union 5166 { 5167 //!< DWORD 4 5168 struct 5169 { 5170 uint32_t PreviousFrameSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5171 uint32_t PreviousFrameSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5172 uint32_t PreviousFrameSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5173 uint32_t PreviousFrameSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5174 uint32_t PreviousFrameSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5175 uint32_t Reserved137 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5176 uint32_t PreviousFrameInputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5177 }; 5178 uint32_t Value; 5179 } DW4; 5180 union 5181 { 5182 //!< DWORD 5 5183 struct 5184 { 5185 uint32_t PreviousFrameInputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; ///< GraphicsAddress 5186 uint32_t Reserved176 : __CODEGEN_BITFIELD(16, 31) ; ///< U14 5187 }; 5188 uint32_t Value; 5189 } DW5; 5190 union 5191 { 5192 //!< DWORD 6 5193 struct 5194 { 5195 uint32_t StmmInputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5196 uint32_t StmmInputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5197 uint32_t StmmInputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5198 uint32_t StmmInputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5199 uint32_t StmmInputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5200 uint32_t Reserved201 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5201 uint32_t StmmInputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5202 }; 5203 uint32_t Value; 5204 } DW6; 5205 union 5206 { 5207 //!< DWORD 7 5208 struct 5209 { 5210 uint32_t StmmInputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; ///< GraphicsAddress 5211 uint32_t Reserved240 : __CODEGEN_BITFIELD(16, 31) ; ///< U14 5212 }; 5213 uint32_t Value; 5214 } DW7; 5215 union 5216 { 5217 //!< DWORD 8 5218 struct 5219 { 5220 uint32_t StmmOutputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5221 uint32_t StmmOutputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5222 uint32_t StmmOutputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5223 uint32_t StmmOutputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5224 uint32_t StmmOutputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5225 uint32_t Reserved265 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5226 uint32_t StmmOutputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5227 }; 5228 uint32_t Value; 5229 } DW8; 5230 union 5231 { 5232 //!< DWORD 9 5233 struct 5234 { 5235 uint32_t StmmOutputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< STMM Output Address High 5236 uint32_t Reserved304 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5237 }; 5238 uint32_t Value; 5239 } DW9; 5240 union 5241 { 5242 //!< DWORD 10 5243 struct 5244 { 5245 uint32_t DenoisedCurrentOutputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5246 uint32_t DenoisedCurrentOutputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5247 uint32_t DenoisedCurrentOutputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5248 uint32_t DenoisedCurrentOutputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5249 uint32_t DenoisedCurrentOutputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5250 uint32_t Reserved329 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5251 uint32_t DenoisedCurrentFrameOutputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5252 }; 5253 uint32_t Value; 5254 } DW10; 5255 union 5256 { 5257 //!< DWORD 11 5258 struct 5259 { 5260 uint32_t DenoisedCurrentFrameOutputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Denoised Current Frame Output Address High 5261 uint32_t Reserved368 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5262 }; 5263 uint32_t Value; 5264 } DW11; 5265 union 5266 { 5267 //!< DWORD 12 5268 struct 5269 { 5270 uint32_t CurrentFrameOutputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5271 uint32_t CurrentFrameOutputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5272 uint32_t CurrentFrameOutputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5273 uint32_t CurrentFrameOutputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5274 uint32_t CurrentFrameOutputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5275 uint32_t Reserved393 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5276 uint32_t CurrentFrameOutputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5277 }; 5278 uint32_t Value; 5279 } DW12; 5280 union 5281 { 5282 //!< DWORD 13 5283 struct 5284 { 5285 uint32_t CurrentFrameOutputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Current Frame Output Address High 5286 uint32_t Reserved432 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5287 }; 5288 uint32_t Value; 5289 } DW13; 5290 union 5291 { 5292 //!< DWORD 14 5293 struct 5294 { 5295 uint32_t PreviousFrameOutputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5296 uint32_t PreviousFrameOutputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5297 uint32_t PreviousFrameOutputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5298 uint32_t PreviousFrameOutputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5299 uint32_t PreviousFrameOutputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5300 uint32_t Reserved457 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5301 uint32_t PreviousFrameOutputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5302 }; 5303 uint32_t Value; 5304 } DW14; 5305 union 5306 { 5307 //!< DWORD 15 5308 struct 5309 { 5310 uint32_t PreviousFrameOutputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Previous Frame Output Address High 5311 uint32_t Reserved496 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5312 }; 5313 uint32_t Value; 5314 } DW15; 5315 union 5316 { 5317 //!< DWORD 16 5318 struct 5319 { 5320 uint32_t StatisticsOutputSurfaceControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5321 uint32_t StatisticsOutputSurfaceControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5322 uint32_t StatisticsOutputSurfaceControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5323 uint32_t StatisticsOutputSurfaceControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5324 uint32_t StatisticsOutputSurfaceControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5325 uint32_t Reserved521 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5326 uint32_t StatisticsOutputAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5327 }; 5328 uint32_t Value; 5329 } DW16; 5330 union 5331 { 5332 //!< DWORD 17 5333 struct 5334 { 5335 uint32_t StatisticsOutputAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Statistics Output Address High 5336 uint32_t Reserved560 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5337 }; 5338 uint32_t Value; 5339 } DW17; 5340 union 5341 { 5342 //!< DWORD 18 5343 struct 5344 { 5345 uint32_t AlphaVignetteControlBitsAgeForQuadlruAge : __CODEGEN_BITFIELD( 0, 1) ; ///< Sub-structure 5346 uint32_t AlphaVignetteControlBitsReserved2 : __CODEGEN_BITFIELD( 2, 2) ; ///< Sub-structure 5347 uint32_t AlphaVignetteControlBitsTargetCacheTc : __CODEGEN_BITFIELD( 3, 4) ; ///< Sub-structure 5348 uint32_t AlphaVignetteControlBitsMemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD( 5, 6) ; ///< Sub-structure 5349 uint32_t AlphaVignetteControlBitsReserved : __CODEGEN_BITFIELD( 7, 8) ; ///< Sub-structure 5350 uint32_t Reserved585 : __CODEGEN_BITFIELD( 9, 11) ; ///< U2 5351 uint32_t AlphaVignetteCorrectionAddress : __CODEGEN_BITFIELD(12, 31) ; ///< GraphicsAddress 5352 }; 5353 uint32_t Value; 5354 } DW18; 5355 union 5356 { 5357 //!< DWORD 19 5358 struct 5359 { 5360 uint32_t AlphaVignetteCorrectionAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Alpha/Vignette Correction Address High 5361 uint32_t Reserved624 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 5362 }; 5363 uint32_t Value; 5364 } DW19; 5365 5366 //! \name Local enumerations 5367 5368 enum SUBOPB 5369 { 5370 SUBOPB_VEBDIIECP = 3, //!< No additional details 5371 }; 5372 5373 enum SUBOPA 5374 { 5375 SUBOPA_VEBDIIECP = 0, //!< No additional details 5376 }; 5377 5378 enum OPCODE 5379 { 5380 OPCODE_VEBOX = 4, //!< No additional details 5381 }; 5382 5383 enum PIPELINE 5384 { 5385 PIPELINE_MEDIA = 2, //!< No additional details 5386 }; 5387 5388 enum COMMAND_TYPE 5389 { 5390 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 5391 }; 5392 5393 //! \name Initializations 5394 5395 //! \brief Explicit member initialization function 5396 VEB_DI_IECP_CMD(); 5397 5398 static const size_t dwSize = 20; 5399 static const size_t byteSize = 80; 5400 }; 5401 5402 //! 5403 //! \brief VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS 5404 //! \details 5405 //! 5406 //! 5407 struct VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD 5408 { 5409 union 5410 { 5411 //!< DWORD 0 5412 struct 5413 { 5414 uint32_t AgeForQuadlruAge : __CODEGEN_BITFIELD(0, 1); //!< AGE_FOR_QUADLRU_AGE 5415 uint32_t Reserved2 : __CODEGEN_BITFIELD(2, 2); //!< Protected Data 5416 uint32_t TargetCacheTc : __CODEGEN_BITFIELD(3, 4); //!< TARGET_CACHE_TC 5417 uint32_t MemoryTypeLlcEllcCacheabilityControlLellccc : __CODEGEN_BITFIELD(5, 6); //!< MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC 5418 uint32_t Reserved7 : __CODEGEN_BITFIELD(7, 31); //!< Reserved 5419 }; 5420 uint32_t Value; 5421 } DW0; 5422 //! \name Local enumerations 5423 5424 //! \brief AGE_FOR_QUADLRU_AGE 5425 //! \details 5426 //! <p style="margin-left:3.0pt;">This field allows the selection of AGE 5427 //! parameter for a given surface in LLC or eLLC. If a particular allocation 5428 //! is done at youngest age (("0,1,2") it tends to stay longer in the cache. 5429 //! This option is given to GFX software to be able to decide which surfaces 5430 //! are more likely to generate HITs, hence need to be replaced least often 5431 //! in caches.</p> 5432 enum AGE_FOR_QUADLRU_AGE 5433 { 5434 AGE_FOR_QUADLRU_AGE_BESTCHANCE = 0, //!< Best chance of generating cache hits. 5435 AGE_FOR_QUADLRU_AGE_BETTERCHANCE = 1, //!< Better chance of generating cache hits. 5436 AGE_FOR_QUADLRU_AGE_NORMALCHANCE = 2, //!< Normal chance of generating cache hits. 5437 AGE_FOR_QUADLRU_AGE_POORCHANCE = 3, //!< Poor chance of generating cache hits. 5438 }; 5439 5440 //! \brief TARGET_CACHE_TC 5441 //! \details 5442 //! <p style="margin-left:3.0pt;">This field controls the L3$, LLC and eLLC 5443 //! (eDRAM) cacheability for a given surface. Setting of "00" points to PTE 5444 //! settings which defaults to eDRAM (when present). If no eDRAM, the access 5445 //! will be allocated to LLC. Setting of "01", allocates into LLC and 5446 //! victimizes the line to eDRAM. Setting of "10" allows the line to be 5447 //! allocated in either LLC or eDRAM. Setting of "11" is the only option for 5448 //! a memory access to be allocated in L3$ as well as LLC/eLLC</p> 5449 //! <p style="margin-left:3.0pt;">00b: eLLC Only�<i>("00" setting points TC 5450 //! selection to PTE which defaults to eLLC)</i></p> 5451 //! <p style="margin-left:3.0pt;">01b: LLC Only (W<i>orks at the allocation 5452 //! time, later victimization from LLC downgrades the line to eLLC if 5453 //! present</i>).</p> 5454 //! <p style="margin-left:3.0pt;">10b: LLC/eLLC Allowed.</p> 5455 //! <p style="margin-left:3.0pt;">11b: L3, LLC, eLLC Allowed.</p> 5456 //! <p style="margin-left:3.0pt;"><b>Errata BDW:A-E (FIXED BY:G0 5457 //! Stepping):</b></p> 5458 //! <p style="margin-left:3.0pt;"></p> 5459 //! <p style="margin-left:3.0pt;">For all system that does NOT use SVM (i.e. 5460 //! coherent L3$ surfaces), back snoops from LLC has to be disabled 5461 //! (<b>Dis_GtCvUpdtOnRd = "1"</b>). Than target Cache settings can be 5462 //! programmed as POR requirements of L3/LLC/eDRAM caching.</p> 5463 //! <p style="margin-left:3.0pt;"></p> 5464 //! <p style="margin-left:3.0pt;">For all systems that does use SVM (i.e. 5465 //! coherent L3$ surfaces), the recomended setting would be "00" in target 5466 //! cache settings. In case of L3 surfaces, the performance has to be tuned 5467 //! between "00" and "11" setting based on the benefits of L3 caching 5468 //! outweighting the degradation of backsnoops.</p> 5469 //! <p style="margin-left:3.0pt;"></p>Post G0-stepping, the above w/a for 5470 //! coherent L3$ surfaces is not needed. 5471 enum TARGET_CACHE_TC 5472 { 5473 TARGET_CACHE_TC_ELLCONLY = 0, //!< No additional details 5474 TARGET_CACHE_TC_LLCONLY = 1, //!< No additional details 5475 TARGET_CACHE_TC_LLCELLCALLOWED = 2, //!< No additional details 5476 TARGET_CACHE_TC_L3_LLC_ELLCALLOWED = 3, //!< No additional details 5477 }; 5478 5479 //! \brief MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC 5480 //! \details 5481 //! This is the field used in GT interface block to determine what type of 5482 //! access need to be generated to uncore. For the cases where the LeLLCCC 5483 //! is set, cacheable transaction are generated to enable LLC usage for 5484 //! particular stream. 5485 enum MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC 5486 { 5487 MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC_USECACHEABILITYCONTROLSFROMPAGETABLEUCWITHFENCE_IFCOHERENTCYCLE = 0, //!< No additional details 5488 MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC_UNCACHEABLE_UC_NON_CACHEABLE = 1, //!< No additional details 5489 MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC_WRITETHROUGH_WT = 2, //!< No additional details 5490 MEMORY_TYPE_LLCELLC_CACHEABILITY_CONTROL_LELLCCC_WRITEBACK_WB = 3, //!< No additional details 5491 }; 5492 5493 //! \name Initializations 5494 5495 //! \brief Explicit member initialization function 5496 VEB_DI_IECP_COMMAND_SURFACE_CONTROL_BITS_CMD(); 5497 5498 static const size_t dwSize = 1; 5499 static const size_t byteSize = 4; 5500 }; 5501 5502 //! 5503 //! \brief VEBOX_VERTEX_TABLE_ENTRY 5504 //! \details 5505 //! 5506 //! 5507 struct VEBOX_VERTEX_TABLE_ENTRY 5508 { 5509 union 5510 { 5511 //!< DWORD 0 5512 struct 5513 { 5514 uint32_t Vertextableentry0_Cv : __CODEGEN_BITFIELD(0, 11); //!< Vertex table entry 0 - Cv(12 bits) 5515 uint32_t : __CODEGEN_BITFIELD(12, 15); //!< Reserved 5516 uint32_t Vertextableentry0_Lv : __CODEGEN_BITFIELD(16, 27); //!< Vertex table entry 0 - Lv(12 bits) 5517 uint32_t : __CODEGEN_BITFIELD(28, 31); //!< Reserved 5518 }; 5519 uint32_t Value; 5520 } DW0; 5521 5522 static const size_t dwSize = 1; 5523 static const size_t byteSize = 4; 5524 5525 }; 5526 5527 //! 5528 //! \brief VEBOX_VERTEX_TABLE 5529 //! \details 5530 //! 5531 //! 5532 struct VEBOX_VERTEX_TABLE_CMD 5533 { 5534 VEBOX_VERTEX_TABLE_ENTRY VertexTableEntry[512]; 5535 5536 static const size_t dwSize = 512; 5537 static const size_t byteSize = 2048; 5538 }; 5539 5540 }; 5541 5542 #pragma pack() 5543 5544 #endif // __MHW_VEBOX_HWCMD_G8_X_H__