1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies Inc, QFPROM Efuse bindings
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12allOf:
13  - $ref: "nvmem.yaml#"
14
15properties:
16  compatible:
17    items:
18      - enum:
19          - qcom,apq8064-qfprom
20          - qcom,apq8084-qfprom
21          - qcom,msm8974-qfprom
22          - qcom,msm8916-qfprom
23          - qcom,msm8996-qfprom
24          - qcom,msm8998-qfprom
25          - qcom,qcs404-qfprom
26          - qcom,sc7180-qfprom
27          - qcom,sc7280-qfprom
28          - qcom,sdm845-qfprom
29      - const: qcom,qfprom
30
31  reg:
32    # If the QFPROM is read-only OS image then only the corrected region
33    # needs to be provided.  If the QFPROM is writable then all 4 regions
34    # must be provided.
35    oneOf:
36      - items:
37          - description: The corrected region.
38      - items:
39          - description: The corrected region.
40          - description: The raw region.
41          - description: The config region.
42          - description: The security control region.
43
44  # Clock must be provided if QFPROM is writable from the OS image.
45  clocks:
46    maxItems: 1
47  clock-names:
48    const: core
49
50  # Supply reference must be provided if QFPROM is writable from the OS image.
51  vcc-supply:
52    description: Our power supply.
53
54  # Needed if any child nodes are present.
55  "#address-cells":
56    const: 1
57  "#size-cells":
58    const: 1
59
60required:
61  - compatible
62  - reg
63
64unevaluatedProperties: false
65
66examples:
67  - |
68    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
69
70    soc {
71      #address-cells = <2>;
72      #size-cells = <2>;
73
74      efuse@784000 {
75        compatible = "qcom,sc7180-qfprom", "qcom,qfprom";
76        reg = <0 0x00784000 0 0x8ff>,
77              <0 0x00780000 0 0x7a0>,
78              <0 0x00782000 0 0x100>,
79              <0 0x00786000 0 0x1fff>;
80        clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
81        clock-names = "core";
82        #address-cells = <1>;
83        #size-cells = <1>;
84
85        vcc-supply = <&vreg_l11a_1p8>;
86
87        hstx-trim-primary@25b {
88          reg = <0x25b 0x1>;
89          bits = <1 3>;
90        };
91      };
92    };
93
94  - |
95    soc {
96      #address-cells = <2>;
97      #size-cells = <2>;
98
99      efuse@784000 {
100        compatible = "qcom,sdm845-qfprom", "qcom,qfprom";
101        reg = <0 0x00784000 0 0x8ff>;
102        #address-cells = <1>;
103        #size-cells = <1>;
104
105        hstx-trim-primary@1eb {
106          reg = <0x1eb 0x1>;
107          bits = <1 4>;
108        };
109      };
110    };
111