1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * IDE tuning and bus mastering support for the CS5510/CS5520
4 * chipsets
5 *
6 * The CS5510/CS5520 are slightly unusual devices. Unlike the
7 * typical IDE controllers they do bus mastering with the drive in
8 * PIO mode and smarter silicon.
9 *
10 * The practical upshot of this is that we must always tune the
11 * drive for the right PIO mode. We must also ignore all the blacklists
12 * and the drive bus mastering DMA information. Also to confuse matters
13 * further we can do DMA on PIO only drives.
14 *
15 * DMA on the 5510 also requires we disable_hlt() during DMA on early
16 * revisions.
17 *
18 * *** This driver is strictly experimental ***
19 *
20 * (c) Copyright Red Hat Inc 2002
21 *
22 * Documentation:
23 * Not publicly available.
24 */
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/blkdev.h>
29 #include <linux/delay.h>
30 #include <scsi/scsi_host.h>
31 #include <linux/libata.h>
32
33 #define DRV_NAME "pata_cs5520"
34 #define DRV_VERSION "0.6.6"
35
36 struct pio_clocks
37 {
38 int address;
39 int assert;
40 int recovery;
41 };
42
43 static const struct pio_clocks cs5520_pio_clocks[]={
44 {3, 6, 11},
45 {2, 5, 6},
46 {1, 4, 3},
47 {1, 3, 2},
48 {1, 2, 1}
49 };
50
51 /**
52 * cs5520_set_timings - program PIO timings
53 * @ap: ATA port
54 * @adev: ATA device
55 * @pio: PIO ID
56 *
57 * Program the PIO mode timings for the controller according to the pio
58 * clocking table.
59 */
60
cs5520_set_timings(struct ata_port * ap,struct ata_device * adev,int pio)61 static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio)
62 {
63 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
64 int slave = adev->devno;
65
66 pio -= XFER_PIO_0;
67
68 /* Channel command timing */
69 pci_write_config_byte(pdev, 0x62 + ap->port_no,
70 (cs5520_pio_clocks[pio].recovery << 4) |
71 (cs5520_pio_clocks[pio].assert));
72 /* FIXME: should these use address ? */
73 /* Read command timing */
74 pci_write_config_byte(pdev, 0x64 + 4*ap->port_no + slave,
75 (cs5520_pio_clocks[pio].recovery << 4) |
76 (cs5520_pio_clocks[pio].assert));
77 /* Write command timing */
78 pci_write_config_byte(pdev, 0x66 + 4*ap->port_no + slave,
79 (cs5520_pio_clocks[pio].recovery << 4) |
80 (cs5520_pio_clocks[pio].assert));
81 }
82
83 /**
84 * cs5520_set_piomode - program PIO timings
85 * @ap: ATA port
86 * @adev: ATA device
87 *
88 * Program the PIO mode timings for the controller according to the pio
89 * clocking table.
90 */
91
cs5520_set_piomode(struct ata_port * ap,struct ata_device * adev)92 static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
93 {
94 cs5520_set_timings(ap, adev, adev->pio_mode);
95 }
96
97 static struct scsi_host_template cs5520_sht = {
98 ATA_BMDMA_SHT(DRV_NAME),
99 .sg_tablesize = LIBATA_DUMB_MAX_PRD,
100 };
101
102 static struct ata_port_operations cs5520_port_ops = {
103 .inherits = &ata_bmdma_port_ops,
104 .qc_prep = ata_bmdma_dumb_qc_prep,
105 .cable_detect = ata_cable_40wire,
106 .set_piomode = cs5520_set_piomode,
107 };
108
cs5520_init_one(struct pci_dev * pdev,const struct pci_device_id * id)109 static int cs5520_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
110 {
111 static const unsigned int cmd_port[] = { 0x1F0, 0x170 };
112 static const unsigned int ctl_port[] = { 0x3F6, 0x376 };
113 struct ata_port_info pi = {
114 .flags = ATA_FLAG_SLAVE_POSS,
115 .pio_mask = ATA_PIO4,
116 .port_ops = &cs5520_port_ops,
117 };
118 const struct ata_port_info *ppi[2];
119 u8 pcicfg;
120 void __iomem *iomap[5];
121 struct ata_host *host;
122 struct ata_ioports *ioaddr;
123 int i, rc;
124
125 rc = pcim_enable_device(pdev);
126 if (rc)
127 return rc;
128
129 /* IDE port enable bits */
130 pci_read_config_byte(pdev, 0x60, &pcicfg);
131
132 /* Check if the ATA ports are enabled */
133 if ((pcicfg & 3) == 0)
134 return -ENODEV;
135
136 ppi[0] = ppi[1] = &ata_dummy_port_info;
137 if (pcicfg & 1)
138 ppi[0] = π
139 if (pcicfg & 2)
140 ppi[1] = π
141
142 if ((pcicfg & 0x40) == 0) {
143 dev_warn(&pdev->dev, "DMA mode disabled. Enabling.\n");
144 pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
145 }
146
147 pi.mwdma_mask = id->driver_data;
148
149 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
150 if (!host)
151 return -ENOMEM;
152
153 /* Perform set up for DMA */
154 if (pci_enable_device_io(pdev)) {
155 printk(KERN_ERR DRV_NAME ": unable to configure BAR2.\n");
156 return -ENODEV;
157 }
158
159 if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32))) {
160 printk(KERN_ERR DRV_NAME ": unable to configure DMA mask.\n");
161 return -ENODEV;
162 }
163
164 /* Map IO ports and initialize host accordingly */
165 iomap[0] = devm_ioport_map(&pdev->dev, cmd_port[0], 8);
166 iomap[1] = devm_ioport_map(&pdev->dev, ctl_port[0], 1);
167 iomap[2] = devm_ioport_map(&pdev->dev, cmd_port[1], 8);
168 iomap[3] = devm_ioport_map(&pdev->dev, ctl_port[1], 1);
169 iomap[4] = pcim_iomap(pdev, 2, 0);
170
171 if (!iomap[0] || !iomap[1] || !iomap[2] || !iomap[3] || !iomap[4])
172 return -ENOMEM;
173
174 ioaddr = &host->ports[0]->ioaddr;
175 ioaddr->cmd_addr = iomap[0];
176 ioaddr->ctl_addr = iomap[1];
177 ioaddr->altstatus_addr = iomap[1];
178 ioaddr->bmdma_addr = iomap[4];
179 ata_sff_std_ports(ioaddr);
180
181 ata_port_desc(host->ports[0],
182 "cmd 0x%x ctl 0x%x", cmd_port[0], ctl_port[0]);
183 ata_port_pbar_desc(host->ports[0], 4, 0, "bmdma");
184
185 ioaddr = &host->ports[1]->ioaddr;
186 ioaddr->cmd_addr = iomap[2];
187 ioaddr->ctl_addr = iomap[3];
188 ioaddr->altstatus_addr = iomap[3];
189 ioaddr->bmdma_addr = iomap[4] + 8;
190 ata_sff_std_ports(ioaddr);
191
192 ata_port_desc(host->ports[1],
193 "cmd 0x%x ctl 0x%x", cmd_port[1], ctl_port[1]);
194 ata_port_pbar_desc(host->ports[1], 4, 8, "bmdma");
195
196 /* activate the host */
197 pci_set_master(pdev);
198 rc = ata_host_start(host);
199 if (rc)
200 return rc;
201
202 for (i = 0; i < 2; i++) {
203 static const int irq[] = { 14, 15 };
204 struct ata_port *ap = host->ports[i];
205
206 if (ata_port_is_dummy(ap))
207 continue;
208
209 rc = devm_request_irq(&pdev->dev, irq[ap->port_no],
210 ata_bmdma_interrupt, 0, DRV_NAME, host);
211 if (rc)
212 return rc;
213
214 ata_port_desc(ap, "irq %d", irq[i]);
215 }
216
217 return ata_host_register(host, &cs5520_sht);
218 }
219
220 #ifdef CONFIG_PM_SLEEP
221 /**
222 * cs5520_reinit_one - device resume
223 * @pdev: PCI device
224 *
225 * Do any reconfiguration work needed by a resume from RAM. We need
226 * to restore DMA mode support on BIOSen which disabled it
227 */
228
cs5520_reinit_one(struct pci_dev * pdev)229 static int cs5520_reinit_one(struct pci_dev *pdev)
230 {
231 struct ata_host *host = pci_get_drvdata(pdev);
232 u8 pcicfg;
233 int rc;
234
235 rc = ata_pci_device_do_resume(pdev);
236 if (rc)
237 return rc;
238
239 pci_read_config_byte(pdev, 0x60, &pcicfg);
240 if ((pcicfg & 0x40) == 0)
241 pci_write_config_byte(pdev, 0x60, pcicfg | 0x40);
242
243 ata_host_resume(host);
244 return 0;
245 }
246
247 /**
248 * cs5520_pci_device_suspend - device suspend
249 * @pdev: PCI device
250 * @mesg: PM event message
251 *
252 * We have to cut and waste bits from the standard method because
253 * the 5520 is a bit odd and not just a pure ATA device. As a result
254 * we must not disable it. The needed code is short and this avoids
255 * chip specific mess in the core code.
256 */
257
cs5520_pci_device_suspend(struct pci_dev * pdev,pm_message_t mesg)258 static int cs5520_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
259 {
260 struct ata_host *host = pci_get_drvdata(pdev);
261 int rc = 0;
262
263 rc = ata_host_suspend(host, mesg);
264 if (rc)
265 return rc;
266
267 pci_save_state(pdev);
268 return 0;
269 }
270 #endif /* CONFIG_PM_SLEEP */
271
272 /* For now keep DMA off. We can set it for all but A rev CS5510 once the
273 core ATA code can handle it */
274
275 static const struct pci_device_id pata_cs5520[] = {
276 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), },
277 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), },
278
279 { },
280 };
281
282 static struct pci_driver cs5520_pci_driver = {
283 .name = DRV_NAME,
284 .id_table = pata_cs5520,
285 .probe = cs5520_init_one,
286 .remove = ata_pci_remove_one,
287 #ifdef CONFIG_PM_SLEEP
288 .suspend = cs5520_pci_device_suspend,
289 .resume = cs5520_reinit_one,
290 #endif
291 };
292
293 module_pci_driver(cs5520_pci_driver);
294
295 MODULE_AUTHOR("Alan Cox");
296 MODULE_DESCRIPTION("low-level driver for Cyrix CS5510/5520");
297 MODULE_LICENSE("GPL");
298 MODULE_DEVICE_TABLE(pci, pata_cs5520);
299 MODULE_VERSION(DRV_VERSION);
300