1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
2 /*
3  * MTK SDG1 ECC controller
4  *
5  * Copyright (c) 2016 Mediatek
6  * Authors:	Xiaolei Li		<xiaolei.li@mediatek.com>
7  *		Jorge Ramirez-Ortiz	<jorge.ramirez-ortiz@linaro.org>
8  */
9 
10 #ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__
11 #define __DRIVERS_MTD_NAND_MTK_ECC_H__
12 
13 #include <linux/types.h>
14 
15 enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1};
16 enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE};
17 
18 struct device_node;
19 struct mtk_ecc;
20 
21 struct mtk_ecc_stats {
22 	u32 corrected;
23 	u32 bitflips;
24 	u32 failed;
25 };
26 
27 struct mtk_ecc_config {
28 	enum mtk_ecc_operation op;
29 	enum mtk_ecc_mode mode;
30 	dma_addr_t addr;
31 	u32 strength;
32 	u32 sectors;
33 	u32 len;
34 };
35 
36 int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32);
37 void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int);
38 int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation);
39 int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *);
40 void mtk_ecc_disable(struct mtk_ecc *);
41 void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p);
42 unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc);
43 
44 struct mtk_ecc *of_mtk_ecc_get(struct device_node *);
45 void mtk_ecc_release(struct mtk_ecc *);
46 
47 #endif
48