1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
3 
4 #include "hclge_main.h"
5 #include "hclge_mbx.h"
6 #include "hnae3.h"
7 
8 #define CREATE_TRACE_POINTS
9 #include "hclge_trace.h"
10 
hclge_errno_to_resp(int errno)11 static u16 hclge_errno_to_resp(int errno)
12 {
13 	return abs(errno);
14 }
15 
16 /* hclge_gen_resp_to_vf: used to generate a synchronous response to VF when PF
17  * receives a mailbox message from VF.
18  * @vport: pointer to struct hclge_vport
19  * @vf_to_pf_req: pointer to hclge_mbx_vf_to_pf_cmd of the original mailbox
20  *		  message
21  * @resp_status: indicate to VF whether its request success(0) or failed.
22  */
hclge_gen_resp_to_vf(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * vf_to_pf_req,struct hclge_respond_to_vf_msg * resp_msg)23 static int hclge_gen_resp_to_vf(struct hclge_vport *vport,
24 				struct hclge_mbx_vf_to_pf_cmd *vf_to_pf_req,
25 				struct hclge_respond_to_vf_msg *resp_msg)
26 {
27 	struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf;
28 	struct hclge_dev *hdev = vport->back;
29 	enum hclge_cmd_status status;
30 	struct hclge_desc desc;
31 	u16 resp;
32 
33 	resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data;
34 
35 	if (resp_msg->len > HCLGE_MBX_MAX_RESP_DATA_SIZE) {
36 		dev_err(&hdev->pdev->dev,
37 			"PF fail to gen resp to VF len %u exceeds max len %u\n",
38 			resp_msg->len,
39 			HCLGE_MBX_MAX_RESP_DATA_SIZE);
40 		/* If resp_msg->len is too long, set the value to max length
41 		 * and return the msg to VF
42 		 */
43 		resp_msg->len = HCLGE_MBX_MAX_RESP_DATA_SIZE;
44 	}
45 
46 	hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false);
47 
48 	resp_pf_to_vf->dest_vfid = vf_to_pf_req->mbx_src_vfid;
49 	resp_pf_to_vf->msg_len = vf_to_pf_req->msg_len;
50 
51 	resp_pf_to_vf->msg.code = HCLGE_MBX_PF_VF_RESP;
52 	resp_pf_to_vf->msg.vf_mbx_msg_code = vf_to_pf_req->msg.code;
53 	resp_pf_to_vf->msg.vf_mbx_msg_subcode = vf_to_pf_req->msg.subcode;
54 	resp = hclge_errno_to_resp(resp_msg->status);
55 	if (resp < SHRT_MAX) {
56 		resp_pf_to_vf->msg.resp_status = resp;
57 	} else {
58 		dev_warn(&hdev->pdev->dev,
59 			 "failed to send response to VF, response status %u is out-of-bound\n",
60 			 resp);
61 		resp_pf_to_vf->msg.resp_status = EIO;
62 	}
63 
64 	if (resp_msg->len > 0)
65 		memcpy(resp_pf_to_vf->msg.resp_data, resp_msg->data,
66 		       resp_msg->len);
67 
68 	status = hclge_cmd_send(&hdev->hw, &desc, 1);
69 	if (status)
70 		dev_err(&hdev->pdev->dev,
71 			"failed to send response to VF, status: %d, vfid: %u, code: %u, subcode: %u.\n",
72 			status, vf_to_pf_req->mbx_src_vfid,
73 			vf_to_pf_req->msg.code, vf_to_pf_req->msg.subcode);
74 
75 	return status;
76 }
77 
hclge_send_mbx_msg(struct hclge_vport * vport,u8 * msg,u16 msg_len,u16 mbx_opcode,u8 dest_vfid)78 static int hclge_send_mbx_msg(struct hclge_vport *vport, u8 *msg, u16 msg_len,
79 			      u16 mbx_opcode, u8 dest_vfid)
80 {
81 	struct hclge_mbx_pf_to_vf_cmd *resp_pf_to_vf;
82 	struct hclge_dev *hdev = vport->back;
83 	enum hclge_cmd_status status;
84 	struct hclge_desc desc;
85 
86 	resp_pf_to_vf = (struct hclge_mbx_pf_to_vf_cmd *)desc.data;
87 
88 	hclge_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_PF_TO_VF, false);
89 
90 	resp_pf_to_vf->dest_vfid = dest_vfid;
91 	resp_pf_to_vf->msg_len = msg_len;
92 	resp_pf_to_vf->msg.code = mbx_opcode;
93 
94 	memcpy(&resp_pf_to_vf->msg.vf_mbx_msg_code, msg, msg_len);
95 
96 	trace_hclge_pf_mbx_send(hdev, resp_pf_to_vf);
97 
98 	status = hclge_cmd_send(&hdev->hw, &desc, 1);
99 	if (status)
100 		dev_err(&hdev->pdev->dev,
101 			"failed to send mailbox to VF, status: %d, vfid: %u, opcode: %u\n",
102 			status, dest_vfid, mbx_opcode);
103 
104 	return status;
105 }
106 
hclge_inform_reset_assert_to_vf(struct hclge_vport * vport)107 int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport)
108 {
109 	struct hclge_dev *hdev = vport->back;
110 	u16 reset_type;
111 	u8 msg_data[2];
112 	u8 dest_vfid;
113 
114 	BUILD_BUG_ON(HNAE3_MAX_RESET > U16_MAX);
115 
116 	dest_vfid = (u8)vport->vport_id;
117 
118 	if (hdev->reset_type == HNAE3_FUNC_RESET)
119 		reset_type = HNAE3_VF_PF_FUNC_RESET;
120 	else if (hdev->reset_type == HNAE3_FLR_RESET)
121 		reset_type = HNAE3_VF_FULL_RESET;
122 	else
123 		reset_type = HNAE3_VF_FUNC_RESET;
124 
125 	memcpy(&msg_data[0], &reset_type, sizeof(u16));
126 
127 	/* send this requested info to VF */
128 	return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data),
129 				  HCLGE_MBX_ASSERTING_RESET, dest_vfid);
130 }
131 
hclge_free_vector_ring_chain(struct hnae3_ring_chain_node * head)132 static void hclge_free_vector_ring_chain(struct hnae3_ring_chain_node *head)
133 {
134 	struct hnae3_ring_chain_node *chain_tmp, *chain;
135 
136 	chain = head->next;
137 
138 	while (chain) {
139 		chain_tmp = chain->next;
140 		kfree_sensitive(chain);
141 		chain = chain_tmp;
142 	}
143 }
144 
145 /* hclge_get_ring_chain_from_mbx: get ring type & tqp id & int_gl idx
146  * from mailbox message
147  * msg[0]: opcode
148  * msg[1]: <not relevant to this function>
149  * msg[2]: ring_num
150  * msg[3]: first ring type (TX|RX)
151  * msg[4]: first tqp id
152  * msg[5]: first int_gl idx
153  * msg[6] ~ msg[14]: other ring type, tqp id and int_gl idx
154  */
hclge_get_ring_chain_from_mbx(struct hclge_mbx_vf_to_pf_cmd * req,struct hnae3_ring_chain_node * ring_chain,struct hclge_vport * vport)155 static int hclge_get_ring_chain_from_mbx(
156 			struct hclge_mbx_vf_to_pf_cmd *req,
157 			struct hnae3_ring_chain_node *ring_chain,
158 			struct hclge_vport *vport)
159 {
160 	struct hnae3_ring_chain_node *cur_chain, *new_chain;
161 	struct hclge_dev *hdev = vport->back;
162 	int ring_num;
163 	int i;
164 
165 	ring_num = req->msg.ring_num;
166 
167 	if (ring_num > HCLGE_MBX_MAX_RING_CHAIN_PARAM_NUM)
168 		return -ENOMEM;
169 
170 	for (i = 0; i < ring_num; i++) {
171 		if (req->msg.param[i].tqp_index >= vport->nic.kinfo.rss_size) {
172 			dev_err(&hdev->pdev->dev, "tqp index(%u) is out of range(0-%u)\n",
173 				req->msg.param[i].tqp_index,
174 				vport->nic.kinfo.rss_size - 1);
175 			return -EINVAL;
176 		}
177 	}
178 
179 	hnae3_set_bit(ring_chain->flag, HNAE3_RING_TYPE_B,
180 		      req->msg.param[0].ring_type);
181 	ring_chain->tqp_index =
182 		hclge_get_queue_id(vport->nic.kinfo.tqp
183 				   [req->msg.param[0].tqp_index]);
184 	hnae3_set_field(ring_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
185 			HNAE3_RING_GL_IDX_S, req->msg.param[0].int_gl_index);
186 
187 	cur_chain = ring_chain;
188 
189 	for (i = 1; i < ring_num; i++) {
190 		new_chain = kzalloc(sizeof(*new_chain), GFP_KERNEL);
191 		if (!new_chain)
192 			goto err;
193 
194 		hnae3_set_bit(new_chain->flag, HNAE3_RING_TYPE_B,
195 			      req->msg.param[i].ring_type);
196 
197 		new_chain->tqp_index =
198 		hclge_get_queue_id(vport->nic.kinfo.tqp
199 			[req->msg.param[i].tqp_index]);
200 
201 		hnae3_set_field(new_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
202 				HNAE3_RING_GL_IDX_S,
203 				req->msg.param[i].int_gl_index);
204 
205 		cur_chain->next = new_chain;
206 		cur_chain = new_chain;
207 	}
208 
209 	return 0;
210 err:
211 	hclge_free_vector_ring_chain(ring_chain);
212 	return -ENOMEM;
213 }
214 
hclge_map_unmap_ring_to_vf_vector(struct hclge_vport * vport,bool en,struct hclge_mbx_vf_to_pf_cmd * req)215 static int hclge_map_unmap_ring_to_vf_vector(struct hclge_vport *vport, bool en,
216 					     struct hclge_mbx_vf_to_pf_cmd *req)
217 {
218 	struct hnae3_ring_chain_node ring_chain;
219 	int vector_id = req->msg.vector_id;
220 	int ret;
221 
222 	memset(&ring_chain, 0, sizeof(ring_chain));
223 	ret = hclge_get_ring_chain_from_mbx(req, &ring_chain, vport);
224 	if (ret)
225 		return ret;
226 
227 	ret = hclge_bind_ring_with_vector(vport, vector_id, en, &ring_chain);
228 
229 	hclge_free_vector_ring_chain(&ring_chain);
230 
231 	return ret;
232 }
233 
hclge_set_vf_promisc_mode(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * req)234 static int hclge_set_vf_promisc_mode(struct hclge_vport *vport,
235 				     struct hclge_mbx_vf_to_pf_cmd *req)
236 {
237 	bool en_bc = req->msg.en_bc ? true : false;
238 	bool en_uc = req->msg.en_uc ? true : false;
239 	bool en_mc = req->msg.en_mc ? true : false;
240 	struct hnae3_handle *handle = &vport->nic;
241 	int ret;
242 
243 	if (!vport->vf_info.trusted) {
244 		en_uc = false;
245 		en_mc = false;
246 	}
247 
248 	if (req->msg.en_limit_promisc)
249 		set_bit(HNAE3_PFLAG_LIMIT_PROMISC, &handle->priv_flags);
250 	else
251 		clear_bit(HNAE3_PFLAG_LIMIT_PROMISC,
252 			  &handle->priv_flags);
253 
254 	ret = hclge_set_vport_promisc_mode(vport, en_uc, en_mc, en_bc);
255 
256 	vport->vf_info.promisc_enable = (en_uc || en_mc) ? 1 : 0;
257 
258 	return ret;
259 }
260 
hclge_inform_vf_promisc_info(struct hclge_vport * vport)261 void hclge_inform_vf_promisc_info(struct hclge_vport *vport)
262 {
263 	u8 dest_vfid = (u8)vport->vport_id;
264 	u8 msg_data[2];
265 
266 	memcpy(&msg_data[0], &vport->vf_info.promisc_enable, sizeof(u16));
267 
268 	hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data),
269 			   HCLGE_MBX_PUSH_PROMISC_INFO, dest_vfid);
270 }
271 
hclge_set_vf_uc_mac_addr(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)272 static int hclge_set_vf_uc_mac_addr(struct hclge_vport *vport,
273 				    struct hclge_mbx_vf_to_pf_cmd *mbx_req)
274 {
275 #define HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET	6
276 
277 	const u8 *mac_addr = (const u8 *)(mbx_req->msg.data);
278 	struct hclge_dev *hdev = vport->back;
279 	int status;
280 
281 	if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_MODIFY) {
282 		const u8 *old_addr = (const u8 *)
283 		(&mbx_req->msg.data[HCLGE_MBX_VF_OLD_MAC_ADDR_OFFSET]);
284 
285 		/* If VF MAC has been configured by the host then it
286 		 * cannot be overridden by the MAC specified by the VM.
287 		 */
288 		if (!is_zero_ether_addr(vport->vf_info.mac) &&
289 		    !ether_addr_equal(mac_addr, vport->vf_info.mac))
290 			return -EPERM;
291 
292 		if (!is_valid_ether_addr(mac_addr))
293 			return -EINVAL;
294 
295 		spin_lock_bh(&vport->mac_list_lock);
296 		status = hclge_update_mac_node_for_dev_addr(vport, old_addr,
297 							    mac_addr);
298 		spin_unlock_bh(&vport->mac_list_lock);
299 		hclge_task_schedule(hdev, 0);
300 	} else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_ADD) {
301 		status = hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD,
302 					       HCLGE_MAC_ADDR_UC, mac_addr);
303 	} else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_UC_REMOVE) {
304 		status = hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL,
305 					       HCLGE_MAC_ADDR_UC, mac_addr);
306 	} else {
307 		dev_err(&hdev->pdev->dev,
308 			"failed to set unicast mac addr, unknown subcode %u\n",
309 			mbx_req->msg.subcode);
310 		return -EIO;
311 	}
312 
313 	return status;
314 }
315 
hclge_set_vf_mc_mac_addr(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)316 static int hclge_set_vf_mc_mac_addr(struct hclge_vport *vport,
317 				    struct hclge_mbx_vf_to_pf_cmd *mbx_req)
318 {
319 	const u8 *mac_addr = (const u8 *)(mbx_req->msg.data);
320 	struct hclge_dev *hdev = vport->back;
321 
322 	if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_ADD) {
323 		hclge_update_mac_list(vport, HCLGE_MAC_TO_ADD,
324 				      HCLGE_MAC_ADDR_MC, mac_addr);
325 	} else if (mbx_req->msg.subcode == HCLGE_MBX_MAC_VLAN_MC_REMOVE) {
326 		hclge_update_mac_list(vport, HCLGE_MAC_TO_DEL,
327 				      HCLGE_MAC_ADDR_MC, mac_addr);
328 	} else {
329 		dev_err(&hdev->pdev->dev,
330 			"failed to set mcast mac addr, unknown subcode %u\n",
331 			mbx_req->msg.subcode);
332 		return -EIO;
333 	}
334 
335 	return 0;
336 }
337 
hclge_push_vf_port_base_vlan_info(struct hclge_vport * vport,u8 vfid,u16 state,u16 vlan_tag,u16 qos,u16 vlan_proto)338 int hclge_push_vf_port_base_vlan_info(struct hclge_vport *vport, u8 vfid,
339 				      u16 state, u16 vlan_tag, u16 qos,
340 				      u16 vlan_proto)
341 {
342 #define MSG_DATA_SIZE	8
343 
344 	u8 msg_data[MSG_DATA_SIZE];
345 
346 	memcpy(&msg_data[0], &state, sizeof(u16));
347 	memcpy(&msg_data[2], &vlan_proto, sizeof(u16));
348 	memcpy(&msg_data[4], &qos, sizeof(u16));
349 	memcpy(&msg_data[6], &vlan_tag, sizeof(u16));
350 
351 	return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data),
352 				  HCLGE_MBX_PUSH_VLAN_INFO, vfid);
353 }
354 
hclge_set_vf_vlan_cfg(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req,struct hclge_respond_to_vf_msg * resp_msg)355 static int hclge_set_vf_vlan_cfg(struct hclge_vport *vport,
356 				 struct hclge_mbx_vf_to_pf_cmd *mbx_req,
357 				 struct hclge_respond_to_vf_msg *resp_msg)
358 {
359 #define HCLGE_MBX_VLAN_STATE_OFFSET	0
360 #define HCLGE_MBX_VLAN_INFO_OFFSET	2
361 
362 	struct hclge_vf_vlan_cfg *msg_cmd;
363 	int status = 0;
364 
365 	msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg;
366 	if (msg_cmd->subcode == HCLGE_MBX_VLAN_FILTER) {
367 		struct hnae3_handle *handle = &vport->nic;
368 		u16 vlan, proto;
369 		bool is_kill;
370 
371 		is_kill = !!msg_cmd->is_kill;
372 		vlan =  msg_cmd->vlan;
373 		proto =  msg_cmd->proto;
374 		status = hclge_set_vlan_filter(handle, cpu_to_be16(proto),
375 					       vlan, is_kill);
376 	} else if (msg_cmd->subcode == HCLGE_MBX_VLAN_RX_OFF_CFG) {
377 		struct hnae3_handle *handle = &vport->nic;
378 		bool en = msg_cmd->is_kill ? true : false;
379 
380 		status = hclge_en_hw_strip_rxvtag(handle, en);
381 	} else if (msg_cmd->subcode == HCLGE_MBX_PORT_BASE_VLAN_CFG) {
382 		struct hclge_vlan_info *vlan_info;
383 		u16 *state;
384 
385 		state = (u16 *)&mbx_req->msg.data[HCLGE_MBX_VLAN_STATE_OFFSET];
386 		vlan_info = (struct hclge_vlan_info *)
387 			&mbx_req->msg.data[HCLGE_MBX_VLAN_INFO_OFFSET];
388 		status = hclge_update_port_base_vlan_cfg(vport, *state,
389 							 vlan_info);
390 	} else if (msg_cmd->subcode == HCLGE_MBX_GET_PORT_BASE_VLAN_STATE) {
391 		struct hnae3_ae_dev *ae_dev = pci_get_drvdata(vport->nic.pdev);
392 		/* vf does not need to know about the port based VLAN state
393 		 * on device HNAE3_DEVICE_VERSION_V3. So always return disable
394 		 * on device HNAE3_DEVICE_VERSION_V3 if vf queries the port
395 		 * based VLAN state.
396 		 */
397 		resp_msg->data[0] =
398 			ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3 ?
399 			HNAE3_PORT_BASE_VLAN_DISABLE :
400 			vport->port_base_vlan_cfg.state;
401 		resp_msg->len = sizeof(u8);
402 	}
403 
404 	return status;
405 }
406 
hclge_set_vf_alive(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)407 static int hclge_set_vf_alive(struct hclge_vport *vport,
408 			      struct hclge_mbx_vf_to_pf_cmd *mbx_req)
409 {
410 	bool alive = !!mbx_req->msg.data[0];
411 	int ret = 0;
412 
413 	if (alive)
414 		ret = hclge_vport_start(vport);
415 	else
416 		hclge_vport_stop(vport);
417 
418 	return ret;
419 }
420 
hclge_get_vf_tcinfo(struct hclge_vport * vport,struct hclge_respond_to_vf_msg * resp_msg)421 static void hclge_get_vf_tcinfo(struct hclge_vport *vport,
422 				struct hclge_respond_to_vf_msg *resp_msg)
423 {
424 	struct hnae3_knic_private_info *kinfo = &vport->nic.kinfo;
425 	unsigned int i;
426 
427 	for (i = 0; i < kinfo->tc_info.num_tc; i++)
428 		resp_msg->data[0] |= BIT(i);
429 
430 	resp_msg->len = sizeof(u8);
431 }
432 
hclge_get_vf_queue_info(struct hclge_vport * vport,struct hclge_respond_to_vf_msg * resp_msg)433 static void hclge_get_vf_queue_info(struct hclge_vport *vport,
434 				    struct hclge_respond_to_vf_msg *resp_msg)
435 {
436 #define HCLGE_TQPS_RSS_INFO_LEN		6
437 #define HCLGE_TQPS_ALLOC_OFFSET		0
438 #define HCLGE_TQPS_RSS_SIZE_OFFSET	2
439 #define HCLGE_TQPS_RX_BUFFER_LEN_OFFSET	4
440 
441 	struct hclge_dev *hdev = vport->back;
442 
443 	/* get the queue related info */
444 	memcpy(&resp_msg->data[HCLGE_TQPS_ALLOC_OFFSET],
445 	       &vport->alloc_tqps, sizeof(u16));
446 	memcpy(&resp_msg->data[HCLGE_TQPS_RSS_SIZE_OFFSET],
447 	       &vport->nic.kinfo.rss_size, sizeof(u16));
448 	memcpy(&resp_msg->data[HCLGE_TQPS_RX_BUFFER_LEN_OFFSET],
449 	       &hdev->rx_buf_len, sizeof(u16));
450 	resp_msg->len = HCLGE_TQPS_RSS_INFO_LEN;
451 }
452 
hclge_get_vf_mac_addr(struct hclge_vport * vport,struct hclge_respond_to_vf_msg * resp_msg)453 static void hclge_get_vf_mac_addr(struct hclge_vport *vport,
454 				  struct hclge_respond_to_vf_msg *resp_msg)
455 {
456 	ether_addr_copy(resp_msg->data, vport->vf_info.mac);
457 	resp_msg->len = ETH_ALEN;
458 }
459 
hclge_get_vf_queue_depth(struct hclge_vport * vport,struct hclge_respond_to_vf_msg * resp_msg)460 static void hclge_get_vf_queue_depth(struct hclge_vport *vport,
461 				     struct hclge_respond_to_vf_msg *resp_msg)
462 {
463 #define HCLGE_TQPS_DEPTH_INFO_LEN	4
464 #define HCLGE_TQPS_NUM_TX_DESC_OFFSET	0
465 #define HCLGE_TQPS_NUM_RX_DESC_OFFSET	2
466 
467 	struct hclge_dev *hdev = vport->back;
468 
469 	/* get the queue depth info */
470 	memcpy(&resp_msg->data[HCLGE_TQPS_NUM_TX_DESC_OFFSET],
471 	       &hdev->num_tx_desc, sizeof(u16));
472 	memcpy(&resp_msg->data[HCLGE_TQPS_NUM_RX_DESC_OFFSET],
473 	       &hdev->num_rx_desc, sizeof(u16));
474 	resp_msg->len = HCLGE_TQPS_DEPTH_INFO_LEN;
475 }
476 
hclge_get_vf_media_type(struct hclge_vport * vport,struct hclge_respond_to_vf_msg * resp_msg)477 static void hclge_get_vf_media_type(struct hclge_vport *vport,
478 				    struct hclge_respond_to_vf_msg *resp_msg)
479 {
480 #define HCLGE_VF_MEDIA_TYPE_OFFSET	0
481 #define HCLGE_VF_MODULE_TYPE_OFFSET	1
482 #define HCLGE_VF_MEDIA_TYPE_LENGTH	2
483 
484 	struct hclge_dev *hdev = vport->back;
485 
486 	resp_msg->data[HCLGE_VF_MEDIA_TYPE_OFFSET] =
487 		hdev->hw.mac.media_type;
488 	resp_msg->data[HCLGE_VF_MODULE_TYPE_OFFSET] =
489 		hdev->hw.mac.module_type;
490 	resp_msg->len = HCLGE_VF_MEDIA_TYPE_LENGTH;
491 }
492 
hclge_push_vf_link_status(struct hclge_vport * vport)493 int hclge_push_vf_link_status(struct hclge_vport *vport)
494 {
495 #define HCLGE_VF_LINK_STATE_UP		1U
496 #define HCLGE_VF_LINK_STATE_DOWN	0U
497 
498 	struct hclge_dev *hdev = vport->back;
499 	u16 link_status;
500 	u8 msg_data[9];
501 	u16 duplex;
502 
503 	/* mac.link can only be 0 or 1 */
504 	switch (vport->vf_info.link_state) {
505 	case IFLA_VF_LINK_STATE_ENABLE:
506 		link_status = HCLGE_VF_LINK_STATE_UP;
507 		break;
508 	case IFLA_VF_LINK_STATE_DISABLE:
509 		link_status = HCLGE_VF_LINK_STATE_DOWN;
510 		break;
511 	case IFLA_VF_LINK_STATE_AUTO:
512 	default:
513 		link_status = (u16)hdev->hw.mac.link;
514 		break;
515 	}
516 
517 	duplex = hdev->hw.mac.duplex;
518 	memcpy(&msg_data[0], &link_status, sizeof(u16));
519 	memcpy(&msg_data[2], &hdev->hw.mac.speed, sizeof(u32));
520 	memcpy(&msg_data[6], &duplex, sizeof(u16));
521 	msg_data[8] = HCLGE_MBX_PUSH_LINK_STATUS_EN;
522 
523 	/* send this requested info to VF */
524 	return hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data),
525 				  HCLGE_MBX_LINK_STAT_CHANGE, vport->vport_id);
526 }
527 
hclge_get_link_mode(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)528 static void hclge_get_link_mode(struct hclge_vport *vport,
529 				struct hclge_mbx_vf_to_pf_cmd *mbx_req)
530 {
531 #define HCLGE_SUPPORTED   1
532 	struct hclge_dev *hdev = vport->back;
533 	unsigned long advertising;
534 	unsigned long supported;
535 	unsigned long send_data;
536 	u8 msg_data[10] = {};
537 	u8 dest_vfid;
538 
539 	advertising = hdev->hw.mac.advertising[0];
540 	supported = hdev->hw.mac.supported[0];
541 	dest_vfid = mbx_req->mbx_src_vfid;
542 	msg_data[0] = mbx_req->msg.data[0];
543 
544 	send_data = msg_data[0] == HCLGE_SUPPORTED ? supported : advertising;
545 
546 	memcpy(&msg_data[2], &send_data, sizeof(unsigned long));
547 	hclge_send_mbx_msg(vport, msg_data, sizeof(msg_data),
548 			   HCLGE_MBX_LINK_STAT_MODE, dest_vfid);
549 }
550 
hclge_mbx_reset_vf_queue(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req,struct hclge_respond_to_vf_msg * resp_msg)551 static int hclge_mbx_reset_vf_queue(struct hclge_vport *vport,
552 				    struct hclge_mbx_vf_to_pf_cmd *mbx_req,
553 				    struct hclge_respond_to_vf_msg *resp_msg)
554 {
555 #define HCLGE_RESET_ALL_QUEUE_DONE	1U
556 	struct hnae3_handle *handle = &vport->nic;
557 	struct hclge_dev *hdev = vport->back;
558 	u16 queue_id;
559 	int ret;
560 
561 	memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id));
562 	resp_msg->data[0] = HCLGE_RESET_ALL_QUEUE_DONE;
563 	resp_msg->len = sizeof(u8);
564 
565 	/* pf will reset vf's all queues at a time. So it is unnecessary
566 	 * to reset queues if queue_id > 0, just return success.
567 	 */
568 	if (queue_id > 0)
569 		return 0;
570 
571 	ret = hclge_reset_tqp(handle);
572 	if (ret)
573 		dev_err(&hdev->pdev->dev, "failed to reset vf %u queue, ret = %d\n",
574 			vport->vport_id - HCLGE_VF_VPORT_START_NUM, ret);
575 
576 	return ret;
577 }
578 
hclge_reset_vf(struct hclge_vport * vport)579 static int hclge_reset_vf(struct hclge_vport *vport)
580 {
581 	struct hclge_dev *hdev = vport->back;
582 
583 	dev_warn(&hdev->pdev->dev, "PF received VF reset request from VF %u!",
584 		 vport->vport_id);
585 
586 	return hclge_func_reset_cmd(hdev, vport->vport_id);
587 }
588 
hclge_vf_keep_alive(struct hclge_vport * vport)589 static void hclge_vf_keep_alive(struct hclge_vport *vport)
590 {
591 	vport->last_active_jiffies = jiffies;
592 }
593 
hclge_set_vf_mtu(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)594 static int hclge_set_vf_mtu(struct hclge_vport *vport,
595 			    struct hclge_mbx_vf_to_pf_cmd *mbx_req)
596 {
597 	u32 mtu;
598 
599 	memcpy(&mtu, mbx_req->msg.data, sizeof(mtu));
600 
601 	return hclge_set_vport_mtu(vport, mtu);
602 }
603 
hclge_get_queue_id_in_pf(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req,struct hclge_respond_to_vf_msg * resp_msg)604 static void hclge_get_queue_id_in_pf(struct hclge_vport *vport,
605 				     struct hclge_mbx_vf_to_pf_cmd *mbx_req,
606 				     struct hclge_respond_to_vf_msg *resp_msg)
607 {
608 	u16 queue_id, qid_in_pf;
609 
610 	memcpy(&queue_id, mbx_req->msg.data, sizeof(queue_id));
611 	qid_in_pf = hclge_covert_handle_qid_global(&vport->nic, queue_id);
612 	memcpy(resp_msg->data, &qid_in_pf, sizeof(qid_in_pf));
613 	resp_msg->len = sizeof(qid_in_pf);
614 }
615 
hclge_get_rss_key(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req,struct hclge_respond_to_vf_msg * resp_msg)616 static void hclge_get_rss_key(struct hclge_vport *vport,
617 			      struct hclge_mbx_vf_to_pf_cmd *mbx_req,
618 			      struct hclge_respond_to_vf_msg *resp_msg)
619 {
620 #define HCLGE_RSS_MBX_RESP_LEN	8
621 	struct hclge_dev *hdev = vport->back;
622 	u8 index;
623 
624 	index = mbx_req->msg.data[0];
625 
626 	/* Check the query index of rss_hash_key from VF, make sure no
627 	 * more than the size of rss_hash_key.
628 	 */
629 	if (((index + 1) * HCLGE_RSS_MBX_RESP_LEN) >
630 	      sizeof(vport[0].rss_hash_key)) {
631 		dev_warn(&hdev->pdev->dev,
632 			 "failed to get the rss hash key, the index(%u) invalid !\n",
633 			 index);
634 		return;
635 	}
636 
637 	memcpy(resp_msg->data,
638 	       &hdev->vport[0].rss_hash_key[index * HCLGE_RSS_MBX_RESP_LEN],
639 	       HCLGE_RSS_MBX_RESP_LEN);
640 	resp_msg->len = HCLGE_RSS_MBX_RESP_LEN;
641 }
642 
hclge_link_fail_parse(struct hclge_dev * hdev,u8 link_fail_code)643 static void hclge_link_fail_parse(struct hclge_dev *hdev, u8 link_fail_code)
644 {
645 	switch (link_fail_code) {
646 	case HCLGE_LF_REF_CLOCK_LOST:
647 		dev_warn(&hdev->pdev->dev, "Reference clock lost!\n");
648 		break;
649 	case HCLGE_LF_XSFP_TX_DISABLE:
650 		dev_warn(&hdev->pdev->dev, "SFP tx is disabled!\n");
651 		break;
652 	case HCLGE_LF_XSFP_ABSENT:
653 		dev_warn(&hdev->pdev->dev, "SFP is absent!\n");
654 		break;
655 	default:
656 		break;
657 	}
658 }
659 
hclge_handle_link_change_event(struct hclge_dev * hdev,struct hclge_mbx_vf_to_pf_cmd * req)660 static void hclge_handle_link_change_event(struct hclge_dev *hdev,
661 					   struct hclge_mbx_vf_to_pf_cmd *req)
662 {
663 	hclge_task_schedule(hdev, 0);
664 
665 	if (!req->msg.subcode)
666 		hclge_link_fail_parse(hdev, req->msg.data[0]);
667 }
668 
hclge_cmd_crq_empty(struct hclge_hw * hw)669 static bool hclge_cmd_crq_empty(struct hclge_hw *hw)
670 {
671 	u32 tail = hclge_read_dev(hw, HCLGE_NIC_CRQ_TAIL_REG);
672 
673 	return tail == hw->cmq.crq.next_to_use;
674 }
675 
hclge_handle_ncsi_error(struct hclge_dev * hdev)676 static void hclge_handle_ncsi_error(struct hclge_dev *hdev)
677 {
678 	struct hnae3_ae_dev *ae_dev = hdev->ae_dev;
679 
680 	ae_dev->ops->set_default_reset_request(ae_dev, HNAE3_GLOBAL_RESET);
681 	dev_warn(&hdev->pdev->dev, "requesting reset due to NCSI error\n");
682 	ae_dev->ops->reset_event(hdev->pdev, NULL);
683 }
684 
hclge_handle_vf_tbl(struct hclge_vport * vport,struct hclge_mbx_vf_to_pf_cmd * mbx_req)685 static void hclge_handle_vf_tbl(struct hclge_vport *vport,
686 				struct hclge_mbx_vf_to_pf_cmd *mbx_req)
687 {
688 	struct hclge_dev *hdev = vport->back;
689 	struct hclge_vf_vlan_cfg *msg_cmd;
690 
691 	msg_cmd = (struct hclge_vf_vlan_cfg *)&mbx_req->msg;
692 	if (msg_cmd->subcode == HCLGE_MBX_VPORT_LIST_CLEAR) {
693 		hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_UC);
694 		hclge_rm_vport_all_mac_table(vport, true, HCLGE_MAC_ADDR_MC);
695 		hclge_rm_vport_all_vlan_table(vport, true);
696 	} else {
697 		dev_warn(&hdev->pdev->dev, "Invalid cmd(%u)\n",
698 			 msg_cmd->subcode);
699 	}
700 }
701 
hclge_mbx_handler(struct hclge_dev * hdev)702 void hclge_mbx_handler(struct hclge_dev *hdev)
703 {
704 	struct hclge_cmq_ring *crq = &hdev->hw.cmq.crq;
705 	struct hclge_respond_to_vf_msg resp_msg;
706 	struct hclge_mbx_vf_to_pf_cmd *req;
707 	struct hclge_vport *vport;
708 	struct hclge_desc *desc;
709 	bool is_del = false;
710 	unsigned int flag;
711 	int ret = 0;
712 
713 	memset(&resp_msg, 0, sizeof(resp_msg));
714 	/* handle all the mailbox requests in the queue */
715 	while (!hclge_cmd_crq_empty(&hdev->hw)) {
716 		if (test_bit(HCLGE_STATE_CMD_DISABLE, &hdev->state)) {
717 			dev_warn(&hdev->pdev->dev,
718 				 "command queue needs re-initializing\n");
719 			return;
720 		}
721 
722 		desc = &crq->desc[crq->next_to_use];
723 		req = (struct hclge_mbx_vf_to_pf_cmd *)desc->data;
724 
725 		flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
726 		if (unlikely(!hnae3_get_bit(flag, HCLGE_CMDQ_RX_OUTVLD_B))) {
727 			dev_warn(&hdev->pdev->dev,
728 				 "dropped invalid mailbox message, code = %u\n",
729 				 req->msg.code);
730 
731 			/* dropping/not processing this invalid message */
732 			crq->desc[crq->next_to_use].flag = 0;
733 			hclge_mbx_ring_ptr_move_crq(crq);
734 			continue;
735 		}
736 
737 		vport = &hdev->vport[req->mbx_src_vfid];
738 
739 		trace_hclge_pf_mbx_get(hdev, req);
740 
741 		switch (req->msg.code) {
742 		case HCLGE_MBX_MAP_RING_TO_VECTOR:
743 			ret = hclge_map_unmap_ring_to_vf_vector(vport, true,
744 								req);
745 			break;
746 		case HCLGE_MBX_UNMAP_RING_TO_VECTOR:
747 			ret = hclge_map_unmap_ring_to_vf_vector(vport, false,
748 								req);
749 			break;
750 		case HCLGE_MBX_SET_PROMISC_MODE:
751 			ret = hclge_set_vf_promisc_mode(vport, req);
752 			if (ret)
753 				dev_err(&hdev->pdev->dev,
754 					"PF fail(%d) to set VF promisc mode\n",
755 					ret);
756 			break;
757 		case HCLGE_MBX_SET_UNICAST:
758 			ret = hclge_set_vf_uc_mac_addr(vport, req);
759 			if (ret)
760 				dev_err(&hdev->pdev->dev,
761 					"PF fail(%d) to set VF UC MAC Addr\n",
762 					ret);
763 			break;
764 		case HCLGE_MBX_SET_MULTICAST:
765 			ret = hclge_set_vf_mc_mac_addr(vport, req);
766 			if (ret)
767 				dev_err(&hdev->pdev->dev,
768 					"PF fail(%d) to set VF MC MAC Addr\n",
769 					ret);
770 			break;
771 		case HCLGE_MBX_SET_VLAN:
772 			ret = hclge_set_vf_vlan_cfg(vport, req, &resp_msg);
773 			if (ret)
774 				dev_err(&hdev->pdev->dev,
775 					"PF failed(%d) to config VF's VLAN\n",
776 					ret);
777 			break;
778 		case HCLGE_MBX_SET_ALIVE:
779 			ret = hclge_set_vf_alive(vport, req);
780 			if (ret)
781 				dev_err(&hdev->pdev->dev,
782 					"PF failed(%d) to set VF's ALIVE\n",
783 					ret);
784 			break;
785 		case HCLGE_MBX_GET_QINFO:
786 			hclge_get_vf_queue_info(vport, &resp_msg);
787 			break;
788 		case HCLGE_MBX_GET_QDEPTH:
789 			hclge_get_vf_queue_depth(vport, &resp_msg);
790 			break;
791 		case HCLGE_MBX_GET_TCINFO:
792 			hclge_get_vf_tcinfo(vport, &resp_msg);
793 			break;
794 		case HCLGE_MBX_GET_LINK_STATUS:
795 			ret = hclge_push_vf_link_status(vport);
796 			if (ret)
797 				dev_err(&hdev->pdev->dev,
798 					"failed to inform link stat to VF, ret = %d\n",
799 					ret);
800 			break;
801 		case HCLGE_MBX_QUEUE_RESET:
802 			ret = hclge_mbx_reset_vf_queue(vport, req, &resp_msg);
803 			break;
804 		case HCLGE_MBX_RESET:
805 			ret = hclge_reset_vf(vport);
806 			break;
807 		case HCLGE_MBX_KEEP_ALIVE:
808 			hclge_vf_keep_alive(vport);
809 			break;
810 		case HCLGE_MBX_SET_MTU:
811 			ret = hclge_set_vf_mtu(vport, req);
812 			if (ret)
813 				dev_err(&hdev->pdev->dev,
814 					"VF fail(%d) to set mtu\n", ret);
815 			break;
816 		case HCLGE_MBX_GET_QID_IN_PF:
817 			hclge_get_queue_id_in_pf(vport, req, &resp_msg);
818 			break;
819 		case HCLGE_MBX_GET_RSS_KEY:
820 			hclge_get_rss_key(vport, req, &resp_msg);
821 			break;
822 		case HCLGE_MBX_GET_LINK_MODE:
823 			hclge_get_link_mode(vport, req);
824 			break;
825 		case HCLGE_MBX_GET_VF_FLR_STATUS:
826 		case HCLGE_MBX_VF_UNINIT:
827 			is_del = req->msg.code == HCLGE_MBX_VF_UNINIT;
828 			hclge_rm_vport_all_mac_table(vport, is_del,
829 						     HCLGE_MAC_ADDR_UC);
830 			hclge_rm_vport_all_mac_table(vport, is_del,
831 						     HCLGE_MAC_ADDR_MC);
832 			hclge_rm_vport_all_vlan_table(vport, is_del);
833 			break;
834 		case HCLGE_MBX_GET_MEDIA_TYPE:
835 			hclge_get_vf_media_type(vport, &resp_msg);
836 			break;
837 		case HCLGE_MBX_PUSH_LINK_STATUS:
838 			hclge_handle_link_change_event(hdev, req);
839 			break;
840 		case HCLGE_MBX_GET_MAC_ADDR:
841 			hclge_get_vf_mac_addr(vport, &resp_msg);
842 			break;
843 		case HCLGE_MBX_NCSI_ERROR:
844 			hclge_handle_ncsi_error(hdev);
845 			break;
846 		case HCLGE_MBX_HANDLE_VF_TBL:
847 			hclge_handle_vf_tbl(vport, req);
848 			break;
849 		default:
850 			dev_err(&hdev->pdev->dev,
851 				"un-supported mailbox message, code = %u\n",
852 				req->msg.code);
853 			break;
854 		}
855 
856 		/* PF driver should not reply IMP */
857 		if (hnae3_get_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B) &&
858 		    req->msg.code < HCLGE_MBX_GET_VF_FLR_STATUS) {
859 			resp_msg.status = ret;
860 			hclge_gen_resp_to_vf(vport, req, &resp_msg);
861 		}
862 
863 		crq->desc[crq->next_to_use].flag = 0;
864 		hclge_mbx_ring_ptr_move_crq(crq);
865 
866 		/* reinitialize ret after complete the mbx message processing */
867 		ret = 0;
868 	}
869 
870 	/* Write back CMDQ_RQ header pointer, M7 need this pointer */
871 	hclge_write_dev(&hdev->hw, HCLGE_NIC_CRQ_HEAD_REG, crq->next_to_use);
872 }
873