1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 */ 5 6 #ifndef AM65_CPSW_NUSS_H_ 7 #define AM65_CPSW_NUSS_H_ 8 9 #include <linux/if_ether.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/netdevice.h> 13 #include <linux/phy.h> 14 #include <linux/platform_device.h> 15 #include <linux/soc/ti/k3-ringacc.h> 16 #include <net/devlink.h> 17 #include "am65-cpsw-qos.h" 18 19 struct am65_cpts; 20 21 #define HOST_PORT_NUM 0 22 23 #define AM65_CPSW_MAX_TX_QUEUES 8 24 #define AM65_CPSW_MAX_RX_QUEUES 1 25 #define AM65_CPSW_MAX_RX_FLOWS 1 26 27 #define AM65_CPSW_PORT_VLAN_REG_OFFSET 0x014 28 29 struct am65_cpsw_slave_data { 30 bool mac_only; 31 struct cpsw_sl *mac_sl; 32 struct device_node *phy_node; 33 struct phy_device *phy; 34 phy_interface_t phy_if; 35 struct phy *ifphy; 36 bool rx_pause; 37 bool tx_pause; 38 u8 mac_addr[ETH_ALEN]; 39 int port_vlan; 40 }; 41 42 struct am65_cpsw_port { 43 struct am65_cpsw_common *common; 44 struct net_device *ndev; 45 const char *name; 46 u32 port_id; 47 void __iomem *port_base; 48 void __iomem *stat_base; 49 void __iomem *fetch_ram_base; 50 bool disabled; 51 struct am65_cpsw_slave_data slave; 52 bool tx_ts_enabled; 53 bool rx_ts_enabled; 54 struct am65_cpsw_qos qos; 55 struct devlink_port devlink_port; 56 }; 57 58 struct am65_cpsw_host { 59 struct am65_cpsw_common *common; 60 void __iomem *port_base; 61 void __iomem *stat_base; 62 }; 63 64 struct am65_cpsw_tx_chn { 65 struct device *dma_dev; 66 struct napi_struct napi_tx; 67 struct am65_cpsw_common *common; 68 struct k3_cppi_desc_pool *desc_pool; 69 struct k3_udma_glue_tx_channel *tx_chn; 70 spinlock_t lock; /* protect TX rings in multi-port mode */ 71 int irq; 72 u32 id; 73 u32 descs_num; 74 char tx_chn_name[128]; 75 }; 76 77 struct am65_cpsw_rx_chn { 78 struct device *dev; 79 struct device *dma_dev; 80 struct k3_cppi_desc_pool *desc_pool; 81 struct k3_udma_glue_rx_channel *rx_chn; 82 u32 descs_num; 83 int irq; 84 }; 85 86 #define AM65_CPSW_QUIRK_I2027_NO_TX_CSUM BIT(0) 87 88 struct am65_cpsw_pdata { 89 u32 quirks; 90 enum k3_ring_mode fdqring_mode; 91 const char *ale_dev_id; 92 }; 93 94 enum cpsw_devlink_param_id { 95 AM65_CPSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 96 AM65_CPSW_DL_PARAM_SWITCH_MODE, 97 }; 98 99 struct am65_cpsw_devlink { 100 struct am65_cpsw_common *common; 101 }; 102 103 struct am65_cpsw_common { 104 struct device *dev; 105 struct device *mdio_dev; 106 struct am65_cpsw_pdata pdata; 107 108 void __iomem *ss_base; 109 void __iomem *cpsw_base; 110 111 u32 port_num; 112 struct am65_cpsw_host host; 113 struct am65_cpsw_port *ports; 114 u32 disabled_ports_mask; 115 struct net_device *dma_ndev; 116 117 int usage_count; /* number of opened ports */ 118 struct cpsw_ale *ale; 119 int tx_ch_num; 120 u32 rx_flow_id_base; 121 122 struct am65_cpsw_tx_chn tx_chns[AM65_CPSW_MAX_TX_QUEUES]; 123 struct completion tdown_complete; 124 atomic_t tdown_cnt; 125 126 struct am65_cpsw_rx_chn rx_chns; 127 struct napi_struct napi_rx; 128 129 u32 nuss_ver; 130 u32 cpsw_ver; 131 unsigned long bus_freq; 132 bool pf_p0_rx_ptype_rrobin; 133 struct am65_cpts *cpts; 134 int est_enabled; 135 136 bool is_emac_mode; 137 u16 br_members; 138 int default_vlan; 139 struct devlink *devlink; 140 struct net_device *hw_bridge_dev; 141 struct notifier_block am65_cpsw_netdevice_nb; 142 unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; 143 }; 144 145 struct am65_cpsw_ndev_stats { 146 u64 tx_packets; 147 u64 tx_bytes; 148 u64 rx_packets; 149 u64 rx_bytes; 150 struct u64_stats_sync syncp; 151 }; 152 153 struct am65_cpsw_ndev_priv { 154 u32 msg_enable; 155 struct am65_cpsw_port *port; 156 struct am65_cpsw_ndev_stats __percpu *stats; 157 bool offload_fwd_mark; 158 }; 159 160 #define am65_ndev_to_priv(ndev) \ 161 ((struct am65_cpsw_ndev_priv *)netdev_priv(ndev)) 162 #define am65_ndev_to_port(ndev) (am65_ndev_to_priv(ndev)->port) 163 #define am65_ndev_to_common(ndev) (am65_ndev_to_port(ndev)->common) 164 #define am65_ndev_to_slave(ndev) (&am65_ndev_to_port(ndev)->slave) 165 166 #define am65_common_get_host(common) (&(common)->host) 167 #define am65_common_get_port(common, id) (&(common)->ports[(id) - 1]) 168 169 #define am65_cpsw_napi_to_common(pnapi) \ 170 container_of(pnapi, struct am65_cpsw_common, napi_rx) 171 #define am65_cpsw_napi_to_tx_chn(pnapi) \ 172 container_of(pnapi, struct am65_cpsw_tx_chn, napi_tx) 173 174 #define AM65_CPSW_DRV_NAME "am65-cpsw-nuss" 175 176 #define AM65_CPSW_IS_CPSW2G(common) ((common)->port_num == 1) 177 178 extern const struct ethtool_ops am65_cpsw_ethtool_ops_slave; 179 180 void am65_cpsw_nuss_adjust_link(struct net_device *ndev); 181 void am65_cpsw_nuss_set_p0_ptype(struct am65_cpsw_common *common); 182 void am65_cpsw_nuss_remove_tx_chns(struct am65_cpsw_common *common); 183 int am65_cpsw_nuss_update_tx_chns(struct am65_cpsw_common *common, int num_tx); 184 185 bool am65_cpsw_port_dev_check(const struct net_device *dev); 186 187 #endif /* AM65_CPSW_NUSS_H_ */ 188