1 /* 2 * Copyright (c) 2014-2020, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_render_g10_X.h 24 //! \brief Defines functions for constructing render engine commands on Gen10-based platforms 25 //! 26 27 #ifndef __MHW_RENDER_G10_X_H__ 28 #define __MHW_RENDER_G10_X_H__ 29 30 #include "mhw_render_generic.h" 31 #include "mhw_render_hwcmd_g10_X.h" 32 #include "mhw_state_heap_g10.h" 33 34 class MhwRenderInterfaceG10 : public MhwRenderInterfaceGeneric<mhw_render_g10_X> 35 { 36 public: MhwRenderInterfaceG10(MhwMiInterface * miInterface,PMOS_INTERFACE osInterface,MEDIA_SYSTEM_INFO * gtSystemInfo,uint8_t newStateHeapManagerRequested)37 MhwRenderInterfaceG10( 38 MhwMiInterface *miInterface, 39 PMOS_INTERFACE osInterface, 40 MEDIA_SYSTEM_INFO *gtSystemInfo, 41 uint8_t newStateHeapManagerRequested) : 42 MhwRenderInterfaceGeneric(miInterface, osInterface, gtSystemInfo, newStateHeapManagerRequested) 43 { 44 MHW_FUNCTION_ENTER; 45 46 // L3 Cache size per bank = 256 KB. 47 // {SLM, URB, DC, RO(I/S, C, T), L3 Client Pool} 48 // { 0, 64, 0, 0, 192 } 49 m_l3CacheCntlRegisterValueDefault = 0xC0000040; 50 51 InitMmioRegisters(); 52 } 53 ~MhwRenderInterfaceG10()54 virtual ~MhwRenderInterfaceG10() { MHW_FUNCTION_ENTER; } 55 56 MOS_STATUS AddMediaVfeCmd( 57 PMOS_COMMAND_BUFFER cmdBuffer, 58 PMHW_VFE_PARAMS params); 59 60 MOS_STATUS AddPipelineSelectCmd( 61 PMOS_COMMAND_BUFFER cmdBuffer, 62 bool gpGpuPipe); 63 64 MOS_STATUS AddMediaObject( 65 PMOS_COMMAND_BUFFER cmdBuffer, 66 PMHW_BATCH_BUFFER batchBuffer, 67 PMHW_MEDIA_OBJECT_PARAMS params); 68 69 MOS_STATUS AddMediaObjectWalkerCmd( 70 PMOS_COMMAND_BUFFER cmdBuffer, 71 PMHW_WALKER_PARAMS params); 72 73 MOS_STATUS AddPaletteLoadCmd( 74 PMOS_COMMAND_BUFFER cmdBuffer, 75 PMHW_PALETTE_PARAMS params); 76 77 MOS_STATUS AddGpgpuCsrBaseAddrCmd( 78 PMOS_COMMAND_BUFFER cmdBuffer, 79 PMOS_RESOURCE csrResource); 80 81 MOS_STATUS EnableL3Caching( 82 PMHW_RENDER_ENGINE_L3_CACHE_SETTINGS cacheSettings); 83 84 MOS_STATUS SetL3Cache( 85 PMOS_COMMAND_BUFFER cmdBuffer ); 86 GetL3CacheConfig()87 MHW_RENDER_ENGINE_L3_CACHE_CONFIG* GetL3CacheConfig() { return &m_l3CacheConfig; } 88 GetMmioRegisters()89 virtual PMHW_MI_MMIOREGISTERS GetMmioRegisters() 90 { 91 return &m_mmioRegisters; 92 } 93 94 //! 95 //! \brief Get AVS sampler state Inc unit 96 //! \details Get AVS sampler state Inc unit 97 //! \return [out] uint32_t 98 //! AVS sampler unit. GetSamplerStateAVSIncUnit()99 uint32_t GetSamplerStateAVSIncUnit() { return MHW_SAMPLER_STATE_AVS_INC_G10; } 100 101 //! 102 //! \brief Get Conv sampler state Inc unit 103 //! \details Get Conv sampler state Inc unit 104 //! \return [out] uint32_t 105 //! Conv sampler unit. GetSamplerStateConvIncUnit()106 uint32_t GetSamplerStateConvIncUnit() { return MHW_SAMPLER_STATE_CONV_INC_G10; } 107 108 //! 109 //! \brief Get the sampler height and width align unit 110 //! \details NV12 format needs the width and height to be a multiple of some unit 111 //! \param [in] bool 112 //! true if AVS sampler, false otherwise 113 //! \param [in, out] uint32_t 114 //! weight align unit 115 //! \param [in, out] uint32_t 116 //! height align unit GetSamplerResolutionAlignUnit(bool isAVSSampler,uint32_t & widthAlignUnit,uint32_t & heightAlignUnit)117 virtual void GetSamplerResolutionAlignUnit(bool isAVSSampler, uint32_t &widthAlignUnit, uint32_t &heightAlignUnit) 118 { 119 // enable 2 plane NV12 when width is not multiple of 2 or height is 120 // not multiple of 4. For AVS sampler, no limitation for 4 alignment. 121 widthAlignUnit = isAVSSampler ? MHW_AVS_SAMPLER_WIDTH_ALIGN_UNIT : MHW_SAMPLER_WIDTH_ALIGN_UNIT_G10; 122 heightAlignUnit = isAVSSampler ? MHW_AVS_SAMPLER_HEIGHT_ALIGN_UNIT : MHW_SAMPLER_HEIGHT_ALIGN_UNIT_G10; 123 } 124 125 private: 126 //! \brief Mmio registers address 127 MHW_MI_MMIOREGISTERS m_mmioRegisters = {}; 128 void InitMmioRegisters(); 129 }; 130 131 #endif 132