1 /*
2 * Copyright (c) 2017-2020, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file mhw_vdbox_mfx_g12_X.cpp
24 //! \brief Constructs VdBox MFX commands on Gen12-based platforms
25
26 #include "mhw_vdbox_mfx_g12_X.h"
27 #include "mhw_mi_hwcmd_g12_X.h"
28 #include "mos_os.h"
29 #include "mhw_mmio_g12.h"
30
31 #define GEN12_AVC_MPR_ROWSTORE_BASEADDRESS 256
32 #define GEN12_AVC_MPR_ROWSTORE_BASEADDRESS_MBAFF 512
33 #define GEN12_AVC_IP_ROWSTORE_BASEADDRESS 512
34 #define GEN12_AVC_IP_ROWSTORE_BASEADDRESS_MBAFF 1024
35 #define GEN12_AVC_VLF_ROWSTORE_BASEADDRESS 768
36 #define GEN12_VP8_IP_ROWSTORE_BASEADDRESS 256
37 #define GEN12_VP8_VLF_ROWSTORE_BASEADDRESS 512
38
InitMmioRegisters()39 void MhwVdboxMfxInterfaceG12::InitMmioRegisters()
40 {
41 MmioRegistersMfx *mmioRegisters = &m_mmioRegisters[MHW_VDBOX_NODE_1];
42
43 mmioRegisters->generalPurposeRegister0LoOffset = GENERAL_PURPOSE_REGISTER0_LO_OFFSET_NODE_1_INIT_G12;
44 mmioRegisters->generalPurposeRegister0HiOffset = GENERAL_PURPOSE_REGISTER0_HI_OFFSET_NODE_1_INIT_G12;
45 mmioRegisters->generalPurposeRegister4LoOffset = GENERAL_PURPOSE_REGISTER4_LO_OFFSET_NODE_1_INIT_G12;
46 mmioRegisters->generalPurposeRegister4HiOffset = GENERAL_PURPOSE_REGISTER4_HI_OFFSET_NODE_1_INIT_G12;
47 mmioRegisters->generalPurposeRegister11LoOffset = GENERAL_PURPOSE_REGISTER11_LO_OFFSET_NODE_1_INIT_G12;
48 mmioRegisters->generalPurposeRegister11HiOffset = GENERAL_PURPOSE_REGISTER11_HI_OFFSET_NODE_1_INIT_G12;
49 mmioRegisters->generalPurposeRegister12LoOffset = GENERAL_PURPOSE_REGISTER12_LO_OFFSET_NODE_1_INIT_G12;
50 mmioRegisters->generalPurposeRegister12HiOffset = GENERAL_PURPOSE_REGISTER12_HI_OFFSET_NODE_1_INIT_G12;
51 mmioRegisters->mfcImageStatusMaskRegOffset = MFC_IMAGE_STATUS_MASK_REG_OFFSET_NODE_1_INIT_G12;
52 mmioRegisters->mfcImageStatusCtrlRegOffset = MFC_IMAGE_STATUS_CTRL_REG_OFFSET_NODE_1_INIT_G12;
53 mmioRegisters->mfcAvcNumSlicesRegOffset = MFC_AVC_NUM_SLICES_REG_OFFSET_NODE_1_INIT_G12;
54 mmioRegisters->mfcQPStatusCountOffset = MFC_QP_STATUS_COUNT_OFFSET_NODE_1_INIT_G12;
55 mmioRegisters->mfxErrorFlagsRegOffset = MFX_ERROR_FLAG_REG_OFFSET_NODE_1_INIT_G12;
56 mmioRegisters->mfxFrameCrcRegOffset = MFX_FRAME_CRC_REG_OFFSET_NODE_1_INIT_G12;
57 mmioRegisters->mfxMBCountRegOffset = MFX_MB_COUNT_REG_OFFSET_NODE_1_INIT_G12;
58 mmioRegisters->mfcBitstreamBytecountFrameRegOffset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG_OFFSET_NODE_1_INIT_G12;
59 mmioRegisters->mfcBitstreamSeBitcountFrameRegOffset = MFC_BITSTREAM_SE_BITCOUNT_FRAME_REG_OFFSET_NODE_1_INIT_G12;
60 mmioRegisters->mfcBitstreamBytecountSliceRegOffset = MFC_BITSTREAM_BYTECOUNT_SLICE_REG_OFFSET_NODE_1_INIT_G12;
61 mmioRegisters->mfcVP8BitstreamBytecountFrameRegOffset = MFC_VP8_BITSTREAM_BYTECOUNT_FRAME_REG_OFFSET_NODE_1_INIT_G12;
62 mmioRegisters->mfcVP8ImageStatusMaskRegOffset = MFC_VP8_IMAGE_STATUS_MASK_REG_OFFSET_NODE_1_INIT_G12;
63 mmioRegisters->mfcVP8ImageStatusCtrlRegOffset = MFC_VP8_IMAGE_STATUS_CTRL_REG_OFFSET_NODE_1_INIT_G12;
64 mmioRegisters->mfxVP8BrcDQIndexRegOffset = MFX_VP8_BRC_DQ_INDEX_REG_OFFSET_NODE_1_INIT_G12;
65 mmioRegisters->mfxVP8BrcDLoopFilterRegOffset = MFX_VP8_BRC_LOOP_FILTER_REG_OFFSET_NODE_1_INIT_G12;
66 mmioRegisters->mfxVP8BrcCumulativeDQIndex01RegOffset = MFX_VP8_BRC_CUMULATIVE_DQ_INDEX01_REG_OFFSET_NODE_1_INIT_G12;
67 mmioRegisters->mfxVP8BrcCumulativeDQIndex23RegOffset = MFX_VP8_BRC_CUMULATIVE_DQ_INDEX23_REG_OFFSET_NODE_1_INIT_G12;
68 mmioRegisters->mfxVP8BrcCumulativeDLoopFilter01RegOffset = MFX_VP8_BRC_CUMULATIVE_LOOP_FILTER01_REG_OFFSET_NODE_1_INIT_G12;
69 mmioRegisters->mfxVP8BrcCumulativeDLoopFilter23RegOffset = MFX_VP8_BRC_CUMULATIVE_LOOP_FILTER23_REG_OFFSET_NODE_1_INIT_G12;
70 mmioRegisters->mfxVP8BrcConvergenceStatusRegOffset = MFX_VP8_BRC_CONVERGENCE_STATUS_REG_OFFSET_NODE_1_INIT_G12;
71 mmioRegisters->mfxLra0RegOffset = MFX_LRA0_REG_OFFSET_NODE_1_INIT_G12;
72 mmioRegisters->mfxLra1RegOffset = MFX_LRA1_REG_OFFSET_NODE_1_INIT_G12;
73 mmioRegisters->mfxLra2RegOffset = MFX_LRA2_REG_OFFSET_NODE_1_INIT_G12;
74
75 m_mmioRegisters[MHW_VDBOX_NODE_2] = m_mmioRegisters[MHW_VDBOX_NODE_1];
76 }
77
InitRowstoreUserFeatureSettings()78 void MhwVdboxMfxInterfaceG12::InitRowstoreUserFeatureSettings()
79 {
80 MOS_USER_FEATURE_VALUE_DATA userFeatureData;
81
82 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
83 if (m_osInterface->bSimIsActive)
84 {
85 // GEN12 can support row store cache
86 userFeatureData.u32Data = 1;
87 }
88 else
89 {
90 userFeatureData.u32Data = 0;
91 }
92
93 userFeatureData.i32DataFlag = MOS_USER_FEATURE_VALUE_DATA_FLAG_CUSTOM_DEFAULT_VALUE_TYPE;
94 #if (_DEBUG || _RELEASE_INTERNAL)
95 MOS_UserFeature_ReadValue_ID(
96 nullptr,
97 __MEDIA_USER_FEATURE_VALUE_ROWSTORE_CACHE_DISABLE_ID,
98 &userFeatureData,
99 m_osInterface->pOsContext);
100 #endif // _DEBUG || _RELEASE_INTERNAL
101 m_rowstoreCachingSupported = userFeatureData.i32Data ? false : true;
102
103 if (m_rowstoreCachingSupported)
104 {
105 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
106 #if (_DEBUG || _RELEASE_INTERNAL)
107 MOS_UserFeature_ReadValue_ID(
108 nullptr,
109 __MEDIA_USER_FEATURE_VALUE_INTRAROWSTORECACHE_DISABLE_ID,
110 &userFeatureData,
111 m_osInterface->pOsContext);
112 #endif // _DEBUG || _RELEASE_INTERNAL
113 m_intraRowstoreCache.bSupported = userFeatureData.i32Data ? false : true;
114
115 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
116 #if (_DEBUG || _RELEASE_INTERNAL)
117 MOS_UserFeature_ReadValue_ID(
118 nullptr,
119 __MEDIA_USER_FEATURE_VALUE_DEBLOCKINGFILTERROWSTORECACHE_DISABLE_ID,
120 &userFeatureData,
121 m_osInterface->pOsContext);
122 #endif // _DEBUG || _RELEASE_INTERNAL
123 m_deblockingFilterRowstoreCache.bSupported = userFeatureData.i32Data ? false : true;
124
125 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
126 #if (_DEBUG || _RELEASE_INTERNAL)
127 MOS_UserFeature_ReadValue_ID(
128 nullptr,
129 __MEDIA_USER_FEATURE_VALUE_BSDMPCROWSTORECACHE_DISABLE_ID,
130 &userFeatureData,
131 m_osInterface->pOsContext);
132 #endif // _DEBUG || _RELEASE_INTERNAL
133 m_bsdMpcRowstoreCache.bSupported = userFeatureData.i32Data ? false : true;
134
135 MOS_ZeroMemory(&userFeatureData, sizeof(userFeatureData));
136 #if (_DEBUG || _RELEASE_INTERNAL)
137 MOS_UserFeature_ReadValue_ID(
138 nullptr,
139 __MEDIA_USER_FEATURE_VALUE_MPRROWSTORECACHE_DISABLE_ID,
140 &userFeatureData,
141 m_osInterface->pOsContext);
142 #endif // _DEBUG || _RELEASE_INTERNAL
143 m_mprRowstoreCache.bSupported = userFeatureData.i32Data ? false : true;
144 }
145 }
146
GetRowstoreCachingAddrs(PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)147 MOS_STATUS MhwVdboxMfxInterfaceG12::GetRowstoreCachingAddrs(
148 PMHW_VDBOX_ROWSTORE_PARAMS rowstoreParams)
149 {
150 MHW_FUNCTION_ENTER;
151
152 MHW_MI_CHK_NULL(rowstoreParams);
153
154 bool avc = rowstoreParams->Mode == CODECHAL_DECODE_MODE_AVCVLD || rowstoreParams->Mode == CODECHAL_ENCODE_MODE_AVC;
155 bool vp8 = rowstoreParams->Mode == CODECHAL_DECODE_MODE_VP8VLD || rowstoreParams->Mode == CODECHAL_ENCODE_MODE_VP8;
156 bool widthLE4K = rowstoreParams->dwPicWidth <= MHW_VDBOX_PICWIDTH_4K;
157 bool mbaffOrField = rowstoreParams->bMbaff || !rowstoreParams->bIsFrame;
158
159 //BSD row store cache
160 m_bsdMpcRowstoreCache.bEnabled = m_bsdMpcRowstoreCache.bSupported && widthLE4K && (avc || vp8);
161 m_bsdMpcRowstoreCache.dwAddress = m_bsdMpcRowstoreCache.bEnabled ? BSDMPCROWSTORE_BASEADDRESS : 0;
162
163 //MPR row store cache
164 m_mprRowstoreCache.bEnabled = m_mprRowstoreCache.bSupported && widthLE4K && avc;
165 m_mprRowstoreCache.dwAddress = m_mprRowstoreCache.bEnabled ? (mbaffOrField ? GEN12_AVC_MPR_ROWSTORE_BASEADDRESS_MBAFF :
166 GEN12_AVC_MPR_ROWSTORE_BASEADDRESS) : 0;
167
168 //IP row store cache
169 m_intraRowstoreCache.bEnabled = m_intraRowstoreCache.bSupported && widthLE4K && (avc || vp8);
170 m_intraRowstoreCache.dwAddress = avc ? (mbaffOrField ? GEN12_AVC_IP_ROWSTORE_BASEADDRESS_MBAFF
171 : GEN12_AVC_IP_ROWSTORE_BASEADDRESS) : GEN12_VP8_IP_ROWSTORE_BASEADDRESS;
172 m_intraRowstoreCache.dwAddress = m_intraRowstoreCache.bEnabled ? m_intraRowstoreCache.dwAddress : 0;
173
174 //VLF row store cache
175 m_deblockingFilterRowstoreCache.bEnabled = m_deblockingFilterRowstoreCache.bSupported && widthLE4K && ((avc && !mbaffOrField) || vp8);
176 m_deblockingFilterRowstoreCache.dwAddress = m_deblockingFilterRowstoreCache.bEnabled ?
177 (avc ? GEN12_AVC_VLF_ROWSTORE_BASEADDRESS : GEN12_VP8_VLF_ROWSTORE_BASEADDRESS) : 0;
178
179 return MOS_STATUS_SUCCESS;
180 }
181
182 #if (_DEBUG || _RELEASE_INTERNAL)
CheckScalabilityOverrideValidity()183 MOS_STATUS MhwVdboxMfxInterfaceG12::CheckScalabilityOverrideValidity()
184 {
185 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
186
187 MEDIA_SYSTEM_INFO *gtSystemInfo;
188 uint32_t forceVdbox;
189 bool scalableDecMode;
190 bool useVD1, useVD2, useVD3, useVD4;
191
192 MHW_MI_CHK_NULL(m_osInterface);
193 scalableDecMode = m_osInterface->bHcpDecScalabilityMode ? true : false;
194 forceVdbox = m_osInterface->eForceVdbox;
195 gtSystemInfo = m_osInterface->pfnGetGtSystemInfo(m_osInterface);
196 MHW_MI_CHK_NULL(gtSystemInfo);
197
198 if (forceVdbox != MOS_FORCE_VDBOX_NONE &&
199 forceVdbox != MOS_FORCE_VDBOX_1 &&
200 forceVdbox != MOS_FORCE_VDBOX_2 &&
201 // 2 pipes, VDBOX1-BE1, VDBOX2-BE2
202 forceVdbox != MOS_FORCE_VDBOX_1_1_2 &&
203 forceVdbox != MOS_FORCE_VDBOX_2_1_2)
204 {
205 eStatus = MOS_STATUS_INVALID_PARAMETER;
206 MHW_ASSERTMESSAGE("user feature forceVdbox value is invalid.");
207 return eStatus;
208 }
209
210 if (!scalableDecMode &&
211 (forceVdbox == MOS_FORCE_VDBOX_1_1_2 ||
212 forceVdbox == MOS_FORCE_VDBOX_2_1_2))
213 {
214 eStatus = MOS_STATUS_INVALID_PARAMETER;
215 MHW_ASSERTMESSAGE("user feature forceVdbox valude does not consistent with regkey scalability mode.");
216 return eStatus;
217 }
218
219 if (scalableDecMode && !m_scalabilitySupported)
220 {
221 eStatus = MOS_STATUS_INVALID_PARAMETER;
222 MHW_ASSERTMESSAGE("user feature scalability mode is not allowed on current platform!");
223 return eStatus;
224 }
225
226 useVD1 = useVD2 = false;
227 if (forceVdbox == 0)
228 {
229 useVD1 = true;
230 }
231 else
232 {
233 MHW_VDBOX_IS_VDBOX_SPECIFIED(forceVdbox, MOS_FORCE_VDBOX_1,
234 MOS_FORCEVDBOX_VDBOXID_BITSNUM,
235 MOS_FORCEVDBOX_MASK,
236 useVD1);
237 MHW_VDBOX_IS_VDBOX_SPECIFIED(forceVdbox, MOS_FORCE_VDBOX_2,
238 MOS_FORCEVDBOX_VDBOXID_BITSNUM,
239 MOS_FORCEVDBOX_MASK,
240 useVD2);
241 }
242
243 if (!gtSystemInfo->VDBoxInfo.IsValid ||
244 (useVD1 && !gtSystemInfo->VDBoxInfo.Instances.Bits.VDBox0Enabled) ||
245 (useVD2 && !gtSystemInfo->VDBoxInfo.Instances.Bits.VDBox1Enabled))
246 {
247 eStatus = MOS_STATUS_INVALID_PARAMETER;
248 MHW_ASSERTMESSAGE("the forced VDBOX is not enabled in current platform.");
249 return eStatus;
250 }
251
252 return eStatus;
253 }
254 #endif
255
FindGpuNodeToUse(PMHW_VDBOX_GPUNODE_LIMIT gpuNodeLimit)256 MOS_STATUS MhwVdboxMfxInterfaceG12::FindGpuNodeToUse(
257 PMHW_VDBOX_GPUNODE_LIMIT gpuNodeLimit)
258 {
259 bool setVideoNode = false;
260 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
261
262 MOS_GPU_NODE videoGpuNode = MOS_GPU_NODE_VIDEO;
263
264 if (MOS_VE_MULTINODESCALING_SUPPORTED(m_osInterface))
265 {
266 if (GetNumVdbox() == 1)
267 {
268 videoGpuNode = MOS_GPU_NODE_VIDEO;
269 }
270 else
271 {
272 MHW_MI_CHK_STATUS(m_osInterface->pfnCreateVideoNodeAssociation(
273 m_osInterface,
274 setVideoNode,
275 &videoGpuNode));
276 }
277 }
278
279 #if (_DEBUG || _RELEASE_INTERNAL)
280 if (m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE &&
281 (!m_osInterface->bSupportVirtualEngine || !m_scalabilitySupported))
282 {
283 eStatus = MOS_STATUS_INVALID_PARAMETER;
284 MHW_ASSERTMESSAGE("not support DebugOverrid on current OS or Platform.");
285 return eStatus;
286 }
287
288 if (m_osInterface != nullptr && m_osInterface->bEnableDbgOvrdInVE)
289 {
290 MHW_MI_CHK_STATUS(CheckScalabilityOverrideValidity());
291 }
292 #endif
293
294 gpuNodeLimit->dwGpuNodeToUse = videoGpuNode;
295
296 return eStatus;
297 }
298
GetMfxStateCommandsDataSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize,bool isShortFormat)299 MOS_STATUS MhwVdboxMfxInterfaceG12::GetMfxStateCommandsDataSize(
300 uint32_t mode,
301 uint32_t *commandsSize,
302 uint32_t *patchListSize,
303 bool isShortFormat)
304 {
305 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
306
307 MHW_FUNCTION_ENTER;
308
309 MHW_MI_CHK_NULL(commandsSize);
310 MHW_MI_CHK_NULL(patchListSize);
311
312 uint32_t maxSize =
313 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize +
314 mhw_vdbox_mfx_g12_X::MFX_PIPE_MODE_SELECT_CMD::byteSize +
315 mhw_vdbox_mfx_g12_X::MFX_SURFACE_STATE_CMD::byteSize +
316 mhw_vdbox_mfx_g12_X::MFX_PIPE_BUF_ADDR_STATE_CMD::byteSize +
317 mhw_vdbox_mfx_g12_X::MFX_IND_OBJ_BASE_ADDR_STATE_CMD::byteSize +
318 2 * mhw_mi_g12_X::MI_STORE_DATA_IMM_CMD::byteSize +
319 2 * mhw_mi_g12_X::MI_STORE_REGISTER_MEM_CMD::byteSize +
320 8 * mhw_mi_g12_X::MI_LOAD_REGISTER_REG_CMD::byteSize;
321
322 uint32_t patchListMaxSize =
323 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
324 PATCH_LIST_COMMAND(MFX_PIPE_MODE_SELECT_CMD) +
325 PATCH_LIST_COMMAND(MFX_SURFACE_STATE_CMD) +
326 PATCH_LIST_COMMAND(MFX_PIPE_BUF_ADDR_STATE_CMD) +
327 PATCH_LIST_COMMAND(MFX_IND_OBJ_BASE_ADDR_STATE_CMD) +
328 (2 * PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD)) +
329 (2 * PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD));
330
331 uint32_t standard = CodecHal_GetStandardFromMode(mode);
332 if (standard == CODECHAL_AVC)
333 {
334 maxSize +=
335 mhw_vdbox_mfx_g12_X::MFX_BSP_BUF_BASE_ADDR_STATE_CMD::byteSize +
336 mhw_vdbox_mfx_g12_X::MFD_AVC_PICID_STATE_CMD::byteSize +
337 mhw_vdbox_mfx_g12_X::MFX_AVC_DIRECTMODE_STATE_CMD::byteSize +
338 mhw_vdbox_mfx_g12_X::MFX_AVC_IMG_STATE_CMD::byteSize +
339 mhw_vdbox_mfx_g12_X::MFX_QM_STATE_CMD::byteSize * 4; // QM_State sent 4 times
340
341 patchListMaxSize +=
342 PATCH_LIST_COMMAND(MFX_BSP_BUF_BASE_ADDR_STATE_CMD) +
343 PATCH_LIST_COMMAND(MFD_AVC_PICID_STATE_CMD) +
344 PATCH_LIST_COMMAND(MFX_AVC_DIRECTMODE_STATE_CMD) +
345 PATCH_LIST_COMMAND(MFX_AVC_IMG_STATE_CMD) +
346 PATCH_LIST_COMMAND(MFX_QM_STATE_CMD) * 4;
347
348 if (mode == CODECHAL_ENCODE_MODE_AVC)
349 {
350 maxSize +=
351 mhw_mi_g12_X::MI_CONDITIONAL_BATCH_BUFFER_END_CMD::byteSize +
352 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize * 3 + // 3 extra MI_FLUSH_DWs for encode
353 mhw_vdbox_mfx_g12_X::MFX_FQM_STATE_CMD::byteSize * 4 + // FQM_State sent 4 times
354 mhw_mi_g12_X::MI_STORE_REGISTER_MEM_CMD::byteSize * 8 + // 5 extra register queries for encode, 3 extra slice level commands for BrcPakStatistics
355 mhw_mi_g12_X::MI_STORE_DATA_IMM_CMD::byteSize * 3 + // slice level commands for StatusReport, BrcPakStatistics
356 MHW_VDBOX_PAK_BITSTREAM_OVERFLOW_SIZE + // accounting for the max DW payload for PAK_INSERT_OBJECT, for frame header payload
357 mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD::byteSize * 4; // for inserting AU, SPS, PSP, SEI headers before first slice header
358
359 patchListMaxSize +=
360 PATCH_LIST_COMMAND(MI_CONDITIONAL_BATCH_BUFFER_END_CMD) +
361 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) * 3 + // 3 extra MI_FLUSH_DWs for encode
362 PATCH_LIST_COMMAND(MFX_FQM_STATE_CMD) * 4 + // FQM_State sent 4 times
363 PATCH_LIST_COMMAND(MI_STORE_REGISTER_MEM_CMD) * 8 + // 5 extra register queries for encode, 3 extra slice level commands for BrcPakStatistics
364 PATCH_LIST_COMMAND(MI_STORE_DATA_IMM_CMD) * 3; // slice level commands for StatusReport, BrcPakStatistics
365 PATCH_LIST_COMMAND(MFC_AVC_PAK_INSERT_OBJECT_CMD) * 4; // for inserting AU, SPS, PSP, SEI headers before first slice header
366 }
367 }
368 else if (standard == CODECHAL_VC1)
369 {
370 maxSize +=
371 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize +
372 mhw_vdbox_mfx_g12_X::MFD_VC1_LONG_PIC_STATE_CMD::byteSize +
373 mhw_vdbox_mfx_g12_X::MFX_VC1_PRED_PIPE_STATE_CMD::byteSize;
374
375 patchListMaxSize +=
376 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) +
377 PATCH_LIST_COMMAND(MFD_VC1_LONG_PIC_STATE_CMD) +
378 PATCH_LIST_COMMAND(MFX_VC1_PRED_PIPE_STATE_CMD);
379
380 if (mode == CODECHAL_DECODE_MODE_VC1VLD)
381 {
382 maxSize +=
383 mhw_vdbox_mfx_g12_X::MFX_VC1_DIRECTMODE_STATE_CMD::byteSize +
384 mhw_vdbox_mfx_g12_X::MFX_BSP_BUF_BASE_ADDR_STATE_CMD::byteSize;
385
386 patchListMaxSize +=
387 PATCH_LIST_COMMAND(MFX_VC1_DIRECTMODE_STATE_CMD) +
388 PATCH_LIST_COMMAND(MFX_BSP_BUF_BASE_ADDR_STATE_CMD);
389 }
390 else if (mode == CODECHAL_DECODE_MODE_VC1IT)
391 {
392 maxSize +=
393 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize * 2;
394
395 patchListMaxSize +=
396 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) * 2;
397 }
398 }
399 else if (standard == CODECHAL_MPEG2)
400 {
401 maxSize += mhw_vdbox_mfx_g12_X::MFX_MPEG2_PIC_STATE_CMD::byteSize;
402 patchListMaxSize += PATCH_LIST_COMMAND(MFX_MPEG2_PIC_STATE_CMD);
403
404 if (mode == CODECHAL_DECODE_MODE_MPEG2VLD)
405 {
406 maxSize +=
407 mhw_vdbox_mfx_g12_X::MFX_BSP_BUF_BASE_ADDR_STATE_CMD::byteSize +
408 ((mhw_vdbox_mfx_g12_X::MFX_QM_STATE_CMD::byteSize + (m_mpeg2WeightScaleSize * sizeof(uint32_t))) * 2);
409
410 patchListMaxSize +=
411 PATCH_LIST_COMMAND(MFX_BSP_BUF_BASE_ADDR_STATE_CMD) +
412 PATCH_LIST_COMMAND(MFX_QM_STATE_CMD) * 2;
413 }
414 else if (mode == CODECHAL_DECODE_MODE_MPEG2IDCT)
415 {
416 maxSize +=
417 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize * 2;
418
419 patchListMaxSize +=
420 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD) * 2;
421 }
422 }
423 else if (standard == CODECHAL_VP8)
424 {
425 maxSize +=
426 mhw_vdbox_mfx_g12_X::MFX_BSP_BUF_BASE_ADDR_STATE_CMD::byteSize +
427 mhw_vdbox_mfx_g12_X::MFX_VP8_PIC_STATE_CMD::byteSize;
428
429 patchListMaxSize +=
430 PATCH_LIST_COMMAND(MFX_BSP_BUF_BASE_ADDR_STATE_CMD) +
431 PATCH_LIST_COMMAND(MFX_VP8_PIC_STATE_CMD);
432 }
433 else if (standard == CODECHAL_JPEG)
434 {
435 // Added to prevent error for JPEG
436 }
437 else
438 {
439 MHW_ASSERTMESSAGE("Unsupported decode mode.");
440 maxSize = 0;
441 patchListMaxSize = 0;
442 eStatus = MOS_STATUS_UNKNOWN;
443 }
444
445 *commandsSize = maxSize;
446 *patchListSize = patchListMaxSize;
447
448 return eStatus;
449 }
450
GetMfxPrimitiveCommandsDataSize(uint32_t mode,uint32_t * commandsSize,uint32_t * patchListSize,bool isModeSpecific)451 MOS_STATUS MhwVdboxMfxInterfaceG12::GetMfxPrimitiveCommandsDataSize(
452 uint32_t mode,
453 uint32_t *commandsSize,
454 uint32_t *patchListSize,
455 bool isModeSpecific)
456 {
457 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
458
459 MHW_FUNCTION_ENTER;
460
461 MHW_MI_CHK_NULL(commandsSize);
462 MHW_MI_CHK_NULL(patchListSize);
463
464 uint32_t maxSize = 0, patchListMaxSize = 0;
465 uint32_t standard = CodecHal_GetStandardFromMode(mode);
466
467 if (standard == CODECHAL_AVC)
468 {
469 if (mode == CODECHAL_DECODE_MODE_AVCVLD)
470 {
471 maxSize =
472 mhw_vdbox_mfx_g12_X::MFX_AVC_SLICE_STATE_CMD::byteSize +
473 mhw_vdbox_mfx_g12_X::MFD_AVC_BSD_OBJECT_CMD::byteSize +
474 mhw_vdbox_mfx_g12_X::MFD_AVC_DPB_STATE_CMD::byteSize +
475 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize;
476
477 patchListMaxSize =
478 PATCH_LIST_COMMAND(MFX_AVC_SLICE_STATE_CMD) +
479 PATCH_LIST_COMMAND(MFD_AVC_BSD_OBJECT_CMD) +
480 PATCH_LIST_COMMAND(MFD_AVC_DPB_STATE_CMD) +
481 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
482
483 if (isModeSpecific)
484 {
485 // isModeSpecific = bShortFormat for AVC decode
486 maxSize +=
487 mhw_vdbox_mfx_g12_X::MFD_AVC_DPB_STATE_CMD::byteSize +
488 mhw_vdbox_mfx_g12_X::MFD_AVC_SLICEADDR_CMD::byteSize;
489
490 patchListMaxSize +=
491 PATCH_LIST_COMMAND(MFD_AVC_DPB_STATE_CMD) +
492 PATCH_LIST_COMMAND(MFD_AVC_SLICEADDR_CMD);
493 }
494 else
495 {
496 maxSize +=
497 (2 * mhw_vdbox_mfx_g12_X::MFX_AVC_REF_IDX_STATE_CMD::byteSize) +
498 (2 * mhw_vdbox_mfx_g12_X::MFX_AVC_WEIGHTOFFSET_STATE_CMD::byteSize);
499
500 patchListMaxSize +=
501 (2 * PATCH_LIST_COMMAND(MFX_AVC_REF_IDX_STATE_CMD)) +
502 (2 * PATCH_LIST_COMMAND(MFX_AVC_WEIGHTOFFSET_STATE_CMD));
503 }
504 }
505 else // CODECHAL_ENCODE_MODE_AVC
506 {
507 // 1 PAK_INSERT_OBJECT inserted for every end of frame/stream with 1 DW payload
508 maxSize = mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD::byteSize + sizeof(uint32_t);
509 patchListMaxSize = PATCH_LIST_COMMAND(MFC_AVC_PAK_INSERT_OBJECT_CMD);
510
511 if (isModeSpecific)
512 {
513 // isModeSpecific = bSingleTaskPhaseSupported for AVC encode
514 maxSize += (2 * mhw_mi_g12_X::MI_BATCH_BUFFER_START_CMD::byteSize);
515 patchListMaxSize += (2 * PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD));
516 }
517 else
518 {
519 maxSize +=
520 (2 * mhw_vdbox_mfx_g12_X::MFX_AVC_REF_IDX_STATE_CMD::byteSize) +
521 (2 * mhw_vdbox_mfx_g12_X::MFX_AVC_WEIGHTOFFSET_STATE_CMD::byteSize) +
522 mhw_vdbox_mfx_g12_X::MFX_AVC_SLICE_STATE_CMD::byteSize +
523 MHW_VDBOX_PAK_SLICE_HEADER_OVERFLOW_SIZE + // slice header payload
524 (2 * mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD::byteSize) +
525 mhw_mi_g12_X::MI_BATCH_BUFFER_START_CMD::byteSize +
526 mhw_mi_g12_X::MI_FLUSH_DW_CMD::byteSize;
527
528 patchListMaxSize +=
529 (2 * PATCH_LIST_COMMAND(MFX_AVC_REF_IDX_STATE_CMD)) +
530 (2 * PATCH_LIST_COMMAND(MFX_AVC_WEIGHTOFFSET_STATE_CMD)) +
531 PATCH_LIST_COMMAND(MFX_AVC_SLICE_STATE_CMD) +
532 (2 * PATCH_LIST_COMMAND(MFC_AVC_PAK_INSERT_OBJECT_CMD)) +
533 PATCH_LIST_COMMAND(MI_BATCH_BUFFER_START_CMD) +
534 PATCH_LIST_COMMAND(MI_FLUSH_DW_CMD);
535 }
536 }
537 }
538 else if (standard == CODECHAL_VC1)
539 {
540 if (mode == CODECHAL_DECODE_MODE_VC1VLD)
541 {
542 maxSize =
543 mhw_vdbox_mfx_g12_X::MFD_VC1_BSD_OBJECT_CMD::byteSize;
544
545 patchListMaxSize =
546 PATCH_LIST_COMMAND(MFD_VC1_BSD_OBJECT_CMD);
547 }
548 else if (mode == CODECHAL_DECODE_MODE_VC1IT)
549 {
550 maxSize =
551 sizeof(MFD_VC1_IT_OBJECT_CMD);
552
553 patchListMaxSize =
554 PATCH_LIST_COMMAND(MFD_VC1_IT_OBJECT_CMD);
555 }
556 }
557 else if (standard == CODECHAL_MPEG2)
558 {
559 if (mode == CODECHAL_DECODE_MODE_MPEG2VLD)
560 {
561 maxSize =
562 mhw_vdbox_mfx_g12_X::MFD_MPEG2_BSD_OBJECT_CMD::byteSize ;
563
564 patchListMaxSize =
565 PATCH_LIST_COMMAND(MFD_MPEG2_BSD_OBJECT_CMD);
566 }
567 else if (mode == CODECHAL_DECODE_MODE_MPEG2IDCT)
568 {
569 maxSize =
570 sizeof(MFD_MPEG2_IT_OBJECT_CMD);
571
572 patchListMaxSize =
573 PATCH_LIST_COMMAND(MFD_MPEG2_IT_OBJECT_CMD);
574 }
575 }
576 else if (standard == CODECHAL_VP8)
577 {
578 maxSize =
579 mhw_vdbox_mfx_g12_X::MFD_VP8_BSD_OBJECT_CMD::byteSize;
580
581 patchListMaxSize +=
582 PATCH_LIST_COMMAND(MFD_VP8_BSD_OBJECT_CMD);
583 }
584 else if (standard == CODECHAL_JPEG)
585 {
586 maxSize +=
587 mhw_vdbox_mfx_g12_X::MFX_FQM_STATE_CMD::byteSize * 3 +
588 mhw_vdbox_mfx_g12_X::MFC_JPEG_HUFF_TABLE_STATE_CMD::byteSize * 2 +
589 mhw_vdbox_mfx_g12_X::MFC_JPEG_SCAN_OBJECT_CMD::byteSize +
590 mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD::byteSize * 10;
591 }
592 else
593 {
594 MHW_ASSERTMESSAGE("Unsupported decode mode.");
595 eStatus = MOS_STATUS_UNKNOWN;
596 }
597
598 *commandsSize = maxSize;
599 *patchListSize = patchListMaxSize;
600
601 return eStatus;
602 }
603
AddMfxPipeModeSelectCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params)604 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxPipeModeSelectCmd(
605 PMOS_COMMAND_BUFFER cmdBuffer,
606 PMHW_VDBOX_PIPE_MODE_SELECT_PARAMS params)
607 {
608 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
609
610 MHW_FUNCTION_ENTER;
611
612 MHW_MI_CHK_NULL(cmdBuffer);
613 MHW_MI_CHK_NULL(params);
614
615 //for gen 12, we need to add MFX wait for both KIN and VRT before and after MFX Pipemode select...
616 MHW_MI_CHK_STATUS(m_MiInterface->AddMfxWaitCmd(cmdBuffer, nullptr, true));
617
618 mhw_vdbox_mfx_g12_X::MFX_PIPE_MODE_SELECT_CMD cmd;
619
620 MHW_MI_CHK_STATUS(m_cpInterface->SetProtectionSettingsForMfxPipeModeSelect((uint32_t *)&cmd));
621
622 cmd.DW1.StreamOutEnable = params->bStreamOutEnabled;
623 cmd.DW1.DeblockerStreamOutEnable = params->bDeblockerStreamOutEnable;
624
625 if (m_decodeInUse)
626 {
627 cmd.DW1.PreDeblockingOutputEnablePredeblockoutenable = params->bPreDeblockOutEnable;
628 cmd.DW1.PostDeblockingOutputEnablePostdeblockoutenable = params->bPostDeblockOutEnable;
629 cmd.DW1.CodecSelect = decoderCodec;
630 cmd.DW1.DecoderShortFormatMode = !params->bShortFormatInUse;
631 cmd.DW2.Vlf720IOddHeightInVc1Mode = params->bVC1OddFrameHeight;
632
633 if (CodecHalIsDecodeModeVLD(params->Mode))
634 {
635 cmd.DW1.DecoderModeSelect = mfxDecoderModeVld;
636 }
637 else if (CodecHalIsDecodeModeIT(params->Mode))
638 {
639 cmd.DW1.DecoderModeSelect = mfxDecoderModeIt;
640 }
641
642 cmd.DW4.MediaSoftResetCounterPer1000Clocks = cmd.MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS_DISABLE;
643 #if (_DEBUG || _RELEASE_INTERNAL)
644 if (m_osInterface)
645 {
646 if (m_osInterface->bSoftReset)
647 {
648 cmd.DW4.MediaSoftResetCounterPer1000Clocks = cmd.MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS_ENABLE;
649 }
650 else
651 {
652 cmd.DW4.MediaSoftResetCounterPer1000Clocks = cmd.MEDIA_SOFT_RESET_COUNTER_PER_1000_CLOCKS_DISABLE;
653 }
654 }
655 #endif
656 }
657 else
658 {
659 cmd.DW1.DeblockerStreamOutEnable = params->bDeblockerStreamOutEnable;
660 cmd.DW1.PostDeblockingOutputEnablePostdeblockoutenable = params->bPostDeblockOutEnable;
661 cmd.DW1.PreDeblockingOutputEnablePredeblockoutenable = params->bPreDeblockOutEnable;
662 cmd.DW1.CodecSelect = encoderCodec;
663 cmd.DW1.DecoderShortFormatMode = !params->bShortFormatInUse; // This bit is set to be long format in order for HW to not change next slice X and Y position in encoder mode
664 }
665
666 cmd.DW1.StandardSelect = CodecHal_GetStandardFromMode(params->Mode);
667
668 if (params->bVdencEnabled)
669 {
670 cmd.DW1.VdencMode = 1;
671 // Enable 4xDS in PAK for VDENC HME
672 cmd.DW1.ScaledSurfaceEnable = 1;
673 // Disable PAK streamout from previous PAK pass, as VDEnc does not support standalone PAK
674 cmd.DW1.StreamOutEnable = 0;
675 // Enable PAK statistics streamout
676 cmd.DW1.FrameStatisticsStreamoutEnable = 1;
677 }
678
679 if (params->bStreamOutEnabledExtEnabled)
680 {
681 // Enable PerMB streamOut PAK Statistics
682 cmd.DW1.StreamOutEnable = 1;
683 cmd.DW1.ExtendedStreamOutEnable = true;
684 }
685 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
686
687 //for gen 12, we need to add MFX wait for both KIN and VRT before and after MFX Pipemode select...
688 MHW_MI_CHK_STATUS(m_MiInterface->AddMfxWaitCmd(cmdBuffer, nullptr, true));
689
690 return eStatus;
691 }
692
AddMfxSurfaceCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_SURFACE_PARAMS params)693 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxSurfaceCmd(
694 PMOS_COMMAND_BUFFER cmdBuffer,
695 PMHW_VDBOX_SURFACE_PARAMS params)
696 {
697 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
698
699 MHW_FUNCTION_ENTER;
700
701 MHW_MI_CHK_NULL(cmdBuffer);
702 MHW_MI_CHK_NULL(params);
703
704 uint32_t uvPlaneAlignment;
705 if (params->ucSurfaceStateId == CODECHAL_MFX_SRC_SURFACE_ID)
706 {
707 uvPlaneAlignment = MHW_VDBOX_MFX_RAW_UV_PLANE_ALIGNMENT_GEN9;
708 }
709 else if ((params->ucSurfaceStateId == CODECHAL_MFX_REF_SURFACE_ID) || params->ucSurfaceStateId == CODECHAL_MFX_DSRECON_SURFACE_ID)
710 {
711 uvPlaneAlignment = params->dwUVPlaneAlignment ? params->dwUVPlaneAlignment : MHW_VDBOX_MFX_RECON_UV_PLANE_ALIGNMENT;
712 }
713 else
714 {
715 uvPlaneAlignment = MHW_VDBOX_MFX_UV_PLANE_ALIGNMENT_LEGACY;
716 }
717
718 mhw_vdbox_mfx_g12_X::MFX_SURFACE_STATE_CMD cmd;
719 cmd.DW1.SurfaceId = params->ucSurfaceStateId;
720
721 // Take actual height/width from SPS in case of AVC encode and source surface
722 if (params->Mode == CODECHAL_ENCODE_MODE_AVC && params->ucSurfaceStateId == CODECHAL_MFX_SRC_SURFACE_ID)
723 {
724 cmd.DW2.Height = params->dwActualHeight - 1;
725 cmd.DW2.Width = params->dwActualWidth - 1;
726 }
727 else
728 {
729 cmd.DW2.Height = params->psSurface->dwHeight - 1;
730 cmd.DW2.Width = params->psSurface->dwWidth - 1;
731 }
732
733 cmd.DW3.TileWalk = mhw_vdbox_mfx_g12_X::MFX_SURFACE_STATE_CMD::TILE_WALK_YMAJOR;
734 cmd.DW3.TiledSurface = 1;
735 cmd.DW3.InterleaveChroma = 1;
736 cmd.DW3.SurfacePitch = params->psSurface->dwPitch - 1;
737 cmd.DW3.SurfaceFormat = MosToMediaStateFormat(params->psSurface->Format);
738 cmd.DW3.TiledSurface = IS_TILE_FORMAT(params->psSurface->TileType) ? 1 : 0;
739
740 if (cmd.DW3.TiledSurface)
741 {
742 cmd.DW3.TileWalk = (params->psSurface->TileType);
743 }
744
745 if (params->psSurface->Format == Format_P8) // monochrome format
746 {
747 cmd.DW3.InterleaveChroma = 0;
748 }
749
750 if (params->Mode == CODECHAL_DECODE_MODE_JPEG)
751 {
752 // this parameter must always be 0 for JPEG regardless of the YUV format
753 cmd.DW3.InterleaveChroma = 0;
754
755 // Separate function for JPEG decode because this surface format should match with that programmed
756 // in JPEG Picture State
757 cmd.DW3.SurfaceFormat = GetJpegDecodeFormat(params->psSurface->Format);
758
759 }
760
761 cmd.DW4.YOffsetForUCb = cmd.DW5.YOffsetForVCr =
762 MOS_ALIGN_CEIL((params->psSurface->UPlaneOffset.iSurfaceOffset -params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.U.YOffset, uvPlaneAlignment);
763
764 if (IsVPlanePresent(params->psSurface->Format))
765 {
766 cmd.DW5.YOffsetForVCr =
767 MOS_ALIGN_CEIL((params->psSurface->VPlaneOffset.iSurfaceOffset -params->psSurface->dwOffset)/params->psSurface->dwPitch + params->psSurface->RenderOffset.YUV.V.YOffset, uvPlaneAlignment);
768 }
769
770 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
771
772 return eStatus;
773 }
774
AddMfxPipeBufAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params)775 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxPipeBufAddrCmd(
776 PMOS_COMMAND_BUFFER cmdBuffer,
777 PMHW_VDBOX_PIPE_BUF_ADDR_PARAMS params)
778 {
779 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
780
781 MHW_FUNCTION_ENTER;
782
783 MHW_MI_CHK_NULL(cmdBuffer);
784 MHW_MI_CHK_NULL(params);
785
786 MHW_RESOURCE_PARAMS resourceParams;
787 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
788 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
789 resourceParams.HwCommandType = MOS_MFX_PIPE_BUF_ADDR;
790
791 mhw_vdbox_mfx_g12_X::MFX_PIPE_BUF_ADDR_STATE_CMD cmd;
792
793 #if (_DEBUG || _RELEASE_INTERNAL)
794 MOS_USER_FEATURE_VALUE_WRITE_DATA UserFeatureWriteData = __NULL_USER_FEATURE_VALUE_WRITE_DATA__;
795 UserFeatureWriteData.ValueID = __MEDIA_USER_FEATURE_VALUE_IS_CODEC_ROW_STORE_CACHE_ENABLED_ID;
796 if (m_intraRowstoreCache.bEnabled ||
797 m_deblockingFilterRowstoreCache.bEnabled ||
798 m_bsdMpcRowstoreCache.bEnabled ||
799 m_mprRowstoreCache.bEnabled)
800 {
801 UserFeatureWriteData.Value.i32Data = 1;
802 }
803 MOS_UserFeature_WriteValues_ID(nullptr, &UserFeatureWriteData, 1, m_osInterface->pOsContext);
804 #endif
805
806 // Encoding uses both surfaces regardless of deblocking status
807 if (params->psPreDeblockSurface != nullptr)
808 {
809 cmd.DW3.MemoryObjectControlState =
810 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_PRE_DEBLOCKING_CODEC].Value;
811 cmd.DW3.PreDeblockingMemoryCompressionEnable =
812 (params->PreDeblockSurfMmcState == MOS_MEMCOMP_RC || params->PreDeblockSurfMmcState == MOS_MEMCOMP_MC) ? 1 : 0;
813 cmd.DW3.PreDeblockingMemoryCompressionType = (params->PreDeblockSurfMmcState == MOS_MEMCOMP_RC) ? 1 : 0;
814
815 cmd.DW3.PreDeblockingTiledResourceMode = Mhw_ConvertToTRMode(params->psPreDeblockSurface->TileType);
816
817 resourceParams.presResource = &(params->psPreDeblockSurface->OsResource);
818 resourceParams.dwOffset = params->psPreDeblockSurface->dwOffset;
819 resourceParams.pdwCmd = &(cmd.DW1.Value);
820 resourceParams.dwLocationInCmd = 1;
821 resourceParams.bIsWritable = true;
822
823 MHW_MI_CHK_STATUS(AddResourceToCmd(
824 m_osInterface,
825 cmdBuffer,
826 &resourceParams));
827 }
828
829 if (params->psPostDeblockSurface != nullptr)
830 {
831 cmd.DW6.MemoryObjectControlState =
832 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_POST_DEBLOCKING_CODEC].Value;
833 cmd.DW6.PostDeblockingMemoryCompressionEnable =
834 (params->PostDeblockSurfMmcState == MOS_MEMCOMP_RC || params->PostDeblockSurfMmcState == MOS_MEMCOMP_MC) ? 1 : 0;
835 cmd.DW6.PostDeblockingMemoryCompressionType = (params->PostDeblockSurfMmcState == MOS_MEMCOMP_RC) ? 1 : 0;
836
837 cmd.DW6.PostDeblockingTiledResourceMode = Mhw_ConvertToTRMode(params->psPostDeblockSurface->TileType);
838
839 resourceParams.presResource = &(params->psPostDeblockSurface->OsResource);
840 resourceParams.dwOffset = params->psPostDeblockSurface->dwOffset;
841 resourceParams.pdwCmd = &(cmd.DW4.Value);
842 resourceParams.dwLocationInCmd = 4;
843 resourceParams.bIsWritable = true;
844
845 MHW_MI_CHK_STATUS(AddResourceToCmd(
846 m_osInterface,
847 cmdBuffer,
848 &resourceParams));
849 }
850
851 if (params->psRawSurface != nullptr)
852 {
853 if (!m_decodeInUse)
854 {
855 cmd.DW9.MemoryObjectControlState =
856 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_ENCODE].Value;
857 cmd.DW9.OriginalUncompressedPictureMemoryCompressionEnable =
858 (params->RawSurfMmcState == MOS_MEMCOMP_RC || params->RawSurfMmcState == MOS_MEMCOMP_MC) ? 1 : 0;
859 cmd.DW9.OriginalUncompressedPictureMemoryCompressionType = (params->RawSurfMmcState == MOS_MEMCOMP_RC) ? 1 : 0;
860 }
861 else
862 {
863 cmd.DW9.MemoryObjectControlState =
864 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_ORIGINAL_UNCOMPRESSED_PICTURE_DECODE].Value;
865 }
866
867 cmd.DW9.OriginalUncompressedPictureTiledResourceMode = Mhw_ConvertToTRMode(params->psRawSurface->TileType);
868
869 resourceParams.presResource = ¶ms->psRawSurface->OsResource;
870 resourceParams.dwOffset = params->psRawSurface->dwOffset;
871 resourceParams.pdwCmd = &(cmd.DW7.Value);
872 resourceParams.dwLocationInCmd = 7;
873 resourceParams.bIsWritable = false;
874
875 MHW_MI_CHK_STATUS(AddResourceToCmd(
876 m_osInterface,
877 cmdBuffer,
878 &resourceParams));
879 }
880
881 if (params->presStreamOutBuffer != nullptr)
882 {
883 cmd.DW12.MemoryObjectControlState =
884 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
885
886 resourceParams.presResource = params->presStreamOutBuffer;
887 resourceParams.dwOffset = 0;
888 resourceParams.pdwCmd = &(cmd.DW10.Value);
889 resourceParams.dwLocationInCmd = 10;
890 resourceParams.bIsWritable = true;
891
892 MHW_MI_CHK_STATUS(AddResourceToCmd(
893 m_osInterface,
894 cmdBuffer,
895 &resourceParams));
896
897 if (!m_decodeInUse)
898 {
899 cmd.DW54.MemoryObjectControlState =
900 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
901
902 resourceParams.presResource = params->presStreamOutBuffer;
903 resourceParams.dwOffset = 0;
904 resourceParams.pdwCmd = &(cmd.DW52.Value);
905 resourceParams.dwLocationInCmd = 52;
906 resourceParams.bIsWritable = true;
907
908 MHW_MI_CHK_STATUS(AddResourceToCmd(
909 m_osInterface,
910 cmdBuffer,
911 &resourceParams));
912 }
913 }
914
915 if (m_intraRowstoreCache.bEnabled)
916 {
917 cmd.DW15.IntraRowStoreScratchBufferCacheSelect = BUFFER_TO_INTERNALMEDIASTORAGE;
918 cmd.DW13.IntraRowStoreScratchBufferBaseAddress = m_intraRowstoreCache.dwAddress;
919 }
920 else if (params->presMfdIntraRowStoreScratchBuffer != nullptr)
921 {
922 cmd.DW15.MemoryObjectControlState =
923 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_INTRA_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
924
925 cmd.DW15.IntraRowStoreScratchBufferMemoryCompressionEnable = MHW_MEDIA_MEMCOMP_DISABLED;
926
927 resourceParams.presResource = params->presMfdIntraRowStoreScratchBuffer;
928 resourceParams.dwOffset = 0;
929 resourceParams.pdwCmd = &(cmd.DW13.Value);
930 resourceParams.dwLocationInCmd = 13;
931 resourceParams.bIsWritable = true;
932
933 MHW_MI_CHK_STATUS(AddResourceToCmd(
934 m_osInterface,
935 cmdBuffer,
936 &resourceParams));
937 }
938
939 if (m_deblockingFilterRowstoreCache.bEnabled)
940 {
941 cmd.DW18.DeblockingFilterRowStoreScratchBufferCacheSelect = BUFFER_TO_INTERNALMEDIASTORAGE;
942 cmd.DW16.DeblockingFilterRowStoreScratchBaseAddress =
943 m_deblockingFilterRowstoreCache.dwAddress;
944 }
945 else if (params->presMfdDeblockingFilterRowStoreScratchBuffer != nullptr)
946 {
947 cmd.DW18.MemoryObjectControlState =
948 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DEBLOCKINGFILTER_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
949 cmd.DW18.DeblockingFilterRowStoreScratchMemoryCompressionEnable = MHW_MEDIA_MEMCOMP_DISABLED;
950
951 resourceParams.presResource = params->presMfdDeblockingFilterRowStoreScratchBuffer;
952 resourceParams.dwOffset = 0;
953 resourceParams.pdwCmd = &(cmd.DW16.Value);
954 resourceParams.dwLocationInCmd = 16;
955 resourceParams.bIsWritable = true;
956
957 MHW_MI_CHK_STATUS(AddResourceToCmd(
958 m_osInterface,
959 cmdBuffer,
960 &resourceParams));
961 }
962
963 PMOS_RESOURCE *references = params->presReferences;
964 uint32_t numRefIdx = CODEC_MAX_NUM_REF_FRAME;
965 uint32_t step = 1;
966
967 // When one on one ref idx mapping is enabled, add active vdenc references into cmd
968 // instead of full ref list in picture paramters
969 if (params->oneOnOneMapping)
970 {
971 references = params->presVdencReferences;
972 step = 2;
973 }
974
975 bool firstRefPic = true;
976 for (uint32_t i = 0; i < numRefIdx; i++)
977 {
978 if (references[i] != nullptr)
979 {
980 MOS_SURFACE details;
981 MOS_ZeroMemory(&details, sizeof(details));
982 details.Format = Format_Invalid;
983 MHW_MI_CHK_STATUS(m_osInterface->pfnGetResourceInfo(m_osInterface, references[i], &details));
984
985 MOS_MEMCOMP_STATE mmcMode = (params->PostDeblockSurfMmcState != MOS_MEMCOMP_DISABLED) ?
986 params->PostDeblockSurfMmcState : params->PreDeblockSurfMmcState;
987 if (mmcMode == MOS_MEMCOMP_RC || mmcMode == MOS_MEMCOMP_MC)
988 {
989 cmd.DW61.Value |= (MHW_MEDIA_MEMCOMP_ENABLED << (i * 2 * step)) | ((mmcMode == MOS_MEMCOMP_RC) << (i * 2 * step + 1));
990 }
991
992 if (firstRefPic)
993 {
994 cmd.DW51.ReferencePictureTiledResourceMode = Mhw_ConvertToTRMode(details.TileType);
995 firstRefPic = false;
996 }
997
998 resourceParams.presResource = references[i];
999 resourceParams.dwOffset = details.RenderOffset.YUV.Y.BaseOffset;
1000 resourceParams.pdwCmd = &(cmd.Refpicbaseaddr[i * step].DW0_1.Value[0]);
1001 resourceParams.dwLocationInCmd = (i * 2 * step) + 19; // * 2 to account for QW rather than DW
1002 resourceParams.bIsWritable = false;
1003
1004 resourceParams.dwSharedMocsOffset = 51 - resourceParams.dwLocationInCmd;
1005
1006 MOS_GPU_CONTEXT gpuContext = m_osInterface->pfnGetGpuContext(m_osInterface);
1007 m_osInterface->pfnSyncOnResource(
1008 m_osInterface,
1009 references[i],
1010 gpuContext,
1011 false);
1012
1013 MHW_MI_CHK_STATUS(AddResourceToCmd(
1014 m_osInterface,
1015 cmdBuffer,
1016 &resourceParams));
1017 }
1018 }
1019
1020 // There is only one control DW51 for all references
1021 cmd.DW51.MemoryObjectControlState =
1022 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_REFERENCE_PICTURE_CODEC].Value;
1023
1024 // Reset dwSharedMocsOffset
1025 resourceParams.dwSharedMocsOffset = 0;
1026
1027 if (params->presMacroblockIldbStreamOutBuffer1 != nullptr)
1028 {
1029 cmd.DW57.MacroblockIldbStreamoutBufferMemoryCompressionEnable = MHW_MEDIA_MEMCOMP_DISABLED;
1030 cmd.DW57.MemoryObjectControlState =
1031 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MACROBLOCK_ILDB_STREAM_OUT_BUFFER_CODEC].Value;
1032
1033 resourceParams.presResource = params->presMacroblockIldbStreamOutBuffer1;
1034 resourceParams.dwOffset = 0;
1035 resourceParams.pdwCmd = &(cmd.DW55.Value);
1036 resourceParams.dwLocationInCmd = 55;
1037 resourceParams.bIsWritable = true;
1038
1039 MHW_MI_CHK_STATUS(AddResourceToCmd(
1040 m_osInterface,
1041 cmdBuffer,
1042 &resourceParams));
1043 }
1044
1045 if (params->presMacroblockIldbStreamOutBuffer2 != nullptr)
1046 {
1047 cmd.DW60.SecondMacroblockIldbStreamoutBufferMemoryCompressionEnable = MHW_MEDIA_MEMCOMP_DISABLED;
1048 cmd.DW60.MemoryObjectControlState =
1049 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MACROBLOCK_ILDB_STREAM_OUT_BUFFER_CODEC].Value;
1050
1051 resourceParams.presResource = params->presMacroblockIldbStreamOutBuffer2;
1052 resourceParams.dwOffset = 0;
1053 resourceParams.pdwCmd = &(cmd.DW58.Value);
1054 resourceParams.dwLocationInCmd = 58;
1055 resourceParams.bIsWritable = true;
1056
1057 MHW_MI_CHK_STATUS(AddResourceToCmd(
1058 m_osInterface,
1059 cmdBuffer,
1060 &resourceParams));
1061 }
1062
1063 // Add 4xDS surface for VDENC
1064 if (params->bVdencEnabled && params->ps4xDsSurface != nullptr)
1065 {
1066 resourceParams.presResource = ¶ms->ps4xDsSurface->OsResource;
1067 resourceParams.dwOffset = params->ps4xDsSurface->dwOffset;
1068 resourceParams.pdwCmd = &(cmd.DW62.Value);
1069 resourceParams.dwLocationInCmd = 62;
1070 resourceParams.bIsWritable = true;
1071
1072 cmd.DW64.ScaledReferenceSurfaceMemoryCompressionEnable =
1073 (params->Ps4xDsSurfMmcState == MOS_MEMCOMP_RC || params->Ps4xDsSurfMmcState == MOS_MEMCOMP_MC) ? 1 : 0;
1074 cmd.DW64.ScaledReferenceSurfaceMemoryCompressionType =
1075 (params->Ps4xDsSurfMmcState == MOS_MEMCOMP_RC) ? 1 : 0;
1076
1077 cmd.DW64.ScaledReferenceSurfaceTiledResourceMode = Mhw_ConvertToTRMode(params->ps4xDsSurface->TileType);
1078
1079 cmd.DW64.ScaledReferenceSurfaceIndexToMemoryObjectControlStateMocsTables = GetScaledReferenceSurfaceCachePolicy();
1080
1081 MHW_MI_CHK_STATUS(AddResourceToCmd(
1082 m_osInterface,
1083 cmdBuffer,
1084 &resourceParams));
1085 }
1086
1087 if (params->presSliceSizeStreamOutBuffer != nullptr)
1088 {
1089 cmd.DW67.SlicesizeStreamoutDataDestinationIndexToMemoryObjectControlStateMocsTables =
1090 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_STREAMOUT_DATA_CODEC].Value;
1091 cmd.DW67.SlicesizeStreamoutDataDestinationMemoryCompressionEnable = MHW_MEDIA_MEMCOMP_DISABLED;
1092
1093 resourceParams.presResource = params->presSliceSizeStreamOutBuffer;
1094 resourceParams.dwOffset = 0;
1095 resourceParams.pdwCmd = &(cmd.DW65.Value);
1096 resourceParams.dwLocationInCmd = 65;
1097 resourceParams.bIsWritable = true;
1098
1099 MHW_MI_CHK_STATUS(AddResourceToCmd(
1100 m_osInterface,
1101 cmdBuffer,
1102 &resourceParams));
1103 }
1104
1105 #if MOS_EVENT_TRACE_DUMP_SUPPORTED
1106 if (m_decodeInUse)
1107 {
1108 uint32_t mmcEnable = params->psPreDeblockSurface ? cmd.DW3.PreDeblockingMemoryCompressionEnable : cmd.DW6.PostDeblockingMemoryCompressionEnable;
1109 if (mmcEnable && !bMMCReported)
1110 {
1111 MOS_TraceEvent(EVENT_DECODE_FEATURE_MMC, EVENT_TYPE_INFO, NULL, 0, NULL, 0);
1112 bMMCReported = true;
1113 }
1114 }
1115 #endif
1116
1117 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1118
1119 return eStatus;
1120 }
1121
AddMfxIndObjBaseAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS params)1122 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxIndObjBaseAddrCmd(
1123 PMOS_COMMAND_BUFFER cmdBuffer,
1124 PMHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS params)
1125 {
1126 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1127
1128 MHW_FUNCTION_ENTER;
1129
1130 MHW_MI_CHK_NULL(cmdBuffer);
1131 MHW_MI_CHK_NULL(params);
1132
1133 MHW_RESOURCE_PARAMS resourceParams;
1134 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
1135 resourceParams.dwLsbNum = MHW_VDBOX_MFX_UPPER_BOUND_STATE_SHIFT;
1136 resourceParams.HwCommandType = MOS_MFX_INDIRECT_OBJ_BASE_ADDR;
1137
1138 mhw_vdbox_mfx_g12_X::MFX_IND_OBJ_BASE_ADDR_STATE_CMD cmd;
1139
1140 // mode specific settings
1141 if (CodecHalIsDecodeModeVLD(params->Mode) || (params->Mode == CODECHAL_ENCODE_MODE_VP8))
1142 {
1143 MHW_MI_CHK_NULL(params->presDataBuffer);
1144
1145 cmd.DW3.MemoryObjectControlState =
1146 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFX_INDIRECT_BITSTREAM_OBJECT_DECODE].Value;
1147
1148 resourceParams.presResource = params->presDataBuffer;
1149 resourceParams.dwOffset = params->dwDataOffset;
1150 resourceParams.pdwCmd = &(cmd.DW1.Value);
1151 resourceParams.dwLocationInCmd = 1;
1152 resourceParams.dwSize = params->dwDataSize;
1153 resourceParams.bIsWritable = false;
1154
1155 // upper bound of the allocated resource will be set at 3 DW apart from address location
1156 resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
1157
1158 MHW_MI_CHK_STATUS(AddResourceToCmd(
1159 m_osInterface,
1160 cmdBuffer,
1161 &resourceParams));
1162 }
1163 else if (CodecHalIsDecodeModeIT(params->Mode))
1164 {
1165 MHW_MI_CHK_NULL(params->presDataBuffer);
1166
1167 cmd.DW13.MemoryObjectControlState =
1168 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFD_INDIRECT_IT_COEF_OBJECT_DECODE].Value;
1169
1170 resourceParams.presResource = params->presDataBuffer;
1171 resourceParams.dwOffset = params->dwDataOffset;
1172 resourceParams.pdwCmd = &(cmd.DW11.Value);
1173 resourceParams.dwLocationInCmd = 11;
1174 resourceParams.dwSize = params->dwDataSize;
1175 resourceParams.bIsWritable = false;
1176
1177 // upper bound of the allocated resource will be set at 3 DW apart from address location
1178 resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
1179
1180 MHW_MI_CHK_STATUS(AddResourceToCmd(
1181 m_osInterface,
1182 cmdBuffer,
1183 &resourceParams));
1184 }
1185
1186 if (params->presMvObjectBuffer)
1187 {
1188 cmd.DW8.MemoryObjectControlState =
1189 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFX_INDIRECT_MV_OBJECT_CODEC].Value;
1190
1191 resourceParams.presResource = params->presMvObjectBuffer;
1192 resourceParams.dwOffset = params->dwMvObjectOffset;
1193 resourceParams.pdwCmd = &(cmd.DW6.Value);
1194 resourceParams.dwLocationInCmd = 6;
1195 resourceParams.dwSize = MOS_ALIGN_CEIL(params->dwMvObjectSize, 0x1000);
1196 resourceParams.bIsWritable = false;
1197
1198 // upper bound of the allocated resource will be set at 3 DW apart from address location
1199 resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
1200
1201 MHW_MI_CHK_STATUS(AddResourceToCmd(
1202 m_osInterface,
1203 cmdBuffer,
1204 &resourceParams));
1205 }
1206
1207 if (params->presPakBaseObjectBuffer)
1208 {
1209 cmd.DW23.MemoryObjectControlState =
1210 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC].Value;
1211
1212 resourceParams.presResource = params->presPakBaseObjectBuffer;
1213 resourceParams.dwOffset = 0;
1214 resourceParams.pdwCmd = &(cmd.DW21.Value);
1215 resourceParams.dwLocationInCmd = 21;
1216 resourceParams.dwSize = MOS_ALIGN_CEIL(params->dwPakBaseObjectSize, 0x1000);
1217 resourceParams.bIsWritable = true;
1218
1219 // upper bound of the allocated resource will be set at 3 DW apart from address location
1220 resourceParams.dwUpperBoundLocationOffsetFromCmd = 3;
1221
1222 MHW_MI_CHK_STATUS(AddResourceToCmd(
1223 m_osInterface,
1224 cmdBuffer,
1225 &resourceParams));
1226 }
1227
1228 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1229
1230 return eStatus;
1231 }
1232
AddMfxBspBufBaseAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_BSP_BUF_BASE_ADDR_PARAMS params)1233 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxBspBufBaseAddrCmd(
1234 PMOS_COMMAND_BUFFER cmdBuffer,
1235 PMHW_VDBOX_BSP_BUF_BASE_ADDR_PARAMS params)
1236 {
1237 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1238
1239 MHW_FUNCTION_ENTER;
1240
1241 MHW_MI_CHK_NULL(cmdBuffer);
1242 MHW_MI_CHK_NULL(params);
1243
1244 MHW_RESOURCE_PARAMS resourceParams;
1245 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
1246 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
1247 resourceParams.HwCommandType = MOS_MFX_BSP_BUF_BASE_ADDR;
1248
1249 mhw_vdbox_mfx_g12_X::MFX_BSP_BUF_BASE_ADDR_STATE_CMD cmd;
1250
1251 if (m_bsdMpcRowstoreCache.bEnabled) // mbaff and non mbaff mode for all resolutions
1252 {
1253 cmd.DW3.BsdMpcRowStoreScratchBufferCacheSelect = BUFFER_TO_INTERNALMEDIASTORAGE;
1254 cmd.DW1.BsdMpcRowStoreScratchBufferBaseAddressReadWrite = m_bsdMpcRowstoreCache.dwAddress;
1255 }
1256 else if (params->presBsdMpcRowStoreScratchBuffer)
1257 {
1258 cmd.DW3.MemoryObjectControlState =
1259 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_BSDMPC_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
1260 cmd.DW1.BsdMpcRowStoreScratchBufferBaseAddressReadWrite = 0;
1261
1262 resourceParams.presResource = params->presBsdMpcRowStoreScratchBuffer;
1263 resourceParams.dwOffset = 0;
1264 resourceParams.pdwCmd = &(cmd.DW1.Value);
1265 resourceParams.dwLocationInCmd = 1;
1266 resourceParams.bIsWritable = true;
1267
1268 MHW_MI_CHK_STATUS(AddResourceToCmd(
1269 m_osInterface,
1270 cmdBuffer,
1271 &resourceParams));
1272 }
1273
1274 if (m_mprRowstoreCache.bEnabled)
1275 {
1276 cmd.DW6.MprRowStoreScratchBufferCacheSelect = BUFFER_TO_INTERNALMEDIASTORAGE;
1277 cmd.DW4.MprRowStoreScratchBufferBaseAddressReadWriteDecoderOnly = m_mprRowstoreCache.dwAddress;
1278 }
1279 else if (params->presMprRowStoreScratchBuffer)
1280 {
1281 cmd.DW6.MemoryObjectControlState =
1282 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MPR_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
1283 cmd.DW4.MprRowStoreScratchBufferBaseAddressReadWriteDecoderOnly = 0;
1284
1285 resourceParams.presResource = params->presMprRowStoreScratchBuffer;
1286 resourceParams.dwOffset = 0;
1287 resourceParams.pdwCmd = &(cmd.DW4.Value);
1288 resourceParams.dwLocationInCmd = 4;
1289 resourceParams.bIsWritable = true;
1290
1291 MHW_MI_CHK_STATUS(AddResourceToCmd(
1292 m_osInterface,
1293 cmdBuffer,
1294 &resourceParams));
1295 }
1296
1297 if (params->presBitplaneBuffer)
1298 {
1299 cmd.DW9.MemoryObjectControlState =
1300 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_BITPLANE_READ_CODEC].Value;
1301
1302 resourceParams.presResource = params->presBitplaneBuffer;
1303 resourceParams.dwOffset = 0;
1304 resourceParams.pdwCmd = &(cmd.DW7.Value);
1305 resourceParams.dwLocationInCmd = 7;
1306 resourceParams.bIsWritable = false;
1307
1308 MHW_MI_CHK_STATUS(AddResourceToCmd(
1309 m_osInterface,
1310 cmdBuffer,
1311 &resourceParams));
1312 }
1313
1314 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1315
1316 return eStatus;
1317 }
1318
AddMfxDecodeAvcImgCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_AVC_IMG_PARAMS params)1319 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxDecodeAvcImgCmd(
1320 PMOS_COMMAND_BUFFER cmdBuffer,
1321 PMHW_BATCH_BUFFER batchBuffer,
1322 PMHW_VDBOX_AVC_IMG_PARAMS params)
1323 {
1324 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1325
1326 MHW_FUNCTION_ENTER;
1327
1328 MOS_UNUSED(batchBuffer);
1329
1330 MHW_MI_CHK_NULL(cmdBuffer);
1331 MHW_MI_CHK_NULL(params);
1332 MHW_MI_CHK_NULL(params->pAvcPicParams);
1333
1334 auto avcPicParams = params->pAvcPicParams;
1335
1336 mhw_vdbox_mfx_g12_X::MFX_AVC_IMG_STATE_CMD cmd;
1337
1338 uint32_t numMBs =
1339 (avcPicParams->pic_height_in_mbs_minus1 + 1) *
1340 (avcPicParams->pic_width_in_mbs_minus1 + 1);
1341
1342 cmd.DW1.FrameSize = numMBs;
1343 cmd.DW2.FrameHeight = avcPicParams->pic_height_in_mbs_minus1;
1344 cmd.DW2.FrameWidth = avcPicParams->pic_width_in_mbs_minus1;
1345 cmd.DW3.SecondChromaQpOffset = avcPicParams->second_chroma_qp_index_offset;
1346 cmd.DW3.FirstChromaQpOffset = avcPicParams->chroma_qp_index_offset;
1347 cmd.DW3.WeightedPredFlag = avcPicParams->pic_fields.weighted_pred_flag;
1348 cmd.DW3.WeightedBipredIdc = avcPicParams->pic_fields.weighted_bipred_idc;
1349 cmd.DW3.ImgstructImageStructureImgStructure10 =
1350 ((avcPicParams->CurrPic.PicFlags == PICTURE_FRAME) ?
1351 avcFrame : (CodecHal_PictureIsTopField(avcPicParams->CurrPic) ?
1352 avcTopField : avcBottomField));
1353 cmd.DW4.Chromaformatidc = avcPicParams->seq_fields.chroma_format_idc;
1354 cmd.DW4.Entropycodingflag = avcPicParams->pic_fields.entropy_coding_mode_flag;
1355 cmd.DW4.Imgdisposableflag = !avcPicParams->pic_fields.reference_pic_flag;
1356 cmd.DW4.Constrainedipredflag = avcPicParams->pic_fields.constrained_intra_pred_flag;
1357 cmd.DW4.Direct8X8Infflag = avcPicParams->seq_fields.direct_8x8_inference_flag;
1358 cmd.DW4.Transform8X8Flag = avcPicParams->pic_fields.transform_8x8_mode_flag;
1359 cmd.DW4.Framembonlyflag = avcPicParams->seq_fields.frame_mbs_only_flag;
1360 cmd.DW4.Mbaffflameflag =
1361 avcPicParams->seq_fields.mb_adaptive_frame_field_flag && !avcPicParams->pic_fields.field_pic_flag;
1362 cmd.DW4.Fieldpicflag = avcPicParams->pic_fields.field_pic_flag;
1363
1364 cmd.DW5.TrellisQuantizationChromaDisableTqchromadisable = true;
1365 cmd.DW5.TrellisQuantizationRoundingTqr = 0;
1366
1367 cmd.DW13.CurrentPictureHasPerformedMmco5 = 0;
1368 cmd.DW13.NumberOfReferenceFrames = params->ucActiveFrameCnt;
1369 // These fields should be NumRefIdx(L0 or L1) Active - 1 at picture level
1370 // But hardware expects the data without the minus 1 to keep this field consistent with
1371 // NumRefIdxL0 and NumRefIdxL1 which appears at slice level. Thus the addition of 1
1372 cmd.DW13.NumberOfActiveReferencePicturesFromL0 = avcPicParams->num_ref_idx_l0_active_minus1 + 1;
1373 cmd.DW13.NumberOfActiveReferencePicturesFromL1 = avcPicParams->num_ref_idx_l1_active_minus1 + 1;
1374
1375 cmd.DW13.InitialQpValue = avcPicParams->pic_init_qp_minus26;
1376
1377 cmd.DW14.Log2MaxFrameNumMinus4 = avcPicParams->seq_fields.log2_max_frame_num_minus4;
1378 cmd.DW14.Log2MaxPicOrderCntLsbMinus4 = avcPicParams->seq_fields.log2_max_pic_order_cnt_lsb_minus4;
1379 cmd.DW14.DeblockingFilterControlPresentFlag = avcPicParams->pic_fields.deblocking_filter_control_present_flag;
1380 cmd.DW14.NumSliceGroupsMinus1 = avcPicParams->num_slice_groups_minus1;
1381 cmd.DW14.RedundantPicCntPresentFlag = avcPicParams->pic_fields.redundant_pic_cnt_present_flag;
1382 cmd.DW14.PicOrderPresentFlag = avcPicParams->pic_fields.pic_order_present_flag;
1383 cmd.DW14.SliceGroupMapType = avcPicParams->slice_group_map_type;
1384 cmd.DW14.PicOrderCntType = avcPicParams->seq_fields.pic_order_cnt_type;
1385 cmd.DW14.DeltaPicOrderAlwaysZeroFlag = avcPicParams->seq_fields.delta_pic_order_always_zero_flag;
1386 cmd.DW15.CurrPicFrameNum = avcPicParams->frame_num;
1387 cmd.DW15.SliceGroupChangeRate = avcPicParams->slice_group_change_rate_minus1;
1388
1389 auto mvcExtPicParams = params->pMvcExtPicParams;
1390 if (mvcExtPicParams)
1391 {
1392 cmd.DW16.CurrentFrameViewId = mvcExtPicParams->CurrViewID;
1393 cmd.DW16.MaxViewIdxl0 = mvcExtPicParams->NumInterViewRefsL0;
1394 cmd.DW16.MaxViewIdxl1 = mvcExtPicParams->NumInterViewRefsL1;
1395 cmd.DW16.InterViewOrderDisable = 0;
1396 }
1397
1398 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1399
1400 return eStatus;
1401 }
1402
AddMfxEncodeAvcImgCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_AVC_IMG_PARAMS params)1403 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxEncodeAvcImgCmd(
1404 PMOS_COMMAND_BUFFER cmdBuffer,
1405 PMHW_BATCH_BUFFER batchBuffer,
1406 PMHW_VDBOX_AVC_IMG_PARAMS params)
1407 {
1408 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1409
1410 MHW_FUNCTION_ENTER;
1411
1412 MHW_MI_CHK_NULL(params);
1413 MHW_MI_CHK_NULL(params->pEncodeAvcSeqParams);
1414 MHW_MI_CHK_NULL(params->pEncodeAvcPicParams);
1415
1416 if (cmdBuffer == nullptr && batchBuffer == nullptr)
1417 {
1418 MHW_ASSERTMESSAGE("No valid buffer to add the command to!");
1419 return MOS_STATUS_INVALID_PARAMETER;
1420 }
1421
1422 auto avcSeqParams = params->pEncodeAvcSeqParams;
1423 auto avcPicParams = params->pEncodeAvcPicParams;
1424
1425 mhw_vdbox_mfx_g12_X::MFX_AVC_IMG_STATE_CMD cmd;
1426
1427 uint32_t numMBs = params->wPicWidthInMb * params->wPicHeightInMb;
1428 cmd.DW1.FrameSize = (numMBs > 0xFFFF) ? 0xFFFF : numMBs;
1429
1430 cmd.DW2.FrameHeight = params->wPicHeightInMb - 1;
1431 cmd.DW2.FrameWidth = params->wPicWidthInMb - 1;
1432
1433 cmd.DW3.ImgstructImageStructureImgStructure10 =
1434 (CodecHal_PictureIsFrame(avcPicParams->CurrOriginalPic) ?
1435 avcFrame : (CodecHal_PictureIsTopField(avcPicParams->CurrOriginalPic) ?
1436 avcTopField : avcBottomField));
1437
1438 cmd.DW3.WeightedBipredIdc = avcPicParams->weighted_bipred_idc;
1439 cmd.DW3.WeightedPredFlag = avcPicParams->weighted_pred_flag;
1440
1441 cmd.DW3.FirstChromaQpOffset = avcPicParams->chroma_qp_index_offset;
1442 cmd.DW3.SecondChromaQpOffset = avcPicParams->second_chroma_qp_index_offset;
1443
1444 // Enable RhoDomain RC in PAK statistics
1445 cmd.DW3.RhodomainRateControlEnable = params->bVdencEnabled;
1446
1447 cmd.DW4.Fieldpicflag =
1448 CodecHal_PictureIsField(avcPicParams->CurrOriginalPic);
1449 cmd.DW4.Mbaffflameflag = avcSeqParams->mb_adaptive_frame_field_flag;
1450 cmd.DW4.Framembonlyflag = avcSeqParams->frame_mbs_only_flag;
1451 cmd.DW4.Transform8X8Flag = avcPicParams->transform_8x8_mode_flag;
1452 cmd.DW4.Direct8X8Infflag = avcSeqParams->direct_8x8_inference_flag;
1453 cmd.DW4.Constrainedipredflag = avcPicParams->constrained_intra_pred_flag;
1454 cmd.DW4.Entropycodingflag = avcPicParams->entropy_coding_mode_flag;
1455 cmd.DW4.Chromaformatidc = avcSeqParams->chroma_format_idc;
1456 cmd.DW4.Mbmvformatflag = 1;
1457 cmd.DW4.Mvunpackedflag = 1;
1458
1459 cmd.DW4.Loadslicepointerflag = 0;
1460 cmd.DW4.Mbstatenabled = 0; // Disable for the first pass
1461 if ((params->dwMaxFrameSize > 0) && params->currPass && params->pDeltaQp)
1462 {
1463 cmd.DW4.Mbstatenabled = 1;
1464 }
1465 cmd.DW4.Minframewsize = 0;
1466
1467 cmd.DW5.IntrambmaxbitflagIntrambmaxsizereportmask = 1;
1468 cmd.DW5.IntermbmaxbitflagIntermbmaxsizereportmask = 1;
1469 cmd.DW5.FrameszoverflagFramebitratemaxreportmask = 1;
1470 cmd.DW5.FrameszunderflagFramebitrateminreportmask = 1;
1471 cmd.DW5.IntraIntermbipcmflagForceipcmcontrolmask = 1;
1472 cmd.DW5.MbratectrlflagMbLevelRateControlEnablingFlag = 0;
1473 cmd.DW5.Nonfirstpassflag = 0;
1474 cmd.DW5.TrellisQuantizationChromaDisableTqchromadisable = true;
1475
1476 if (params->dwMaxFrameSize && params->currPass)
1477 {
1478 cmd.DW5.Nonfirstpassflag = 1;
1479 }
1480
1481 if (params->dwTqEnabled &&
1482 cmd.DW4.Entropycodingflag)
1483 {
1484 cmd.DW5.TrellisQuantizationEnabledTqenb = params->dwTqEnabled;
1485 cmd.DW5.TrellisQuantizationRoundingTqr = params->dwTqRounding;
1486 }
1487 else
1488 {
1489 cmd.DW5.TrellisQuantizationEnabledTqenb = cmd.DW5.TrellisQuantizationRoundingTqr = 0;
1490 }
1491
1492 //DW6
1493 cmd.DW6.Intrambmaxsz = m_avcIntraMbMaxSize;
1494 cmd.DW6.Intermbmaxsz = m_avcInterMbMaxSize;
1495 //DW8
1496 cmd.DW8.Slicedeltaqppmax0 =
1497 cmd.DW8.Slicedeltaqpmax1 =
1498 cmd.DW8.Slicedeltaqpmax2 =
1499 cmd.DW8.Slicedeltaqpmax3 = 0;
1500 //DW9
1501 cmd.DW9.Slicedeltaqpmin0 =
1502 cmd.DW9.Slicedeltaqpmin1 =
1503 cmd.DW9.Slicedeltaqpmin2 =
1504 cmd.DW9.Slicedeltaqpmin3 = 0;
1505
1506 //DW10
1507 MHW_VDBOX_AVC_IMG_BITRATE_PARAMS bitrateParams;
1508 CalcAvcImgStateMinMaxBitrate(bitrateParams);
1509 cmd.DW10.Framebitratemin = bitrateParams.frameBitRateMin;
1510 cmd.DW10.Framebitrateminunit = bitrateParams.frameBitRateMinUnit;
1511 cmd.DW10.Framebitrateminunitmode = bitrateParams.frameBitRateMinUnitMode;
1512 cmd.DW10.Framebitratemax = bitrateParams.frameBitRateMax;
1513 cmd.DW10.Framebitratemaxunit = bitrateParams.frameBitRateMaxUnit;
1514 cmd.DW10.Framebitratemaxunitmode = bitrateParams.frameBitRateMaxUnitMode;
1515
1516 //DW11
1517 cmd.DW11.Framebitratemindelta = bitrateParams.frameBitRateMinDelta;
1518 cmd.DW11.Framebitratemaxdelta = bitrateParams.frameBitRateMaxDelta;
1519 cmd.DW11.SliceStatsStreamoutEnable = params->bSliceSizeStreamOutEnabled;
1520
1521 //add for multiple pass
1522 if (params->dwMaxFrameSize > 0 && params->pDeltaQp && (!params->bIPCMPass))
1523 {
1524 cmd.DW8.Slicedeltaqppmax0 =
1525 cmd.DW8.Slicedeltaqpmax1 =
1526 cmd.DW8.Slicedeltaqpmax2 =
1527 cmd.DW8.Slicedeltaqpmax3 = params->pDeltaQp[params->currPass];
1528 cmd.DW10.Framebitratemaxunit = 0;
1529 cmd.DW10.Framebitratemaxunitmode = 0;
1530 //when FrameBitrateMaxUnit & FrameBitrateMaxUnitMode both are 0, the frame size unit is 128bytes.
1531 cmd.DW10.Framebitratemax = params->dwMaxFrameSize >> 7;
1532 cmd.DW11.Framebitratemaxdelta = params->dwMaxFrameSize >> 8;
1533
1534 // In compatibility mode (DW10.FrameBitrateMaxUnitMode = 0), only 12 bits is used.
1535 // If the calulated value of max frame size exceeded 12 bits, need change unit from 128 bytes to 16K bytes.
1536 if (params->dwMaxFrameSize >= (0x1 << 12) * 128)
1537 {
1538 // use 16K bytes unit mode in compatibility mode.
1539 cmd.DW10.Framebitratemaxunit = 1;
1540 cmd.DW10.Framebitratemaxunitmode = 0;
1541 cmd.DW10.Framebitratemax = params->dwMaxFrameSize >> 14;
1542 cmd.DW11.Framebitratemaxdelta = params->dwMaxFrameSize >> 15;
1543 }
1544 }
1545
1546 if (params->bIPCMPass)
1547 {
1548 // InterMbConfFlag, IntraMbConfFlag: not being used in HW
1549 cmd.DW4.Mbstatenabled = true;
1550 cmd.DW5.IntraIntermbipcmflagForceipcmcontrolmask = true;
1551 }
1552
1553 cmd.DW17.ExtendedRhodomainStatisticsEnable = m_rhoDomainStatsEnabled;
1554
1555 if (avcSeqParams->EnableSliceLevelRateCtrl)
1556 {
1557 cmd.DW19.ThresholdSizeInBytes = avcPicParams->SliceSizeInBytes - MOS_MIN(avcPicParams->SliceSizeInBytes, params->dwVdencSliceMinusBytes);
1558 cmd.DW20.TargetSliceSizeInBytes = avcPicParams->SliceSizeInBytes;
1559 }
1560
1561 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
1562
1563 return eStatus;
1564 }
1565
AddMfxAvcDirectmodeCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_AVC_DIRECTMODE_PARAMS params)1566 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxAvcDirectmodeCmd(
1567 PMOS_COMMAND_BUFFER cmdBuffer,
1568 PMHW_VDBOX_AVC_DIRECTMODE_PARAMS params)
1569 {
1570 MHW_FUNCTION_ENTER;
1571
1572 MHW_MI_CHK_NULL(cmdBuffer);
1573 MHW_MI_CHK_NULL(params);
1574
1575 MHW_RESOURCE_PARAMS resourceParams;
1576 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
1577 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
1578 resourceParams.HwCommandType = MOS_MFX_AVC_DIRECT_MODE;
1579
1580 mhw_vdbox_mfx_g12_X::MFX_AVC_DIRECTMODE_STATE_CMD cmd;
1581
1582 if (!params->bDisableDmvBuffers)
1583 {
1584 MHW_MI_CHK_NULL(params->presAvcDmvBuffers);
1585
1586 cmd.DW36.MemoryObjectControlState =
1587 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DIRECTMV_BUFFER_CODEC].Value;
1588
1589 // current picture
1590 resourceParams.presResource = ¶ms->presAvcDmvBuffers[params->ucAvcDmvIdx];
1591 resourceParams.dwOffset = 0;
1592 resourceParams.pdwCmd = &(cmd.DirectMvBufferBaseAddressForWrite[0].DW0_1.Value[0]);
1593 resourceParams.dwLocationInCmd = 34;
1594 resourceParams.bIsWritable = true;
1595
1596 MHW_MI_CHK_STATUS(AddResourceToCmd(
1597 m_osInterface,
1598 cmdBuffer,
1599 &resourceParams));
1600 }
1601
1602 CODEC_REF_LIST** refList;
1603 MHW_MI_CHK_NULL(refList = (CODEC_REF_LIST**)params->avcRefList);
1604
1605 if (CodecHal_PictureIsBottomField(params->CurrPic))
1606 {
1607 cmd.PocList[MHW_VDBOX_AVC_DMV_DEST_TOP] = 0;
1608 cmd.PocList[MHW_VDBOX_AVC_DMV_DEST_BOTTOM] =
1609 refList[params->CurrPic.FrameIdx]->iFieldOrderCnt[1];
1610 }
1611 else
1612 {
1613 cmd.PocList[MHW_VDBOX_AVC_DMV_DEST_TOP] = cmd.PocList[MHW_VDBOX_AVC_DMV_DEST_BOTTOM] =
1614 refList[params->CurrPic.FrameIdx]->iFieldOrderCnt[0];
1615 if (CodecHal_PictureIsFrame(params->CurrPic))
1616 {
1617 cmd.PocList[MHW_VDBOX_AVC_DMV_DEST_BOTTOM] =
1618 refList[params->CurrPic.FrameIdx]->iFieldOrderCnt[1];
1619 }
1620 }
1621
1622 if (!params->bDisableDmvBuffers)
1623 {
1624 // there is only one control DW33 for all references
1625 cmd.DW33.MemoryObjectControlState =
1626 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_DIRECTMV_BUFFER_CODEC].Value;
1627 }
1628
1629 bool dmvPresent[CODEC_MAX_NUM_REF_FRAME] = { false };
1630 for (auto i = 0; i < CODEC_MAX_NUM_REF_FRAME; i++)
1631 {
1632 if (params->pAvcPicIdx[i].bValid)
1633 {
1634 uint8_t idx = params->pAvcPicIdx[i].ucPicIdx;
1635 uint8_t picID = params->bPicIdRemappingInUse ? i : refList[idx]->ucFrameId;
1636 uint8_t mvIdx = refList[idx]->ucDMVIdx[0];
1637
1638 uint8_t validRef = ((params->uiUsedForReferenceFlags >> (i * 2)) >> 0) & 1;
1639 uint8_t frameID = picID << 1;
1640 if (frameID < CODEC_AVC_NUM_REF_DMV_BUFFERS * 2)
1641 {
1642 if (!params->bDisableDmvBuffers)
1643 {
1644 dmvPresent[picID] = true;
1645
1646 resourceParams.presResource = ¶ms->presAvcDmvBuffers[mvIdx];
1647 resourceParams.dwOffset = 0;
1648 resourceParams.pdwCmd = &(cmd.DirectMvBufferBaseAddress[picID].DW0_1.Value[0]);
1649 resourceParams.dwLocationInCmd = picID * 2 + 1;
1650 resourceParams.bIsWritable = false;
1651
1652 resourceParams.dwSharedMocsOffset = 33 - resourceParams.dwLocationInCmd;
1653
1654 MHW_MI_CHK_STATUS(AddResourceToCmd(
1655 m_osInterface,
1656 cmdBuffer,
1657 &resourceParams));
1658 }
1659
1660 cmd.PocList[frameID] = refList[idx]->iFieldOrderCnt[0] * validRef;
1661 }
1662 else
1663 {
1664 return MOS_STATUS_UNKNOWN;
1665 }
1666
1667 validRef = ((params->uiUsedForReferenceFlags >> (i * 2)) >> 1) & 1;
1668 frameID = (picID << 1) + 1;
1669 if (frameID < CODEC_AVC_NUM_REF_DMV_BUFFERS * 2)
1670 {
1671 cmd.PocList[frameID] = refList[idx]->iFieldOrderCnt[1] * validRef;
1672 }
1673 else
1674 {
1675 return MOS_STATUS_UNKNOWN;
1676 }
1677 }
1678 }
1679
1680 if (!params->bDisableDmvBuffers)
1681 {
1682 // Use a valid address for remaining DMV buffers
1683 for (auto i = 0; i < CODEC_MAX_NUM_REF_FRAME; i++)
1684 {
1685 if (dmvPresent[i] == false)
1686 {
1687 //Give default buffer to the MV
1688 resourceParams.presResource = ¶ms->presAvcDmvBuffers[CODEC_AVC_NUM_REF_DMV_BUFFERS];
1689 resourceParams.dwOffset = 0;
1690 resourceParams.pdwCmd = &(cmd.DirectMvBufferBaseAddress[i].DW0_1.Value[0]);
1691 resourceParams.dwLocationInCmd = i * 2 + 1;
1692 resourceParams.bIsWritable = false;
1693
1694 resourceParams.dwSharedMocsOffset = 33 - resourceParams.dwLocationInCmd;
1695
1696 MHW_MI_CHK_STATUS(AddResourceToCmd(
1697 m_osInterface,
1698 cmdBuffer,
1699 &resourceParams));
1700 }
1701 }
1702 }
1703
1704 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1705
1706 return MOS_STATUS_SUCCESS;
1707 }
1708
AddMfdAvcSliceAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_AVC_SLICE_STATE avcSliceState)1709 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfdAvcSliceAddrCmd(
1710 PMOS_COMMAND_BUFFER cmdBuffer,
1711 PMHW_VDBOX_AVC_SLICE_STATE avcSliceState)
1712 {
1713 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1714
1715 MHW_FUNCTION_ENTER;
1716
1717 MHW_MI_CHK_NULL(cmdBuffer);
1718 MHW_MI_CHK_NULL(avcSliceState);
1719
1720 mhw_vdbox_mfx_g12_X::MFD_AVC_SLICEADDR_CMD cmd;
1721
1722 if (avcSliceState->bFullFrameData)
1723 {
1724 cmd.DW1.IndirectBsdDataLength = avcSliceState->dwNextLength;
1725 cmd.DW2.IndirectBsdDataStartAddress = avcSliceState->dwNextOffset;
1726 }
1727 else
1728 {
1729 cmd.DW1.IndirectBsdDataLength = (avcSliceState->dwNextLength + 1 - m_osInterface->dwNumNalUnitBytesIncluded);
1730 cmd.DW2.IndirectBsdDataStartAddress = (avcSliceState->dwNextOffset - 1 + m_osInterface->dwNumNalUnitBytesIncluded);
1731 }
1732
1733 MHW_CP_SLICE_INFO_PARAMS sliceInfoParam;
1734 sliceInfoParam.presDataBuffer = avcSliceState->presDataBuffer;
1735 sliceInfoParam.dwSliceIndex = avcSliceState->dwSliceIndex;
1736 sliceInfoParam.dwTotalBytesConsumed = avcSliceState->dwTotalBytesConsumed;
1737 sliceInfoParam.dwDataStartOffset[0] = cmd.DW2.IndirectBsdDataStartAddress;
1738 sliceInfoParam.dwDataStartOffset[1] = avcSliceState->pAvcSliceParams->slice_data_offset;
1739
1740 MHW_MI_CHK_STATUS(m_cpInterface->SetMfxProtectionState(
1741 m_decodeInUse,
1742 cmdBuffer,
1743 nullptr,
1744 &sliceInfoParam));
1745
1746 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1747
1748 return eStatus;
1749 }
1750
AddMfdAvcBsdObjectCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_AVC_SLICE_STATE avcSliceState)1751 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfdAvcBsdObjectCmd(
1752 PMOS_COMMAND_BUFFER cmdBuffer,
1753 PMHW_VDBOX_AVC_SLICE_STATE avcSliceState)
1754 {
1755 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1756
1757 MHW_FUNCTION_ENTER;
1758
1759 MHW_MI_CHK_NULL(cmdBuffer);
1760 MHW_MI_CHK_NULL(avcSliceState);
1761 MHW_MI_CHK_NULL(avcSliceState->pAvcSliceParams);
1762
1763 mhw_vdbox_mfx_g12_X::MFD_AVC_BSD_OBJECT_CMD cmd;
1764 auto sliceParams = avcSliceState->pAvcSliceParams;
1765
1766 cmd.DW4.LastsliceFlag = avcSliceState->bLastSlice;
1767
1768 cmd.DW3.IntraPredmode4X48X8LumaErrorControlBit = 1;
1769 cmd.DW5.IntraPredictionErrorControlBitAppliedToIntra16X16Intra8X8Intra4X4LumaAndChroma = 1;
1770 cmd.DW5.Intra8X84X4PredictionErrorConcealmentControlBit = 1;
1771 cmd.DW5.ISliceConcealmentMode = 1;
1772
1773 if (avcSliceState->bShortFormatInUse)
1774 {
1775 if (avcSliceState->bFullFrameData)
1776 {
1777 cmd.DW1.IndirectBsdDataLength = avcSliceState->dwLength;
1778 cmd.DW2.IndirectBsdDataStartAddress = sliceParams->slice_data_offset;
1779 }
1780 else
1781 {
1782 cmd.DW1.IndirectBsdDataLength = avcSliceState->dwLength + 1 - m_osInterface->dwNumNalUnitBytesIncluded;
1783 cmd.DW2.IndirectBsdDataStartAddress =
1784 sliceParams->slice_data_offset - 1 + m_osInterface->dwNumNalUnitBytesIncluded;
1785 }
1786 cmd.DW4.FirstMbByteOffsetOfSliceDataOrSliceHeader = 0;
1787 }
1788 else
1789 {
1790 // Long format
1791 cmd.DW1.IndirectBsdDataLength = avcSliceState->dwLength;
1792 cmd.DW2.IndirectBsdDataStartAddress = sliceParams->slice_data_offset + avcSliceState->dwOffset;
1793 cmd.DW4.FirstMacroblockMbBitOffset = sliceParams->slice_data_bit_offset;
1794
1795 if (!avcSliceState->bIntelEntrypointInUse)
1796 {
1797 // NAL Header Unit must be passed to HW in the compressed bitstream buffer
1798 avcSliceState->dwOffset -= (m_osInterface->dwNumNalUnitBytesIncluded - 1);
1799 cmd.DW1.IndirectBsdDataLength += avcSliceState->dwOffset;
1800 cmd.DW2.IndirectBsdDataStartAddress -= avcSliceState->dwOffset;
1801 cmd.DW4.FirstMbByteOffsetOfSliceDataOrSliceHeader = avcSliceState->dwOffset;
1802 }
1803 }
1804
1805 cmd.DW4.FixPrevMbSkipped = 1;
1806
1807 MHW_CP_SLICE_INFO_PARAMS sliceInfoParam;
1808 sliceInfoParam.presDataBuffer = avcSliceState->presDataBuffer;
1809 sliceInfoParam.dwSliceIndex = avcSliceState->dwSliceIndex;
1810 sliceInfoParam.dwTotalBytesConsumed = avcSliceState->dwTotalBytesConsumed;
1811 sliceInfoParam.dwDataStartOffset[0] = cmd.DW2.IndirectBsdDataStartAddress;
1812 sliceInfoParam.dwDataStartOffset[1] = sliceParams->slice_data_offset;
1813 sliceInfoParam.dwDataLength[1] = sliceParams->slice_data_size;
1814
1815 MHW_MI_CHK_STATUS(m_cpInterface->SetMfxProtectionState(
1816 m_decodeInUse,
1817 cmdBuffer,
1818 nullptr,
1819 &sliceInfoParam));
1820
1821 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1822
1823 return eStatus;
1824 }
1825
AddMfxPakInsertObject(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_BATCH_BUFFER batchBuffer,PMHW_VDBOX_PAK_INSERT_PARAMS params)1826 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxPakInsertObject(
1827 PMOS_COMMAND_BUFFER cmdBuffer,
1828 PMHW_BATCH_BUFFER batchBuffer,
1829 PMHW_VDBOX_PAK_INSERT_PARAMS params)
1830 {
1831 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1832
1833 MHW_FUNCTION_ENTER;
1834
1835 MHW_MI_CHK_NULL(params);
1836
1837 if (cmdBuffer == nullptr && batchBuffer == nullptr)
1838 {
1839 MHW_ASSERTMESSAGE("No valid buffer to add the command to!");
1840 return MOS_STATUS_INVALID_PARAMETER;
1841 }
1842
1843 mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD cmd;
1844 uint32_t dwordsUsed = mhw_vdbox_mfx_g12_X::MFX_PAK_INSERT_OBJECT_CMD::dwSize;
1845
1846 cmd.DW1.SliceHeaderIndicator = params->bSliceHeaderIndicator;
1847
1848 if (params->bLastPicInSeq || params->bLastPicInStream) // used by AVC, MPEG2
1849 {
1850 dwordsUsed += params->bLastPicInSeq + params->bLastPicInStream;
1851
1852 cmd.DW0.DwordLength = mhw_vdbox_mfx_g12_X::GetOpLength(dwordsUsed);
1853 cmd.DW1.BitstreamstartresetResetbitstreamstartingpos = 0;
1854 cmd.DW1.EndofsliceflagLastdstdatainsertcommandflag = 1;
1855 cmd.DW1.LastheaderflagLastsrcheaderdatainsertcommandflag = 1;
1856 cmd.DW1.EmulationflagEmulationbytebitsinsertenable = 0;
1857 cmd.DW1.SkipemulbytecntSkipEmulationByteCount = 0;
1858 // use dwBitSize to pass SrcDataEndingBitInclusion
1859 cmd.DW1.DatabitsinlastdwSrcdataendingbitinclusion50 = params->dwBitSize;
1860 cmd.DW1.DatabyteoffsetSrcdatastartingbyteoffset10 = 0;
1861 cmd.DW1.Headerlengthexcludefrmsize = cmd.DW1.EmulationflagEmulationbytebitsinsertenable ? false : params->bHeaderLengthExcludeFrmSize; // Cannot be set to true if emulation byte bit insertion is enabled
1862
1863 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
1864
1865 if (params->bLastPicInSeq) // only used by AVC, not used by MPEG2
1866 {
1867 uint32_t lastPicInSeqData = params->dwLastPicInSeqData;
1868
1869 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(
1870 cmdBuffer,
1871 batchBuffer,
1872 &lastPicInSeqData,
1873 sizeof(lastPicInSeqData)));
1874 }
1875
1876 if (params->bLastPicInStream) // used by AVC, MPEG2
1877 {
1878 uint32_t lastPicInStreamData = params->dwLastPicInStreamData;
1879
1880 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(
1881 cmdBuffer,
1882 batchBuffer,
1883 &lastPicInStreamData,
1884 sizeof(lastPicInStreamData)));
1885 }
1886 }
1887 else // used by AVC, MPEG2, JPEG
1888 {
1889 uint32_t byteSize = (params->dwBitSize + 7) >> 3;
1890 uint32_t dataBitsInLastDw = params->dwBitSize % 32;
1891
1892 if (dataBitsInLastDw == 0)
1893 {
1894 dataBitsInLastDw = 32;
1895 }
1896
1897 dwordsUsed += ((byteSize + 3) >> 2);
1898 cmd.DW0.DwordLength = mhw_vdbox_mfx_g12_X::GetOpLength(dwordsUsed);
1899 cmd.DW1.BitstreamstartresetResetbitstreamstartingpos = params->bResetBitstreamStartingPos;
1900 cmd.DW1.EndofsliceflagLastdstdatainsertcommandflag = params->bEndOfSlice;
1901 cmd.DW1.LastheaderflagLastsrcheaderdatainsertcommandflag = params->bLastHeader;
1902 cmd.DW1.EmulationflagEmulationbytebitsinsertenable = params->bEmulationByteBitsInsert;
1903 cmd.DW1.SkipemulbytecntSkipEmulationByteCount = params->uiSkipEmulationCheckCount;
1904 cmd.DW1.DatabitsinlastdwSrcdataendingbitinclusion50 = dataBitsInLastDw;
1905 cmd.DW1.DatabyteoffsetSrcdatastartingbyteoffset10 = 0;
1906 cmd.DW1.Headerlengthexcludefrmsize = cmd.DW1.EmulationflagEmulationbytebitsinsertenable ? false :
1907 params->bHeaderLengthExcludeFrmSize; // Cannot be set to true if emulation byte bit insertion is enabled
1908 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, &cmd, sizeof(cmd)));
1909
1910 // Add actual data
1911 uint8_t* data = (uint8_t*)(params->pBsBuffer->pBase + params->dwOffset);
1912 MHW_MI_CHK_STATUS(Mhw_AddCommandCmdOrBB(cmdBuffer, batchBuffer, data, byteSize));
1913 }
1914
1915 return eStatus;
1916 }
1917
AddMfxJpegPicCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_JPEG_PIC_STATE params)1918 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxJpegPicCmd(
1919 PMOS_COMMAND_BUFFER cmdBuffer,
1920 PMHW_VDBOX_JPEG_PIC_STATE params)
1921 {
1922 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1923
1924 MHW_FUNCTION_ENTER;
1925
1926 MHW_MI_CHK_NULL(cmdBuffer);
1927 MHW_MI_CHK_NULL(params);
1928 MHW_MI_CHK_NULL(params->pJpegPicParams);
1929
1930 mhw_vdbox_mfx_g12_X::MFX_JPEG_PIC_STATE_CMD cmd;
1931 auto picParams = params->pJpegPicParams;
1932
1933 if (picParams->m_chromaType == jpegRGB || picParams->m_chromaType == jpegBGR)
1934 {
1935 cmd.DW1.Obj1.InputFormatYuv = jpegYUV444;
1936 }
1937 else
1938 {
1939 cmd.DW1.Obj1.InputFormatYuv = picParams->m_chromaType;
1940 }
1941 cmd.DW1.Obj1.Rotation = picParams->m_rotation;
1942 cmd.DW1.Obj1.OutputFormatYuv = GetJpegDecodeFormat((MOS_FORMAT)params->dwOutputFormat);
1943
1944 if (params->dwOutputFormat == Format_NV12)
1945 {
1946 if (picParams->m_chromaType == jpegYUV422H2Y ||
1947 picParams->m_chromaType == jpegYUV422H4Y)
1948 {
1949 cmd.DW1.Obj1.VerticalDownSamplingEnable = 1;
1950 }
1951 else if (picParams->m_chromaType == jpegYUV422V2Y ||
1952 picParams->m_chromaType == jpegYUV422V4Y)
1953 {
1954 cmd.DW1.Obj1.HorizontalDownSamplingEnable = 1;
1955 }
1956 }
1957 else if (params->dwOutputFormat == Format_UYVY ||
1958 params->dwOutputFormat == Format_YUY2)
1959 {
1960 if (picParams->m_chromaType == jpegYUV420)
1961 {
1962 cmd.DW1.Obj1.VerticalUpSamplingEnable = 1;
1963 }
1964 }
1965
1966 cmd.DW2.Obj0.FrameWidthInBlocksMinus1 = params->dwWidthInBlocks;
1967 cmd.DW2.Obj0.FrameHeightInBlocksMinus1 = params->dwHeightInBlocks;
1968
1969 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
1970
1971 return eStatus;
1972 }
1973
AddMfxJpegEncodePicStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,MhwVdboxJpegEncodePicState * params)1974 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxJpegEncodePicStateCmd(
1975 PMOS_COMMAND_BUFFER cmdBuffer,
1976 MhwVdboxJpegEncodePicState *params)
1977 {
1978 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
1979
1980 MHW_FUNCTION_ENTER;
1981
1982 MHW_MI_CHK_NULL(cmdBuffer);
1983 MHW_MI_CHK_NULL(params);
1984 MHW_MI_CHK_NULL(params->pJpegEncodePicParams);
1985
1986 mhw_vdbox_mfx_g12_X::MFX_JPEG_PIC_STATE_CMD cmd;
1987 auto picParams = params->pJpegEncodePicParams;
1988
1989 cmd.DW1.Obj0.InputSurfaceFormatYuv = picParams->m_inputSurfaceFormat;
1990
1991 if (picParams->m_inputSurfaceFormat == codechalJpegY8)
1992 {
1993 cmd.DW1.Obj0.OutputMcuStructure = jpegYUV400;
1994 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = picParams->m_picWidth % 8;
1995 cmd.DW1.Obj0.PixelsInVerticalLastMcu = picParams->m_picHeight % 8;
1996 }
1997 else if (picParams->m_inputSurfaceFormat == codechalJpegNV12)
1998 {
1999 cmd.DW1.Obj0.OutputMcuStructure = jpegYUV420;
2000
2001 if (picParams->m_picWidth % 2 == 0)
2002 {
2003 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = picParams->m_picWidth % 16;
2004 }
2005 else
2006 {
2007 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = ((picParams->m_picWidth % 16) + 1) % 16;
2008 }
2009
2010 if (picParams->m_picHeight % 2 == 0)
2011 {
2012 cmd.DW1.Obj0.PixelsInVerticalLastMcu = picParams->m_picHeight % 16;
2013 }
2014 else
2015 {
2016 cmd.DW1.Obj0.PixelsInVerticalLastMcu = ((picParams->m_picHeight % 16) + 1) % 16;
2017 }
2018 }
2019 else if (picParams->m_inputSurfaceFormat == codechalJpegYUY2 ||
2020 picParams->m_inputSurfaceFormat == codechalJpegUYVY)
2021 {
2022 cmd.DW1.Obj0.OutputMcuStructure = jpegYUV422H2Y;
2023
2024 if (picParams->m_picWidth % 2 == 0)
2025 {
2026 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = picParams->m_picWidth % 16;
2027 }
2028 else
2029 {
2030 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = ((picParams->m_picWidth % 16) + 1) % 16;
2031 }
2032
2033 cmd.DW1.Obj0.PixelsInVerticalLastMcu = picParams->m_picHeight % 8;
2034 }
2035 else if (picParams->m_inputSurfaceFormat == codechalJpegRGB)
2036 {
2037 cmd.DW1.Obj0.OutputMcuStructure = jpegYUV444;
2038 cmd.DW1.Obj0.PixelsInHorizontalLastMcu = picParams->m_picWidth % 8;
2039 cmd.DW1.Obj0.PixelsInVerticalLastMcu = picParams->m_picHeight % 8;
2040 }
2041
2042 uint32_t horizontalSamplingFactor = GetJpegHorizontalSamplingFactorForY((CodecEncodeJpegInputSurfaceFormat)picParams->m_inputSurfaceFormat);
2043 uint32_t verticalSamplingFactor = GetJpegVerticalSamplingFactorForY((CodecEncodeJpegInputSurfaceFormat)picParams->m_inputSurfaceFormat);
2044 cmd.DW2.Obj0.FrameWidthInBlocksMinus1 = (((picParams->m_picWidth + (horizontalSamplingFactor * 8 - 1)) / (horizontalSamplingFactor * 8)) * horizontalSamplingFactor) - 1;
2045 cmd.DW2.Obj0.FrameHeightInBlocksMinus1 = (((picParams->m_picHeight + (verticalSamplingFactor * 8 - 1)) / (verticalSamplingFactor * 8)) * verticalSamplingFactor) - 1;
2046
2047 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2048
2049 return eStatus;
2050 }
2051
AddMfxJpegFqmCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_QM_PARAMS params,uint32_t numQuantTables)2052 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxJpegFqmCmd(
2053 PMOS_COMMAND_BUFFER cmdBuffer,
2054 PMHW_VDBOX_QM_PARAMS params,
2055 uint32_t numQuantTables)
2056 {
2057 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2058
2059 MHW_FUNCTION_ENTER;
2060
2061 MHW_MI_CHK_NULL(cmdBuffer);
2062 MHW_MI_CHK_NULL(params);
2063
2064 mhw_vdbox_mfx_g12_X::MFX_FQM_STATE_CMD cmd;
2065
2066 for (uint32_t i = 0; i < numQuantTables; i++)
2067 {
2068 cmd.DW1.Obj0.Avc = i;
2069
2070 MOS_ZeroMemory(&cmd.ForwardQuantizerMatrix, sizeof(cmd.ForwardQuantizerMatrix));
2071
2072 auto j = 0;
2073 // Copy over 32 uint32_t worth of values - Each uint32_t will contain 2 16 bit quantizer values
2074 // where for the DWordx Bits [15: 0] = 1/QM[0][x] Bits[32:16] = 1/QM[1][x]
2075 for (auto k = 0; k < 8; k++)
2076 {
2077 for (auto l = k; l < 64; l += 16)
2078 {
2079 cmd.ForwardQuantizerMatrix[j] = (((GetReciprocalScalingValue(params->pJpegQuantMatrix->m_quantMatrix[i][l + 8]) & 0xFFFF) << 16)
2080 | (GetReciprocalScalingValue(params->pJpegQuantMatrix->m_quantMatrix[i][l]) & 0xFFFF));
2081 j++;
2082 }
2083 }
2084
2085 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2086 }
2087
2088 return eStatus;
2089 }
2090
AddMfcJpegHuffTableStateCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_ENCODE_HUFF_TABLE_PARAMS params)2091 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfcJpegHuffTableStateCmd(
2092 PMOS_COMMAND_BUFFER cmdBuffer,
2093 PMHW_VDBOX_ENCODE_HUFF_TABLE_PARAMS params)
2094 {
2095 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2096
2097 MHW_FUNCTION_ENTER;
2098
2099 MHW_MI_CHK_NULL(cmdBuffer);
2100 MHW_MI_CHK_NULL(params);
2101
2102 mhw_vdbox_mfx_g12_X::MFC_JPEG_HUFF_TABLE_STATE_CMD cmd;
2103
2104 cmd.DW1.HuffTableId = params->HuffTableID;
2105
2106 // cmd DWORDS 2:13 for DC Table
2107 // Format- 3Bytes: Byte0 for Code length, Byte1 and Byte2 for Code word, and Byte3 for dummy
2108 for (auto j = 0; j < JPEG_NUM_HUFF_TABLE_DC_HUFFVAL; j++)
2109 {
2110 cmd.DcTable[j] = 0;
2111 cmd.DcTable[j] = (params->pDCCodeLength[j] & 0xFF) | ((params->pDCCodeValues[j] & 0xFFFF) << 8);
2112 }
2113
2114 // cmd DWORDS 14:175 for AC table
2115 // Format- 3Bytes: Byte0 for Code length, Byte1 and Byte2 for Code word, and Byte3 for dummy
2116 for (auto j = 0; j < JPEG_NUM_HUFF_TABLE_AC_HUFFVAL; j++)
2117 {
2118 cmd.AcTable[j] = 0;
2119 cmd.AcTable[j] = (params->pACCodeLength[j] & 0xFF)
2120 | ((params->pACCodeValues[j] & 0xFFFF) << 8);
2121 }
2122
2123 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2124
2125 return eStatus;
2126 }
2127
AddMfcJpegScanObjCmd(PMOS_COMMAND_BUFFER cmdBuffer,MhwVdboxJpegScanParams * params)2128 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfcJpegScanObjCmd(
2129 PMOS_COMMAND_BUFFER cmdBuffer,
2130 MhwVdboxJpegScanParams *params)
2131 {
2132 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2133
2134 MHW_FUNCTION_ENTER;
2135
2136 MHW_MI_CHK_NULL(cmdBuffer);
2137 MHW_MI_CHK_NULL(params);
2138 MHW_MI_CHK_NULL(params->pJpegEncodeScanParams);
2139
2140 mhw_vdbox_mfx_g12_X::MFC_JPEG_SCAN_OBJECT_CMD cmd;
2141
2142 uint32_t horizontalSamplingFactor = GetJpegHorizontalSamplingFactorForY(params->inputSurfaceFormat);
2143 uint32_t verticalSamplingFactor = GetJpegVerticalSamplingFactorForY(params->inputSurfaceFormat);
2144 cmd.DW1.McuCount = ((params->dwPicWidth + (horizontalSamplingFactor * 8 - 1)) / (horizontalSamplingFactor * 8))
2145 * ((params->dwPicHeight + (verticalSamplingFactor * 8 - 1)) / (verticalSamplingFactor * 8));
2146 cmd.DW2.RestartInterval = params->pJpegEncodeScanParams->m_restartInterval;
2147 cmd.DW2.IsLastScan = 1; // Always 1 since there is only 1 scan in the JPEG frame
2148 cmd.DW2.HeadPresentFlag = 1; // There will always be MFC_JPEG_PAK_INSERT_OBJECT commands sent
2149
2150 for (auto i = 0; i < jpegNumComponent; i++)
2151 {
2152 cmd.DW2.HuffmanDcTable |= (params->pJpegEncodeScanParams->m_dcCodingTblSelector[i]) << i;
2153 cmd.DW2.HuffmanAcTable |= (params->pJpegEncodeScanParams->m_acCodingTblSelector[i]) << i;
2154 }
2155
2156 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2157
2158 return eStatus;
2159 }
2160
AddMfxDecodeVp8PicCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VP8_PIC_STATE params)2161 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxDecodeVp8PicCmd(
2162 PMOS_COMMAND_BUFFER cmdBuffer,
2163 PMHW_VDBOX_VP8_PIC_STATE params)
2164 {
2165 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2166
2167 MHW_FUNCTION_ENTER;
2168
2169 MHW_MI_CHK_NULL(cmdBuffer);
2170 MHW_MI_CHK_NULL(params);
2171
2172 mhw_vdbox_mfx_g12_X::MFX_VP8_PIC_STATE_CMD cmd;
2173 auto vp8PicParams = params->pVp8PicParams;
2174 auto vp8IqMatrixParams = params->pVp8IqMatrixParams;
2175
2176 cmd.DW1.FrameWidthMinus1 = vp8PicParams->wFrameWidthInMbsMinus1;
2177 cmd.DW1.FrameHeightMinus1 = vp8PicParams->wFrameHeightInMbsMinus1;
2178 cmd.DW2.McFilterSelect = (vp8PicParams->version != 0);
2179 cmd.DW2.ChromaFullPixelMcFilterMode = (vp8PicParams->version == 3);
2180 cmd.DW2.Dblkfiltertype = vp8PicParams->filter_type;
2181 cmd.DW2.Skeyframeflag = vp8PicParams->key_frame;
2182 cmd.DW2.SegmentationIdStreamoutEnable =
2183 (vp8PicParams->segmentation_enabled) && (vp8PicParams->update_mb_segmentation_map);
2184 cmd.DW2.SegmentationIdStreaminEnable =
2185 (vp8PicParams->segmentation_enabled) && !(vp8PicParams->update_mb_segmentation_map);
2186 cmd.DW2.SegmentEnableFlag = vp8PicParams->segmentation_enabled;
2187 cmd.DW2.UpdateMbsegmentMapFlag =
2188 (vp8PicParams->segmentation_enabled) ? vp8PicParams->update_mb_segmentation_map : 0;
2189 cmd.DW2.MbNocoeffSkipflag = vp8PicParams->mb_no_coeff_skip;
2190 cmd.DW2.ModeReferenceLoopFilterDeltaEnabled = vp8PicParams->loop_filter_adj_enable;
2191 cmd.DW2.GoldenRefPictureMvSignbiasFlag = vp8PicParams->sign_bias_golden;
2192 cmd.DW2.AlternateRefPicMvSignbiasFlag = vp8PicParams->sign_bias_alternate;
2193 cmd.DW2.DeblockSharpnessLevel = vp8PicParams->ucSharpnessLevel;
2194 cmd.DW3.DblkfilterlevelForSegment3 = vp8PicParams->ucLoopFilterLevel[3];
2195 cmd.DW3.DblkfilterlevelForSegment2 = vp8PicParams->ucLoopFilterLevel[2];
2196 cmd.DW3.DblkfilterlevelForSegment1 = vp8PicParams->ucLoopFilterLevel[1];
2197 cmd.DW3.DblkfilterlevelForSegment0 = vp8PicParams->ucLoopFilterLevel[0];
2198
2199 uint32_t i = 0;
2200 uint32_t j = 0;
2201 cmd.DW4.dec.QuantizerValue0Blocktype0Y1Dc = vp8IqMatrixParams->quantization_values[i][j];
2202 cmd.DW4.dec.QuantizerValue0Blocktype1Y1Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2203
2204 i = 0;
2205 j = 2;
2206 cmd.DW5.dec.QuantizerValue0Blocktype2Uvdc = vp8IqMatrixParams->quantization_values[i][j];
2207 cmd.DW5.dec.QuantizerValue0Blocktype3Uvac = vp8IqMatrixParams->quantization_values[i][j + 1];
2208
2209 i = 0;
2210 j = 4;
2211 cmd.DW6.dec.QuantizerValue0Blocktype4Y2Dc = vp8IqMatrixParams->quantization_values[i][j];
2212 cmd.DW6.dec.QuantizerValue0Blocktype5Y2Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2213
2214 i = 1;
2215 j = 0;
2216 cmd.DW7.dec.QuantizerValue1Blocktype0Y1Dc = vp8IqMatrixParams->quantization_values[i][j];
2217 cmd.DW7.dec.QuantizerValue1Blocktype1Y1Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2218
2219 i = 1;
2220 j = 2;
2221 cmd.DW8.QuantizerValue1Blocktype2Uvdc = vp8IqMatrixParams->quantization_values[i][j];
2222 cmd.DW8.QuantizerValue1Blocktype3Uvac = vp8IqMatrixParams->quantization_values[i][j + 1];
2223
2224 i = 1;
2225 j = 4;
2226 cmd.DW9.QuantizerValue1Blocktype4Y2Dc = vp8IqMatrixParams->quantization_values[i][j];
2227 cmd.DW9.QuantizerValue1Blocktype5Y2Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2228
2229 i = 2;
2230 j = 0;
2231 cmd.DW10.QuantizerValue2Blocktype0Y1Dc = vp8IqMatrixParams->quantization_values[i][j];
2232 cmd.DW10.QuantizerValue2Blocktype1Y1Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2233
2234 i = 2;
2235 j = 2;
2236 cmd.DW11.QuantizerValue2Blocktype2Uvdc = vp8IqMatrixParams->quantization_values[i][j];
2237 cmd.DW11.QuantizerValue2Blocktype3Uvac = vp8IqMatrixParams->quantization_values[i][j + 1];
2238
2239 i = 2;
2240 j = 4;
2241 cmd.DW12.QuantizerValue2Blocktype4Y2Dc = vp8IqMatrixParams->quantization_values[i][j];
2242 cmd.DW12.QuantizerValue2Blocktype5Y2Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2243
2244 i = 3;
2245 j = 0;
2246 cmd.DW13.QuantizerValue3Blocktype0Y1Dc = vp8IqMatrixParams->quantization_values[i][j];
2247 cmd.DW13.QuantizerValue3Blocktype1Y1Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2248
2249 i = 3;
2250 j = 2;
2251 cmd.DW14.QuantizerValue3Blocktype2Uvdc = vp8IqMatrixParams->quantization_values[i][j];
2252 cmd.DW14.QuantizerValue3Blocktype3Uvac = vp8IqMatrixParams->quantization_values[i][j + 1];
2253
2254 i = 3;
2255 j = 4;
2256 cmd.DW15.QuantizerValue3Blocktype4Y2Dc = vp8IqMatrixParams->quantization_values[i][j];
2257 cmd.DW15.QuantizerValue3Blocktype5Y2Ac = vp8IqMatrixParams->quantization_values[i][j + 1];
2258
2259 cmd.DW19.Mbsegmentidtreeprobs2 = vp8PicParams->cMbSegmentTreeProbs[2];
2260 cmd.DW19.Mbsegmentidtreeprobs1 = vp8PicParams->cMbSegmentTreeProbs[1];
2261 cmd.DW19.Mbsegmentidtreeprobs0 = vp8PicParams->cMbSegmentTreeProbs[0];
2262 cmd.DW20.Mbnocoeffskipfalseprob = vp8PicParams->ucProbSkipFalse;
2263 cmd.DW20.Intrambprob = vp8PicParams->ucProbIntra;
2264 cmd.DW20.Interpredfromlastrefprob = vp8PicParams->ucProbLast;
2265 cmd.DW20.Interpredfromgrefrefprob = vp8PicParams->ucProbGolden;
2266 cmd.DW21.Ymodeprob3 = vp8PicParams->ucYModeProbs[3];
2267 cmd.DW21.Ymodeprob2 = vp8PicParams->ucYModeProbs[2];
2268 cmd.DW21.Ymodeprob1 = vp8PicParams->ucYModeProbs[1];
2269 cmd.DW21.Ymodeprob0 = vp8PicParams->ucYModeProbs[0];
2270 cmd.DW22.Uvmodeprob2 = vp8PicParams->ucUvModeProbs[2];
2271 cmd.DW22.Uvmodeprob1 = vp8PicParams->ucUvModeProbs[1];
2272 cmd.DW22.Uvmodeprob0 = vp8PicParams->ucUvModeProbs[0];
2273
2274 i = 0;
2275 j = 0;
2276 cmd.DW23.Mvupdateprobs00 = vp8PicParams->ucMvUpdateProb[i][j];
2277 cmd.DW23.Mvupdateprobs01 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2278 cmd.DW23.Mvupdateprobs02 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2279 cmd.DW23.Mvupdateprobs03 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2280
2281 i = 0;
2282 j = 4;
2283 cmd.DW24.Mvupdateprobs04 = vp8PicParams->ucMvUpdateProb[i][j];
2284 cmd.DW24.Mvupdateprobs05 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2285 cmd.DW24.Mvupdateprobs06 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2286 cmd.DW24.Mvupdateprobs07 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2287
2288 i = 0;
2289 j = 8;
2290 cmd.DW25.Mvupdateprobs08 = vp8PicParams->ucMvUpdateProb[i][j];
2291 cmd.DW25.Mvupdateprobs09 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2292 cmd.DW25.Mvupdateprobs010 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2293 cmd.DW25.Mvupdateprobs011 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2294
2295 i = 0;
2296 j = 12;
2297 cmd.DW26.Mvupdateprobs012 = vp8PicParams->ucMvUpdateProb[i][j];
2298 cmd.DW26.Mvupdateprobs013 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2299 cmd.DW26.Mvupdateprobs014 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2300 cmd.DW26.Mvupdateprobs015 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2301
2302 i = 0;
2303 j = 16;
2304 cmd.DW27.Mvupdateprobs016 = vp8PicParams->ucMvUpdateProb[i][j];
2305 cmd.DW27.Mvupdateprobs017 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2306 cmd.DW27.Mvupdateprobs018 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2307
2308 i = 1;
2309 j = 0;
2310 cmd.DW28.Mvupdateprobs10 = vp8PicParams->ucMvUpdateProb[i][j];
2311 cmd.DW28.Mvupdateprobs11 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2312 cmd.DW28.Mvupdateprobs12 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2313 cmd.DW28.Mvupdateprobs13 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2314
2315 i = 1;
2316 j = 4;
2317 cmd.DW29.Mvupdateprobs14 = vp8PicParams->ucMvUpdateProb[i][j];
2318 cmd.DW29.Mvupdateprobs15 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2319 cmd.DW29.Mvupdateprobs16 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2320 cmd.DW29.Mvupdateprobs17 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2321
2322 i = 1;
2323 j = 8;
2324 cmd.DW30.Mvupdateprobs18 = vp8PicParams->ucMvUpdateProb[i][j];
2325 cmd.DW30.Mvupdateprobs19 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2326 cmd.DW30.Mvupdateprobs110 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2327 cmd.DW30.Mvupdateprobs111 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2328
2329 i = 1;
2330 j = 12;
2331 cmd.DW31.Mvupdateprobs112 = vp8PicParams->ucMvUpdateProb[i][j];
2332 cmd.DW31.Mvupdateprobs113 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2333 cmd.DW31.Mvupdateprobs114 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2334 cmd.DW31.Mvupdateprobs115 = vp8PicParams->ucMvUpdateProb[i][j + 3];
2335
2336 i = 1;
2337 j = 16;
2338 cmd.DW32.Mvupdateprobs116 = vp8PicParams->ucMvUpdateProb[i][j];
2339 cmd.DW32.Mvupdateprobs117 = vp8PicParams->ucMvUpdateProb[i][j + 1];
2340 cmd.DW32.Mvupdateprobs118 = vp8PicParams->ucMvUpdateProb[i][j + 2];
2341
2342 cmd.DW33.Reflfdelta0ForIntraFrame = vp8PicParams->cRefLfDelta[0];
2343 cmd.DW33.Reflfdelta1ForLastFrame = vp8PicParams->cRefLfDelta[1];
2344 cmd.DW33.Reflfdelta2ForGoldenFrame = vp8PicParams->cRefLfDelta[2];
2345 cmd.DW33.Reflfdelta3ForAltrefFrame = vp8PicParams->cRefLfDelta[3];
2346 cmd.DW34.Modelfdelta0ForBPredMode = vp8PicParams->cModeLfDelta[0];
2347 cmd.DW34.Modelfdelta1ForZeromvMode = vp8PicParams->cModeLfDelta[1];
2348 cmd.DW34.Modelfdelta2ForNearestNearAndNewMode = vp8PicParams->cModeLfDelta[2];
2349 cmd.DW34.Modelfdelta3ForSplitmvMode = vp8PicParams->cModeLfDelta[3];
2350
2351 MHW_RESOURCE_PARAMS resourceParams;
2352 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
2353 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
2354 resourceParams.HwCommandType = MOS_MFX_VP8_PIC;
2355
2356 resourceParams.presResource = params->presCoefProbBuffer;
2357 resourceParams.dwOffset = params->dwCoefProbTableOffset;
2358 resourceParams.pdwCmd = &(cmd.DW16.Value);
2359 resourceParams.dwLocationInCmd = 16;
2360 resourceParams.bIsWritable = false;
2361
2362 MHW_MI_CHK_STATUS(AddResourceToCmd(
2363 m_osInterface,
2364 cmdBuffer,
2365 &resourceParams));
2366
2367 if (vp8PicParams->segmentation_enabled)
2368 {
2369 resourceParams.presResource = params->presSegmentationIdStreamBuffer;
2370 resourceParams.dwOffset = 0;
2371 resourceParams.pdwCmd = &(cmd.DW35.Value);
2372 resourceParams.dwLocationInCmd = 35;
2373 resourceParams.bIsWritable = true;
2374
2375 MHW_MI_CHK_STATUS(AddResourceToCmd(
2376 m_osInterface,
2377 cmdBuffer,
2378 &resourceParams));
2379 }
2380
2381 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2382
2383 return eStatus;
2384 }
2385
AddMfxEncodeVp8PicCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VP8_PIC_STATE params)2386 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxEncodeVp8PicCmd(
2387 PMOS_COMMAND_BUFFER cmdBuffer,
2388 PMHW_VDBOX_VP8_PIC_STATE params)
2389 {
2390 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2391
2392 MHW_FUNCTION_ENTER;
2393
2394 MHW_MI_CHK_NULL(cmdBuffer);
2395 MHW_MI_CHK_NULL(params);
2396 MHW_MI_CHK_NULL(params->pEncodeVP8SeqParams);
2397 MHW_MI_CHK_NULL(params->pEncodeVP8PicParams);
2398 MHW_MI_CHK_NULL(params->pEncodeVP8QuantData);
2399
2400 mhw_vdbox_mfx_g12_X::MFX_VP8_PIC_STATE_CMD cmd;
2401 auto vp8SeqParams = params->pEncodeVP8SeqParams;
2402 auto vp8PicParams = params->pEncodeVP8PicParams;
2403 auto vp8QuantData = params->pEncodeVP8QuantData;
2404
2405 cmd.DW1.FrameWidthMinus1 = params->wPicWidthInMb - 1;
2406 cmd.DW1.FrameHeightMinus1 = params->wPicHeightInMb - 1;
2407
2408 cmd.DW2.McFilterSelect = (vp8PicParams->version != 0);
2409 cmd.DW2.ChromaFullPixelMcFilterMode = (vp8PicParams->version == 3);
2410 cmd.DW2.Dblkfiltertype = vp8PicParams->filter_type;
2411 cmd.DW2.Skeyframeflag = !vp8PicParams->frame_type;
2412 cmd.DW2.SegmentEnableFlag = vp8PicParams->segmentation_enabled;
2413 cmd.DW2.UpdateMbsegmentMapFlag =
2414 (vp8PicParams->segmentation_enabled) ? vp8PicParams->update_mb_segmentation_map : 0;
2415 cmd.DW2.MbNocoeffSkipflag = vp8PicParams->mb_no_coeff_skip;
2416 cmd.DW2.ModeReferenceLoopFilterDeltaEnabled = vp8PicParams->loop_filter_adj_enable;
2417 cmd.DW2.GoldenRefPictureMvSignbiasFlag = vp8PicParams->sign_bias_golden;
2418 cmd.DW2.AlternateRefPicMvSignbiasFlag = vp8PicParams->sign_bias_alternate;
2419 cmd.DW2.DeblockSharpnessLevel = vp8PicParams->sharpness_level;
2420 cmd.DW2.Log2NumOfPartition = vp8PicParams->CodedCoeffTokenPartition;
2421
2422 cmd.DW3.DblkfilterlevelForSegment3 = vp8PicParams->loop_filter_level[3];
2423 cmd.DW3.DblkfilterlevelForSegment2 = vp8PicParams->loop_filter_level[2];
2424 cmd.DW3.DblkfilterlevelForSegment1 = vp8PicParams->loop_filter_level[1];
2425 cmd.DW3.DblkfilterlevelForSegment0 = vp8PicParams->loop_filter_level[0];
2426
2427 //Y1 AC is the reference.
2428 cmd.DW4.enc.Seg0Qindex = vp8QuantData->QIndex[0];
2429 cmd.DW4.enc.Seg1Qindex = vp8QuantData->QIndex[1];
2430 cmd.DW4.enc.Seg2Qindex = vp8QuantData->QIndex[2];
2431 cmd.DW4.enc.Seg3Qindex = vp8QuantData->QIndex[3];
2432
2433 cmd.DW5.enc.Y2DcQindexDelta = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC];
2434 cmd.DW5.enc.Y2AcQindexDeltaSign = (vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_DC] < 0) ? 1 : 0;
2435 cmd.DW5.enc.Y2AcQindexDelta = vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC];
2436 cmd.DW5.enc.Y2AcQindexSign = (vp8QuantData->QIndexDelta[VP8_QINDEX_Y2_AC] < 0) ? 1 : 0;
2437 cmd.DW5.enc.UvdcQindexDelta = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC];
2438 cmd.DW5.enc.UvdcQindexDeltaSign = (vp8QuantData->QIndexDelta[VP8_QINDEX_UV_DC] < 0) ? 1 : 0;
2439 cmd.DW5.enc.UvacQindexdelta = vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC];
2440 cmd.DW5.enc.UvacQindexDeltaSign = (vp8QuantData->QIndexDelta[VP8_QINDEX_UV_AC] < 0) ? 1 : 0;
2441
2442 cmd.DW6.enc.Y1DcQindexDelta = vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC];
2443 cmd.DW6.enc.Y1DcQindexDeltaSign = (vp8QuantData->QIndexDelta[VP8_QINDEX_Y1_DC] < 0) ? 1 : 0;
2444
2445 cmd.DW7.enc.ClampQindexLow = vp8PicParams->ClampQindexLow;
2446 cmd.DW7.enc.ClampQindexHigh = vp8PicParams->ClampQindexHigh;
2447
2448 MHW_RESOURCE_PARAMS resourceParams;
2449 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
2450 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
2451 resourceParams.HwCommandType = MOS_MFX_VP8_PIC;
2452
2453 cmd.DW19.Mbsegmentidtreeprobs2 = SegTreeProbs[2];
2454 cmd.DW19.Mbsegmentidtreeprobs1 = SegTreeProbs[1];
2455 cmd.DW19.Mbsegmentidtreeprobs0 = SegTreeProbs[0];
2456
2457 //The following probs need to be updated by the kernel when ready.
2458 cmd.DW20.Mbnocoeffskipfalseprob = 224;
2459 cmd.DW20.Intrambprob = 63;
2460 cmd.DW20.Interpredfromlastrefprob = 255;
2461 cmd.DW20.Interpredfromgrefrefprob = 128;
2462
2463 cmd.DW21.Ymodeprob3 = YModeProb[3];
2464 cmd.DW21.Ymodeprob2 = YModeProb[2];
2465 cmd.DW21.Ymodeprob1 = YModeProb[1];
2466 cmd.DW21.Ymodeprob0 = YModeProb[0];
2467
2468 cmd.DW22.Uvmodeprob2 = UVModeProb[2];
2469 cmd.DW22.Uvmodeprob1 = UVModeProb[1];
2470 cmd.DW22.Uvmodeprob0 = UVModeProb[0];
2471
2472 uint32_t i = 0;
2473 uint32_t j = 0;
2474 cmd.DW23.Mvupdateprobs00 = DefaultMvContext[i][j];
2475 cmd.DW23.Mvupdateprobs01 = DefaultMvContext[i][j + 1];
2476 cmd.DW23.Mvupdateprobs02 = DefaultMvContext[i][j + 2];
2477 cmd.DW23.Mvupdateprobs03 = DefaultMvContext[i][j + 3];
2478
2479 i = 0;
2480 j = 4;
2481 cmd.DW24.Mvupdateprobs04 = DefaultMvContext[i][j];
2482 cmd.DW24.Mvupdateprobs05 = DefaultMvContext[i][j + 1];
2483 cmd.DW24.Mvupdateprobs06 = DefaultMvContext[i][j + 2];
2484 cmd.DW24.Mvupdateprobs07 = DefaultMvContext[i][j + 3];
2485
2486 i = 0;
2487 j = 8;
2488 cmd.DW25.Mvupdateprobs08 = DefaultMvContext[i][j];
2489 cmd.DW25.Mvupdateprobs09 = DefaultMvContext[i][j + 1];
2490 cmd.DW25.Mvupdateprobs010 = DefaultMvContext[i][j + 2];
2491 cmd.DW25.Mvupdateprobs011 = DefaultMvContext[i][j + 3];
2492
2493 i = 0;
2494 j = 12;
2495 cmd.DW26.Mvupdateprobs012 = DefaultMvContext[i][j];
2496 cmd.DW26.Mvupdateprobs013 = DefaultMvContext[i][j + 1];
2497 cmd.DW26.Mvupdateprobs014 = DefaultMvContext[i][j + 2];
2498 cmd.DW26.Mvupdateprobs015 = DefaultMvContext[i][j + 3];
2499
2500 i = 0;
2501 j = 16;
2502 cmd.DW27.Mvupdateprobs016 = DefaultMvContext[i][j];
2503 cmd.DW27.Mvupdateprobs017 = DefaultMvContext[i][j + 1];
2504 cmd.DW27.Mvupdateprobs018 = DefaultMvContext[i][j + 2];
2505
2506 i = 1;
2507 j = 0;
2508 cmd.DW28.Mvupdateprobs10 = DefaultMvContext[i][j];
2509 cmd.DW28.Mvupdateprobs11 = DefaultMvContext[i][j + 1];
2510 cmd.DW28.Mvupdateprobs12 = DefaultMvContext[i][j + 2];
2511 cmd.DW28.Mvupdateprobs13 = DefaultMvContext[i][j + 3];
2512
2513 i = 1;
2514 j = 4;
2515 cmd.DW29.Mvupdateprobs14 = DefaultMvContext[i][j];
2516 cmd.DW29.Mvupdateprobs15 = DefaultMvContext[i][j + 1];
2517 cmd.DW29.Mvupdateprobs16 = DefaultMvContext[i][j + 2];
2518 cmd.DW29.Mvupdateprobs17 = DefaultMvContext[i][j + 3];
2519
2520 i = 1;
2521 j = 8;
2522 cmd.DW30.Mvupdateprobs18 = DefaultMvContext[i][j];
2523 cmd.DW30.Mvupdateprobs19 = DefaultMvContext[i][j + 1];
2524 cmd.DW30.Mvupdateprobs110 = DefaultMvContext[i][j + 2];
2525 cmd.DW30.Mvupdateprobs111 = DefaultMvContext[i][j + 3];
2526
2527 i = 1;
2528 j = 12;
2529 cmd.DW31.Mvupdateprobs112 = DefaultMvContext[i][j];
2530 cmd.DW31.Mvupdateprobs113 = DefaultMvContext[i][j + 1];
2531 cmd.DW31.Mvupdateprobs114 = DefaultMvContext[i][j + 2];
2532 cmd.DW31.Mvupdateprobs115 = DefaultMvContext[i][j + 3];
2533
2534 i = 1;
2535 j = 16;
2536 cmd.DW32.Mvupdateprobs116 = DefaultMvContext[i][j];
2537 cmd.DW32.Mvupdateprobs117 = DefaultMvContext[i][j + 1];
2538 cmd.DW32.Mvupdateprobs118 = DefaultMvContext[i][j + 2];
2539
2540 cmd.DW33.Reflfdelta0ForIntraFrame = vp8PicParams->ref_lf_delta[0];
2541 cmd.DW33.Reflfdelta1ForLastFrame = vp8PicParams->ref_lf_delta[1];
2542 cmd.DW33.Reflfdelta2ForGoldenFrame = vp8PicParams->ref_lf_delta[2];
2543 cmd.DW33.Reflfdelta3ForAltrefFrame = vp8PicParams->ref_lf_delta[3];
2544
2545 cmd.DW34.Modelfdelta0ForBPredMode = vp8PicParams->mode_lf_delta[0];
2546 cmd.DW34.Modelfdelta1ForZeromvMode = vp8PicParams->mode_lf_delta[1];
2547 cmd.DW34.Modelfdelta2ForNearestNearAndNewMode = vp8PicParams->mode_lf_delta[2];
2548 cmd.DW34.Modelfdelta3ForSplitmvMode = vp8PicParams->mode_lf_delta[3];
2549
2550 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2551
2552 return eStatus;
2553 }
2554
InitMfxVp8EncoderCfgCmd(PMOS_RESOURCE cfgCmdBuffer,PMHW_VDBOX_VP8_ENCODER_CFG_PARAMS params)2555 MOS_STATUS MhwVdboxMfxInterfaceG12::InitMfxVp8EncoderCfgCmd(
2556 PMOS_RESOURCE cfgCmdBuffer,
2557 PMHW_VDBOX_VP8_ENCODER_CFG_PARAMS params)
2558 {
2559 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2560
2561 MHW_FUNCTION_ENTER;
2562
2563 MHW_MI_CHK_NULL(cfgCmdBuffer);
2564 MHW_MI_CHK_NULL(params);
2565 MHW_MI_CHK_NULL(params->pEncodeVP8PicParams);
2566 MHW_MI_CHK_NULL(params->pEncodeVP8SeqParams);
2567 MHW_MI_CHK_NULL(params->pEncodeVP8QuantData);
2568
2569 auto picParams = params->pEncodeVP8PicParams;
2570 auto seqParams = params->pEncodeVP8SeqParams;
2571 auto quantData = params->pEncodeVP8QuantData;
2572
2573 MOS_LOCK_PARAMS lockFlags;
2574 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
2575 lockFlags.WriteOnly = 1;
2576 uint8_t *data = (uint8_t*)m_osInterface->pfnLockResource(m_osInterface, cfgCmdBuffer, &lockFlags);
2577 MHW_MI_CHK_NULL(data);
2578 data += params->dwCfgCmdOffset;
2579
2580 MOS_ZeroMemory(data, params->dwCfgBufferSize);
2581
2582 mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD *cmd = (mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD *)data;
2583
2584 cmd->DW0.DwordLength = mhw_vdbox_mfx_g12_X::GetOpLength(mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::dwSize);
2585 cmd->DW0.SubOpcodeB = mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::SUB_OPCODE_B_MFXVP8ENCODERCFG;
2586 cmd->DW0.SubOpcodeA = mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::SUB_OPCODE_A_VP8COMMON;
2587 cmd->DW0.MediaCommandOpcode = mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::MEDIA_COMMAND_OPCODE_VP8;
2588 cmd->DW0.Pipeline = mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::PIPELINE_VIDEOCODEC;
2589 cmd->DW0.CommandType = mhw_vdbox_mfx_g12_X::MFX_VP8_Encoder_CFG_CMD::COMMAND_TYPE_PARALLELVIDEOPIPE;
2590
2591 cmd->DW1.Value = 0;
2592 cmd->DW2.Value = 0;
2593 cmd->DW3.Value = 0;
2594 cmd->DW4.Value = 0;
2595 cmd->DW5.Value = 0;
2596 cmd->DW6.Value = 0;
2597 cmd->DW7.Value = 0;
2598 cmd->DW8.Value = 0;
2599 cmd->DW9.Value = 0;
2600 cmd->DW10.Value = 0;
2601 cmd->DW11.Value = 0;
2602 cmd->DW12.Value = 0;
2603 cmd->DW13.Value = 0;
2604 cmd->DW14.Value = 0;
2605 cmd->DW15.Value = 0;
2606 cmd->DW16.Value = 0;
2607 cmd->DW17.Value = 0;
2608 cmd->DW18.Value = 0;
2609 cmd->DW19.Value = 0;
2610 cmd->DW20.Value = 0;
2611 cmd->DW22.Value = 0;
2612 cmd->DW23.Value = 0;
2613 cmd->DW24.Value = 0;
2614 cmd->DW25.Value = 0;
2615 cmd->DW26.Value = 0;
2616 cmd->DW27.Value = 0;
2617 cmd->DW28.Value = 0;
2618 cmd->DW29.Value = 0;
2619
2620 cmd->DW1.RateControlInitialPass = params->bFirstPass ? 1 : 0;
2621 cmd->DW1.PerSegmentDeltaQindexLoopfilterDisable = (params->bFirstPass || !params->bBRCEnabled);
2622 cmd->DW1.TokenStatisticsOutputEnable = 1;
2623
2624 if (picParams->segmentation_enabled)
2625 {
2626 cmd->DW1.UpdateSegmentFeatureDataFlag = 1;
2627 }
2628
2629 if (params->bBRCEnabled)
2630 {
2631 //Add BRC init below
2632 cmd->DW2.MaxFrameBitCountRateControlEnableMask = 1;
2633 cmd->DW2.MinFrameBitCountRateControlEnableMask = 1;
2634 }
2635
2636 cmd->DW22.ShowFrame = picParams->show_frame;
2637 cmd->DW22.BitstreamFormatVersion = picParams->version;
2638
2639 cmd->DW23.HorizontalSizeCode = ((seqParams->FrameWidthScale << 14) | seqParams->FrameWidth);
2640 cmd->DW23.VerticalSizeCode = ((seqParams->FrameHeightScale << 14) | seqParams->FrameHeight);
2641
2642 //Add batch buffer end command
2643 data += sizeof(*cmd);
2644
2645 mhw_mi_g12_X::MI_BATCH_BUFFER_END_CMD *miBatchBufferEndCmd = (mhw_mi_g12_X::MI_BATCH_BUFFER_END_CMD *)data;
2646 *miBatchBufferEndCmd = mhw_mi_g12_X::MI_BATCH_BUFFER_END_CMD();
2647
2648 MHW_MI_CHK_STATUS(m_osInterface->pfnUnlockResource(
2649 m_osInterface,
2650 cfgCmdBuffer));
2651
2652 return eStatus;
2653 }
2654
AddMfxVp8BspBufBaseAddrCmd(PMOS_COMMAND_BUFFER cmdBuffer,PMHW_VDBOX_VP8_BSP_BUF_BASE_ADDR_PARAMS params)2655 MOS_STATUS MhwVdboxMfxInterfaceG12::AddMfxVp8BspBufBaseAddrCmd(
2656 PMOS_COMMAND_BUFFER cmdBuffer,
2657 PMHW_VDBOX_VP8_BSP_BUF_BASE_ADDR_PARAMS params)
2658 {
2659 MOS_STATUS eStatus = MOS_STATUS_SUCCESS;
2660
2661 MHW_FUNCTION_ENTER;
2662
2663 MHW_MI_CHK_NULL(cmdBuffer);
2664 MHW_MI_CHK_NULL(params);
2665
2666 if (params->dwPartitions == 0 || params->dwPartitions >= m_vp8MaxNumPartitions)
2667 {
2668 MHW_ASSERTMESSAGE("Invalid Partitions.");
2669 eStatus = MOS_STATUS_INVALID_PARAMETER;
2670 return eStatus;
2671 }
2672
2673 mhw_vdbox_mfx_g12_X::MFX_VP8_BSP_BUF_BASE_ADDR_STATE_CMD cmd;
2674
2675 MHW_RESOURCE_PARAMS resourceParams;
2676 MOS_ZeroMemory(&resourceParams, sizeof(resourceParams));
2677 resourceParams.dwLsbNum = MHW_VDBOX_MFX_GENERAL_STATE_SHIFT;
2678 resourceParams.HwCommandType = MOS_MFX_BSP_BUF_BASE_ADDR;
2679
2680 if (params->presFrameHeaderBuffer)
2681 {
2682 cmd.DW3.Value =
2683 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
2684
2685 resourceParams.presResource = params->presFrameHeaderBuffer;
2686 resourceParams.dwOffset = 0;
2687 resourceParams.pdwCmd = &(cmd.DW1.Value);
2688 resourceParams.dwLocationInCmd = 1;
2689 resourceParams.bIsWritable = true;
2690
2691 MHW_MI_CHK_STATUS(AddResourceToCmd(
2692 m_osInterface,
2693 cmdBuffer,
2694 &resourceParams));
2695 }
2696
2697 if (params->presPakIntermediateBuffer)
2698 {
2699 cmd.DW6.Value =
2700 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC].Value;
2701
2702 resourceParams.presResource = params->presPakIntermediateBuffer;
2703 resourceParams.dwOffset = 0;
2704 resourceParams.pdwCmd = &(cmd.DW4.Value);
2705 resourceParams.dwLocationInCmd = 4;
2706 resourceParams.bIsWritable = true;
2707
2708 MHW_MI_CHK_STATUS(AddResourceToCmd(
2709 m_osInterface,
2710 cmdBuffer,
2711 &resourceParams));
2712
2713 uint32_t partitionSize = (params->dwPakIntermediateTokenSize / params->dwPartitions);
2714 cmd.DW7.IntermediateBufferPartition1Offset = MOS_ALIGN_CEIL(params->dwPakIntermediatePartition0Size, 64);
2715 cmd.DW8.IntermediateBufferPartition2Offset = MOS_ALIGN_CEIL(cmd.DW7.IntermediateBufferPartition1Offset + partitionSize, 64);
2716 cmd.DW9.IntermediateBufferPartition3Offset = MOS_ALIGN_CEIL(cmd.DW8.IntermediateBufferPartition2Offset + partitionSize, 64);
2717 cmd.DW10.IntermediateBufferPartition4Offset = MOS_ALIGN_CEIL(cmd.DW9.IntermediateBufferPartition3Offset + partitionSize, 64);
2718 cmd.DW11.IntermediateBufferPartition5Offset = MOS_ALIGN_CEIL(cmd.DW10.IntermediateBufferPartition4Offset + partitionSize, 64);
2719 cmd.DW12.IntermediateBufferPartition6Offset = MOS_ALIGN_CEIL(cmd.DW11.IntermediateBufferPartition5Offset + partitionSize, 64);
2720 cmd.DW13.IntermediateBufferPartition7Offset = MOS_ALIGN_CEIL(cmd.DW12.IntermediateBufferPartition6Offset + partitionSize, 64);
2721 cmd.DW14.IntermediateBufferPartition8Offset = MOS_ALIGN_CEIL(cmd.DW13.IntermediateBufferPartition7Offset + partitionSize, 64);
2722
2723 cmd.DW15.IntermediateBufferMaxSize = params->dwPakIntermediateTokenSize + params->dwPakIntermediatePartition0Size;
2724 }
2725
2726 if (params->presPakFinalFrameBuffer)
2727 {
2728 cmd.DW18.Value =
2729 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_MFC_INDIRECT_PAKBASE_OBJECT_CODEC].Value;
2730
2731 resourceParams.presResource = params->presPakFinalFrameBuffer;
2732 resourceParams.dwOffset = 0;
2733 resourceParams.pdwCmd = &(cmd.DW16.Value);
2734 resourceParams.dwLocationInCmd = 16;
2735 resourceParams.bIsWritable = true;
2736
2737 MHW_MI_CHK_STATUS(AddResourceToCmd(
2738 m_osInterface,
2739 cmdBuffer,
2740 &resourceParams));
2741 }
2742
2743 if (params->presCoeffProbsBuffer)
2744 {
2745 cmd.DW25.Value =
2746 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
2747
2748 resourceParams.presResource = params->presCoeffProbsBuffer;
2749 resourceParams.dwOffset = 0;
2750 resourceParams.pdwCmd = &(cmd.DW23.Value);
2751 resourceParams.dwLocationInCmd = 23;
2752 resourceParams.bIsWritable = true;
2753
2754 MHW_MI_CHK_STATUS(AddResourceToCmd(
2755 m_osInterface,
2756 cmdBuffer,
2757 &resourceParams));
2758 }
2759
2760 if (params->presTokenStatisticsBuffer)
2761 {
2762 cmd.DW28.Value =
2763 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
2764
2765 resourceParams.presResource = params->presTokenStatisticsBuffer;
2766 resourceParams.dwOffset = 0;
2767 resourceParams.pdwCmd = &(cmd.DW26.Value);
2768 resourceParams.dwLocationInCmd = 26;
2769 resourceParams.bIsWritable = true;
2770
2771 MHW_MI_CHK_STATUS(AddResourceToCmd(
2772 m_osInterface,
2773 cmdBuffer,
2774 &resourceParams));
2775 }
2776
2777 if (params->presBsdMpcRowStoreScratchBuffer)
2778 {
2779 cmd.DW31.Value =
2780 m_cacheabilitySettings[MOS_CODEC_RESOURCE_USAGE_BSDMPC_ROWSTORE_SCRATCH_BUFFER_CODEC].Value;
2781
2782 resourceParams.presResource = params->presBsdMpcRowStoreScratchBuffer;
2783 resourceParams.dwOffset = 0;
2784 resourceParams.pdwCmd = &(cmd.DW29_30.Value[0]);
2785 resourceParams.dwLocationInCmd = 29;
2786 resourceParams.bIsWritable = true;
2787
2788 MHW_MI_CHK_STATUS(AddResourceToCmd(
2789 m_osInterface,
2790 cmdBuffer,
2791 &resourceParams));
2792 }
2793
2794 MHW_MI_CHK_STATUS(Mos_AddCommand(cmdBuffer, &cmd, sizeof(cmd)));
2795
2796 return eStatus;
2797 }
2798
2799