1 /* 2 * Copyright (c) 2020-2021, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file decode_vp9_packet_single_m12.cpp 24 //! \brief Defines the interface for vp9 single decode packet of M12 25 //! 26 #include "decode_vp9_packet_single_m12.h" 27 #include "decode_utils.h" 28 #include "decode_vp9_pipeline.h" 29 #include "decode_vp9_basic_feature.h" 30 #include "decode_status_report_defs.h" 31 #include "mos_solo_generic.h" 32 #include "decode_status_report_defs.h" 33 #include "decode_resource_auto_lock.h" 34 #include "hal_oca_interface.h" 35 #include "mhw_mi_g12_X.h" 36 #include "mhw_vdbox_vdenc_g12_X.h" 37 38 namespace decode 39 { Submit(MOS_COMMAND_BUFFER * cmdBuffer,uint8_t packetPhase)40 MOS_STATUS Vp9DecodeSinglePktM12::Submit( 41 MOS_COMMAND_BUFFER* cmdBuffer, 42 uint8_t packetPhase) 43 { 44 DECODE_FUNC_CALL(); 45 46 PERF_UTILITY_AUTO(__FUNCTION__, PERF_DECODE, PERF_LEVEL_HAL); 47 48 DECODE_CHK_NULL(cmdBuffer); 49 DECODE_CHK_NULL(m_hwInterface); 50 51 DECODE_CHK_STATUS(m_picturePkt->SetPhase(m_phase)); 52 53 DECODE_CHK_STATUS(Mos_Solo_PreProcessDecode(m_osInterface, &m_vp9BasicFeature->m_destSurface)); 54 55 DECODE_CHK_STATUS(m_miInterface->SetWatchdogTimerThreshold(m_vp9BasicFeature->m_width, m_vp9BasicFeature->m_height, false)); 56 57 if (IsPrologRequired()) 58 { 59 DECODE_CHK_STATUS(AddForceWakeup(*cmdBuffer)); 60 DECODE_CHK_STATUS(SendPrologWithFrameTracking(*cmdBuffer, true)); 61 } 62 63 auto mmioRegisters = m_hwInterface->GetMfxInterface()->GetMmioRegisters(MHW_VDBOX_NODE_1); 64 HalOcaInterface::On1stLevelBBStart(*cmdBuffer, *m_osInterface->pOsContext, m_osInterface->CurrentGpuContextHandle, *m_miInterface, *mmioRegisters); 65 66 DECODE_CHK_STATUS(PackPictureLevelCmds(*cmdBuffer)); 67 DECODE_CHK_STATUS(PackSliceLevelCmds(*cmdBuffer)); 68 69 DECODE_CHK_STATUS(m_miInterface->AddMiBatchBufferEnd(cmdBuffer, nullptr)); 70 71 HalOcaInterface::On1stLevelBBEnd(*cmdBuffer, *m_osInterface); 72 73 DECODE_CHK_STATUS(m_allocator->SyncOnResource(&m_vp9BasicFeature->m_resDataBuffer, false)); 74 75 DECODE_CHK_STATUS(Mos_Solo_PostProcessDecode(m_osInterface, &m_vp9BasicFeature->m_destSurface)); 76 77 return MOS_STATUS_SUCCESS; 78 } 79 VdMemoryFlush(MOS_COMMAND_BUFFER & cmdBuffer)80 MOS_STATUS Vp9DecodeSinglePktM12::VdMemoryFlush(MOS_COMMAND_BUFFER &cmdBuffer) 81 { 82 MHW_MI_VD_CONTROL_STATE_PARAMS vdCtrlParam; 83 MOS_ZeroMemory(&vdCtrlParam, sizeof(MHW_MI_VD_CONTROL_STATE_PARAMS)); 84 vdCtrlParam.memoryImplicitFlush = true; 85 86 MhwMiInterfaceG12 *miInterfaceG12 = dynamic_cast<MhwMiInterfaceG12 *>(m_miInterface); 87 DECODE_CHK_NULL(miInterfaceG12); 88 DECODE_CHK_STATUS(miInterfaceG12->AddMiVdControlStateCmd(&cmdBuffer, &vdCtrlParam)); 89 90 return MOS_STATUS_SUCCESS; 91 } 92 VdPipelineFlush(MOS_COMMAND_BUFFER & cmdBuffer)93 MOS_STATUS Vp9DecodeSinglePktM12::VdPipelineFlush(MOS_COMMAND_BUFFER & cmdBuffer) 94 { 95 DECODE_FUNC_CALL(); 96 97 MHW_VDBOX_VD_PIPE_FLUSH_PARAMS_G12 vdpipeFlushParams; 98 MOS_ZeroMemory(&vdpipeFlushParams, sizeof(vdpipeFlushParams)); 99 vdpipeFlushParams.Flags.bWaitDoneHEVC = 1; 100 vdpipeFlushParams.Flags.bFlushHEVC = 1; 101 vdpipeFlushParams.Flags.bWaitDoneVDCmdMsgParser = 1; 102 DECODE_CHK_STATUS(m_vdencInterface->AddVdPipelineFlushCmd( 103 &cmdBuffer, (MHW_VDBOX_VD_PIPE_FLUSH_PARAMS*)&vdpipeFlushParams)); 104 105 return MOS_STATUS_SUCCESS; 106 } 107 PackPictureLevelCmds(MOS_COMMAND_BUFFER & cmdBuffer)108 MOS_STATUS Vp9DecodeSinglePktM12::PackPictureLevelCmds(MOS_COMMAND_BUFFER &cmdBuffer) 109 { 110 DECODE_FUNC_CALL(); 111 PERF_UTILITY_AUTO(__FUNCTION__, PERF_DECODE, PERF_LEVEL_HAL); 112 113 DECODE_CHK_STATUS(StartStatusReport(statusReportMfx, &cmdBuffer)); 114 DECODE_CHK_STATUS(m_picturePkt->Execute(cmdBuffer)); 115 116 return MOS_STATUS_SUCCESS; 117 } 118 PackSliceLevelCmds(MOS_COMMAND_BUFFER & cmdBuffer)119 MOS_STATUS Vp9DecodeSinglePktM12::PackSliceLevelCmds(MOS_COMMAND_BUFFER &cmdBuffer) 120 { 121 DECODE_FUNC_CALL(); 122 PERF_UTILITY_AUTO(__FUNCTION__, PERF_DECODE, PERF_LEVEL_HAL); 123 124 DECODE_CHK_STATUS(m_slicePkt->Execute(cmdBuffer, 0, 0)); 125 126 DECODE_CHK_STATUS(VdMemoryFlush(cmdBuffer)); 127 DECODE_CHK_STATUS(VdPipelineFlush(cmdBuffer)); 128 129 DECODE_CHK_STATUS(MiFlush(cmdBuffer)); 130 DECODE_CHK_STATUS(EndStatusReport(statusReportMfx, &cmdBuffer)); 131 DECODE_CHK_STATUS(UpdateStatusReport(statusReportGlobalCount, &cmdBuffer)); 132 DECODE_CHK_STATUS(MiFlush(cmdBuffer)); 133 134 return MOS_STATUS_SUCCESS; 135 } 136 137 } 138 139