1 /* 2 * mmx.h 3 * Copyright (C) 2000-2003 Michel Lespinasse <walken@zoy.org> 4 * Copyright (C) 1999-2000 Aaron Holtzman <aholtzma@ess.engr.uvic.ca> 5 * 6 * This file is part of mpeg2dec, a free MPEG-2 video stream decoder. 7 * See http://libmpeg2.sourceforge.net/ for updates. 8 * 9 * mpeg2dec is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * mpeg2dec is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24 #ifndef LIBMPEG2_MMX_H 25 #define LIBMPEG2_MMX_H 26 27 /* 28 * The type of an value that fits in an MMX register (note that long 29 * long constant values MUST be suffixed by LL and unsigned long long 30 * values by ULL, lest they be truncated by the compiler) 31 */ 32 33 typedef union { 34 long long q; /* Quadword (64-bit) value */ 35 unsigned long long uq; /* Unsigned Quadword */ 36 int d[2]; /* 2 Doubleword (32-bit) values */ 37 unsigned int ud[2]; /* 2 Unsigned Doubleword */ 38 short w[4]; /* 4 Word (16-bit) values */ 39 unsigned short uw[4]; /* 4 Unsigned Word */ 40 char b[8]; /* 8 Byte (8-bit) values */ 41 unsigned char ub[8]; /* 8 Unsigned Byte */ 42 float s[2]; /* Single-precision (32-bit) value */ 43 } ATTR_ALIGN(8) mmx_t; /* On an 8-byte (64-bit) boundary */ 44 45 46 #define mmx_i2r(op,imm,reg) \ 47 __asm__ __volatile__ (#op " %0, %%" #reg \ 48 : /* nothing */ \ 49 : "i" (imm) ) 50 51 #define mmx_m2r(op,mem,reg) \ 52 __asm__ __volatile__ (#op " %0, %%" #reg \ 53 : /* nothing */ \ 54 : "m" (mem)) 55 56 #define mmx_r2m(op,reg,mem) \ 57 __asm__ __volatile__ (#op " %%" #reg ", %0" \ 58 : "=m" (mem) \ 59 : /* nothing */ ) 60 61 #define mmx_r2r(op,regs,regd) \ 62 __asm__ __volatile__ (#op " %" #regs ", %" #regd) 63 64 65 #define emms() __asm__ __volatile__ ("emms") 66 67 #define movd_m2r(var,reg) mmx_m2r (movd, var, reg) 68 #define movd_r2m(reg,var) mmx_r2m (movd, reg, var) 69 #define movd_v2r(var,reg) __asm__ __volatile__ ("movd %0, %%" #reg \ 70 : /* nothing */ \ 71 : "rm" (var)) 72 #define movd_r2v(reg,var) __asm__ __volatile__ ("movd %%" #reg ", %0" \ 73 : "=rm" (var) \ 74 : /* nothing */ ) 75 76 #define movq_m2r(var,reg) mmx_m2r (movq, var, reg) 77 #define movq_r2m(reg,var) mmx_r2m (movq, reg, var) 78 #define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd) 79 80 #define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg) 81 #define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd) 82 #define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg) 83 #define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd) 84 85 #define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg) 86 #define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd) 87 88 #define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg) 89 #define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd) 90 #define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg) 91 #define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd) 92 #define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg) 93 #define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd) 94 95 #define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg) 96 #define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd) 97 #define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg) 98 #define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd) 99 100 #define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg) 101 #define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd) 102 #define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg) 103 #define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd) 104 105 #define pand_m2r(var,reg) mmx_m2r (pand, var, reg) 106 #define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd) 107 108 #define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg) 109 #define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd) 110 111 #define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg) 112 #define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd) 113 #define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg) 114 #define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd) 115 #define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg) 116 #define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd) 117 118 #define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg) 119 #define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd) 120 #define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg) 121 #define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd) 122 #define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg) 123 #define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd) 124 125 #define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg) 126 #define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd) 127 128 #define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg) 129 #define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd) 130 131 #define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg) 132 #define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd) 133 134 #define por_m2r(var,reg) mmx_m2r (por, var, reg) 135 #define por_r2r(regs,regd) mmx_r2r (por, regs, regd) 136 137 #define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg) 138 #define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg) 139 #define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd) 140 #define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg) 141 #define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg) 142 #define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd) 143 #define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg) 144 #define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg) 145 #define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd) 146 147 #define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg) 148 #define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg) 149 #define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd) 150 #define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg) 151 #define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg) 152 #define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd) 153 154 #define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg) 155 #define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg) 156 #define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd) 157 #define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg) 158 #define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg) 159 #define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd) 160 #define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg) 161 #define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg) 162 #define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd) 163 164 #define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg) 165 #define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd) 166 #define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg) 167 #define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd) 168 #define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg) 169 #define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd) 170 171 #define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg) 172 #define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd) 173 #define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg) 174 #define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd) 175 176 #define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg) 177 #define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd) 178 #define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg) 179 #define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd) 180 181 #define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg) 182 #define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd) 183 #define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg) 184 #define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd) 185 #define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg) 186 #define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd) 187 188 #define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg) 189 #define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd) 190 #define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg) 191 #define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd) 192 #define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg) 193 #define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd) 194 195 #define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg) 196 #define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd) 197 198 199 /* 3DNOW extensions */ 200 201 #define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg) 202 #define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd) 203 204 205 /* AMD MMX extensions - also available in intel SSE */ 206 207 208 #define mmx_m2ri(op,mem,reg,imm) \ 209 __asm__ __volatile__ (#op " %1, %0, %%" #reg \ 210 : /* nothing */ \ 211 : "m" (mem), "i" (imm)) 212 213 #define mmx_r2ri(op,regs,regd,imm) \ 214 __asm__ __volatile__ (#op " %0, %%" #regs ", %%" #regd \ 215 : /* nothing */ \ 216 : "i" (imm) ) 217 218 #define mmx_fetch(mem,hint) \ 219 __asm__ __volatile__ ("prefetch" #hint " %0" \ 220 : /* nothing */ \ 221 : "m" (mem)) 222 223 224 #define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg) 225 226 #define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var) 227 228 #define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg) 229 #define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd) 230 #define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg) 231 #define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd) 232 233 #define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm) 234 235 #define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm) 236 237 #define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg) 238 #define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd) 239 240 #define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg) 241 #define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd) 242 243 #define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg) 244 #define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd) 245 246 #define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg) 247 #define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd) 248 249 #define pmovmskb(mmreg,reg) \ 250 __asm__ __volatile__ ("movmskps %" #mmreg ", %" #reg) 251 252 #define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg) 253 #define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd) 254 255 #define prefetcht0(mem) mmx_fetch (mem, t0) 256 #define prefetcht1(mem) mmx_fetch (mem, t1) 257 #define prefetcht2(mem) mmx_fetch (mem, t2) 258 #define prefetchnta(mem) mmx_fetch (mem, nta) 259 260 #define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg) 261 #define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd) 262 263 264 /* SSE2 */ 265 266 typedef union { 267 long long q[2]; /* Quadword (64-bit) value */ 268 unsigned long long uq[2]; /* Unsigned Quadword */ 269 int d[4]; /* 2 Doubleword (32-bit) values */ 270 unsigned int ud[4]; /* 2 Unsigned Doubleword */ 271 short w[8]; /* 4 Word (16-bit) values */ 272 unsigned short uw[8]; /* 4 Unsigned Word */ 273 char b[16]; /* 8 Byte (8-bit) values */ 274 unsigned char ub[16]; /* 8 Unsigned Byte */ 275 float s[4]; /* Single-precision (32-bit) value */ 276 } ATTR_ALIGN(16) sse_t; /* On an 16-byte (128-bit) boundary */ 277 278 #define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg) 279 #define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var) 280 #define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd) 281 #define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg) 282 #define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var) 283 #define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd) 284 285 #define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm) 286 287 #define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm) 288 #define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm) 289 290 #define sfence() __asm__ __volatile__ ("sfence\n\t") 291 292 #endif /* LIBMPEG2_MMX_H */ 293