1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * AMD SEV header common between the guest and the hypervisor. 4 * 5 * Author: Brijesh Singh <brijesh.singh@amd.com> 6 */ 7 8 #ifndef __ASM_X86_SEV_COMMON_H 9 #define __ASM_X86_SEV_COMMON_H 10 11 #define GHCB_MSR_INFO_POS 0 12 #define GHCB_MSR_INFO_MASK (BIT_ULL(12) - 1) 13 14 #define GHCB_MSR_SEV_INFO_RESP 0x001 15 #define GHCB_MSR_SEV_INFO_REQ 0x002 16 #define GHCB_MSR_VER_MAX_POS 48 17 #define GHCB_MSR_VER_MAX_MASK 0xffff 18 #define GHCB_MSR_VER_MIN_POS 32 19 #define GHCB_MSR_VER_MIN_MASK 0xffff 20 #define GHCB_MSR_CBIT_POS 24 21 #define GHCB_MSR_CBIT_MASK 0xff 22 #define GHCB_MSR_SEV_INFO(_max, _min, _cbit) \ 23 ((((_max) & GHCB_MSR_VER_MAX_MASK) << GHCB_MSR_VER_MAX_POS) | \ 24 (((_min) & GHCB_MSR_VER_MIN_MASK) << GHCB_MSR_VER_MIN_POS) | \ 25 (((_cbit) & GHCB_MSR_CBIT_MASK) << GHCB_MSR_CBIT_POS) | \ 26 GHCB_MSR_SEV_INFO_RESP) 27 #define GHCB_MSR_INFO(v) ((v) & 0xfffUL) 28 #define GHCB_MSR_PROTO_MAX(v) (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK) 29 #define GHCB_MSR_PROTO_MIN(v) (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK) 30 31 #define GHCB_MSR_CPUID_REQ 0x004 32 #define GHCB_MSR_CPUID_RESP 0x005 33 #define GHCB_MSR_CPUID_FUNC_POS 32 34 #define GHCB_MSR_CPUID_FUNC_MASK 0xffffffff 35 #define GHCB_MSR_CPUID_VALUE_POS 32 36 #define GHCB_MSR_CPUID_VALUE_MASK 0xffffffff 37 #define GHCB_MSR_CPUID_REG_POS 30 38 #define GHCB_MSR_CPUID_REG_MASK 0x3 39 #define GHCB_CPUID_REQ_EAX 0 40 #define GHCB_CPUID_REQ_EBX 1 41 #define GHCB_CPUID_REQ_ECX 2 42 #define GHCB_CPUID_REQ_EDX 3 43 #define GHCB_CPUID_REQ(fn, reg) \ 44 (GHCB_MSR_CPUID_REQ | \ 45 (((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \ 46 (((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS)) 47 48 #define GHCB_MSR_TERM_REQ 0x100 49 #define GHCB_MSR_TERM_REASON_SET_POS 12 50 #define GHCB_MSR_TERM_REASON_SET_MASK 0xf 51 #define GHCB_MSR_TERM_REASON_POS 16 52 #define GHCB_MSR_TERM_REASON_MASK 0xff 53 #define GHCB_SEV_TERM_REASON(reason_set, reason_val) \ 54 (((((u64)reason_set) & GHCB_MSR_TERM_REASON_SET_MASK) << GHCB_MSR_TERM_REASON_SET_POS) | \ 55 ((((u64)reason_val) & GHCB_MSR_TERM_REASON_MASK) << GHCB_MSR_TERM_REASON_POS)) 56 57 #define GHCB_SEV_ES_REASON_GENERAL_REQUEST 0 58 #define GHCB_SEV_ES_REASON_PROTOCOL_UNSUPPORTED 1 59 60 #define GHCB_RESP_CODE(v) ((v) & GHCB_MSR_INFO_MASK) 61 62 #endif 63