1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Zoran zr36057/zr36067 PCI controller driver, for the
4 * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
5 * Media Labs LML33/LML33R10.
6 *
7 * This part handles card-specific data and detection
8 *
9 * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
10 */
11
12 #include <linux/delay.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16
17 #include <linux/i2c.h>
18 #include <linux/i2c-algo-bit.h>
19 #include <linux/videodev2.h>
20 #include <linux/spinlock.h>
21
22 #include <linux/pci.h>
23 #include <linux/interrupt.h>
24 #include <linux/io.h>
25 #include <media/v4l2-common.h>
26 #include <media/i2c/bt819.h>
27
28 #include "videocodec.h"
29 #include "zoran.h"
30 #include "zoran_card.h"
31 #include "zoran_device.h"
32
33 extern const struct zoran_format zoran_formats[];
34
35 static int card[BUZ_MAX] = { [0 ... (BUZ_MAX - 1)] = -1 };
36 module_param_array(card, int, NULL, 0444);
37 MODULE_PARM_DESC(card, "Card type");
38
39 /*
40 * The video mem address of the video card. The driver has a little database for some videocards
41 * to determine it from there. If your video card is not in there you have either to give it to
42 * the driver as a parameter or set in in a VIDIOCSFBUF ioctl
43 */
44
45 static unsigned long vidmem; /* default = 0 - Video memory base address */
46 module_param_hw(vidmem, ulong, iomem, 0444);
47 MODULE_PARM_DESC(vidmem, "Default video memory base address");
48
49 /* Default input and video norm at startup of the driver. */
50
51 static unsigned int default_input; /* default 0 = Composite, 1 = S-Video */
52 module_param(default_input, uint, 0444);
53 MODULE_PARM_DESC(default_input,
54 "Default input (0=Composite, 1=S-Video, 2=Internal)");
55
56 static int default_mux = 1; /* 6 Eyes input selection */
57 module_param(default_mux, int, 0644);
58 MODULE_PARM_DESC(default_mux,
59 "Default 6 Eyes mux setting (Input selection)");
60
61 static int default_norm; /* default 0 = PAL, 1 = NTSC 2 = SECAM */
62 module_param(default_norm, int, 0444);
63 MODULE_PARM_DESC(default_norm, "Default norm (0=PAL, 1=NTSC, 2=SECAM)");
64
65 /* /dev/videoN, -1 for autodetect */
66 static int video_nr[BUZ_MAX] = { [0 ... (BUZ_MAX - 1)] = -1 };
67 module_param_array(video_nr, int, NULL, 0444);
68 MODULE_PARM_DESC(video_nr, "Video device number (-1=Auto)");
69
70 int v4l_nbufs = 4;
71 int v4l_bufsize = 864; /* Everybody should be able to work with this setting */
72 module_param(v4l_nbufs, int, 0644);
73 MODULE_PARM_DESC(v4l_nbufs, "Maximum number of V4L buffers to use");
74 module_param(v4l_bufsize, int, 0644);
75 MODULE_PARM_DESC(v4l_bufsize, "Maximum size per V4L buffer (in kB)");
76
77 int jpg_nbufs = 32;
78 int jpg_bufsize = 512; /* max size for 100% quality full-PAL frame */
79 module_param(jpg_nbufs, int, 0644);
80 MODULE_PARM_DESC(jpg_nbufs, "Maximum number of JPG buffers to use");
81 module_param(jpg_bufsize, int, 0644);
82 MODULE_PARM_DESC(jpg_bufsize, "Maximum size per JPG buffer (in kB)");
83
84 /* 1=Pass through TV signal when device is not used */
85 /* 0=Show color bar when device is not used (LML33: only if lml33dpath=1) */
86 int pass_through;
87 module_param(pass_through, int, 0644);
88 MODULE_PARM_DESC(pass_through,
89 "Pass TV signal through to TV-out when idling");
90
91 int zr36067_debug = 1;
92 module_param_named(debug, zr36067_debug, int, 0644);
93 MODULE_PARM_DESC(debug, "Debug level (0-5)");
94
95 #define ZORAN_VERSION "0.10.1"
96
97 MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver");
98 MODULE_AUTHOR("Serguei Miridonov");
99 MODULE_LICENSE("GPL");
100 MODULE_VERSION(ZORAN_VERSION);
101
102 #define ZR_DEVICE(subven, subdev, data) { \
103 .vendor = PCI_VENDOR_ID_ZORAN, .device = PCI_DEVICE_ID_ZORAN_36057, \
104 .subvendor = (subven), .subdevice = (subdev), .driver_data = (data) }
105
106 static const struct pci_device_id zr36067_pci_tbl[] = {
107 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC10PLUS, DC10_PLUS),
108 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC30PLUS, DC30_PLUS),
109 ZR_DEVICE(PCI_VENDOR_ID_ELECTRONICDESIGNGMBH, PCI_DEVICE_ID_LML_33R10, LML33R10),
110 ZR_DEVICE(PCI_VENDOR_ID_IOMEGA, PCI_DEVICE_ID_IOMEGA_BUZ, BUZ),
111 ZR_DEVICE(PCI_ANY_ID, PCI_ANY_ID, NUM_CARDS),
112 {0}
113 };
114 MODULE_DEVICE_TABLE(pci, zr36067_pci_tbl);
115
116 static unsigned int zoran_num; /* number of cards found */
117
118 /* videocodec bus functions ZR36060 */
zr36060_read(struct videocodec * codec,u16 reg)119 static u32 zr36060_read(struct videocodec *codec, u16 reg)
120 {
121 struct zoran *zr = (struct zoran *)codec->master_data->data;
122 __u32 data;
123
124 if (post_office_wait(zr) || post_office_write(zr, 0, 1, reg >> 8) ||
125 post_office_write(zr, 0, 2, reg & 0xff))
126 return -1;
127
128 data = post_office_read(zr, 0, 3) & 0xff;
129 return data;
130 }
131
zr36060_write(struct videocodec * codec,u16 reg,u32 val)132 static void zr36060_write(struct videocodec *codec, u16 reg, u32 val)
133 {
134 struct zoran *zr = (struct zoran *)codec->master_data->data;
135
136 if (post_office_wait(zr) || post_office_write(zr, 0, 1, reg >> 8) ||
137 post_office_write(zr, 0, 2, reg & 0xff))
138 return;
139
140 post_office_write(zr, 0, 3, val & 0xff);
141 }
142
143 /* videocodec bus functions ZR36050 */
zr36050_read(struct videocodec * codec,u16 reg)144 static u32 zr36050_read(struct videocodec *codec, u16 reg)
145 {
146 struct zoran *zr = (struct zoran *)codec->master_data->data;
147 __u32 data;
148
149 if (post_office_wait(zr) || post_office_write(zr, 1, 0, reg >> 2)) // reg. HIGHBYTES
150 return -1;
151
152 data = post_office_read(zr, 0, reg & 0x03) & 0xff; // reg. LOWBYTES + read
153 return data;
154 }
155
zr36050_write(struct videocodec * codec,u16 reg,u32 val)156 static void zr36050_write(struct videocodec *codec, u16 reg, u32 val)
157 {
158 struct zoran *zr = (struct zoran *)codec->master_data->data;
159
160 if (post_office_wait(zr) || post_office_write(zr, 1, 0, reg >> 2)) // reg. HIGHBYTES
161 return;
162
163 post_office_write(zr, 0, reg & 0x03, val & 0xff); // reg. LOWBYTES + wr. data
164 }
165
166 /* videocodec bus functions ZR36016 */
zr36016_read(struct videocodec * codec,u16 reg)167 static u32 zr36016_read(struct videocodec *codec, u16 reg)
168 {
169 struct zoran *zr = (struct zoran *)codec->master_data->data;
170 __u32 data;
171
172 if (post_office_wait(zr))
173 return -1;
174
175 data = post_office_read(zr, 2, reg & 0x03) & 0xff; // read
176 return data;
177 }
178
179 /* hack for in zoran_device.c */
zr36016_write(struct videocodec * codec,u16 reg,u32 val)180 void zr36016_write(struct videocodec *codec, u16 reg, u32 val)
181 {
182 struct zoran *zr = (struct zoran *)codec->master_data->data;
183
184 if (post_office_wait(zr))
185 return;
186
187 post_office_write(zr, 2, reg & 0x03, val & 0x0ff); // wr. data
188 }
189
190 /*
191 * Board specific information
192 */
193
dc10_init(struct zoran * zr)194 static void dc10_init(struct zoran *zr)
195 {
196 pci_dbg(zr->pci_dev, "%s\n", __func__);
197
198 /* Pixel clock selection */
199 GPIO(zr, 4, 0);
200 GPIO(zr, 5, 1);
201 /* Enable the video bus sync signals */
202 GPIO(zr, 7, 0);
203 }
204
dc10plus_init(struct zoran * zr)205 static void dc10plus_init(struct zoran *zr)
206 {
207 pci_dbg(zr->pci_dev, "%s\n", __func__);
208 }
209
buz_init(struct zoran * zr)210 static void buz_init(struct zoran *zr)
211 {
212 pci_dbg(zr->pci_dev, "%s\n", __func__);
213
214 /* some stuff from Iomega */
215 pci_write_config_dword(zr->pci_dev, 0xfc, 0x90680f15);
216 pci_write_config_dword(zr->pci_dev, 0x0c, 0x00012020);
217 pci_write_config_dword(zr->pci_dev, 0xe8, 0xc0200000);
218 }
219
lml33_init(struct zoran * zr)220 static void lml33_init(struct zoran *zr)
221 {
222 pci_dbg(zr->pci_dev, "%s\n", __func__);
223
224 GPIO(zr, 2, 1); // Set Composite input/output
225 }
226
avs6eyes_init(struct zoran * zr)227 static void avs6eyes_init(struct zoran *zr)
228 {
229 // AverMedia 6-Eyes original driver by Christer Weinigel
230
231 // Lifted straight from Christer's old driver and
232 // modified slightly by Martin Samuelsson.
233
234 int mux = default_mux; /* 1 = BT866, 7 = VID1 */
235
236 GPIO(zr, 4, 1); /* Bt866 SLEEP on */
237 udelay(2);
238
239 GPIO(zr, 0, 1); /* ZR36060 /RESET on */
240 GPIO(zr, 1, 0); /* ZR36060 /SLEEP on */
241 GPIO(zr, 2, mux & 1); /* MUX S0 */
242 GPIO(zr, 3, 0); /* /FRAME on */
243 GPIO(zr, 4, 0); /* Bt866 SLEEP off */
244 GPIO(zr, 5, mux & 2); /* MUX S1 */
245 GPIO(zr, 6, 0); /* ? */
246 GPIO(zr, 7, mux & 4); /* MUX S2 */
247 }
248
codecid_to_modulename(u16 codecid)249 static const char *codecid_to_modulename(u16 codecid)
250 {
251 const char *name = NULL;
252
253 switch (codecid) {
254 case CODEC_TYPE_ZR36060:
255 name = "zr36060";
256 break;
257 case CODEC_TYPE_ZR36050:
258 name = "zr36050";
259 break;
260 case CODEC_TYPE_ZR36016:
261 name = "zr36016";
262 break;
263 }
264
265 return name;
266 }
267
268 // struct tvnorm {
269 // u16 wt, wa, h_start, h_sync_start, ht, ha, v_start;
270 // };
271
272 static const struct tvnorm f50sqpixel = { 944, 768, 83, 880, 625, 576, 16 };
273 static const struct tvnorm f60sqpixel = { 780, 640, 51, 716, 525, 480, 12 };
274 static const struct tvnorm f50ccir601 = { 864, 720, 75, 804, 625, 576, 18 };
275 static const struct tvnorm f60ccir601 = { 858, 720, 57, 788, 525, 480, 16 };
276
277 static const struct tvnorm f50ccir601_lml33 = { 864, 720, 75 + 34, 804, 625, 576, 18 };
278 static const struct tvnorm f60ccir601_lml33 = { 858, 720, 57 + 34, 788, 525, 480, 16 };
279
280 /* The DC10 (57/16/50) uses VActive as HSync, so h_start must be 0 */
281 static const struct tvnorm f50sqpixel_dc10 = { 944, 768, 0, 880, 625, 576, 0 };
282 static const struct tvnorm f60sqpixel_dc10 = { 780, 640, 0, 716, 525, 480, 12 };
283
284 /*
285 * FIXME: I cannot swap U and V in saa7114, so i do one pixel left shift in zoran (75 -> 74)
286 * (Maxim Yevtyushkin <max@linuxmedialabs.com>)
287 */
288 static const struct tvnorm f50ccir601_lm33r10 = { 864, 720, 74 + 54, 804, 625, 576, 18 };
289 static const struct tvnorm f60ccir601_lm33r10 = { 858, 720, 56 + 54, 788, 525, 480, 16 };
290
291 /*
292 * FIXME: The ks0127 seem incapable of swapping U and V, too, which is why I copy Maxim's left
293 * shift hack for the 6 Eyes.
294 *
295 * Christer's driver used the unshifted norms, though...
296 * /Sam
297 */
298 static const struct tvnorm f50ccir601_avs6eyes = { 864, 720, 74, 804, 625, 576, 18 };
299 static const struct tvnorm f60ccir601_avs6eyes = { 858, 720, 56, 788, 525, 480, 16 };
300
301 static const unsigned short vpx3220_addrs[] = { 0x43, 0x47, I2C_CLIENT_END };
302 static const unsigned short saa7110_addrs[] = { 0x4e, 0x4f, I2C_CLIENT_END };
303 static const unsigned short saa7111_addrs[] = { 0x25, 0x24, I2C_CLIENT_END };
304 static const unsigned short saa7114_addrs[] = { 0x21, 0x20, I2C_CLIENT_END };
305 static const unsigned short adv717x_addrs[] = { 0x6a, 0x6b, 0x2a, 0x2b, I2C_CLIENT_END };
306 static const unsigned short ks0127_addrs[] = { 0x6c, 0x6d, I2C_CLIENT_END };
307 static const unsigned short saa7185_addrs[] = { 0x44, I2C_CLIENT_END };
308 static const unsigned short bt819_addrs[] = { 0x45, I2C_CLIENT_END };
309 static const unsigned short bt856_addrs[] = { 0x44, I2C_CLIENT_END };
310 static const unsigned short bt866_addrs[] = { 0x44, I2C_CLIENT_END };
311
312 static struct card_info zoran_cards[NUM_CARDS] = {
313 {
314 .type = DC10_OLD,
315 .name = "DC10(old)",
316 .i2c_decoder = "vpx3220a",
317 .addrs_decoder = vpx3220_addrs,
318 .video_codec = CODEC_TYPE_ZR36050,
319 .video_vfe = CODEC_TYPE_ZR36016,
320
321 .inputs = 3,
322 .input = {
323 { 1, "Composite" },
324 { 2, "S-Video" },
325 { 0, "Internal/comp" }
326 },
327 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
328 .tvn = {
329 &f50sqpixel_dc10,
330 &f60sqpixel_dc10,
331 &f50sqpixel_dc10
332 },
333 .jpeg_int = 0,
334 .vsync_int = ZR36057_ISR_GIRQ1,
335 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
336 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
337 .gpcs = { -1, 0 },
338 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
339 .gws_not_connected = 0,
340 .input_mux = 0,
341 .init = &dc10_init,
342 }, {
343 .type = DC10_NEW,
344 .name = "DC10(new)",
345 .i2c_decoder = "saa7110",
346 .addrs_decoder = saa7110_addrs,
347 .i2c_encoder = "adv7175",
348 .addrs_encoder = adv717x_addrs,
349 .video_codec = CODEC_TYPE_ZR36060,
350
351 .inputs = 3,
352 .input = {
353 { 0, "Composite" },
354 { 7, "S-Video" },
355 { 5, "Internal/comp" }
356 },
357 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
358 .tvn = {
359 &f50sqpixel,
360 &f60sqpixel,
361 &f50sqpixel},
362 .jpeg_int = ZR36057_ISR_GIRQ0,
363 .vsync_int = ZR36057_ISR_GIRQ1,
364 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
365 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
366 .gpcs = { -1, 1},
367 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
368 .gws_not_connected = 0,
369 .input_mux = 0,
370 .init = &dc10plus_init,
371 }, {
372 .type = DC10_PLUS,
373 .name = "DC10_PLUS",
374 .i2c_decoder = "saa7110",
375 .addrs_decoder = saa7110_addrs,
376 .i2c_encoder = "adv7175",
377 .addrs_encoder = adv717x_addrs,
378 .video_codec = CODEC_TYPE_ZR36060,
379
380 .inputs = 3,
381 .input = {
382 { 0, "Composite" },
383 { 7, "S-Video" },
384 { 5, "Internal/comp" }
385 },
386 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
387 .tvn = {
388 &f50sqpixel,
389 &f60sqpixel,
390 &f50sqpixel
391 },
392 .jpeg_int = ZR36057_ISR_GIRQ0,
393 .vsync_int = ZR36057_ISR_GIRQ1,
394 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
395 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
396 .gpcs = { -1, 1 },
397 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
398 .gws_not_connected = 0,
399 .input_mux = 0,
400 .init = &dc10plus_init,
401 }, {
402 .type = DC30,
403 .name = "DC30",
404 .i2c_decoder = "vpx3220a",
405 .addrs_decoder = vpx3220_addrs,
406 .i2c_encoder = "adv7175",
407 .addrs_encoder = adv717x_addrs,
408 .video_codec = CODEC_TYPE_ZR36050,
409 .video_vfe = CODEC_TYPE_ZR36016,
410
411 .inputs = 3,
412 .input = {
413 { 1, "Composite" },
414 { 2, "S-Video" },
415 { 0, "Internal/comp" }
416 },
417 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
418 .tvn = {
419 &f50sqpixel_dc10,
420 &f60sqpixel_dc10,
421 &f50sqpixel_dc10
422 },
423 .jpeg_int = 0,
424 .vsync_int = ZR36057_ISR_GIRQ1,
425 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
426 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
427 .gpcs = { -1, 0 },
428 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
429 .gws_not_connected = 0,
430 .input_mux = 0,
431 .init = &dc10_init,
432 }, {
433 .type = DC30_PLUS,
434 .name = "DC30_PLUS",
435 .i2c_decoder = "vpx3220a",
436 .addrs_decoder = vpx3220_addrs,
437 .i2c_encoder = "adv7175",
438 .addrs_encoder = adv717x_addrs,
439 .video_codec = CODEC_TYPE_ZR36050,
440 .video_vfe = CODEC_TYPE_ZR36016,
441
442 .inputs = 3,
443 .input = {
444 { 1, "Composite" },
445 { 2, "S-Video" },
446 { 0, "Internal/comp" }
447 },
448 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
449 .tvn = {
450 &f50sqpixel_dc10,
451 &f60sqpixel_dc10,
452 &f50sqpixel_dc10
453 },
454 .jpeg_int = 0,
455 .vsync_int = ZR36057_ISR_GIRQ1,
456 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
457 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
458 .gpcs = { -1, 0 },
459 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
460 .gws_not_connected = 0,
461 .input_mux = 0,
462 .init = &dc10_init,
463 }, {
464 .type = LML33,
465 .name = "LML33",
466 .i2c_decoder = "bt819a",
467 .addrs_decoder = bt819_addrs,
468 .i2c_encoder = "bt856",
469 .addrs_encoder = bt856_addrs,
470 .video_codec = CODEC_TYPE_ZR36060,
471
472 .inputs = 2,
473 .input = {
474 { 0, "Composite" },
475 { 7, "S-Video" }
476 },
477 .norms = V4L2_STD_NTSC | V4L2_STD_PAL,
478 .tvn = {
479 &f50ccir601_lml33,
480 &f60ccir601_lml33,
481 NULL
482 },
483 .jpeg_int = ZR36057_ISR_GIRQ1,
484 .vsync_int = ZR36057_ISR_GIRQ0,
485 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
486 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
487 .gpcs = { 3, 1 },
488 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
489 .gws_not_connected = 1,
490 .input_mux = 0,
491 .init = &lml33_init,
492 }, {
493 .type = LML33R10,
494 .name = "LML33R10",
495 .i2c_decoder = "saa7114",
496 .addrs_decoder = saa7114_addrs,
497 .i2c_encoder = "adv7170",
498 .addrs_encoder = adv717x_addrs,
499 .video_codec = CODEC_TYPE_ZR36060,
500
501 .inputs = 2,
502 .input = {
503 { 0, "Composite" },
504 { 7, "S-Video" }
505 },
506 .norms = V4L2_STD_NTSC | V4L2_STD_PAL,
507 .tvn = {
508 &f50ccir601_lm33r10,
509 &f60ccir601_lm33r10,
510 NULL
511 },
512 .jpeg_int = ZR36057_ISR_GIRQ1,
513 .vsync_int = ZR36057_ISR_GIRQ0,
514 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
515 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
516 .gpcs = { 3, 1 },
517 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
518 .gws_not_connected = 1,
519 .input_mux = 0,
520 .init = &lml33_init,
521 }, {
522 .type = BUZ,
523 .name = "Buz",
524 .i2c_decoder = "saa7111",
525 .addrs_decoder = saa7111_addrs,
526 .i2c_encoder = "saa7185",
527 .addrs_encoder = saa7185_addrs,
528 .video_codec = CODEC_TYPE_ZR36060,
529
530 .inputs = 2,
531 .input = {
532 { 3, "Composite" },
533 { 7, "S-Video" }
534 },
535 .norms = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM,
536 .tvn = {
537 &f50ccir601,
538 &f60ccir601,
539 &f50ccir601
540 },
541 .jpeg_int = ZR36057_ISR_GIRQ1,
542 .vsync_int = ZR36057_ISR_GIRQ0,
543 .gpio = { 1, -1, 3, -1, -1, -1, -1, -1 },
544 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
545 .gpcs = { 3, 1 },
546 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
547 .gws_not_connected = 1,
548 .input_mux = 0,
549 .init = &buz_init,
550 }, {
551 .type = AVS6EYES,
552 .name = "6-Eyes",
553 /* AverMedia chose not to brand the 6-Eyes. Thus it can't be autodetected, and requires card=x. */
554 .i2c_decoder = "ks0127",
555 .addrs_decoder = ks0127_addrs,
556 .i2c_encoder = "bt866",
557 .addrs_encoder = bt866_addrs,
558 .video_codec = CODEC_TYPE_ZR36060,
559
560 .inputs = 10,
561 .input = {
562 { 0, "Composite 1" },
563 { 1, "Composite 2" },
564 { 2, "Composite 3" },
565 { 4, "Composite 4" },
566 { 5, "Composite 5" },
567 { 6, "Composite 6" },
568 { 8, "S-Video 1" },
569 { 9, "S-Video 2" },
570 {10, "S-Video 3" },
571 {15, "YCbCr" }
572 },
573 .norms = V4L2_STD_NTSC | V4L2_STD_PAL,
574 .tvn = {
575 &f50ccir601_avs6eyes,
576 &f60ccir601_avs6eyes,
577 NULL
578 },
579 .jpeg_int = ZR36057_ISR_GIRQ1,
580 .vsync_int = ZR36057_ISR_GIRQ0,
581 .gpio = { 1, 0, 3, -1, -1, -1, -1, -1 },// Validity unknown /Sam
582 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 }, // Validity unknown /Sam
583 .gpcs = { 3, 1 }, // Validity unknown /Sam
584 .vfe_pol = { 1, 0, 0, 0, 0, 1, 0, 0 }, // Validity unknown /Sam
585 .gws_not_connected = 1,
586 .input_mux = 1,
587 .init = &avs6eyes_init,
588 }
589
590 };
591
592 /*
593 * I2C functions
594 */
595 /* software I2C functions */
zoran_i2c_getsda(void * data)596 static int zoran_i2c_getsda(void *data)
597 {
598 struct zoran *zr = (struct zoran *)data;
599
600 return (btread(ZR36057_I2CBR) >> 1) & 1;
601 }
602
zoran_i2c_getscl(void * data)603 static int zoran_i2c_getscl(void *data)
604 {
605 struct zoran *zr = (struct zoran *)data;
606
607 return btread(ZR36057_I2CBR) & 1;
608 }
609
zoran_i2c_setsda(void * data,int state)610 static void zoran_i2c_setsda(void *data, int state)
611 {
612 struct zoran *zr = (struct zoran *)data;
613
614 if (state)
615 zr->i2cbr |= 2;
616 else
617 zr->i2cbr &= ~2;
618 btwrite(zr->i2cbr, ZR36057_I2CBR);
619 }
620
zoran_i2c_setscl(void * data,int state)621 static void zoran_i2c_setscl(void *data, int state)
622 {
623 struct zoran *zr = (struct zoran *)data;
624
625 if (state)
626 zr->i2cbr |= 1;
627 else
628 zr->i2cbr &= ~1;
629 btwrite(zr->i2cbr, ZR36057_I2CBR);
630 }
631
632 static const struct i2c_algo_bit_data zoran_i2c_bit_data_template = {
633 .setsda = zoran_i2c_setsda,
634 .setscl = zoran_i2c_setscl,
635 .getsda = zoran_i2c_getsda,
636 .getscl = zoran_i2c_getscl,
637 .udelay = 10,
638 .timeout = 100,
639 };
640
zoran_register_i2c(struct zoran * zr)641 static int zoran_register_i2c(struct zoran *zr)
642 {
643 zr->i2c_algo = zoran_i2c_bit_data_template;
644 zr->i2c_algo.data = zr;
645 strscpy(zr->i2c_adapter.name, ZR_DEVNAME(zr),
646 sizeof(zr->i2c_adapter.name));
647 i2c_set_adapdata(&zr->i2c_adapter, &zr->v4l2_dev);
648 zr->i2c_adapter.algo_data = &zr->i2c_algo;
649 zr->i2c_adapter.dev.parent = &zr->pci_dev->dev;
650 return i2c_bit_add_bus(&zr->i2c_adapter);
651 }
652
zoran_unregister_i2c(struct zoran * zr)653 static void zoran_unregister_i2c(struct zoran *zr)
654 {
655 i2c_del_adapter(&zr->i2c_adapter);
656 }
657
658 /* Check a zoran_params struct for correctness, insert default params */
zoran_check_jpg_settings(struct zoran * zr,struct zoran_jpg_settings * settings,int try)659 int zoran_check_jpg_settings(struct zoran *zr,
660 struct zoran_jpg_settings *settings, int try)
661 {
662 int err = 0, err0 = 0;
663
664 pci_dbg(zr->pci_dev, "%s - dec: %d, Hdcm: %d, Vdcm: %d, Tdcm: %d\n",
665 __func__, settings->decimation, settings->hor_dcm,
666 settings->ver_dcm, settings->tmp_dcm);
667 pci_dbg(zr->pci_dev, "%s - x: %d, y: %d, w: %d, y: %d\n", __func__,
668 settings->img_x, settings->img_y,
669 settings->img_width, settings->img_height);
670 /* Check decimation, set default values for decimation = 1, 2, 4 */
671 switch (settings->decimation) {
672 case 1:
673
674 settings->hor_dcm = 1;
675 settings->ver_dcm = 1;
676 settings->tmp_dcm = 1;
677 settings->field_per_buff = 2;
678 settings->img_x = 0;
679 settings->img_y = 0;
680 settings->img_width = BUZ_MAX_WIDTH;
681 settings->img_height = BUZ_MAX_HEIGHT / 2;
682 break;
683 case 2:
684
685 settings->hor_dcm = 2;
686 settings->ver_dcm = 1;
687 settings->tmp_dcm = 2;
688 settings->field_per_buff = 1;
689 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
690 settings->img_y = 0;
691 settings->img_width =
692 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
693 settings->img_height = BUZ_MAX_HEIGHT / 2;
694 break;
695 case 4:
696
697 if (zr->card.type == DC10_NEW) {
698 pci_dbg(zr->pci_dev, "%s - HDec by 4 is not supported on the DC10\n", __func__);
699 err0++;
700 break;
701 }
702
703 settings->hor_dcm = 4;
704 settings->ver_dcm = 2;
705 settings->tmp_dcm = 2;
706 settings->field_per_buff = 1;
707 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
708 settings->img_y = 0;
709 settings->img_width =
710 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
711 settings->img_height = BUZ_MAX_HEIGHT / 2;
712 break;
713 case 0:
714
715 /* We have to check the data the user has set */
716
717 if (settings->hor_dcm != 1 && settings->hor_dcm != 2 &&
718 (zr->card.type == DC10_NEW || settings->hor_dcm != 4)) {
719 settings->hor_dcm = clamp(settings->hor_dcm, 1, 2);
720 err0++;
721 }
722 if (settings->ver_dcm != 1 && settings->ver_dcm != 2) {
723 settings->ver_dcm = clamp(settings->ver_dcm, 1, 2);
724 err0++;
725 }
726 if (settings->tmp_dcm != 1 && settings->tmp_dcm != 2) {
727 settings->tmp_dcm = clamp(settings->tmp_dcm, 1, 2);
728 err0++;
729 }
730 if (settings->field_per_buff != 1 &&
731 settings->field_per_buff != 2) {
732 settings->field_per_buff = clamp(settings->field_per_buff, 1, 2);
733 err0++;
734 }
735 if (settings->img_x < 0) {
736 settings->img_x = 0;
737 err0++;
738 }
739 if (settings->img_y < 0) {
740 settings->img_y = 0;
741 err0++;
742 }
743 if (settings->img_width < 0 || settings->img_width > BUZ_MAX_WIDTH) {
744 settings->img_width = clamp(settings->img_width, 0, (int)BUZ_MAX_WIDTH);
745 err0++;
746 }
747 if (settings->img_height < 0 || settings->img_height > BUZ_MAX_HEIGHT / 2) {
748 settings->img_height = clamp(settings->img_height, 0, BUZ_MAX_HEIGHT / 2);
749 err0++;
750 }
751 if (settings->img_x + settings->img_width > BUZ_MAX_WIDTH) {
752 settings->img_x = BUZ_MAX_WIDTH - settings->img_width;
753 err0++;
754 }
755 if (settings->img_y + settings->img_height > BUZ_MAX_HEIGHT / 2) {
756 settings->img_y = BUZ_MAX_HEIGHT / 2 - settings->img_height;
757 err0++;
758 }
759 if (settings->img_width % (16 * settings->hor_dcm) != 0) {
760 settings->img_width -= settings->img_width % (16 * settings->hor_dcm);
761 if (settings->img_width == 0)
762 settings->img_width = 16 * settings->hor_dcm;
763 err0++;
764 }
765 if (settings->img_height % (8 * settings->ver_dcm) != 0) {
766 settings->img_height -= settings->img_height % (8 * settings->ver_dcm);
767 if (settings->img_height == 0)
768 settings->img_height = 8 * settings->ver_dcm;
769 err0++;
770 }
771
772 if (!try && err0) {
773 pci_err(zr->pci_dev, "%s - error in params for decimation = 0\n", __func__);
774 err++;
775 }
776 break;
777 default:
778 pci_err(zr->pci_dev, "%s - decimation = %d, must be 0, 1, 2 or 4\n",
779 __func__, settings->decimation);
780 err++;
781 break;
782 }
783
784 if (settings->jpg_comp.quality > 100)
785 settings->jpg_comp.quality = 100;
786 if (settings->jpg_comp.quality < 5)
787 settings->jpg_comp.quality = 5;
788 if (settings->jpg_comp.APPn < 0)
789 settings->jpg_comp.APPn = 0;
790 if (settings->jpg_comp.APPn > 15)
791 settings->jpg_comp.APPn = 15;
792 if (settings->jpg_comp.APP_len < 0)
793 settings->jpg_comp.APP_len = 0;
794 if (settings->jpg_comp.APP_len > 60)
795 settings->jpg_comp.APP_len = 60;
796 if (settings->jpg_comp.COM_len < 0)
797 settings->jpg_comp.COM_len = 0;
798 if (settings->jpg_comp.COM_len > 60)
799 settings->jpg_comp.COM_len = 60;
800 if (err)
801 return -EINVAL;
802 return 0;
803 }
804
zoran_open_init_params(struct zoran * zr)805 void zoran_open_init_params(struct zoran *zr)
806 {
807 int i;
808
809 zr->v4l_settings.width = 192;
810 zr->v4l_settings.height = 144;
811 zr->v4l_settings.format = &zoran_formats[7]; /* YUY2 - YUV-4:2:2 packed */
812 zr->v4l_settings.bytesperline = zr->v4l_settings.width *
813 ((zr->v4l_settings.format->depth + 7) / 8);
814
815 /* Set necessary params and call zoran_check_jpg_settings to set the defaults */
816 zr->jpg_settings.decimation = 1;
817 zr->jpg_settings.jpg_comp.quality = 50; /* default compression factor 8 */
818 if (zr->card.type != BUZ)
819 zr->jpg_settings.odd_even = 1;
820 else
821 zr->jpg_settings.odd_even = 0;
822 zr->jpg_settings.jpg_comp.APPn = 0;
823 zr->jpg_settings.jpg_comp.APP_len = 0; /* No APPn marker */
824 memset(zr->jpg_settings.jpg_comp.APP_data, 0,
825 sizeof(zr->jpg_settings.jpg_comp.APP_data));
826 zr->jpg_settings.jpg_comp.COM_len = 0; /* No COM marker */
827 memset(zr->jpg_settings.jpg_comp.COM_data, 0,
828 sizeof(zr->jpg_settings.jpg_comp.COM_data));
829 zr->jpg_settings.jpg_comp.jpeg_markers =
830 V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT;
831 i = zoran_check_jpg_settings(zr, &zr->jpg_settings, 0);
832 if (i)
833 pci_err(zr->pci_dev, "%s internal error\n", __func__);
834
835 zr->buffer_size = zr->v4l_settings.bytesperline * zr->v4l_settings.height;
836
837 clear_interrupt_counters(zr);
838 }
839
zr36057_init(struct zoran * zr)840 static int zr36057_init(struct zoran *zr)
841 {
842 int j, err;
843
844 pci_info(zr->pci_dev, "initializing card[%d]\n", zr->id);
845
846 /* Avoid nonsense settings from user for default input/norm */
847 if (default_norm < 0 || default_norm > 2)
848 default_norm = 0;
849 if (default_norm == 0) {
850 zr->norm = V4L2_STD_PAL;
851 zr->timing = zr->card.tvn[ZR_NORM_PAL];
852 } else if (default_norm == 1) {
853 zr->norm = V4L2_STD_NTSC;
854 zr->timing = zr->card.tvn[ZR_NORM_NTSC];
855 } else {
856 zr->norm = V4L2_STD_SECAM;
857 zr->timing = zr->card.tvn[ZR_NORM_SECAM];
858 }
859 if (!zr->timing) {
860 pci_warn(zr->pci_dev, "%s - default TV standard not supported by hardware. PAL will be used.\n", __func__);
861 zr->norm = V4L2_STD_PAL;
862 zr->timing = zr->card.tvn[ZR_NORM_PAL];
863 }
864
865 if (default_input > zr->card.inputs - 1) {
866 pci_warn(zr->pci_dev, "default_input value %d out of range (0-%d)\n",
867 default_input, zr->card.inputs - 1);
868 default_input = 0;
869 }
870 zr->input = default_input;
871
872 /* default setup (will be repeated at every open) */
873 zoran_open_init_params(zr);
874
875 /* allocate memory *before* doing anything to the hardware in case allocation fails */
876 zr->video_dev = video_device_alloc();
877 if (!zr->video_dev) {
878 err = -ENOMEM;
879 goto exit;
880 }
881 zr->stat_com = dma_alloc_coherent(&zr->pci_dev->dev,
882 BUZ_NUM_STAT_COM * sizeof(u32),
883 &zr->p_sc, GFP_KERNEL);
884 if (!zr->stat_com) {
885 err = -ENOMEM;
886 goto exit_video;
887 }
888 for (j = 0; j < BUZ_NUM_STAT_COM; j++)
889 zr->stat_com[j] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
890
891 zr->stat_comb = dma_alloc_coherent(&zr->pci_dev->dev,
892 BUZ_NUM_STAT_COM * sizeof(u32) * 2,
893 &zr->p_scb, GFP_KERNEL);
894 if (!zr->stat_comb) {
895 err = -ENOMEM;
896 goto exit_statcom;
897 }
898
899 /* Now add the template and register the device unit. */
900 *zr->video_dev = zoran_template;
901 zr->video_dev->v4l2_dev = &zr->v4l2_dev;
902 zr->video_dev->lock = &zr->lock;
903 zr->video_dev->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE;
904
905 strscpy(zr->video_dev->name, ZR_DEVNAME(zr), sizeof(zr->video_dev->name));
906 /*
907 * It's not a mem2mem device, but you can both capture and output from one and the same
908 * device. This should really be split up into two device nodes, but that's a job for
909 * another day.
910 */
911 zr->video_dev->vfl_dir = VFL_DIR_M2M;
912
913 zoran_queue_init(zr, &zr->vq);
914
915 err = video_register_device(zr->video_dev, VFL_TYPE_VIDEO, video_nr[zr->id]);
916 if (err < 0)
917 goto exit_statcomb;
918 video_set_drvdata(zr->video_dev, zr);
919
920 zoran_init_hardware(zr);
921 if (!pass_through) {
922 decoder_call(zr, video, s_stream, 0);
923 encoder_call(zr, video, s_routing, 2, 0, 0);
924 }
925
926 zr->initialized = 1;
927 return 0;
928
929 exit_statcomb:
930 dma_free_coherent(&zr->pci_dev->dev, BUZ_NUM_STAT_COM * sizeof(u32) * 2, zr->stat_comb, zr->p_scb);
931 exit_statcom:
932 dma_free_coherent(&zr->pci_dev->dev, BUZ_NUM_STAT_COM * sizeof(u32), zr->stat_com, zr->p_sc);
933 exit_video:
934 kfree(zr->video_dev);
935 exit:
936 return err;
937 }
938
zoran_remove(struct pci_dev * pdev)939 static void zoran_remove(struct pci_dev *pdev)
940 {
941 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
942 struct zoran *zr = to_zoran(v4l2_dev);
943
944 if (!zr->initialized)
945 goto exit_free;
946
947 zoran_queue_exit(zr);
948
949 /* unregister videocodec bus */
950 if (zr->codec)
951 videocodec_detach(zr->codec);
952 if (zr->vfe)
953 videocodec_detach(zr->vfe);
954
955 /* unregister i2c bus */
956 zoran_unregister_i2c(zr);
957 /* disable PCI bus-mastering */
958 zoran_set_pci_master(zr, 0);
959 /* put chip into reset */
960 btwrite(0, ZR36057_SPGPPCR);
961 pci_free_irq(zr->pci_dev, 0, zr);
962 /* unmap and free memory */
963 dma_free_coherent(&zr->pci_dev->dev, BUZ_NUM_STAT_COM * sizeof(u32), zr->stat_com, zr->p_sc);
964 dma_free_coherent(&zr->pci_dev->dev, BUZ_NUM_STAT_COM * sizeof(u32) * 2, zr->stat_comb, zr->p_scb);
965 pci_release_regions(pdev);
966 pci_disable_device(zr->pci_dev);
967 video_unregister_device(zr->video_dev);
968 exit_free:
969 v4l2_ctrl_handler_free(&zr->hdl);
970 v4l2_device_unregister(&zr->v4l2_dev);
971 }
972
zoran_vdev_release(struct video_device * vdev)973 void zoran_vdev_release(struct video_device *vdev)
974 {
975 kfree(vdev);
976 }
977
zoran_setup_videocodec(struct zoran * zr,int type)978 static struct videocodec_master *zoran_setup_videocodec(struct zoran *zr,
979 int type)
980 {
981 struct videocodec_master *m = NULL;
982
983 m = devm_kmalloc(&zr->pci_dev->dev, sizeof(*m), GFP_KERNEL);
984 if (!m)
985 return m;
986
987 /*
988 * magic and type are unused for master struct. Makes sense only at codec structs.
989 * In the past, .type were initialized to the old V4L1 .hardware value,
990 * as VID_HARDWARE_ZR36067
991 */
992 m->magic = 0L;
993 m->type = 0;
994
995 m->flags = CODEC_FLAG_ENCODER | CODEC_FLAG_DECODER;
996 strscpy(m->name, ZR_DEVNAME(zr), sizeof(m->name));
997 m->data = zr;
998
999 switch (type) {
1000 case CODEC_TYPE_ZR36060:
1001 m->readreg = zr36060_read;
1002 m->writereg = zr36060_write;
1003 m->flags |= CODEC_FLAG_JPEG | CODEC_FLAG_VFE;
1004 break;
1005 case CODEC_TYPE_ZR36050:
1006 m->readreg = zr36050_read;
1007 m->writereg = zr36050_write;
1008 m->flags |= CODEC_FLAG_JPEG;
1009 break;
1010 case CODEC_TYPE_ZR36016:
1011 m->readreg = zr36016_read;
1012 m->writereg = zr36016_write;
1013 m->flags |= CODEC_FLAG_VFE;
1014 break;
1015 }
1016
1017 return m;
1018 }
1019
zoran_subdev_notify(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1020 static void zoran_subdev_notify(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1021 {
1022 struct zoran *zr = to_zoran(sd->v4l2_dev);
1023
1024 /*
1025 * Bt819 needs to reset its FIFO buffer using #FRST pin and
1026 * LML33 card uses GPIO(7) for that.
1027 */
1028 if (cmd == BT819_FIFO_RESET_LOW)
1029 GPIO(zr, 7, 0);
1030 else if (cmd == BT819_FIFO_RESET_HIGH)
1031 GPIO(zr, 7, 1);
1032 }
1033
zoran_video_set_ctrl(struct v4l2_ctrl * ctrl)1034 static int zoran_video_set_ctrl(struct v4l2_ctrl *ctrl)
1035 {
1036 struct zoran *zr = container_of(ctrl->handler, struct zoran, hdl);
1037
1038 switch (ctrl->id) {
1039 case V4L2_CID_JPEG_COMPRESSION_QUALITY:
1040 zr->jpg_settings.jpg_comp.quality = ctrl->val;
1041 return zoran_check_jpg_settings(zr, &zr->jpg_settings, 0);
1042 default:
1043 return -EINVAL;
1044 }
1045
1046 return 0;
1047 }
1048
1049 static const struct v4l2_ctrl_ops zoran_video_ctrl_ops = {
1050 .s_ctrl = zoran_video_set_ctrl,
1051 };
1052
1053 /*
1054 * Scan for a Buz card (actually for the PCI controller ZR36057),
1055 * request the irq and map the io memory
1056 */
zoran_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1057 static int zoran_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1058 {
1059 unsigned char latency, need_latency;
1060 struct zoran *zr;
1061 int result;
1062 struct videocodec_master *master_vfe = NULL;
1063 struct videocodec_master *master_codec = NULL;
1064 int card_num;
1065 const char *codec_name, *vfe_name;
1066 unsigned int nr;
1067 int err;
1068
1069 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
1070 if (err)
1071 return -ENODEV;
1072 vb2_dma_contig_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
1073
1074 nr = zoran_num++;
1075 if (nr >= BUZ_MAX) {
1076 pci_err(pdev, "driver limited to %d card(s) maximum\n", BUZ_MAX);
1077 return -ENOENT;
1078 }
1079
1080 zr = devm_kzalloc(&pdev->dev, sizeof(*zr), GFP_KERNEL);
1081 if (!zr)
1082 return -ENOMEM;
1083
1084 zr->v4l2_dev.notify = zoran_subdev_notify;
1085 if (v4l2_device_register(&pdev->dev, &zr->v4l2_dev))
1086 goto zr_free_mem;
1087 zr->pci_dev = pdev;
1088 zr->id = nr;
1089 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)), "MJPEG[%u]", zr->id);
1090 if (v4l2_ctrl_handler_init(&zr->hdl, 10))
1091 goto zr_unreg;
1092 zr->v4l2_dev.ctrl_handler = &zr->hdl;
1093 v4l2_ctrl_new_std(&zr->hdl, &zoran_video_ctrl_ops,
1094 V4L2_CID_JPEG_COMPRESSION_QUALITY, 0,
1095 100, 1, 50);
1096 spin_lock_init(&zr->spinlock);
1097 mutex_init(&zr->lock);
1098 if (pci_enable_device(pdev))
1099 goto zr_unreg;
1100 zr->revision = zr->pci_dev->revision;
1101
1102 pci_info(zr->pci_dev, "Zoran ZR360%c7 (rev %d), irq: %d, memory: 0x%08llx\n",
1103 zr->revision < 2 ? '5' : '6', zr->revision,
1104 zr->pci_dev->irq, (uint64_t)pci_resource_start(zr->pci_dev, 0));
1105 if (zr->revision >= 2)
1106 pci_info(zr->pci_dev, "Subsystem vendor=0x%04x id=0x%04x\n",
1107 zr->pci_dev->subsystem_vendor, zr->pci_dev->subsystem_device);
1108
1109 /* Use auto-detected card type? */
1110 if (card[nr] == -1) {
1111 if (zr->revision < 2) {
1112 pci_err(pdev, "No card type specified, please use the card=X module parameter\n");
1113 pci_err(pdev, "It is not possible to auto-detect ZR36057 based cards\n");
1114 goto zr_unreg;
1115 }
1116
1117 card_num = ent->driver_data;
1118 if (card_num >= NUM_CARDS) {
1119 pci_err(pdev, "Unknown card, try specifying card=X module parameter\n");
1120 goto zr_unreg;
1121 }
1122 pci_info(zr->pci_dev, "%s() - card %s detected\n", __func__, zoran_cards[card_num].name);
1123 } else {
1124 card_num = card[nr];
1125 if (card_num >= NUM_CARDS || card_num < 0) {
1126 pci_err(pdev, "User specified card type %d out of range (0 .. %d)\n",
1127 card_num, NUM_CARDS - 1);
1128 goto zr_unreg;
1129 }
1130 }
1131
1132 /*
1133 * even though we make this a non pointer and thus
1134 * theoretically allow for making changes to this struct
1135 * on a per-individual card basis at runtime, this is
1136 * strongly discouraged. This structure is intended to
1137 * keep general card information, no settings or anything
1138 */
1139 zr->card = zoran_cards[card_num];
1140 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)), "%s[%u]",
1141 zr->card.name, zr->id);
1142
1143 err = pci_request_regions(pdev, ZR_DEVNAME(zr));
1144 if (err)
1145 goto zr_unreg;
1146
1147 zr->zr36057_mem = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1148 if (!zr->zr36057_mem) {
1149 pci_err(pdev, "%s() - ioremap failed\n", __func__);
1150 goto zr_pci_release;
1151 }
1152
1153 result = pci_request_irq(pdev, 0, zoran_irq, NULL, zr, ZR_DEVNAME(zr));
1154 if (result < 0) {
1155 if (result == -EINVAL) {
1156 pci_err(pdev, "%s - bad IRQ number or handler\n", __func__);
1157 } else if (result == -EBUSY) {
1158 pci_err(pdev, "%s - IRQ %d busy, change your PnP config in BIOS\n",
1159 __func__, zr->pci_dev->irq);
1160 } else {
1161 pci_err(pdev, "%s - cannot assign IRQ, error code %d\n", __func__, result);
1162 }
1163 goto zr_pci_release;
1164 }
1165
1166 /* set PCI latency timer */
1167 pci_read_config_byte(zr->pci_dev, PCI_LATENCY_TIMER,
1168 &latency);
1169 need_latency = zr->revision > 1 ? 32 : 48;
1170 if (latency != need_latency) {
1171 pci_info(zr->pci_dev, "Changing PCI latency from %d to %d\n", latency, need_latency);
1172 pci_write_config_byte(zr->pci_dev, PCI_LATENCY_TIMER, need_latency);
1173 }
1174
1175 zr36057_restart(zr);
1176 /* i2c */
1177 pci_info(zr->pci_dev, "Initializing i2c bus...\n");
1178
1179 if (zoran_register_i2c(zr) < 0) {
1180 pci_err(pdev, "%s - can't initialize i2c bus\n", __func__);
1181 goto zr_free_irq;
1182 }
1183
1184 zr->decoder = v4l2_i2c_new_subdev(&zr->v4l2_dev, &zr->i2c_adapter,
1185 zr->card.i2c_decoder, 0,
1186 zr->card.addrs_decoder);
1187
1188 if (zr->card.i2c_encoder)
1189 zr->encoder = v4l2_i2c_new_subdev(&zr->v4l2_dev, &zr->i2c_adapter,
1190 zr->card.i2c_encoder, 0,
1191 zr->card.addrs_encoder);
1192
1193 pci_info(zr->pci_dev, "Initializing videocodec bus...\n");
1194
1195 if (zr->card.video_codec) {
1196 codec_name = codecid_to_modulename(zr->card.video_codec);
1197 if (codec_name) {
1198 result = request_module(codec_name);
1199 if (result)
1200 pci_err(pdev, "failed to load modules %s: %d\n", codec_name, result);
1201 }
1202 }
1203 if (zr->card.video_vfe) {
1204 vfe_name = codecid_to_modulename(zr->card.video_vfe);
1205 if (vfe_name) {
1206 result = request_module(vfe_name);
1207 if (result < 0)
1208 pci_err(pdev, "failed to load modules %s: %d\n", vfe_name, result);
1209 }
1210 }
1211
1212 /* reset JPEG codec */
1213 jpeg_codec_sleep(zr, 1);
1214 jpeg_codec_reset(zr);
1215 /* video bus enabled */
1216 /* display codec revision */
1217 if (zr->card.video_codec != 0) {
1218 master_codec = zoran_setup_videocodec(zr, zr->card.video_codec);
1219 if (!master_codec)
1220 goto zr_unreg_i2c;
1221 zr->codec = videocodec_attach(master_codec);
1222 if (!zr->codec) {
1223 pci_err(pdev, "%s - no codec found\n", __func__);
1224 goto zr_unreg_i2c;
1225 }
1226 if (zr->codec->type != zr->card.video_codec) {
1227 pci_err(pdev, "%s - wrong codec\n", __func__);
1228 goto zr_detach_codec;
1229 }
1230 }
1231 if (zr->card.video_vfe != 0) {
1232 master_vfe = zoran_setup_videocodec(zr, zr->card.video_vfe);
1233 if (!master_vfe)
1234 goto zr_detach_codec;
1235 zr->vfe = videocodec_attach(master_vfe);
1236 if (!zr->vfe) {
1237 pci_err(pdev, "%s - no VFE found\n", __func__);
1238 goto zr_detach_codec;
1239 }
1240 if (zr->vfe->type != zr->card.video_vfe) {
1241 pci_err(pdev, "%s = wrong VFE\n", __func__);
1242 goto zr_detach_vfe;
1243 }
1244 }
1245
1246 /* take care of Natoma chipset and a revision 1 zr36057 */
1247 if ((pci_pci_problems & PCIPCI_NATOMA) && zr->revision <= 1)
1248 pci_info(zr->pci_dev, "ZR36057/Natoma bug, max. buffer size is 128K\n");
1249
1250 if (zr36057_init(zr) < 0)
1251 goto zr_detach_vfe;
1252
1253 zr->map_mode = ZORAN_MAP_MODE_RAW;
1254
1255 return 0;
1256
1257 zr_detach_vfe:
1258 videocodec_detach(zr->vfe);
1259 zr_detach_codec:
1260 videocodec_detach(zr->codec);
1261 zr_unreg_i2c:
1262 zoran_unregister_i2c(zr);
1263 zr_free_irq:
1264 btwrite(0, ZR36057_SPGPPCR);
1265 pci_free_irq(zr->pci_dev, 0, zr);
1266 zr_pci_release:
1267 pci_release_regions(pdev);
1268 zr_unreg:
1269 v4l2_ctrl_handler_free(&zr->hdl);
1270 v4l2_device_unregister(&zr->v4l2_dev);
1271 zr_free_mem:
1272
1273 return -ENODEV;
1274 }
1275
1276 static struct pci_driver zoran_driver = {
1277 .name = "zr36067",
1278 .id_table = zr36067_pci_tbl,
1279 .probe = zoran_probe,
1280 .remove = zoran_remove,
1281 };
1282
zoran_init(void)1283 static int __init zoran_init(void)
1284 {
1285 int res;
1286
1287 pr_info("Zoran MJPEG board driver version %s\n", ZORAN_VERSION);
1288
1289 /* check the parameters we have been given, adjust if necessary */
1290 if (v4l_nbufs < 2)
1291 v4l_nbufs = 2;
1292 if (v4l_nbufs > VIDEO_MAX_FRAME)
1293 v4l_nbufs = VIDEO_MAX_FRAME;
1294 /* The user specifies the in KB, we want them in byte (and page aligned) */
1295 v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024);
1296 if (v4l_bufsize < 32768)
1297 v4l_bufsize = 32768;
1298 /* 2 MB is arbitrary but sufficient for the maximum possible images */
1299 if (v4l_bufsize > 2048 * 1024)
1300 v4l_bufsize = 2048 * 1024;
1301 if (jpg_nbufs < 4)
1302 jpg_nbufs = 4;
1303 if (jpg_nbufs > BUZ_MAX_FRAME)
1304 jpg_nbufs = BUZ_MAX_FRAME;
1305 jpg_bufsize = PAGE_ALIGN(jpg_bufsize * 1024);
1306 if (jpg_bufsize < 8192)
1307 jpg_bufsize = 8192;
1308 if (jpg_bufsize > (512 * 1024))
1309 jpg_bufsize = 512 * 1024;
1310 /* Use parameter for vidmem or try to find a video card */
1311 if (vidmem)
1312 pr_info("%s: Using supplied video memory base address @ 0x%lx\n", ZORAN_NAME, vidmem);
1313
1314 /* some mainboards might not do PCI-PCI data transfer well */
1315 if (pci_pci_problems & (PCIPCI_FAIL | PCIAGP_FAIL | PCIPCI_ALIMAGIK))
1316 pr_warn("%s: chipset does not support reliable PCI-PCI DMA\n", ZORAN_NAME);
1317
1318 res = pci_register_driver(&zoran_driver);
1319 if (res) {
1320 pr_err("Unable to register ZR36057 driver\n");
1321 return res;
1322 }
1323
1324 return 0;
1325 }
1326
zoran_exit(void)1327 static void __exit zoran_exit(void)
1328 {
1329 pci_unregister_driver(&zoran_driver);
1330 }
1331
1332 module_init(zoran_init);
1333 module_exit(zoran_exit);
1334