1//SPDX-License-Identifier: GPL-2.0 2/* Copyright (C) 2018 Octavo Systems LLC - https://www.octavosystems.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/dts-v1/; 10 11#include "am33xx.dtsi" 12#include "am335x-osd335x-common.dtsi" 13#include <dt-bindings/interrupt-controller/irq.h> 14 15#include <dt-bindings/display/tda998x.h> 16 17/ { 18 model = "Octavo Systems OSD3358-SM-RED"; 19 compatible = "oct,osd3358-sm-refdesign", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; 20}; 21 22&ldo3_reg { 23 regulator-min-microvolt = <1800000>; 24 regulator-max-microvolt = <1800000>; 25 regulator-always-on; 26}; 27 28&mmc1 { 29 vmmc-supply = <&vmmcsd_fixed>; 30}; 31 32&mmc2 { 33 vmmc-supply = <&vmmcsd_fixed>; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&emmc_pins>; 36 bus-width = <8>; 37 status = "okay"; 38}; 39 40&am33xx_pinmux { 41 nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins { 42 pinctrl-single,pins = < 43 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 44 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0) 45 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0) 46 AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0) 47 AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0) 48 AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0) 49 AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0) 50 AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0) 51 AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0) 52 AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0) 53 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0) 54 AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0) 55 AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0) 56 AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0) 57 AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0) 58 AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0) 59 AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0) 60 AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 61 AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 62 AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 63 AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 64 >; 65 }; 66 67 nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins { 68 pinctrl-single,pins = < 69 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3) 70 >; 71 }; 72 73 mcasp0_pins: mcasp0-pins { 74 pinctrl-single,pins = < 75 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) 76 AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/ 77 AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0) 78 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 79 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */ 80 >; 81 }; 82 83 flash_enable: flash-enable { 84 pinctrl-single,pins = < 85 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */ 86 >; 87 }; 88 89 imu_interrupt: imu-interrupt { 90 pinctrl-single,pins = < 91 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_rx_er.gpio3_2 */ 92 >; 93 }; 94 95 ethernet_interrupt: ethernet-interrupt{ 96 pinctrl-single,pins = < 97 AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE7) /* mii1_col.gpio3_0 */ 98 >; 99 }; 100}; 101 102&lcdc { 103 status = "okay"; 104 105 /* If you want to get 24 bit RGB and 16 BGR mode instead of 106 * current 16 bit RGB and 24 BGR modes, set the propety 107 * below to "crossed" and uncomment the video-ports -property 108 * in tda19988 node. 109 * AM335x errata for wiring: 110 * https://www.ti.com/lit/er/sprz360i/sprz360i.pdf 111 */ 112 113 blue-and-red-wiring = "straight"; 114 115 port { 116 lcdc_0: endpoint { 117 remote-endpoint = <&hdmi_0>; 118 }; 119 }; 120}; 121 122&i2c0 { 123 tda19988: hdmi-encoder@70 { 124 compatible = "nxp,tda998x"; 125 reg = <0x70>; 126 127 pinctrl-names = "default", "off"; 128 pinctrl-0 = <&nxp_hdmi_bonelt_pins>; 129 pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>; 130 131 /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */ 132 /* video-ports = <0x234501>; */ 133 134 #sound-dai-cells = <0>; 135 audio-ports = < TDA998x_I2S 0x03>; 136 137 port { 138 hdmi_0: endpoint { 139 remote-endpoint = <&lcdc_0>; 140 }; 141 }; 142 }; 143 144 mpu9250: imu@68 { 145 compatible = "invensense,mpu6050"; 146 reg = <0x68>; 147 interrupt-parent = <&gpio3>; 148 interrupts = <21 IRQ_TYPE_EDGE_RISING>; 149 i2c-gate { 150 #address-cells = <1>; 151 #size-cells = <0>; 152 ax8975@c { 153 compatible = "ak,ak8975"; 154 reg = <0x0c>; 155 }; 156 }; 157 /*invensense,int_config = <0x10>; 158 invensense,level_shifter = <0>; 159 invensense,orientation = [01 00 00 00 01 00 00 00 01]; 160 invensense,sec_slave_type = <0>; 161 invensense,key = [4e cc 7e eb f6 1e 35 22 00 34 0d 65 32 e9 94 89];*/ 162 }; 163 164 bmp280: pressure@76 { 165 compatible = "bosch,bmp280"; 166 reg = <0x76>; 167 }; 168}; 169 170&rtc { 171 system-power-controller; 172}; 173 174&mcasp0 { 175 #sound-dai-cells = <0>; 176 pinctrl-names = "default"; 177 pinctrl-0 = <&mcasp0_pins>; 178 status = "okay"; 179 op-mode = <0>; /* MCASP_IIS_MODE */ 180 tdm-slots = <2>; 181 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 182 0 0 1 0 183 >; 184 tx-num-evt = <32>; 185 rx-num-evt = <32>; 186}; 187 188/ { 189 clk_mcasp0_fixed: clk-mcasp0-fixed { 190 #clock-cells = <0>; 191 compatible = "fixed-clock"; 192 clock-frequency = <24576000>; 193 }; 194 195 clk_mcasp0: clk-mcasp0 { 196 #clock-cells = <0>; 197 compatible = "gpio-gate-clock"; 198 clocks = <&clk_mcasp0_fixed>; 199 enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */ 200 }; 201 202 sound { 203 compatible = "simple-audio-card"; 204 simple-audio-card,name = "TI BeagleBone Black"; 205 simple-audio-card,format = "i2s"; 206 simple-audio-card,bitclock-master = <&dailink0_master>; 207 simple-audio-card,frame-master = <&dailink0_master>; 208 209 dailink0_master: simple-audio-card,cpu { 210 sound-dai = <&mcasp0>; 211 clocks = <&clk_mcasp0>; 212 }; 213 214 simple-audio-card,codec { 215 sound-dai = <&tda19988>; 216 }; 217 }; 218 219 chosen { 220 stdout-path = &uart0; 221 }; 222 223 leds { 224 pinctrl-names = "default"; 225 pinctrl-0 = <&user_leds_s0>; 226 227 compatible = "gpio-leds"; 228 229 led2 { 230 label = "beaglebone:green:usr0"; 231 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 232 linux,default-trigger = "heartbeat"; 233 default-state = "off"; 234 }; 235 236 led3 { 237 label = "beaglebone:green:usr1"; 238 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; 239 linux,default-trigger = "mmc0"; 240 default-state = "off"; 241 }; 242 243 led4 { 244 label = "beaglebone:green:usr2"; 245 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 246 linux,default-trigger = "cpu0"; 247 default-state = "off"; 248 }; 249 250 led5 { 251 label = "beaglebone:green:usr3"; 252 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 253 linux,default-trigger = "mmc1"; 254 default-state = "off"; 255 }; 256 }; 257 258 vmmcsd_fixed: fixedregulator0 { 259 compatible = "regulator-fixed"; 260 regulator-name = "vmmcsd_fixed"; 261 regulator-min-microvolt = <3300000>; 262 regulator-max-microvolt = <3300000>; 263 }; 264}; 265 266&am33xx_pinmux { 267 pinctrl-names = "default"; 268 pinctrl-0 = <&clkout2_pin>; 269 270 user_leds_s0: user-leds-s0 { 271 pinctrl-single,pins = < 272 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ 273 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ 274 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ 275 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ 276 >; 277 }; 278 279 i2c2_pins: pinmux-i2c2-pins { 280 pinctrl-single,pins = < 281 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 282 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 283 >; 284 }; 285 286 uart0_pins: pinmux-uart0-pins { 287 pinctrl-single,pins = < 288 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) 289 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 290 >; 291 }; 292 293 clkout2_pin: pinmux-clkout2-pin { 294 pinctrl-single,pins = < 295 AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ 296 >; 297 }; 298 299 cpsw_default: cpsw-default { 300 pinctrl-single,pins = < 301 /* Slave 1 */ 302 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 303 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 304 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 305 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 306 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 307 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 308 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) 309 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) 310 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) 311 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) 312 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) 313 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) 314 >; 315 }; 316 317 cpsw_sleep: cpsw-sleep { 318 pinctrl-single,pins = < 319 /* Slave 1 reset value */ 320 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 321 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 322 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 323 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 324 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 325 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 326 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 327 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 328 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 329 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 330 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 331 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 332 >; 333 }; 334 335 davinci_mdio_default: davinci-mdio-default { 336 pinctrl-single,pins = < 337 /* MDIO */ 338 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) 339 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) 340 >; 341 }; 342 343 davinci_mdio_sleep: davinci-mdio-sleep { 344 pinctrl-single,pins = < 345 /* MDIO reset value */ 346 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) 347 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) 348 >; 349 }; 350 351 mmc1_pins: pinmux-mmc1-pins { 352 pinctrl-single,pins = < 353 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */ 354 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) 355 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) 356 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) 357 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) 358 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) 359 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) 360 >; 361 }; 362 363 emmc_pins: pinmux-emmc-pins { 364 pinctrl-single,pins = < 365 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 366 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 367 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 368 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 369 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 370 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 371 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 372 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 373 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 374 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 375 >; 376 }; 377}; 378 379 380&uart0 { 381 pinctrl-names = "default"; 382 pinctrl-0 = <&uart0_pins>; 383 384 status = "okay"; 385}; 386 387&usb0 { 388 dr_mode = "peripheral"; 389 interrupts-extended = <&intc 18 &tps 0>; 390 interrupt-names = "mc", "vbus"; 391}; 392 393&usb1 { 394 dr_mode = "host"; 395}; 396 397&i2c2 { 398 pinctrl-names = "default"; 399 pinctrl-0 = <&i2c2_pins>; 400 status = "okay"; 401 clock-frequency = <100000>; 402}; 403 404&cpsw_emac0 { 405 phy-handle = <ðphy0>; 406 phy-mode = "rgmii-txid"; 407}; 408 409&mac { 410 slaves = <1>; 411 pinctrl-names = "default", "sleep"; 412 pinctrl-0 = <&cpsw_default>; 413 pinctrl-1 = <&cpsw_sleep>; 414 status = "okay"; 415}; 416 417&davinci_mdio { 418 pinctrl-names = "default", "sleep"; 419 pinctrl-0 = <&davinci_mdio_default>; 420 pinctrl-1 = <&davinci_mdio_sleep>; 421 status = "okay"; 422 423 ethphy0: ethernet-phy@4 { 424 reg = <4>; 425 }; 426}; 427 428&mmc1 { 429 status = "okay"; 430 bus-width = <0x4>; 431 pinctrl-names = "default"; 432 pinctrl-0 = <&mmc1_pins>; 433 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 434}; 435 436&rtc { 437 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; 438 clock-names = "ext-clk", "int-clk"; 439}; 440