1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Device Tree file for Synology DS116 NAS
4 *
5 * Copyright (C) 2017 Willy Tarreau <w@1wt.eu>
6 */
7
8/dts-v1/;
9#include "armada-385.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Synology DS116";
14	compatible = "marvell,a385-gp", "marvell,armada385", "marvell,armada380";
15
16	chosen {
17		stdout-path = "serial0:115200n8";
18	};
19
20	memory {
21		device_type = "memory";
22		reg = <0x00000000 0x40000000>; /* 1 GB */
23	};
24
25	soc {
26		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
27			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
28			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
29			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
30			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
31
32		internal-regs {
33			i2c@11000 {
34				pinctrl-names = "default";
35				pinctrl-0 = <&i2c0_pins>;
36				status = "okay";
37				clock-frequency = <100000>;
38
39				eeprom@57 {
40					compatible = "atmel,24c64";
41					reg = <0x57>;
42				};
43			};
44
45			serial@12000 {
46				pinctrl-names = "default";
47				pinctrl-0 = <&uart0_pins>;
48				status = "okay";
49			};
50
51			serial@12100 {
52				/* A PIC16F1829 is connected to uart1 at 9600 bps,
53				 * and takes single-character orders :
54				 *   "1" : power off // already handled by the poweroff node
55				 *   "2" : short beep
56				 *   "3" : long beep
57				 *   "4" : turn the power LED ON
58				 *   "5" : flash the power LED
59				 *   "6" : turn the power LED OFF
60				 *   "7" : turn the status LED OFF
61				 *   "8" : turn the status LED ON
62				 *   "9" : flash the status LED
63				 *   "A" : flash the motherboard LED (D8)
64				 *   "B" : turn the motherboard LED OFF
65				 *   "C" : hard reset
66				 */
67				pinctrl-names = "default";
68				pinctrl-0 = <&uart1_pins>;
69				status = "okay";
70			};
71
72			poweroff@12100 {
73				compatible = "synology,power-off";
74				reg = <0x12100 0x100>;
75				clocks = <&coreclk 0>;
76			};
77
78			ethernet@70000 {
79				pinctrl-names = "default";
80				phy = <&phy0>;
81				phy-mode = "sgmii";
82				buffer-manager = <&bm>;
83				bm,pool-long = <0>;
84				status = "okay";
85			};
86
87
88			mdio@72004 {
89				pinctrl-names = "default";
90				pinctrl-0 = <&mdio_pins>;
91
92				phy0: ethernet-phy@1 {
93					reg = <1>;
94				};
95			};
96
97			sata@a8000 {
98				pinctrl-names = "default";
99				pinctrl-0 = <&sata0_pins>;
100				status = "okay";
101				#address-cells = <1>;
102				#size-cells = <0>;
103
104				sata0: sata-port@0 {
105					reg = <0>;
106					target-supply = <&reg_5v_sata0>;
107				};
108			};
109
110			bm@c8000 {
111				status = "okay";
112			};
113
114			usb3@f0000 {
115				usb-phy = <&usb3_0_phy>;
116				status = "okay";
117			};
118
119			usb3@f8000 {
120				usb-phy = <&usb3_1_phy>;
121				status = "okay";
122			};
123		};
124
125		bm-bppi {
126			status = "okay";
127		};
128
129		gpio-fan {
130			compatible = "gpio-fan";
131			gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>,
132				<&gpio1 17 GPIO_ACTIVE_HIGH>,
133				<&gpio1 16 GPIO_ACTIVE_HIGH>;
134			gpio-fan,speed-map = <   0 0
135					      1500 1
136					      2500 2
137					      3000 3
138					      3400 4
139					      3700 5
140					      3900 6
141					      4000 7>;
142			#cooling-cells = <2>;
143		};
144
145		gpio-leds {
146			compatible = "gpio-leds";
147
148			/* The green part is on gpio0.20 which is also used by
149			 * sata0, and accesses to SATA disk 0 make it blink so it
150			 * doesn't need to be declared here.
151			 */
152			orange {
153				gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
154				label = "ds116:orange:disk";
155				default-state = "off";
156			};
157		};
158	};
159
160	usb3_0_phy: usb3_0_phy {
161		compatible = "usb-nop-xceiv";
162		vcc-supply = <&reg_usb3_0_vbus>;
163		#phy-cells = <0>;
164	};
165
166	usb3_1_phy: usb3_1_phy {
167		compatible = "usb-nop-xceiv";
168		vcc-supply = <&reg_usb3_1_vbus>;
169		#phy-cells = <0>;
170	};
171
172	reg_usb3_0_vbus: usb3-vbus0 {
173		compatible = "regulator-fixed";
174		regulator-name = "usb3-vbus0";
175		pinctrl-names = "default";
176		pinctrl-0 = <&xhci0_vbus_pins>;
177		regulator-min-microvolt = <5000000>;
178		regulator-max-microvolt = <5000000>;
179		enable-active-high;
180		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
181	};
182
183	reg_usb3_1_vbus: usb3-vbus1 {
184		compatible = "regulator-fixed";
185		regulator-name = "usb3-vbus1";
186		pinctrl-names = "default";
187		pinctrl-0 = <&xhci1_vbus_pins>;
188		regulator-min-microvolt = <5000000>;
189		regulator-max-microvolt = <5000000>;
190		enable-active-high;
191		gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
192	};
193
194	reg_sata0: pwr-sata0 {
195		compatible = "regulator-fixed";
196		regulator-name = "pwr_en_sata0";
197		regulator-min-microvolt = <12000000>;
198		regulator-max-microvolt = <12000000>;
199		enable-active-high;
200		regulator-boot-on;
201		gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
202	};
203
204	reg_5v_sata0: v5-sata0 {
205		compatible = "regulator-fixed";
206		regulator-name = "v5.0-sata0";
207		regulator-min-microvolt = <5000000>;
208		regulator-max-microvolt = <5000000>;
209		vin-supply = <&reg_sata0>;
210	};
211
212	reg_12v_sata0: v12-sata0 {
213		compatible = "regulator-fixed";
214		regulator-name = "v12.0-sata0";
215		regulator-min-microvolt = <12000000>;
216		regulator-max-microvolt = <12000000>;
217		vin-supply = <&reg_sata0>;
218	};
219};
220
221&spi0 {
222	pinctrl-names = "default";
223	pinctrl-0 = <&spi0_pins>;
224	status = "okay";
225
226	spi-flash@0 {
227		#address-cells = <1>;
228		#size-cells = <1>;
229		compatible = "macronix,mx25l6405d", "jedec,spi-nor";
230		reg = <0>; /* Chip select 0 */
231		spi-max-frequency = <50000000>;
232		m25p,fast-read;
233
234		/* Note: there is a redboot partition table despite u-boot
235		 * being used. The names presented here are the same as those
236		 * found in the FIS directory. There is also a small device
237		 * tree in the last 64kB of the RedBoot partition which is not
238		 * enumerated. The MAC address and the serial number are listed
239		 * in the "vendor" partition.
240		 */
241		partition@0 {
242			label = "RedBoot";
243			reg = <0x00000000 0x000f0000>;
244			read-only;
245		};
246
247		partition@c0000 {
248			label = "zImage";
249			reg = <0x000f0000 0x002d0000>;
250		};
251
252		partition@390000 {
253			label = "rd.gz";
254			reg = <0x003c0000 0x00410000>;
255		};
256
257		partition@7d0000 {
258			label = "vendor";
259			reg = <0x007d0000 0x00010000>;
260			read-only;
261		};
262
263		partition@7e0000 {
264			label = "RedBoot config";
265			reg = <0x007e0000 0x00010000>;
266			read-only;
267		};
268
269		partition@7f0000 {
270			label = "FIS directory";
271			reg = <0x007f0000 0x00010000>;
272			read-only;
273		};
274	};
275};
276
277&pinctrl {
278	/* use only one pin for UART1, as mpp20 is used by sata0 */
279	uart1_pins: uart-pins-1 {
280		marvell,pins = "mpp19";
281		marvell,function = "ua1";
282	};
283
284	xhci0_vbus_pins: xhci0_vbus_pins {
285		marvell,pins = "mpp58";
286		marvell,function = "gpio";
287	};
288	xhci1_vbus_pins: xhci1_vbus_pins {
289		marvell,pins = "mpp59";
290		marvell,function = "gpio";
291	};
292};
293