1// SPDX-License-Identifier: GPL-2.0-only
2
3/ {
4	gpio_keys {
5		compatible = "gpio-keys";
6		pinctrl-names = "default";
7		pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
8
9		sysboot2 {
10			label = "sysboot2";
11			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;	/* gpio2 */
12			linux,code = <BTN_0>;
13			wakeup-source;
14		};
15
16		sysboot5 {
17			label = "sysboot5";
18			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;	/* gpio7 */
19			linux,code = <BTN_1>;
20			wakeup-source;
21		};
22
23		gpio1 {
24			label = "gpio1";
25			gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;	/* gpio181 */
26			linux,code = <BTN_2>;
27			wakeup-source;
28		};
29
30		gpio2 {
31			label = "gpio2";
32			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;	/* gpio178 */
33			linux,code = <BTN_3>;
34			wakeup-source;
35		};
36	};
37
38	sound {
39		compatible = "ti,omap-twl4030";
40		ti,model = "omap3logic";
41		ti,mcbsp = <&mcbsp2>;
42	};
43
44	leds {
45		compatible = "gpio-leds";
46		pinctrl-names = "default";
47		pinctrl-0 = <&led_pins>;
48
49		led1 {
50			label = "led1";
51			gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;	/* gpio180 */
52			linux,default-trigger = "cpu0";
53		};
54
55		led2 {
56			label = "led2";
57			gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;	/* gpio179 */
58			linux,default-trigger = "none";
59		};
60	};
61
62	pwm10: dmtimer-pwm {
63		compatible = "ti,omap-dmtimer-pwm";
64		pinctrl-names = "default";
65		pinctrl-0 = <&pwm_pins>;
66		ti,timers = <&timer10>;
67		#pwm-cells = <3>;
68		ti,clock-source = <0x01>;
69	};
70
71};
72
73&vaux1 {
74	regulator-min-microvolt = <3000000>;
75	regulator-max-microvolt = <3000000>;
76};
77
78&vaux4 {
79	regulator-min-microvolt = <1800000>;
80	regulator-max-microvolt = <1800000>;
81};
82
83&mcbsp2 {
84	pinctrl-names = "default";
85	pinctrl-0 = <&mcbsp2_pins>;
86	status = "okay";
87};
88
89&charger {
90	ti,bb-uvolt = <3200000>;
91	ti,bb-uamp = <150>;
92};
93
94&gpmc {
95	ranges = <0 0 0x30000000 0x1000000	/* CS0: 16MB for NAND */
96		  1 0 0x2c000000 0x1000000>;	/* CS1: 16MB for LAN9221 */
97
98	ethernet@gpmc {
99		pinctrl-names = "default";
100		pinctrl-0 = <&lan9221_pins>;
101		interrupt-parent = <&gpio5>;
102		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;		/* gpio129 */
103		reg = <1 0 0xff>;
104	};
105};
106
107&hdqw1w {
108	pinctrl-names = "default";
109	pinctrl-0 = <&hdq_pins>;
110};
111
112
113&vpll2 {
114	regulator-always-on;
115};
116
117&dss {
118	status = "okay";
119	vdds_dsi-supply = <&vpll2>;
120	vdda_video-supply = <&vpll2>;
121	pinctrl-names = "default";
122	pinctrl-0 = <&dss_dpi_pins1>;
123	port {
124		dpi_out: endpoint {
125			remote-endpoint = <&lcd_in>;
126			data-lines = <16>;
127		};
128	};
129};
130
131/ {
132	aliases {
133		display0 = &lcd0;
134	};
135
136	lcd0: display {
137		/* This isn't the exact LCD, but the timings meet spec */
138		compatible = "newhaven,nhd-4.3-480272ef-atxl";
139		label = "15";
140		pinctrl-names = "default";
141		pinctrl-0 = <&panel_pwr_pins>;
142		backlight = <&bl>;
143		enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
144		port {
145			lcd_in: endpoint {
146				remote-endpoint = <&dpi_out>;
147			};
148		};
149	};
150
151	bl: backlight {
152		compatible = "pwm-backlight";
153		pinctrl-names = "default";
154		pinctrl-0 = <&backlight_pins>;
155		pwms = <&pwm10 0 5000000 0>;
156		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
157		default-brightness-level = <7>;
158		enable-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; /* gpio_154 */
159	};
160};
161
162&mmc1 {
163	interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
164	pinctrl-names = "default";
165	pinctrl-0 = <&mmc1_pins &mmc1_cd>;
166	cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>;		/* gpio127 */
167	vmmc-supply = <&vmmc1>;
168	bus-width = <4>;
169	cap-power-off-card;
170};
171
172&omap3_pmx_core {
173	gpio_key_pins: pinmux_gpio_key_pins {
174		pinctrl-single,pins = <
175			OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_clk.gpio_178 */
176			OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLUP | MUX_MODE4)	/* mcspi2_cs0.gpio_181 */
177		>;
178	};
179
180	hdq_pins: hdq_pins {
181		pinctrl-single,pins = <
182			OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* hdq_sio */
183		>;
184	};
185
186	pwm_pins: pinmux_pwm_pins {
187		pinctrl-single,pins = <
188			OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3)       /* gpmc_ncs5.gpt_10_pwm_evt */
189		>;
190	};
191
192	led_pins: pinmux_led_pins {
193		pinctrl-single,pins = <
194			OMAP3_CORE1_IOPAD(0x21d8, PIN_OUTPUT | MUX_MODE4)	/* gpio_179 */
195			OMAP3_CORE1_IOPAD(0x21da, PIN_OUTPUT | MUX_MODE4)	/* gpio_180 */
196		>;
197	};
198
199	mmc1_pins: pinmux_mmc1_pins {
200		pinctrl-single,pins = <
201			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
202			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
203			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
204			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
205			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
206			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
207		>;
208	};
209
210	tsc2004_pins: pinmux_tsc2004_pins {
211		pinctrl-single,pins = <
212			OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)	/* mcbsp4_dr.gpio_153 */
213		>;
214	};
215
216	backlight_pins: pinmux_backlight_pins {
217		pinctrl-single,pins = <
218			OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_dx.gpio_154 */
219		>;
220	};
221
222	isp_pins: pinmux_isp_pins {
223		pinctrl-single,pins = <
224			OMAP3_CORE1_IOPAD(0x210c, PIN_INPUT | MUX_MODE0)   /* cam_hs.cam_hs */
225			OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0)   /* cam_vs.cam_vs */
226			OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0)   /* cam_xclka.cam_xclka */
227			OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0)   /* cam_pclk.cam_pclk */
228
229			OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0)   /* cam_d0.cam_d0 */
230			OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0)   /* cam_d1.cam_d1 */
231			OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0)   /* cam_d2.cam_d2 */
232			OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0)   /* cam_d3.cam_d3 */
233			OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0)   /* cam_d4.cam_d4 */
234			OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0)   /* cam_d5.cam_d5 */
235			OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)   /* cam_d6.cam_d6 */
236			OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)   /* cam_d7.cam_d7 */
237		>;
238	};
239
240	panel_pwr_pins: pinmux_panel_pwr_pins {
241		pinctrl-single,pins = <
242			OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE4)       /* mcbsp4_fs.gpio_155 */
243		>;
244	};
245
246	dss_dpi_pins1: pinmux_dss_dpi_pins1 {
247		pinctrl-single,pins = <
248			OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_pclk.dss_pclk */
249			OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_hsync.dss_hsync */
250			OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_vsync.dss_vsync */
251			OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_acbias.dss_acbias */
252
253			OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data6.dss_data6 */
254			OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data7.dss_data7 */
255			OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data8.dss_data8 */
256			OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data9.dss_data9 */
257			OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data10.dss_data10 */
258			OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data11.dss_data11 */
259			OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data12.dss_data12 */
260			OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data13.dss_data13 */
261			OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data14.dss_data14 */
262			OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data15.dss_data15 */
263			OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data16.dss_data16 */
264			OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE0)   /* dss_data17.dss_data17 */
265
266			OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data18.dss_data0 */
267			OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data19.dss_data1 */
268			OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data20.dss_data2 */
269			OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data21.dss_data3 */
270			OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data22.dss_data4 */
271			OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT_PULLDOWN | PIN_OFF_OUTPUT_LOW | MUX_MODE3)   /* dss_data23.dss_data5 */
272		>;
273	};
274};
275
276&omap3_pmx_wkup {
277	gpio_key_pins_wkup: pinmux_gpio_key_pins_wkup {
278		pinctrl-single,pins = <
279			OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot0.gpio_2 */
280			OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_boot5.gpio_7 */
281		>;
282	};
283
284	lan9221_pins: pinmux_lan9221_pins {
285		pinctrl-single,pins = <
286			OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4)		/* reserved.gpio_129 */
287		>;
288	};
289
290	mmc1_cd: pinmux_mmc1_cd {
291		pinctrl-single,pins = <
292			OMAP3_WKUP_IOPAD(0x2a54, PIN_INPUT_PULLUP | MUX_MODE4)	/* reserved.gpio_127 */
293		>;
294	};
295};
296
297&i2c2 {
298	mt9p031@48 {
299		compatible = "aptina,mt9p031";
300		reg = <0x48>;
301		clocks = <&isp 0>;
302		vaa-supply = <&vaux4>;
303		vdd-supply = <&vaux4>;
304		vdd_io-supply = <&vaux4>;
305		port {
306			mt9p031_out: endpoint {
307				input-clock-frequency = <24000000>;
308				pixel-clock-frequency = <72000000>;
309				remote-endpoint = <&ccdc_ep>;
310			};
311		};
312	};
313};
314
315&i2c3 {
316	touchscreen: tsc2004@48 {
317		compatible = "ti,tsc2004";
318		reg = <0x48>;
319		vio-supply = <&vaux1>;
320		pinctrl-names = "default";
321		pinctrl-0 = <&tsc2004_pins>;
322		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
323
324		touchscreen-fuzz-x = <4>;
325		touchscreen-fuzz-y = <7>;
326		touchscreen-fuzz-pressure = <2>;
327		touchscreen-size-x = <4096>;
328		touchscreen-size-y = <4096>;
329		touchscreen-max-pressure = <2048>;
330
331		ti,x-plate-ohms = <280>;
332		ti,esd-recovery-timeout-ms = <8000>;
333	};
334};
335
336&mcspi1 {
337	at25@0 {
338		compatible = "atmel,at25";
339		reg = <0>;
340		spi-max-frequency = <5000000>;
341		spi-cpha;
342		spi-cpol;
343
344		pagesize = <64>;
345		size = <32768>;
346		address-width = <16>;
347	};
348};
349
350&isp {
351	pinctrl-names = "default";
352	pinctrl-0 = <&isp_pins>;
353	ports {
354		port@0 {
355			reg = <0>;
356			ccdc_ep: endpoint {
357				remote-endpoint = <&mt9p031_out>;
358				bus-width = <8>;
359				hsync-active = <1>;
360				vsync-active = <1>;
361				pclk-sample = <0>;
362			};
363		};
364	};
365};
366
367&uart1 {
368	interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
369};
370
371/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */
372&usb_otg_hs {
373	pinctrl-names = "default";
374	pinctrl-0 = <&hsusb_otg_pins>;
375	interface-type = <0>;
376	usb-phy = <&usb2_phy>;
377	phys = <&usb2_phy>;
378	phy-names = "usb2-phy";
379	mode = <3>;
380	power = <50>;
381};
382