1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7744 SoC 4 * 5 * Copyright (C) 2018 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7744-cpg-mssr.h> 11#include <dt-bindings/power/r8a7744-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7744"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 /* This value must be overridden by the board. */ 46 clock-frequency = <0>; 47 }; 48 49 cpus { 50 #address-cells = <1>; 51 #size-cells = <0>; 52 enable-method = "renesas,apmu"; 53 54 cpu0: cpu@0 { 55 device_type = "cpu"; 56 compatible = "arm,cortex-a15"; 57 reg = <0>; 58 clock-frequency = <1500000000>; 59 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>; 60 clock-latency = <300000>; /* 300 us */ 61 power-domains = <&sysc R8A7744_PD_CA15_CPU0>; 62 next-level-cache = <&L2_CA15>; 63 64 /* kHz - uV - OPPs unknown yet */ 65 operating-points = <1500000 1000000>, 66 <1312500 1000000>, 67 <1125000 1000000>, 68 < 937500 1000000>, 69 < 750000 1000000>, 70 < 375000 1000000>; 71 }; 72 73 cpu1: cpu@1 { 74 device_type = "cpu"; 75 compatible = "arm,cortex-a15"; 76 reg = <1>; 77 clock-frequency = <1500000000>; 78 clocks = <&cpg CPG_CORE R8A7744_CLK_Z>; 79 clock-latency = <300000>; /* 300 us */ 80 power-domains = <&sysc R8A7744_PD_CA15_CPU1>; 81 next-level-cache = <&L2_CA15>; 82 83 /* kHz - uV - OPPs unknown yet */ 84 operating-points = <1500000 1000000>, 85 <1312500 1000000>, 86 <1125000 1000000>, 87 < 937500 1000000>, 88 < 750000 1000000>, 89 < 375000 1000000>; 90 }; 91 92 L2_CA15: cache-controller-0 { 93 compatible = "cache"; 94 cache-unified; 95 cache-level = <2>; 96 power-domains = <&sysc R8A7744_PD_CA15_SCU>; 97 }; 98 }; 99 100 /* External root clock */ 101 extal_clk: extal { 102 compatible = "fixed-clock"; 103 #clock-cells = <0>; 104 /* This value must be overridden by the board. */ 105 clock-frequency = <0>; 106 }; 107 108 /* External PCIe clock - can be overridden by the board */ 109 pcie_bus_clk: pcie_bus { 110 compatible = "fixed-clock"; 111 #clock-cells = <0>; 112 clock-frequency = <0>; 113 }; 114 115 pmu { 116 compatible = "arm,cortex-a15-pmu"; 117 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 118 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 119 interrupt-affinity = <&cpu0>, <&cpu1>; 120 }; 121 122 /* External SCIF clock */ 123 scif_clk: scif { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 /* This value must be overridden by the board. */ 127 clock-frequency = <0>; 128 }; 129 130 soc { 131 compatible = "simple-bus"; 132 interrupt-parent = <&gic>; 133 134 #address-cells = <2>; 135 #size-cells = <2>; 136 ranges; 137 138 rwdt: watchdog@e6020000 { 139 compatible = "renesas,r8a7744-wdt", 140 "renesas,rcar-gen2-wdt"; 141 reg = <0 0xe6020000 0 0x0c>; 142 clocks = <&cpg CPG_MOD 402>; 143 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 144 resets = <&cpg 402>; 145 status = "disabled"; 146 }; 147 148 gpio0: gpio@e6050000 { 149 compatible = "renesas,gpio-r8a7744", 150 "renesas,rcar-gen2-gpio"; 151 reg = <0 0xe6050000 0 0x50>; 152 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 153 #gpio-cells = <2>; 154 gpio-controller; 155 gpio-ranges = <&pfc 0 0 32>; 156 #interrupt-cells = <2>; 157 interrupt-controller; 158 clocks = <&cpg CPG_MOD 912>; 159 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 160 resets = <&cpg 912>; 161 }; 162 163 gpio1: gpio@e6051000 { 164 compatible = "renesas,gpio-r8a7744", 165 "renesas,rcar-gen2-gpio"; 166 reg = <0 0xe6051000 0 0x50>; 167 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 168 #gpio-cells = <2>; 169 gpio-controller; 170 gpio-ranges = <&pfc 0 32 26>; 171 #interrupt-cells = <2>; 172 interrupt-controller; 173 clocks = <&cpg CPG_MOD 911>; 174 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 175 resets = <&cpg 911>; 176 }; 177 178 gpio2: gpio@e6052000 { 179 compatible = "renesas,gpio-r8a7744", 180 "renesas,rcar-gen2-gpio"; 181 reg = <0 0xe6052000 0 0x50>; 182 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 183 #gpio-cells = <2>; 184 gpio-controller; 185 gpio-ranges = <&pfc 0 64 32>; 186 #interrupt-cells = <2>; 187 interrupt-controller; 188 clocks = <&cpg CPG_MOD 910>; 189 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 190 resets = <&cpg 910>; 191 }; 192 193 gpio3: gpio@e6053000 { 194 compatible = "renesas,gpio-r8a7744", 195 "renesas,rcar-gen2-gpio"; 196 reg = <0 0xe6053000 0 0x50>; 197 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 198 #gpio-cells = <2>; 199 gpio-controller; 200 gpio-ranges = <&pfc 0 96 32>; 201 #interrupt-cells = <2>; 202 interrupt-controller; 203 clocks = <&cpg CPG_MOD 909>; 204 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 205 resets = <&cpg 909>; 206 }; 207 208 gpio4: gpio@e6054000 { 209 compatible = "renesas,gpio-r8a7744", 210 "renesas,rcar-gen2-gpio"; 211 reg = <0 0xe6054000 0 0x50>; 212 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 213 #gpio-cells = <2>; 214 gpio-controller; 215 gpio-ranges = <&pfc 0 128 32>; 216 #interrupt-cells = <2>; 217 interrupt-controller; 218 clocks = <&cpg CPG_MOD 908>; 219 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 220 resets = <&cpg 908>; 221 }; 222 223 gpio5: gpio@e6055000 { 224 compatible = "renesas,gpio-r8a7744", 225 "renesas,rcar-gen2-gpio"; 226 reg = <0 0xe6055000 0 0x50>; 227 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 228 #gpio-cells = <2>; 229 gpio-controller; 230 gpio-ranges = <&pfc 0 160 32>; 231 #interrupt-cells = <2>; 232 interrupt-controller; 233 clocks = <&cpg CPG_MOD 907>; 234 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 235 resets = <&cpg 907>; 236 }; 237 238 gpio6: gpio@e6055400 { 239 compatible = "renesas,gpio-r8a7744", 240 "renesas,rcar-gen2-gpio"; 241 reg = <0 0xe6055400 0 0x50>; 242 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 243 #gpio-cells = <2>; 244 gpio-controller; 245 gpio-ranges = <&pfc 0 192 32>; 246 #interrupt-cells = <2>; 247 interrupt-controller; 248 clocks = <&cpg CPG_MOD 905>; 249 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 250 resets = <&cpg 905>; 251 }; 252 253 gpio7: gpio@e6055800 { 254 compatible = "renesas,gpio-r8a7744", 255 "renesas,rcar-gen2-gpio"; 256 reg = <0 0xe6055800 0 0x50>; 257 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 258 #gpio-cells = <2>; 259 gpio-controller; 260 gpio-ranges = <&pfc 0 224 26>; 261 #interrupt-cells = <2>; 262 interrupt-controller; 263 clocks = <&cpg CPG_MOD 904>; 264 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 265 resets = <&cpg 904>; 266 }; 267 268 pfc: pinctrl@e6060000 { 269 compatible = "renesas,pfc-r8a7744"; 270 reg = <0 0xe6060000 0 0x250>; 271 }; 272 273 tpu: pwm@e60f0000 { 274 compatible = "renesas,tpu-r8a7744", "renesas,tpu"; 275 reg = <0 0xe60f0000 0 0x148>; 276 clocks = <&cpg CPG_MOD 304>; 277 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 278 resets = <&cpg 304>; 279 #pwm-cells = <3>; 280 status = "disabled"; 281 }; 282 283 cpg: clock-controller@e6150000 { 284 compatible = "renesas,r8a7744-cpg-mssr"; 285 reg = <0 0xe6150000 0 0x1000>; 286 clocks = <&extal_clk>, <&usb_extal_clk>; 287 clock-names = "extal", "usb_extal"; 288 #clock-cells = <2>; 289 #power-domain-cells = <0>; 290 #reset-cells = <1>; 291 }; 292 293 apmu@e6152000 { 294 compatible = "renesas,r8a7744-apmu", "renesas,apmu"; 295 reg = <0 0xe6152000 0 0x188>; 296 cpus = <&cpu0>, <&cpu1>; 297 }; 298 299 rst: reset-controller@e6160000 { 300 compatible = "renesas,r8a7744-rst"; 301 reg = <0 0xe6160000 0 0x100>; 302 }; 303 304 sysc: system-controller@e6180000 { 305 compatible = "renesas,r8a7744-sysc"; 306 reg = <0 0xe6180000 0 0x200>; 307 #power-domain-cells = <1>; 308 }; 309 310 irqc: interrupt-controller@e61c0000 { 311 compatible = "renesas,irqc-r8a7744", "renesas,irqc"; 312 #interrupt-cells = <2>; 313 interrupt-controller; 314 reg = <0 0xe61c0000 0 0x200>; 315 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 325 clocks = <&cpg CPG_MOD 407>; 326 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 327 resets = <&cpg 407>; 328 }; 329 330 thermal: thermal@e61f0000 { 331 compatible = "renesas,thermal-r8a7744", 332 "renesas,rcar-gen2-thermal"; 333 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>; 334 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 522>; 336 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 337 resets = <&cpg 522>; 338 #thermal-sensor-cells = <0>; 339 }; 340 341 ipmmu_sy0: iommu@e6280000 { 342 compatible = "renesas,ipmmu-r8a7744", 343 "renesas,ipmmu-vmsa"; 344 reg = <0 0xe6280000 0 0x1000>; 345 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 346 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 347 #iommu-cells = <1>; 348 status = "disabled"; 349 }; 350 351 ipmmu_sy1: iommu@e6290000 { 352 compatible = "renesas,ipmmu-r8a7744", 353 "renesas,ipmmu-vmsa"; 354 reg = <0 0xe6290000 0 0x1000>; 355 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 356 #iommu-cells = <1>; 357 status = "disabled"; 358 }; 359 360 ipmmu_ds: iommu@e6740000 { 361 compatible = "renesas,ipmmu-r8a7744", 362 "renesas,ipmmu-vmsa"; 363 reg = <0 0xe6740000 0 0x1000>; 364 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 365 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 366 #iommu-cells = <1>; 367 status = "disabled"; 368 }; 369 370 ipmmu_mp: iommu@ec680000 { 371 compatible = "renesas,ipmmu-r8a7744", 372 "renesas,ipmmu-vmsa"; 373 reg = <0 0xec680000 0 0x1000>; 374 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 375 #iommu-cells = <1>; 376 status = "disabled"; 377 }; 378 379 ipmmu_mx: iommu@fe951000 { 380 compatible = "renesas,ipmmu-r8a7744", 381 "renesas,ipmmu-vmsa"; 382 reg = <0 0xfe951000 0 0x1000>; 383 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 384 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 385 #iommu-cells = <1>; 386 status = "disabled"; 387 }; 388 389 ipmmu_gp: iommu@e62a0000 { 390 compatible = "renesas,ipmmu-r8a7744", 391 "renesas,ipmmu-vmsa"; 392 reg = <0 0xe62a0000 0 0x1000>; 393 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 395 #iommu-cells = <1>; 396 status = "disabled"; 397 }; 398 399 icram0: sram@e63a0000 { 400 compatible = "mmio-sram"; 401 reg = <0 0xe63a0000 0 0x12000>; 402 #address-cells = <1>; 403 #size-cells = <1>; 404 ranges = <0 0 0xe63a0000 0x12000>; 405 }; 406 407 icram1: sram@e63c0000 { 408 compatible = "mmio-sram"; 409 reg = <0 0xe63c0000 0 0x1000>; 410 #address-cells = <1>; 411 #size-cells = <1>; 412 ranges = <0 0 0xe63c0000 0x1000>; 413 414 smp-sram@0 { 415 compatible = "renesas,smp-sram"; 416 reg = <0 0x100>; 417 }; 418 }; 419 420 icram2: sram@e6300000 { 421 compatible = "mmio-sram"; 422 reg = <0 0xe6300000 0 0x40000>; 423 #address-cells = <1>; 424 #size-cells = <1>; 425 ranges = <0 0 0xe6300000 0x40000>; 426 }; 427 428 /* The memory map in the User's Manual maps the cores to 429 * bus numbers 430 */ 431 i2c0: i2c@e6508000 { 432 #address-cells = <1>; 433 #size-cells = <0>; 434 compatible = "renesas,i2c-r8a7744", 435 "renesas,rcar-gen2-i2c"; 436 reg = <0 0xe6508000 0 0x40>; 437 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 438 clocks = <&cpg CPG_MOD 931>; 439 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 440 resets = <&cpg 931>; 441 i2c-scl-internal-delay-ns = <6>; 442 status = "disabled"; 443 }; 444 445 i2c1: i2c@e6518000 { 446 #address-cells = <1>; 447 #size-cells = <0>; 448 compatible = "renesas,i2c-r8a7744", 449 "renesas,rcar-gen2-i2c"; 450 reg = <0 0xe6518000 0 0x40>; 451 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 452 clocks = <&cpg CPG_MOD 930>; 453 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 454 resets = <&cpg 930>; 455 i2c-scl-internal-delay-ns = <6>; 456 status = "disabled"; 457 }; 458 459 i2c2: i2c@e6530000 { 460 #address-cells = <1>; 461 #size-cells = <0>; 462 compatible = "renesas,i2c-r8a7744", 463 "renesas,rcar-gen2-i2c"; 464 reg = <0 0xe6530000 0 0x40>; 465 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 466 clocks = <&cpg CPG_MOD 929>; 467 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 468 resets = <&cpg 929>; 469 i2c-scl-internal-delay-ns = <6>; 470 status = "disabled"; 471 }; 472 473 i2c3: i2c@e6540000 { 474 #address-cells = <1>; 475 #size-cells = <0>; 476 compatible = "renesas,i2c-r8a7744", 477 "renesas,rcar-gen2-i2c"; 478 reg = <0 0xe6540000 0 0x40>; 479 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 928>; 481 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 482 resets = <&cpg 928>; 483 i2c-scl-internal-delay-ns = <6>; 484 status = "disabled"; 485 }; 486 487 i2c4: i2c@e6520000 { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 compatible = "renesas,i2c-r8a7744", 491 "renesas,rcar-gen2-i2c"; 492 reg = <0 0xe6520000 0 0x40>; 493 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 927>; 495 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 496 resets = <&cpg 927>; 497 i2c-scl-internal-delay-ns = <6>; 498 status = "disabled"; 499 }; 500 501 i2c5: i2c@e6528000 { 502 /* doesn't need pinmux */ 503 #address-cells = <1>; 504 #size-cells = <0>; 505 compatible = "renesas,i2c-r8a7744", 506 "renesas,rcar-gen2-i2c"; 507 reg = <0 0xe6528000 0 0x40>; 508 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 509 clocks = <&cpg CPG_MOD 925>; 510 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 511 resets = <&cpg 925>; 512 i2c-scl-internal-delay-ns = <110>; 513 status = "disabled"; 514 }; 515 516 iic0: i2c@e6500000 { 517 #address-cells = <1>; 518 #size-cells = <0>; 519 compatible = "renesas,iic-r8a7744", 520 "renesas,rcar-gen2-iic", 521 "renesas,rmobile-iic"; 522 reg = <0 0xe6500000 0 0x425>; 523 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 524 clocks = <&cpg CPG_MOD 318>; 525 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 526 <&dmac1 0x61>, <&dmac1 0x62>; 527 dma-names = "tx", "rx", "tx", "rx"; 528 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 529 resets = <&cpg 318>; 530 status = "disabled"; 531 }; 532 533 iic1: i2c@e6510000 { 534 #address-cells = <1>; 535 #size-cells = <0>; 536 compatible = "renesas,iic-r8a7744", 537 "renesas,rcar-gen2-iic", 538 "renesas,rmobile-iic"; 539 reg = <0 0xe6510000 0 0x425>; 540 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 541 clocks = <&cpg CPG_MOD 323>; 542 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 543 <&dmac1 0x65>, <&dmac1 0x66>; 544 dma-names = "tx", "rx", "tx", "rx"; 545 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 546 resets = <&cpg 323>; 547 status = "disabled"; 548 }; 549 550 iic3: i2c@e60b0000 { 551 /* doesn't need pinmux */ 552 #address-cells = <1>; 553 #size-cells = <0>; 554 compatible = "renesas,iic-r8a7744"; 555 reg = <0 0xe60b0000 0 0x425>; 556 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 557 clocks = <&cpg CPG_MOD 926>; 558 dmas = <&dmac0 0x77>, <&dmac0 0x78>, 559 <&dmac1 0x77>, <&dmac1 0x78>; 560 dma-names = "tx", "rx", "tx", "rx"; 561 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 562 resets = <&cpg 926>; 563 status = "disabled"; 564 }; 565 566 hsusb: usb@e6590000 { 567 compatible = "renesas,usbhs-r8a7744", 568 "renesas,rcar-gen2-usbhs"; 569 reg = <0 0xe6590000 0 0x100>; 570 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 571 clocks = <&cpg CPG_MOD 704>; 572 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 573 <&usb_dmac1 0>, <&usb_dmac1 1>; 574 dma-names = "ch0", "ch1", "ch2", "ch3"; 575 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 576 resets = <&cpg 704>; 577 renesas,buswait = <4>; 578 phys = <&usb0 1>; 579 phy-names = "usb"; 580 status = "disabled"; 581 }; 582 583 usbphy: usb-phy@e6590100 { 584 compatible = "renesas,usb-phy-r8a7744", 585 "renesas,rcar-gen2-usb-phy"; 586 reg = <0 0xe6590100 0 0x100>; 587 #address-cells = <1>; 588 #size-cells = <0>; 589 clocks = <&cpg CPG_MOD 704>; 590 clock-names = "usbhs"; 591 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 592 resets = <&cpg 704>; 593 status = "disabled"; 594 595 usb0: usb-channel@0 { 596 reg = <0>; 597 #phy-cells = <1>; 598 }; 599 usb2: usb-channel@2 { 600 reg = <2>; 601 #phy-cells = <1>; 602 }; 603 }; 604 605 usb_dmac0: dma-controller@e65a0000 { 606 compatible = "renesas,r8a7744-usb-dmac", 607 "renesas,usb-dmac"; 608 reg = <0 0xe65a0000 0 0x100>; 609 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 610 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 611 interrupt-names = "ch0", "ch1"; 612 clocks = <&cpg CPG_MOD 330>; 613 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 614 resets = <&cpg 330>; 615 #dma-cells = <1>; 616 dma-channels = <2>; 617 }; 618 619 usb_dmac1: dma-controller@e65b0000 { 620 compatible = "renesas,r8a7744-usb-dmac", 621 "renesas,usb-dmac"; 622 reg = <0 0xe65b0000 0 0x100>; 623 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 625 interrupt-names = "ch0", "ch1"; 626 clocks = <&cpg CPG_MOD 331>; 627 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 628 resets = <&cpg 331>; 629 #dma-cells = <1>; 630 dma-channels = <2>; 631 }; 632 633 dmac0: dma-controller@e6700000 { 634 compatible = "renesas,dmac-r8a7744", 635 "renesas,rcar-dmac"; 636 reg = <0 0xe6700000 0 0x20000>; 637 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 638 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 639 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 640 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 641 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 642 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 643 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 648 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 649 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 650 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 651 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 652 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 653 interrupt-names = "error", 654 "ch0", "ch1", "ch2", "ch3", 655 "ch4", "ch5", "ch6", "ch7", 656 "ch8", "ch9", "ch10", "ch11", 657 "ch12", "ch13", "ch14"; 658 clocks = <&cpg CPG_MOD 219>; 659 clock-names = "fck"; 660 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 661 resets = <&cpg 219>; 662 #dma-cells = <1>; 663 dma-channels = <15>; 664 }; 665 666 dmac1: dma-controller@e6720000 { 667 compatible = "renesas,dmac-r8a7744", 668 "renesas,rcar-dmac"; 669 reg = <0 0xe6720000 0 0x20000>; 670 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 671 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 672 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 677 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 678 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 679 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 680 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 681 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 682 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 683 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 684 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 685 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 686 interrupt-names = "error", 687 "ch0", "ch1", "ch2", "ch3", 688 "ch4", "ch5", "ch6", "ch7", 689 "ch8", "ch9", "ch10", "ch11", 690 "ch12", "ch13", "ch14"; 691 clocks = <&cpg CPG_MOD 218>; 692 clock-names = "fck"; 693 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 694 resets = <&cpg 218>; 695 #dma-cells = <1>; 696 dma-channels = <15>; 697 }; 698 699 avb: ethernet@e6800000 { 700 compatible = "renesas,etheravb-r8a7744", 701 "renesas,etheravb-rcar-gen2"; 702 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 703 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 704 clocks = <&cpg CPG_MOD 812>; 705 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 706 resets = <&cpg 812>; 707 #address-cells = <1>; 708 #size-cells = <0>; 709 status = "disabled"; 710 }; 711 712 qspi: spi@e6b10000 { 713 compatible = "renesas,qspi-r8a7744", "renesas,qspi"; 714 reg = <0 0xe6b10000 0 0x2c>; 715 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 716 clocks = <&cpg CPG_MOD 917>; 717 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 718 <&dmac1 0x17>, <&dmac1 0x18>; 719 dma-names = "tx", "rx", "tx", "rx"; 720 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 721 num-cs = <1>; 722 #address-cells = <1>; 723 #size-cells = <0>; 724 resets = <&cpg 917>; 725 status = "disabled"; 726 }; 727 728 scifa0: serial@e6c40000 { 729 compatible = "renesas,scifa-r8a7744", 730 "renesas,rcar-gen2-scifa", "renesas,scifa"; 731 reg = <0 0xe6c40000 0 0x40>; 732 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 733 clocks = <&cpg CPG_MOD 204>; 734 clock-names = "fck"; 735 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 736 <&dmac1 0x21>, <&dmac1 0x22>; 737 dma-names = "tx", "rx", "tx", "rx"; 738 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 739 resets = <&cpg 204>; 740 status = "disabled"; 741 }; 742 743 scifa1: serial@e6c50000 { 744 compatible = "renesas,scifa-r8a7744", 745 "renesas,rcar-gen2-scifa", "renesas,scifa"; 746 reg = <0 0xe6c50000 0 0x40>; 747 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 748 clocks = <&cpg CPG_MOD 203>; 749 clock-names = "fck"; 750 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 751 <&dmac1 0x25>, <&dmac1 0x26>; 752 dma-names = "tx", "rx", "tx", "rx"; 753 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 754 resets = <&cpg 203>; 755 status = "disabled"; 756 }; 757 758 scifa2: serial@e6c60000 { 759 compatible = "renesas,scifa-r8a7744", 760 "renesas,rcar-gen2-scifa", "renesas,scifa"; 761 reg = <0 0xe6c60000 0 0x40>; 762 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 763 clocks = <&cpg CPG_MOD 202>; 764 clock-names = "fck"; 765 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 766 <&dmac1 0x27>, <&dmac1 0x28>; 767 dma-names = "tx", "rx", "tx", "rx"; 768 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 769 resets = <&cpg 202>; 770 status = "disabled"; 771 }; 772 773 scifa3: serial@e6c70000 { 774 compatible = "renesas,scifa-r8a7744", 775 "renesas,rcar-gen2-scifa", "renesas,scifa"; 776 reg = <0 0xe6c70000 0 0x40>; 777 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 778 clocks = <&cpg CPG_MOD 1106>; 779 clock-names = "fck"; 780 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 781 <&dmac1 0x1b>, <&dmac1 0x1c>; 782 dma-names = "tx", "rx", "tx", "rx"; 783 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 784 resets = <&cpg 1106>; 785 status = "disabled"; 786 }; 787 788 scifa4: serial@e6c78000 { 789 compatible = "renesas,scifa-r8a7744", 790 "renesas,rcar-gen2-scifa", "renesas,scifa"; 791 reg = <0 0xe6c78000 0 0x40>; 792 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 793 clocks = <&cpg CPG_MOD 1107>; 794 clock-names = "fck"; 795 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 796 <&dmac1 0x1f>, <&dmac1 0x20>; 797 dma-names = "tx", "rx", "tx", "rx"; 798 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 799 resets = <&cpg 1107>; 800 status = "disabled"; 801 }; 802 803 scifa5: serial@e6c80000 { 804 compatible = "renesas,scifa-r8a7744", 805 "renesas,rcar-gen2-scifa", "renesas,scifa"; 806 reg = <0 0xe6c80000 0 0x40>; 807 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 808 clocks = <&cpg CPG_MOD 1108>; 809 clock-names = "fck"; 810 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 811 <&dmac1 0x23>, <&dmac1 0x24>; 812 dma-names = "tx", "rx", "tx", "rx"; 813 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 814 resets = <&cpg 1108>; 815 status = "disabled"; 816 }; 817 818 scifb0: serial@e6c20000 { 819 compatible = "renesas,scifb-r8a7744", 820 "renesas,rcar-gen2-scifb", "renesas,scifb"; 821 reg = <0 0xe6c20000 0 0x100>; 822 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 823 clocks = <&cpg CPG_MOD 206>; 824 clock-names = "fck"; 825 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 826 <&dmac1 0x3d>, <&dmac1 0x3e>; 827 dma-names = "tx", "rx", "tx", "rx"; 828 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 829 resets = <&cpg 206>; 830 status = "disabled"; 831 }; 832 833 scifb1: serial@e6c30000 { 834 compatible = "renesas,scifb-r8a7744", 835 "renesas,rcar-gen2-scifb", "renesas,scifb"; 836 reg = <0 0xe6c30000 0 0x100>; 837 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 838 clocks = <&cpg CPG_MOD 207>; 839 clock-names = "fck"; 840 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 841 <&dmac1 0x19>, <&dmac1 0x1a>; 842 dma-names = "tx", "rx", "tx", "rx"; 843 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 844 resets = <&cpg 207>; 845 status = "disabled"; 846 }; 847 848 scifb2: serial@e6ce0000 { 849 compatible = "renesas,scifb-r8a7744", 850 "renesas,rcar-gen2-scifb", "renesas,scifb"; 851 reg = <0 0xe6ce0000 0 0x100>; 852 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 853 clocks = <&cpg CPG_MOD 216>; 854 clock-names = "fck"; 855 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 856 <&dmac1 0x1d>, <&dmac1 0x1e>; 857 dma-names = "tx", "rx", "tx", "rx"; 858 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 859 resets = <&cpg 216>; 860 status = "disabled"; 861 }; 862 863 scif0: serial@e6e60000 { 864 compatible = "renesas,scif-r8a7744", 865 "renesas,rcar-gen2-scif", "renesas,scif"; 866 reg = <0 0xe6e60000 0 0x40>; 867 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 868 clocks = <&cpg CPG_MOD 721>, 869 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 870 clock-names = "fck", "brg_int", "scif_clk"; 871 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 872 <&dmac1 0x29>, <&dmac1 0x2a>; 873 dma-names = "tx", "rx", "tx", "rx"; 874 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 875 resets = <&cpg 721>; 876 status = "disabled"; 877 }; 878 879 scif1: serial@e6e68000 { 880 compatible = "renesas,scif-r8a7744", 881 "renesas,rcar-gen2-scif", "renesas,scif"; 882 reg = <0 0xe6e68000 0 0x40>; 883 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 884 clocks = <&cpg CPG_MOD 720>, 885 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 886 clock-names = "fck", "brg_int", "scif_clk"; 887 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 888 <&dmac1 0x2d>, <&dmac1 0x2e>; 889 dma-names = "tx", "rx", "tx", "rx"; 890 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 891 resets = <&cpg 720>; 892 status = "disabled"; 893 }; 894 895 scif2: serial@e6e58000 { 896 compatible = "renesas,scif-r8a7744", 897 "renesas,rcar-gen2-scif", "renesas,scif"; 898 reg = <0 0xe6e58000 0 0x40>; 899 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 900 clocks = <&cpg CPG_MOD 719>, 901 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 902 clock-names = "fck", "brg_int", "scif_clk"; 903 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 904 <&dmac1 0x2b>, <&dmac1 0x2c>; 905 dma-names = "tx", "rx", "tx", "rx"; 906 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 907 resets = <&cpg 719>; 908 status = "disabled"; 909 }; 910 911 scif3: serial@e6ea8000 { 912 compatible = "renesas,scif-r8a7744", 913 "renesas,rcar-gen2-scif", "renesas,scif"; 914 reg = <0 0xe6ea8000 0 0x40>; 915 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 916 clocks = <&cpg CPG_MOD 718>, 917 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 918 clock-names = "fck", "brg_int", "scif_clk"; 919 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 920 <&dmac1 0x2f>, <&dmac1 0x30>; 921 dma-names = "tx", "rx", "tx", "rx"; 922 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 923 resets = <&cpg 718>; 924 status = "disabled"; 925 }; 926 927 scif4: serial@e6ee0000 { 928 compatible = "renesas,scif-r8a7744", 929 "renesas,rcar-gen2-scif", "renesas,scif"; 930 reg = <0 0xe6ee0000 0 0x40>; 931 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 932 clocks = <&cpg CPG_MOD 715>, 933 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 934 clock-names = "fck", "brg_int", "scif_clk"; 935 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 936 <&dmac1 0xfb>, <&dmac1 0xfc>; 937 dma-names = "tx", "rx", "tx", "rx"; 938 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 939 resets = <&cpg 715>; 940 status = "disabled"; 941 }; 942 943 scif5: serial@e6ee8000 { 944 compatible = "renesas,scif-r8a7744", 945 "renesas,rcar-gen2-scif", "renesas,scif"; 946 reg = <0 0xe6ee8000 0 0x40>; 947 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 948 clocks = <&cpg CPG_MOD 714>, 949 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 950 clock-names = "fck", "brg_int", "scif_clk"; 951 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 952 <&dmac1 0xfd>, <&dmac1 0xfe>; 953 dma-names = "tx", "rx", "tx", "rx"; 954 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 955 resets = <&cpg 714>; 956 status = "disabled"; 957 }; 958 959 hscif0: serial@e62c0000 { 960 compatible = "renesas,hscif-r8a7744", 961 "renesas,rcar-gen2-hscif", "renesas,hscif"; 962 reg = <0 0xe62c0000 0 0x60>; 963 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 964 clocks = <&cpg CPG_MOD 717>, 965 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 966 clock-names = "fck", "brg_int", "scif_clk"; 967 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 968 <&dmac1 0x39>, <&dmac1 0x3a>; 969 dma-names = "tx", "rx", "tx", "rx"; 970 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 971 resets = <&cpg 717>; 972 status = "disabled"; 973 }; 974 975 hscif1: serial@e62c8000 { 976 compatible = "renesas,hscif-r8a7744", 977 "renesas,rcar-gen2-hscif", "renesas,hscif"; 978 reg = <0 0xe62c8000 0 0x60>; 979 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 980 clocks = <&cpg CPG_MOD 716>, 981 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 982 clock-names = "fck", "brg_int", "scif_clk"; 983 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 984 <&dmac1 0x4d>, <&dmac1 0x4e>; 985 dma-names = "tx", "rx", "tx", "rx"; 986 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 987 resets = <&cpg 716>; 988 status = "disabled"; 989 }; 990 991 hscif2: serial@e62d0000 { 992 compatible = "renesas,hscif-r8a7744", 993 "renesas,rcar-gen2-hscif", "renesas,hscif"; 994 reg = <0 0xe62d0000 0 0x60>; 995 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 996 clocks = <&cpg CPG_MOD 713>, 997 <&cpg CPG_CORE R8A7744_CLK_ZS>, <&scif_clk>; 998 clock-names = "fck", "brg_int", "scif_clk"; 999 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 1000 <&dmac1 0x3b>, <&dmac1 0x3c>; 1001 dma-names = "tx", "rx", "tx", "rx"; 1002 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1003 resets = <&cpg 713>; 1004 status = "disabled"; 1005 }; 1006 1007 msiof0: spi@e6e20000 { 1008 compatible = "renesas,msiof-r8a7744", 1009 "renesas,rcar-gen2-msiof"; 1010 reg = <0 0xe6e20000 0 0x0064>; 1011 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1012 clocks = <&cpg CPG_MOD 000>; 1013 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 1014 <&dmac1 0x51>, <&dmac1 0x52>; 1015 dma-names = "tx", "rx", "tx", "rx"; 1016 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1017 #address-cells = <1>; 1018 #size-cells = <0>; 1019 resets = <&cpg 000>; 1020 status = "disabled"; 1021 }; 1022 1023 msiof1: spi@e6e10000 { 1024 compatible = "renesas,msiof-r8a7744", 1025 "renesas,rcar-gen2-msiof"; 1026 reg = <0 0xe6e10000 0 0x0064>; 1027 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1028 clocks = <&cpg CPG_MOD 208>; 1029 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 1030 <&dmac1 0x55>, <&dmac1 0x56>; 1031 dma-names = "tx", "rx", "tx", "rx"; 1032 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1033 #address-cells = <1>; 1034 #size-cells = <0>; 1035 resets = <&cpg 208>; 1036 status = "disabled"; 1037 }; 1038 1039 msiof2: spi@e6e00000 { 1040 compatible = "renesas,msiof-r8a7744", 1041 "renesas,rcar-gen2-msiof"; 1042 reg = <0 0xe6e00000 0 0x0064>; 1043 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1044 clocks = <&cpg CPG_MOD 205>; 1045 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 1046 <&dmac1 0x41>, <&dmac1 0x42>; 1047 dma-names = "tx", "rx", "tx", "rx"; 1048 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1049 #address-cells = <1>; 1050 #size-cells = <0>; 1051 resets = <&cpg 205>; 1052 status = "disabled"; 1053 }; 1054 1055 pwm0: pwm@e6e30000 { 1056 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1057 reg = <0 0xe6e30000 0 0x8>; 1058 clocks = <&cpg CPG_MOD 523>; 1059 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1060 resets = <&cpg 523>; 1061 #pwm-cells = <2>; 1062 status = "disabled"; 1063 }; 1064 1065 pwm1: pwm@e6e31000 { 1066 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1067 reg = <0 0xe6e31000 0 0x8>; 1068 clocks = <&cpg CPG_MOD 523>; 1069 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1070 resets = <&cpg 523>; 1071 #pwm-cells = <2>; 1072 status = "disabled"; 1073 }; 1074 1075 pwm2: pwm@e6e32000 { 1076 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1077 reg = <0 0xe6e32000 0 0x8>; 1078 clocks = <&cpg CPG_MOD 523>; 1079 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1080 resets = <&cpg 523>; 1081 #pwm-cells = <2>; 1082 status = "disabled"; 1083 }; 1084 1085 pwm3: pwm@e6e33000 { 1086 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1087 reg = <0 0xe6e33000 0 0x8>; 1088 clocks = <&cpg CPG_MOD 523>; 1089 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1090 resets = <&cpg 523>; 1091 #pwm-cells = <2>; 1092 status = "disabled"; 1093 }; 1094 1095 pwm4: pwm@e6e34000 { 1096 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1097 reg = <0 0xe6e34000 0 0x8>; 1098 clocks = <&cpg CPG_MOD 523>; 1099 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1100 resets = <&cpg 523>; 1101 #pwm-cells = <2>; 1102 status = "disabled"; 1103 }; 1104 1105 pwm5: pwm@e6e35000 { 1106 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1107 reg = <0 0xe6e35000 0 0x8>; 1108 clocks = <&cpg CPG_MOD 523>; 1109 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1110 resets = <&cpg 523>; 1111 #pwm-cells = <2>; 1112 status = "disabled"; 1113 }; 1114 1115 pwm6: pwm@e6e36000 { 1116 compatible = "renesas,pwm-r8a7744", "renesas,pwm-rcar"; 1117 reg = <0 0xe6e36000 0 0x8>; 1118 clocks = <&cpg CPG_MOD 523>; 1119 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1120 resets = <&cpg 523>; 1121 #pwm-cells = <2>; 1122 status = "disabled"; 1123 }; 1124 1125 can0: can@e6e80000 { 1126 compatible = "renesas,can-r8a7744", 1127 "renesas,rcar-gen2-can"; 1128 reg = <0 0xe6e80000 0 0x1000>; 1129 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1130 clocks = <&cpg CPG_MOD 916>, 1131 <&cpg CPG_CORE R8A7744_CLK_RCAN>, 1132 <&can_clk>; 1133 clock-names = "clkp1", "clkp2", "can_clk"; 1134 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1135 resets = <&cpg 916>; 1136 status = "disabled"; 1137 }; 1138 1139 can1: can@e6e88000 { 1140 compatible = "renesas,can-r8a7744", 1141 "renesas,rcar-gen2-can"; 1142 reg = <0 0xe6e88000 0 0x1000>; 1143 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1144 clocks = <&cpg CPG_MOD 915>, 1145 <&cpg CPG_CORE R8A7744_CLK_RCAN>, 1146 <&can_clk>; 1147 clock-names = "clkp1", "clkp2", "can_clk"; 1148 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1149 resets = <&cpg 915>; 1150 status = "disabled"; 1151 }; 1152 1153 vin0: video@e6ef0000 { 1154 compatible = "renesas,vin-r8a7744", 1155 "renesas,rcar-gen2-vin"; 1156 reg = <0 0xe6ef0000 0 0x1000>; 1157 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1158 clocks = <&cpg CPG_MOD 811>; 1159 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1160 resets = <&cpg 811>; 1161 status = "disabled"; 1162 }; 1163 1164 vin1: video@e6ef1000 { 1165 compatible = "renesas,vin-r8a7744", 1166 "renesas,rcar-gen2-vin"; 1167 reg = <0 0xe6ef1000 0 0x1000>; 1168 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1169 clocks = <&cpg CPG_MOD 810>; 1170 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1171 resets = <&cpg 810>; 1172 status = "disabled"; 1173 }; 1174 1175 vin2: video@e6ef2000 { 1176 compatible = "renesas,vin-r8a7744", 1177 "renesas,rcar-gen2-vin"; 1178 reg = <0 0xe6ef2000 0 0x1000>; 1179 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1180 clocks = <&cpg CPG_MOD 809>; 1181 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1182 resets = <&cpg 809>; 1183 status = "disabled"; 1184 }; 1185 1186 rcar_sound: sound@ec500000 { 1187 /* 1188 * #sound-dai-cells is required 1189 * 1190 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1191 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1192 */ 1193 compatible = "renesas,rcar_sound-r8a7744", 1194 "renesas,rcar_sound-gen2"; 1195 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1196 <0 0xec5a0000 0 0x100>, /* ADG */ 1197 <0 0xec540000 0 0x1000>, /* SSIU */ 1198 <0 0xec541000 0 0x280>, /* SSI */ 1199 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1200 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1201 1202 clocks = <&cpg CPG_MOD 1005>, 1203 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1204 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1205 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1206 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1207 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1208 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1209 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1210 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1211 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1212 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1213 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1214 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1215 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1216 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, 1217 <&cpg CPG_CORE R8A7744_CLK_M2>; 1218 clock-names = "ssi-all", 1219 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1220 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", 1221 "src.9", "src.8", "src.7", "src.6", "src.5", 1222 "src.4", "src.3", "src.2", "src.1", "src.0", 1223 "ctu.0", "ctu.1", 1224 "mix.0", "mix.1", 1225 "dvc.0", "dvc.1", 1226 "clk_a", "clk_b", "clk_c", "clk_i"; 1227 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1228 resets = <&cpg 1005>, 1229 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>, 1230 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>, 1231 <&cpg 1014>, <&cpg 1015>; 1232 reset-names = "ssi-all", 1233 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", 1234 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0"; 1235 status = "disabled"; 1236 1237 rcar_sound,dvc { 1238 dvc0: dvc-0 { 1239 dmas = <&audma1 0xbc>; 1240 dma-names = "tx"; 1241 }; 1242 dvc1: dvc-1 { 1243 dmas = <&audma1 0xbe>; 1244 dma-names = "tx"; 1245 }; 1246 }; 1247 1248 rcar_sound,mix { 1249 mix0: mix-0 { }; 1250 mix1: mix-1 { }; 1251 }; 1252 1253 rcar_sound,ctu { 1254 ctu00: ctu-0 { }; 1255 ctu01: ctu-1 { }; 1256 ctu02: ctu-2 { }; 1257 ctu03: ctu-3 { }; 1258 ctu10: ctu-4 { }; 1259 ctu11: ctu-5 { }; 1260 ctu12: ctu-6 { }; 1261 ctu13: ctu-7 { }; 1262 }; 1263 1264 rcar_sound,src { 1265 src0: src-0 { 1266 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1267 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1268 dma-names = "rx", "tx"; 1269 }; 1270 src1: src-1 { 1271 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1272 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1273 dma-names = "rx", "tx"; 1274 }; 1275 src2: src-2 { 1276 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1277 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1278 dma-names = "rx", "tx"; 1279 }; 1280 src3: src-3 { 1281 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1282 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1283 dma-names = "rx", "tx"; 1284 }; 1285 src4: src-4 { 1286 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1287 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1288 dma-names = "rx", "tx"; 1289 }; 1290 src5: src-5 { 1291 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1292 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1293 dma-names = "rx", "tx"; 1294 }; 1295 src6: src-6 { 1296 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1297 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1298 dma-names = "rx", "tx"; 1299 }; 1300 src7: src-7 { 1301 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1302 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1303 dma-names = "rx", "tx"; 1304 }; 1305 src8: src-8 { 1306 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1307 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1308 dma-names = "rx", "tx"; 1309 }; 1310 src9: src-9 { 1311 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1312 dmas = <&audma0 0x97>, <&audma1 0xba>; 1313 dma-names = "rx", "tx"; 1314 }; 1315 }; 1316 1317 rcar_sound,ssi { 1318 ssi0: ssi-0 { 1319 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1320 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1321 dma-names = "rx", "tx", "rxu", "txu"; 1322 }; 1323 ssi1: ssi-1 { 1324 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1325 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1326 dma-names = "rx", "tx", "rxu", "txu"; 1327 }; 1328 ssi2: ssi-2 { 1329 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1330 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1331 dma-names = "rx", "tx", "rxu", "txu"; 1332 }; 1333 ssi3: ssi-3 { 1334 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1335 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1336 dma-names = "rx", "tx", "rxu", "txu"; 1337 }; 1338 ssi4: ssi-4 { 1339 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1340 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1341 dma-names = "rx", "tx", "rxu", "txu"; 1342 }; 1343 ssi5: ssi-5 { 1344 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1345 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1346 dma-names = "rx", "tx", "rxu", "txu"; 1347 }; 1348 ssi6: ssi-6 { 1349 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1350 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1351 dma-names = "rx", "tx", "rxu", "txu"; 1352 }; 1353 ssi7: ssi-7 { 1354 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1355 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1356 dma-names = "rx", "tx", "rxu", "txu"; 1357 }; 1358 ssi8: ssi-8 { 1359 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1360 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1361 dma-names = "rx", "tx", "rxu", "txu"; 1362 }; 1363 ssi9: ssi-9 { 1364 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1365 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1366 dma-names = "rx", "tx", "rxu", "txu"; 1367 }; 1368 }; 1369 }; 1370 1371 audma0: dma-controller@ec700000 { 1372 compatible = "renesas,dmac-r8a7744", 1373 "renesas,rcar-dmac"; 1374 reg = <0 0xec700000 0 0x10000>; 1375 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1376 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1377 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1378 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1379 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1380 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1381 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1382 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1383 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1384 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1385 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1386 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1387 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1388 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1389 interrupt-names = "error", 1390 "ch0", "ch1", "ch2", "ch3", 1391 "ch4", "ch5", "ch6", "ch7", 1392 "ch8", "ch9", "ch10", "ch11", 1393 "ch12"; 1394 clocks = <&cpg CPG_MOD 502>; 1395 clock-names = "fck"; 1396 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1397 resets = <&cpg 502>; 1398 #dma-cells = <1>; 1399 dma-channels = <13>; 1400 }; 1401 1402 audma1: dma-controller@ec720000 { 1403 compatible = "renesas,dmac-r8a7744", 1404 "renesas,rcar-dmac"; 1405 reg = <0 0xec720000 0 0x10000>; 1406 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 1407 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1408 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1409 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1410 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1411 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1412 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1413 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1414 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1415 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1416 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1417 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1418 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1419 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>; 1420 interrupt-names = "error", 1421 "ch0", "ch1", "ch2", "ch3", 1422 "ch4", "ch5", "ch6", "ch7", 1423 "ch8", "ch9", "ch10", "ch11", 1424 "ch12"; 1425 clocks = <&cpg CPG_MOD 501>; 1426 clock-names = "fck"; 1427 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1428 resets = <&cpg 501>; 1429 #dma-cells = <1>; 1430 dma-channels = <13>; 1431 }; 1432 1433 /* 1434 * pci1 and xhci share the same phy, therefore only one of them 1435 * can be active at any one time. If both of them are enabled, 1436 * a race condition will determine who'll control the phy. 1437 * A firmware file is needed by the xhci driver in order for 1438 * USB 3.0 to work properly. 1439 */ 1440 xhci: usb@ee000000 { 1441 compatible = "renesas,xhci-r8a7744", 1442 "renesas,rcar-gen2-xhci"; 1443 reg = <0 0xee000000 0 0xc00>; 1444 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 1445 clocks = <&cpg CPG_MOD 328>; 1446 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1447 resets = <&cpg 328>; 1448 phys = <&usb2 1>; 1449 phy-names = "usb"; 1450 status = "disabled"; 1451 }; 1452 1453 pci0: pci@ee090000 { 1454 compatible = "renesas,pci-r8a7744", 1455 "renesas,pci-rcar-gen2"; 1456 device_type = "pci"; 1457 reg = <0 0xee090000 0 0xc00>, 1458 <0 0xee080000 0 0x1100>; 1459 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1460 clocks = <&cpg CPG_MOD 703>; 1461 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1462 resets = <&cpg 703>; 1463 status = "disabled"; 1464 1465 bus-range = <0 0>; 1466 #address-cells = <3>; 1467 #size-cells = <2>; 1468 #interrupt-cells = <1>; 1469 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1470 interrupt-map-mask = <0xf800 0 0 0x7>; 1471 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1472 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1473 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1474 1475 usb@1,0 { 1476 reg = <0x800 0 0 0 0>; 1477 phys = <&usb0 0>; 1478 phy-names = "usb"; 1479 }; 1480 1481 usb@2,0 { 1482 reg = <0x1000 0 0 0 0>; 1483 phys = <&usb0 0>; 1484 phy-names = "usb"; 1485 }; 1486 }; 1487 1488 pci1: pci@ee0d0000 { 1489 compatible = "renesas,pci-r8a7744", 1490 "renesas,pci-rcar-gen2"; 1491 device_type = "pci"; 1492 reg = <0 0xee0d0000 0 0xc00>, 1493 <0 0xee0c0000 0 0x1100>; 1494 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 703>; 1496 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1497 resets = <&cpg 703>; 1498 status = "disabled"; 1499 1500 bus-range = <1 1>; 1501 #address-cells = <3>; 1502 #size-cells = <2>; 1503 #interrupt-cells = <1>; 1504 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1505 interrupt-map-mask = <0xf800 0 0 0x7>; 1506 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1507 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1508 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1509 1510 usb@1,0 { 1511 reg = <0x10800 0 0 0 0>; 1512 phys = <&usb2 0>; 1513 phy-names = "usb"; 1514 }; 1515 1516 usb@2,0 { 1517 reg = <0x11000 0 0 0 0>; 1518 phys = <&usb2 0>; 1519 phy-names = "usb"; 1520 }; 1521 }; 1522 1523 sdhi0: mmc@ee100000 { 1524 compatible = "renesas,sdhi-r8a7744", 1525 "renesas,rcar-gen2-sdhi"; 1526 reg = <0 0xee100000 0 0x328>; 1527 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1528 clocks = <&cpg CPG_MOD 314>; 1529 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1530 <&dmac1 0xcd>, <&dmac1 0xce>; 1531 dma-names = "tx", "rx", "tx", "rx"; 1532 max-frequency = <195000000>; 1533 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1534 resets = <&cpg 314>; 1535 status = "disabled"; 1536 }; 1537 1538 sdhi1: mmc@ee140000 { 1539 compatible = "renesas,sdhi-r8a7744", 1540 "renesas,rcar-gen2-sdhi"; 1541 reg = <0 0xee140000 0 0x100>; 1542 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1543 clocks = <&cpg CPG_MOD 312>; 1544 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1545 <&dmac1 0xc1>, <&dmac1 0xc2>; 1546 dma-names = "tx", "rx", "tx", "rx"; 1547 max-frequency = <97500000>; 1548 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1549 resets = <&cpg 312>; 1550 status = "disabled"; 1551 }; 1552 1553 sdhi2: mmc@ee160000 { 1554 compatible = "renesas,sdhi-r8a7744", 1555 "renesas,rcar-gen2-sdhi"; 1556 reg = <0 0xee160000 0 0x100>; 1557 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1558 clocks = <&cpg CPG_MOD 311>; 1559 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1560 <&dmac1 0xd3>, <&dmac1 0xd4>; 1561 dma-names = "tx", "rx", "tx", "rx"; 1562 max-frequency = <97500000>; 1563 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1564 resets = <&cpg 311>; 1565 status = "disabled"; 1566 }; 1567 1568 mmcif0: mmc@ee200000 { 1569 compatible = "renesas,mmcif-r8a7744", 1570 "renesas,sh-mmcif"; 1571 reg = <0 0xee200000 0 0x80>; 1572 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 315>; 1574 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1575 <&dmac1 0xd1>, <&dmac1 0xd2>; 1576 dma-names = "tx", "rx", "tx", "rx"; 1577 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1578 resets = <&cpg 315>; 1579 reg-io-width = <4>; 1580 max-frequency = <97500000>; 1581 status = "disabled"; 1582 }; 1583 1584 gic: interrupt-controller@f1001000 { 1585 compatible = "arm,gic-400"; 1586 #interrupt-cells = <3>; 1587 #address-cells = <0>; 1588 interrupt-controller; 1589 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1590 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1591 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1592 clocks = <&cpg CPG_MOD 408>; 1593 clock-names = "clk"; 1594 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1595 resets = <&cpg 408>; 1596 }; 1597 1598 pciec: pcie@fe000000 { 1599 compatible = "renesas,pcie-r8a7744", 1600 "renesas,pcie-rcar-gen2"; 1601 reg = <0 0xfe000000 0 0x80000>; 1602 #address-cells = <3>; 1603 #size-cells = <2>; 1604 bus-range = <0x00 0xff>; 1605 device_type = "pci"; 1606 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1607 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1608 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1609 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1610 /* Map all possible DDR as inbound ranges */ 1611 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>, 1612 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>; 1613 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1614 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1615 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1616 #interrupt-cells = <1>; 1617 interrupt-map-mask = <0 0 0 0>; 1618 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1619 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1620 clock-names = "pcie", "pcie_bus"; 1621 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1622 resets = <&cpg 319>; 1623 status = "disabled"; 1624 }; 1625 1626 vsp@fe928000 { 1627 compatible = "renesas,vsp1"; 1628 reg = <0 0xfe928000 0 0x8000>; 1629 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1630 clocks = <&cpg CPG_MOD 131>; 1631 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1632 resets = <&cpg 131>; 1633 }; 1634 1635 vsp@fe930000 { 1636 compatible = "renesas,vsp1"; 1637 reg = <0 0xfe930000 0 0x8000>; 1638 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1639 clocks = <&cpg CPG_MOD 128>; 1640 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1641 resets = <&cpg 128>; 1642 }; 1643 1644 vsp@fe938000 { 1645 compatible = "renesas,vsp1"; 1646 reg = <0 0xfe938000 0 0x8000>; 1647 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 1648 clocks = <&cpg CPG_MOD 127>; 1649 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1650 resets = <&cpg 127>; 1651 }; 1652 1653 du: display@feb00000 { 1654 compatible = "renesas,du-r8a7744"; 1655 reg = <0 0xfeb00000 0 0x40000>; 1656 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1657 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1658 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1659 clock-names = "du.0", "du.1"; 1660 resets = <&cpg 724>; 1661 reset-names = "du.0"; 1662 status = "disabled"; 1663 1664 ports { 1665 #address-cells = <1>; 1666 #size-cells = <0>; 1667 1668 port@0 { 1669 reg = <0>; 1670 du_out_rgb: endpoint { 1671 }; 1672 }; 1673 port@1 { 1674 reg = <1>; 1675 du_out_lvds0: endpoint { 1676 remote-endpoint = <&lvds0_in>; 1677 }; 1678 }; 1679 }; 1680 }; 1681 1682 lvds0: lvds@feb90000 { 1683 compatible = "renesas,r8a7744-lvds"; 1684 reg = <0 0xfeb90000 0 0x1c>; 1685 clocks = <&cpg CPG_MOD 726>; 1686 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1687 resets = <&cpg 726>; 1688 status = "disabled"; 1689 1690 ports { 1691 #address-cells = <1>; 1692 #size-cells = <0>; 1693 1694 port@0 { 1695 reg = <0>; 1696 lvds0_in: endpoint { 1697 remote-endpoint = <&du_out_lvds0>; 1698 }; 1699 }; 1700 port@1 { 1701 reg = <1>; 1702 lvds0_out: endpoint { 1703 }; 1704 }; 1705 }; 1706 }; 1707 1708 prr: chipid@ff000044 { 1709 compatible = "renesas,prr"; 1710 reg = <0 0xff000044 0 4>; 1711 }; 1712 1713 cmt0: timer@ffca0000 { 1714 compatible = "renesas,r8a7744-cmt0", 1715 "renesas,rcar-gen2-cmt0"; 1716 reg = <0 0xffca0000 0 0x1004>; 1717 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1718 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 124>; 1720 clock-names = "fck"; 1721 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1722 resets = <&cpg 124>; 1723 status = "disabled"; 1724 }; 1725 1726 cmt1: timer@e6130000 { 1727 compatible = "renesas,r8a7744-cmt1", 1728 "renesas,rcar-gen2-cmt1"; 1729 reg = <0 0xe6130000 0 0x1004>; 1730 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1731 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1732 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1733 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1734 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1735 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1736 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1737 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1738 clocks = <&cpg CPG_MOD 329>; 1739 clock-names = "fck"; 1740 power-domains = <&sysc R8A7744_PD_ALWAYS_ON>; 1741 resets = <&cpg 329>; 1742 status = "disabled"; 1743 }; 1744 }; 1745 1746 thermal-zones { 1747 cpu_thermal: cpu-thermal { 1748 polling-delay-passive = <0>; 1749 polling-delay = <0>; 1750 1751 thermal-sensors = <&thermal>; 1752 1753 trips { 1754 cpu-crit { 1755 temperature = <95000>; 1756 hysteresis = <0>; 1757 type = "critical"; 1758 }; 1759 }; 1760 1761 cooling-maps { 1762 }; 1763 }; 1764 }; 1765 1766 timer { 1767 compatible = "arm,armv7-timer"; 1768 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1769 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1770 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1771 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1772 }; 1773 1774 /* External USB clock - can be overridden by the board */ 1775 usb_extal_clk: usb_extal { 1776 compatible = "fixed-clock"; 1777 #clock-cells = <0>; 1778 clock-frequency = <48000000>; 1779 }; 1780}; 1781