1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7745 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11#include <dt-bindings/power/r8a7745-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7745"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &iic0; 26 i2c7 = &iic1; 27 spi0 = &qspi; 28 spi1 = &msiof0; 29 spi2 = &msiof1; 30 spi3 = &msiof2; 31 vin0 = &vin0; 32 vin1 = &vin1; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed 37 * frequency clocks by default. Boards that provide audio 38 * clocks should override them. 39 */ 40 audio_clka: audio_clka { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 audio_clkb: audio_clkb { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clkc: audio_clkc { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 /* This value must be overridden by the board. */ 61 clock-frequency = <0>; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 enable-method = "renesas,apmu"; 68 69 cpu0: cpu@0 { 70 device_type = "cpu"; 71 compatible = "arm,cortex-a7"; 72 reg = <0>; 73 clock-frequency = <1000000000>; 74 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 75 power-domains = <&sysc R8A7745_PD_CA7_CPU0>; 76 next-level-cache = <&L2_CA7>; 77 }; 78 79 cpu1: cpu@1 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a7"; 82 reg = <1>; 83 clock-frequency = <1000000000>; 84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 85 power-domains = <&sysc R8A7745_PD_CA7_CPU1>; 86 next-level-cache = <&L2_CA7>; 87 }; 88 89 L2_CA7: cache-controller-0 { 90 compatible = "cache"; 91 cache-unified; 92 cache-level = <2>; 93 power-domains = <&sysc R8A7745_PD_CA7_SCU>; 94 }; 95 }; 96 97 /* External root clock */ 98 extal_clk: extal { 99 compatible = "fixed-clock"; 100 #clock-cells = <0>; 101 /* This value must be overridden by the board. */ 102 clock-frequency = <0>; 103 }; 104 105 pmu { 106 compatible = "arm,cortex-a7-pmu"; 107 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 108 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 109 interrupt-affinity = <&cpu0>, <&cpu1>; 110 }; 111 112 /* External SCIF clock */ 113 scif_clk: scif { 114 compatible = "fixed-clock"; 115 #clock-cells = <0>; 116 /* This value must be overridden by the board. */ 117 clock-frequency = <0>; 118 }; 119 120 soc { 121 compatible = "simple-bus"; 122 interrupt-parent = <&gic>; 123 124 #address-cells = <2>; 125 #size-cells = <2>; 126 ranges; 127 128 gpio0: gpio@e6050000 { 129 compatible = "renesas,gpio-r8a7745", 130 "renesas,rcar-gen2-gpio"; 131 reg = <0 0xe6050000 0 0x50>; 132 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 133 #gpio-cells = <2>; 134 gpio-controller; 135 gpio-ranges = <&pfc 0 0 32>; 136 #interrupt-cells = <2>; 137 interrupt-controller; 138 clocks = <&cpg CPG_MOD 912>; 139 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 140 resets = <&cpg 912>; 141 }; 142 143 gpio1: gpio@e6051000 { 144 compatible = "renesas,gpio-r8a7745", 145 "renesas,rcar-gen2-gpio"; 146 reg = <0 0xe6051000 0 0x50>; 147 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 148 #gpio-cells = <2>; 149 gpio-controller; 150 gpio-ranges = <&pfc 0 32 26>; 151 #interrupt-cells = <2>; 152 interrupt-controller; 153 clocks = <&cpg CPG_MOD 911>; 154 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 155 resets = <&cpg 911>; 156 }; 157 158 gpio2: gpio@e6052000 { 159 compatible = "renesas,gpio-r8a7745", 160 "renesas,rcar-gen2-gpio"; 161 reg = <0 0xe6052000 0 0x50>; 162 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 163 #gpio-cells = <2>; 164 gpio-controller; 165 gpio-ranges = <&pfc 0 64 32>; 166 #interrupt-cells = <2>; 167 interrupt-controller; 168 clocks = <&cpg CPG_MOD 910>; 169 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 170 resets = <&cpg 910>; 171 }; 172 173 gpio3: gpio@e6053000 { 174 compatible = "renesas,gpio-r8a7745", 175 "renesas,rcar-gen2-gpio"; 176 reg = <0 0xe6053000 0 0x50>; 177 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 178 #gpio-cells = <2>; 179 gpio-controller; 180 gpio-ranges = <&pfc 0 96 32>; 181 #interrupt-cells = <2>; 182 interrupt-controller; 183 clocks = <&cpg CPG_MOD 909>; 184 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 185 resets = <&cpg 909>; 186 }; 187 188 gpio4: gpio@e6054000 { 189 compatible = "renesas,gpio-r8a7745", 190 "renesas,rcar-gen2-gpio"; 191 reg = <0 0xe6054000 0 0x50>; 192 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 193 #gpio-cells = <2>; 194 gpio-controller; 195 gpio-ranges = <&pfc 0 128 32>; 196 #interrupt-cells = <2>; 197 interrupt-controller; 198 clocks = <&cpg CPG_MOD 908>; 199 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 200 resets = <&cpg 908>; 201 }; 202 203 gpio5: gpio@e6055000 { 204 compatible = "renesas,gpio-r8a7745", 205 "renesas,rcar-gen2-gpio"; 206 reg = <0 0xe6055000 0 0x50>; 207 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 208 #gpio-cells = <2>; 209 gpio-controller; 210 gpio-ranges = <&pfc 0 160 28>; 211 #interrupt-cells = <2>; 212 interrupt-controller; 213 clocks = <&cpg CPG_MOD 907>; 214 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 215 resets = <&cpg 907>; 216 }; 217 218 gpio6: gpio@e6055400 { 219 compatible = "renesas,gpio-r8a7745", 220 "renesas,rcar-gen2-gpio"; 221 reg = <0 0xe6055400 0 0x50>; 222 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 223 #gpio-cells = <2>; 224 gpio-controller; 225 gpio-ranges = <&pfc 0 192 26>; 226 #interrupt-cells = <2>; 227 interrupt-controller; 228 clocks = <&cpg CPG_MOD 905>; 229 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 230 resets = <&cpg 905>; 231 }; 232 233 pfc: pinctrl@e6060000 { 234 compatible = "renesas,pfc-r8a7745"; 235 reg = <0 0xe6060000 0 0x11c>; 236 }; 237 238 tpu: pwm@e60f0000 { 239 compatible = "renesas,tpu-r8a7745", "renesas,tpu"; 240 reg = <0 0xe60f0000 0 0x148>; 241 clocks = <&cpg CPG_MOD 304>; 242 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 243 resets = <&cpg 304>; 244 #pwm-cells = <3>; 245 status = "disabled"; 246 }; 247 248 cpg: clock-controller@e6150000 { 249 compatible = "renesas,r8a7745-cpg-mssr"; 250 reg = <0 0xe6150000 0 0x1000>; 251 clocks = <&extal_clk>, <&usb_extal_clk>; 252 clock-names = "extal", "usb_extal"; 253 #clock-cells = <2>; 254 #power-domain-cells = <0>; 255 #reset-cells = <1>; 256 }; 257 258 apmu@e6151000 { 259 compatible = "renesas,r8a7745-apmu", "renesas,apmu"; 260 reg = <0 0xe6151000 0 0x188>; 261 cpus = <&cpu0>, <&cpu1>; 262 }; 263 264 rst: reset-controller@e6160000 { 265 compatible = "renesas,r8a7745-rst"; 266 reg = <0 0xe6160000 0 0x100>; 267 }; 268 269 rwdt: watchdog@e6020000 { 270 compatible = "renesas,r8a7745-wdt", 271 "renesas,rcar-gen2-wdt"; 272 reg = <0 0xe6020000 0 0x0c>; 273 clocks = <&cpg CPG_MOD 402>; 274 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 275 resets = <&cpg 402>; 276 status = "disabled"; 277 }; 278 279 sysc: system-controller@e6180000 { 280 compatible = "renesas,r8a7745-sysc"; 281 reg = <0 0xe6180000 0 0x200>; 282 #power-domain-cells = <1>; 283 }; 284 285 irqc: interrupt-controller@e61c0000 { 286 compatible = "renesas,irqc-r8a7745", "renesas,irqc"; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 reg = <0 0xe61c0000 0 0x200>; 290 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 291 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 407>; 301 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 302 resets = <&cpg 407>; 303 }; 304 305 ipmmu_sy0: iommu@e6280000 { 306 compatible = "renesas,ipmmu-r8a7745", 307 "renesas,ipmmu-vmsa"; 308 reg = <0 0xe6280000 0 0x1000>; 309 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 310 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 311 #iommu-cells = <1>; 312 status = "disabled"; 313 }; 314 315 ipmmu_sy1: iommu@e6290000 { 316 compatible = "renesas,ipmmu-r8a7745", 317 "renesas,ipmmu-vmsa"; 318 reg = <0 0xe6290000 0 0x1000>; 319 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 320 #iommu-cells = <1>; 321 status = "disabled"; 322 }; 323 324 ipmmu_ds: iommu@e6740000 { 325 compatible = "renesas,ipmmu-r8a7745", 326 "renesas,ipmmu-vmsa"; 327 reg = <0 0xe6740000 0 0x1000>; 328 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 330 #iommu-cells = <1>; 331 status = "disabled"; 332 }; 333 334 ipmmu_mp: iommu@ec680000 { 335 compatible = "renesas,ipmmu-r8a7745", 336 "renesas,ipmmu-vmsa"; 337 reg = <0 0xec680000 0 0x1000>; 338 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 339 #iommu-cells = <1>; 340 status = "disabled"; 341 }; 342 343 ipmmu_mx: iommu@fe951000 { 344 compatible = "renesas,ipmmu-r8a7745", 345 "renesas,ipmmu-vmsa"; 346 reg = <0 0xfe951000 0 0x1000>; 347 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 348 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 349 #iommu-cells = <1>; 350 status = "disabled"; 351 }; 352 353 ipmmu_gp: iommu@e62a0000 { 354 compatible = "renesas,ipmmu-r8a7745", 355 "renesas,ipmmu-vmsa"; 356 reg = <0 0xe62a0000 0 0x1000>; 357 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 359 #iommu-cells = <1>; 360 status = "disabled"; 361 }; 362 363 icram0: sram@e63a0000 { 364 compatible = "mmio-sram"; 365 reg = <0 0xe63a0000 0 0x12000>; 366 #address-cells = <1>; 367 #size-cells = <1>; 368 ranges = <0 0 0xe63a0000 0x12000>; 369 }; 370 371 icram1: sram@e63c0000 { 372 compatible = "mmio-sram"; 373 reg = <0 0xe63c0000 0 0x1000>; 374 #address-cells = <1>; 375 #size-cells = <1>; 376 ranges = <0 0 0xe63c0000 0x1000>; 377 378 smp-sram@0 { 379 compatible = "renesas,smp-sram"; 380 reg = <0 0x100>; 381 }; 382 }; 383 384 icram2: sram@e6300000 { 385 compatible = "mmio-sram"; 386 reg = <0 0xe6300000 0 0x40000>; 387 #address-cells = <1>; 388 #size-cells = <1>; 389 ranges = <0 0 0xe6300000 0x40000>; 390 }; 391 i2c0: i2c@e6508000 { 392 #address-cells = <1>; 393 #size-cells = <0>; 394 compatible = "renesas,i2c-r8a7745", 395 "renesas,rcar-gen2-i2c"; 396 reg = <0 0xe6508000 0 0x40>; 397 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 398 clocks = <&cpg CPG_MOD 931>; 399 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 400 resets = <&cpg 931>; 401 i2c-scl-internal-delay-ns = <6>; 402 status = "disabled"; 403 }; 404 405 i2c1: i2c@e6518000 { 406 #address-cells = <1>; 407 #size-cells = <0>; 408 compatible = "renesas,i2c-r8a7745", 409 "renesas,rcar-gen2-i2c"; 410 reg = <0 0xe6518000 0 0x40>; 411 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 930>; 413 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 414 resets = <&cpg 930>; 415 i2c-scl-internal-delay-ns = <6>; 416 status = "disabled"; 417 }; 418 419 i2c2: i2c@e6530000 { 420 #address-cells = <1>; 421 #size-cells = <0>; 422 compatible = "renesas,i2c-r8a7745", 423 "renesas,rcar-gen2-i2c"; 424 reg = <0 0xe6530000 0 0x40>; 425 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 426 clocks = <&cpg CPG_MOD 929>; 427 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 428 resets = <&cpg 929>; 429 i2c-scl-internal-delay-ns = <6>; 430 status = "disabled"; 431 }; 432 433 i2c3: i2c@e6540000 { 434 #address-cells = <1>; 435 #size-cells = <0>; 436 compatible = "renesas,i2c-r8a7745", 437 "renesas,rcar-gen2-i2c"; 438 reg = <0 0xe6540000 0 0x40>; 439 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 440 clocks = <&cpg CPG_MOD 928>; 441 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 442 resets = <&cpg 928>; 443 i2c-scl-internal-delay-ns = <6>; 444 status = "disabled"; 445 }; 446 447 i2c4: i2c@e6520000 { 448 #address-cells = <1>; 449 #size-cells = <0>; 450 compatible = "renesas,i2c-r8a7745", 451 "renesas,rcar-gen2-i2c"; 452 reg = <0 0xe6520000 0 0x40>; 453 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 454 clocks = <&cpg CPG_MOD 927>; 455 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 456 resets = <&cpg 927>; 457 i2c-scl-internal-delay-ns = <6>; 458 status = "disabled"; 459 }; 460 461 i2c5: i2c@e6528000 { 462 #address-cells = <1>; 463 #size-cells = <0>; 464 compatible = "renesas,i2c-r8a7745", 465 "renesas,rcar-gen2-i2c"; 466 reg = <0 0xe6528000 0 0x40>; 467 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 468 clocks = <&cpg CPG_MOD 925>; 469 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 470 resets = <&cpg 925>; 471 i2c-scl-internal-delay-ns = <6>; 472 status = "disabled"; 473 }; 474 475 iic0: i2c@e6500000 { 476 #address-cells = <1>; 477 #size-cells = <0>; 478 compatible = "renesas,iic-r8a7745", 479 "renesas,rcar-gen2-iic", 480 "renesas,rmobile-iic"; 481 reg = <0 0xe6500000 0 0x425>; 482 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 318>; 484 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 485 <&dmac1 0x61>, <&dmac1 0x62>; 486 dma-names = "tx", "rx", "tx", "rx"; 487 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 488 resets = <&cpg 318>; 489 status = "disabled"; 490 }; 491 492 iic1: i2c@e6510000 { 493 #address-cells = <1>; 494 #size-cells = <0>; 495 compatible = "renesas,iic-r8a7745", 496 "renesas,rcar-gen2-iic", 497 "renesas,rmobile-iic"; 498 reg = <0 0xe6510000 0 0x425>; 499 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 500 clocks = <&cpg CPG_MOD 323>; 501 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 502 <&dmac1 0x65>, <&dmac1 0x66>; 503 dma-names = "tx", "rx", "tx", "rx"; 504 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 505 resets = <&cpg 323>; 506 status = "disabled"; 507 }; 508 509 hsusb: usb@e6590000 { 510 compatible = "renesas,usbhs-r8a7745", 511 "renesas,rcar-gen2-usbhs"; 512 reg = <0 0xe6590000 0 0x100>; 513 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 704>; 515 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 516 <&usb_dmac1 0>, <&usb_dmac1 1>; 517 dma-names = "ch0", "ch1", "ch2", "ch3"; 518 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 519 resets = <&cpg 704>; 520 renesas,buswait = <4>; 521 phys = <&usb0 1>; 522 phy-names = "usb"; 523 status = "disabled"; 524 }; 525 526 usbphy: usb-phy@e6590100 { 527 compatible = "renesas,usb-phy-r8a7745", 528 "renesas,rcar-gen2-usb-phy"; 529 reg = <0 0xe6590100 0 0x100>; 530 #address-cells = <1>; 531 #size-cells = <0>; 532 clocks = <&cpg CPG_MOD 704>; 533 clock-names = "usbhs"; 534 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 535 resets = <&cpg 704>; 536 status = "disabled"; 537 538 usb0: usb-channel@0 { 539 reg = <0>; 540 #phy-cells = <1>; 541 }; 542 usb2: usb-channel@2 { 543 reg = <2>; 544 #phy-cells = <1>; 545 }; 546 }; 547 548 usb_dmac0: dma-controller@e65a0000 { 549 compatible = "renesas,r8a7745-usb-dmac", 550 "renesas,usb-dmac"; 551 reg = <0 0xe65a0000 0 0x100>; 552 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 553 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 554 interrupt-names = "ch0", "ch1"; 555 clocks = <&cpg CPG_MOD 330>; 556 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 557 resets = <&cpg 330>; 558 #dma-cells = <1>; 559 dma-channels = <2>; 560 }; 561 562 usb_dmac1: dma-controller@e65b0000 { 563 compatible = "renesas,r8a7745-usb-dmac", 564 "renesas,usb-dmac"; 565 reg = <0 0xe65b0000 0 0x100>; 566 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 567 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 568 interrupt-names = "ch0", "ch1"; 569 clocks = <&cpg CPG_MOD 331>; 570 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 571 resets = <&cpg 331>; 572 #dma-cells = <1>; 573 dma-channels = <2>; 574 }; 575 576 dmac0: dma-controller@e6700000 { 577 compatible = "renesas,dmac-r8a7745", 578 "renesas,rcar-dmac"; 579 reg = <0 0xe6700000 0 0x20000>; 580 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 581 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 584 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 585 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 589 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 590 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 591 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 592 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 593 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 595 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 596 interrupt-names = "error", 597 "ch0", "ch1", "ch2", "ch3", 598 "ch4", "ch5", "ch6", "ch7", 599 "ch8", "ch9", "ch10", "ch11", 600 "ch12", "ch13", "ch14"; 601 clocks = <&cpg CPG_MOD 219>; 602 clock-names = "fck"; 603 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 604 resets = <&cpg 219>; 605 #dma-cells = <1>; 606 dma-channels = <15>; 607 }; 608 609 dmac1: dma-controller@e6720000 { 610 compatible = "renesas,dmac-r8a7745", 611 "renesas,rcar-dmac"; 612 reg = <0 0xe6720000 0 0x20000>; 613 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 614 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 623 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 629 interrupt-names = "error", 630 "ch0", "ch1", "ch2", "ch3", 631 "ch4", "ch5", "ch6", "ch7", 632 "ch8", "ch9", "ch10", "ch11", 633 "ch12", "ch13", "ch14"; 634 clocks = <&cpg CPG_MOD 218>; 635 clock-names = "fck"; 636 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 637 resets = <&cpg 218>; 638 #dma-cells = <1>; 639 dma-channels = <15>; 640 }; 641 642 avb: ethernet@e6800000 { 643 compatible = "renesas,etheravb-r8a7745", 644 "renesas,etheravb-rcar-gen2"; 645 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 646 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 812>; 648 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 649 resets = <&cpg 812>; 650 #address-cells = <1>; 651 #size-cells = <0>; 652 status = "disabled"; 653 }; 654 655 qspi: spi@e6b10000 { 656 compatible = "renesas,qspi-r8a7745", "renesas,qspi"; 657 reg = <0 0xe6b10000 0 0x2c>; 658 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 659 clocks = <&cpg CPG_MOD 917>; 660 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 661 <&dmac1 0x17>, <&dmac1 0x18>; 662 dma-names = "tx", "rx", "tx", "rx"; 663 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 664 num-cs = <1>; 665 #address-cells = <1>; 666 #size-cells = <0>; 667 resets = <&cpg 917>; 668 status = "disabled"; 669 }; 670 671 scifa0: serial@e6c40000 { 672 compatible = "renesas,scifa-r8a7745", 673 "renesas,rcar-gen2-scifa", "renesas,scifa"; 674 reg = <0 0xe6c40000 0 0x40>; 675 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 676 clocks = <&cpg CPG_MOD 204>; 677 clock-names = "fck"; 678 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 679 <&dmac1 0x21>, <&dmac1 0x22>; 680 dma-names = "tx", "rx", "tx", "rx"; 681 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 682 resets = <&cpg 204>; 683 status = "disabled"; 684 }; 685 686 scifa1: serial@e6c50000 { 687 compatible = "renesas,scifa-r8a7745", 688 "renesas,rcar-gen2-scifa", "renesas,scifa"; 689 reg = <0 0xe6c50000 0 0x40>; 690 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 691 clocks = <&cpg CPG_MOD 203>; 692 clock-names = "fck"; 693 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 694 <&dmac1 0x25>, <&dmac1 0x26>; 695 dma-names = "tx", "rx", "tx", "rx"; 696 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 697 resets = <&cpg 203>; 698 status = "disabled"; 699 }; 700 701 scifa2: serial@e6c60000 { 702 compatible = "renesas,scifa-r8a7745", 703 "renesas,rcar-gen2-scifa", "renesas,scifa"; 704 reg = <0 0xe6c60000 0 0x40>; 705 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&cpg CPG_MOD 202>; 707 clock-names = "fck"; 708 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 709 <&dmac1 0x27>, <&dmac1 0x28>; 710 dma-names = "tx", "rx", "tx", "rx"; 711 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 712 resets = <&cpg 202>; 713 status = "disabled"; 714 }; 715 716 scifa3: serial@e6c70000 { 717 compatible = "renesas,scifa-r8a7745", 718 "renesas,rcar-gen2-scifa", "renesas,scifa"; 719 reg = <0 0xe6c70000 0 0x40>; 720 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 721 clocks = <&cpg CPG_MOD 1106>; 722 clock-names = "fck"; 723 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 724 <&dmac1 0x1b>, <&dmac1 0x1c>; 725 dma-names = "tx", "rx", "tx", "rx"; 726 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 727 resets = <&cpg 1106>; 728 status = "disabled"; 729 }; 730 731 scifa4: serial@e6c78000 { 732 compatible = "renesas,scifa-r8a7745", 733 "renesas,rcar-gen2-scifa", "renesas,scifa"; 734 reg = <0 0xe6c78000 0 0x40>; 735 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 736 clocks = <&cpg CPG_MOD 1107>; 737 clock-names = "fck"; 738 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 739 <&dmac1 0x1f>, <&dmac1 0x20>; 740 dma-names = "tx", "rx", "tx", "rx"; 741 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 742 resets = <&cpg 1107>; 743 status = "disabled"; 744 }; 745 746 scifa5: serial@e6c80000 { 747 compatible = "renesas,scifa-r8a7745", 748 "renesas,rcar-gen2-scifa", "renesas,scifa"; 749 reg = <0 0xe6c80000 0 0x40>; 750 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&cpg CPG_MOD 1108>; 752 clock-names = "fck"; 753 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 754 <&dmac1 0x23>, <&dmac1 0x24>; 755 dma-names = "tx", "rx", "tx", "rx"; 756 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 757 resets = <&cpg 1108>; 758 status = "disabled"; 759 }; 760 761 scifb0: serial@e6c20000 { 762 compatible = "renesas,scifb-r8a7745", 763 "renesas,rcar-gen2-scifb", "renesas,scifb"; 764 reg = <0 0xe6c20000 0 0x100>; 765 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 766 clocks = <&cpg CPG_MOD 206>; 767 clock-names = "fck"; 768 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 769 <&dmac1 0x3d>, <&dmac1 0x3e>; 770 dma-names = "tx", "rx", "tx", "rx"; 771 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 772 resets = <&cpg 206>; 773 status = "disabled"; 774 }; 775 776 scifb1: serial@e6c30000 { 777 compatible = "renesas,scifb-r8a7745", 778 "renesas,rcar-gen2-scifb", "renesas,scifb"; 779 reg = <0 0xe6c30000 0 0x100>; 780 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 781 clocks = <&cpg CPG_MOD 207>; 782 clock-names = "fck"; 783 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 784 <&dmac1 0x19>, <&dmac1 0x1a>; 785 dma-names = "tx", "rx", "tx", "rx"; 786 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 787 resets = <&cpg 207>; 788 status = "disabled"; 789 }; 790 791 scifb2: serial@e6ce0000 { 792 compatible = "renesas,scifb-r8a7745", 793 "renesas,rcar-gen2-scifb", "renesas,scifb"; 794 reg = <0 0xe6ce0000 0 0x100>; 795 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 796 clocks = <&cpg CPG_MOD 216>; 797 clock-names = "fck"; 798 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 799 <&dmac1 0x1d>, <&dmac1 0x1e>; 800 dma-names = "tx", "rx", "tx", "rx"; 801 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 802 resets = <&cpg 216>; 803 status = "disabled"; 804 }; 805 806 scif0: serial@e6e60000 { 807 compatible = "renesas,scif-r8a7745", 808 "renesas,rcar-gen2-scif", "renesas,scif"; 809 reg = <0 0xe6e60000 0 0x40>; 810 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 811 clocks = <&cpg CPG_MOD 721>, 812 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 813 clock-names = "fck", "brg_int", "scif_clk"; 814 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 815 <&dmac1 0x29>, <&dmac1 0x2a>; 816 dma-names = "tx", "rx", "tx", "rx"; 817 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 818 resets = <&cpg 721>; 819 status = "disabled"; 820 }; 821 822 scif1: serial@e6e68000 { 823 compatible = "renesas,scif-r8a7745", 824 "renesas,rcar-gen2-scif", "renesas,scif"; 825 reg = <0 0xe6e68000 0 0x40>; 826 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 720>, 828 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 829 clock-names = "fck", "brg_int", "scif_clk"; 830 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 831 <&dmac1 0x2d>, <&dmac1 0x2e>; 832 dma-names = "tx", "rx", "tx", "rx"; 833 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 834 resets = <&cpg 720>; 835 status = "disabled"; 836 }; 837 838 scif2: serial@e6e58000 { 839 compatible = "renesas,scif-r8a7745", 840 "renesas,rcar-gen2-scif", "renesas,scif"; 841 reg = <0 0xe6e58000 0 0x40>; 842 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 843 clocks = <&cpg CPG_MOD 719>, 844 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 845 clock-names = "fck", "brg_int", "scif_clk"; 846 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 847 <&dmac1 0x2b>, <&dmac1 0x2c>; 848 dma-names = "tx", "rx", "tx", "rx"; 849 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 850 resets = <&cpg 719>; 851 status = "disabled"; 852 }; 853 854 scif3: serial@e6ea8000 { 855 compatible = "renesas,scif-r8a7745", 856 "renesas,rcar-gen2-scif", "renesas,scif"; 857 reg = <0 0xe6ea8000 0 0x40>; 858 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 859 clocks = <&cpg CPG_MOD 718>, 860 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 861 clock-names = "fck", "brg_int", "scif_clk"; 862 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 863 <&dmac1 0x2f>, <&dmac1 0x30>; 864 dma-names = "tx", "rx", "tx", "rx"; 865 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 866 resets = <&cpg 718>; 867 status = "disabled"; 868 }; 869 870 scif4: serial@e6ee0000 { 871 compatible = "renesas,scif-r8a7745", 872 "renesas,rcar-gen2-scif", "renesas,scif"; 873 reg = <0 0xe6ee0000 0 0x40>; 874 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 875 clocks = <&cpg CPG_MOD 715>, 876 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 877 clock-names = "fck", "brg_int", "scif_clk"; 878 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 879 <&dmac1 0xfb>, <&dmac1 0xfc>; 880 dma-names = "tx", "rx", "tx", "rx"; 881 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 882 resets = <&cpg 715>; 883 status = "disabled"; 884 }; 885 886 scif5: serial@e6ee8000 { 887 compatible = "renesas,scif-r8a7745", 888 "renesas,rcar-gen2-scif", "renesas,scif"; 889 reg = <0 0xe6ee8000 0 0x40>; 890 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 891 clocks = <&cpg CPG_MOD 714>, 892 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 893 clock-names = "fck", "brg_int", "scif_clk"; 894 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 895 <&dmac1 0xfd>, <&dmac1 0xfe>; 896 dma-names = "tx", "rx", "tx", "rx"; 897 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 898 resets = <&cpg 714>; 899 status = "disabled"; 900 }; 901 902 hscif0: serial@e62c0000 { 903 compatible = "renesas,hscif-r8a7745", 904 "renesas,rcar-gen2-hscif", "renesas,hscif"; 905 reg = <0 0xe62c0000 0 0x60>; 906 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 907 clocks = <&cpg CPG_MOD 717>, 908 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 909 clock-names = "fck", "brg_int", "scif_clk"; 910 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 911 <&dmac1 0x39>, <&dmac1 0x3a>; 912 dma-names = "tx", "rx", "tx", "rx"; 913 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 914 resets = <&cpg 717>; 915 status = "disabled"; 916 }; 917 918 hscif1: serial@e62c8000 { 919 compatible = "renesas,hscif-r8a7745", 920 "renesas,rcar-gen2-hscif", "renesas,hscif"; 921 reg = <0 0xe62c8000 0 0x60>; 922 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 923 clocks = <&cpg CPG_MOD 716>, 924 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 925 clock-names = "fck", "brg_int", "scif_clk"; 926 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 927 <&dmac1 0x4d>, <&dmac1 0x4e>; 928 dma-names = "tx", "rx", "tx", "rx"; 929 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 930 resets = <&cpg 716>; 931 status = "disabled"; 932 }; 933 934 hscif2: serial@e62d0000 { 935 compatible = "renesas,hscif-r8a7745", 936 "renesas,rcar-gen2-hscif", "renesas,hscif"; 937 reg = <0 0xe62d0000 0 0x60>; 938 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 939 clocks = <&cpg CPG_MOD 713>, 940 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 941 clock-names = "fck", "brg_int", "scif_clk"; 942 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 943 <&dmac1 0x3b>, <&dmac1 0x3c>; 944 dma-names = "tx", "rx", "tx", "rx"; 945 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 946 resets = <&cpg 713>; 947 status = "disabled"; 948 }; 949 950 msiof0: spi@e6e20000 { 951 compatible = "renesas,msiof-r8a7745", 952 "renesas,rcar-gen2-msiof"; 953 reg = <0 0xe6e20000 0 0x0064>; 954 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 955 clocks = <&cpg CPG_MOD 000>; 956 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 957 <&dmac1 0x51>, <&dmac1 0x52>; 958 dma-names = "tx", "rx", "tx", "rx"; 959 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 960 #address-cells = <1>; 961 #size-cells = <0>; 962 resets = <&cpg 000>; 963 status = "disabled"; 964 }; 965 966 msiof1: spi@e6e10000 { 967 compatible = "renesas,msiof-r8a7745", 968 "renesas,rcar-gen2-msiof"; 969 reg = <0 0xe6e10000 0 0x0064>; 970 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 971 clocks = <&cpg CPG_MOD 208>; 972 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 973 <&dmac1 0x55>, <&dmac1 0x56>; 974 dma-names = "tx", "rx", "tx", "rx"; 975 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 976 #address-cells = <1>; 977 #size-cells = <0>; 978 resets = <&cpg 208>; 979 status = "disabled"; 980 }; 981 982 msiof2: spi@e6e00000 { 983 compatible = "renesas,msiof-r8a7745", 984 "renesas,rcar-gen2-msiof"; 985 reg = <0 0xe6e00000 0 0x0064>; 986 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 987 clocks = <&cpg CPG_MOD 205>; 988 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 989 <&dmac1 0x41>, <&dmac1 0x42>; 990 dma-names = "tx", "rx", "tx", "rx"; 991 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 992 #address-cells = <1>; 993 #size-cells = <0>; 994 resets = <&cpg 205>; 995 status = "disabled"; 996 }; 997 998 pwm0: pwm@e6e30000 { 999 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1000 reg = <0 0xe6e30000 0 0x8>; 1001 clocks = <&cpg CPG_MOD 523>; 1002 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1003 resets = <&cpg 523>; 1004 #pwm-cells = <2>; 1005 status = "disabled"; 1006 }; 1007 1008 pwm1: pwm@e6e31000 { 1009 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1010 reg = <0 0xe6e31000 0 0x8>; 1011 clocks = <&cpg CPG_MOD 523>; 1012 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1013 resets = <&cpg 523>; 1014 #pwm-cells = <2>; 1015 status = "disabled"; 1016 }; 1017 1018 pwm2: pwm@e6e32000 { 1019 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1020 reg = <0 0xe6e32000 0 0x8>; 1021 clocks = <&cpg CPG_MOD 523>; 1022 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1023 resets = <&cpg 523>; 1024 #pwm-cells = <2>; 1025 status = "disabled"; 1026 }; 1027 1028 pwm3: pwm@e6e33000 { 1029 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1030 reg = <0 0xe6e33000 0 0x8>; 1031 clocks = <&cpg CPG_MOD 523>; 1032 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1033 resets = <&cpg 523>; 1034 #pwm-cells = <2>; 1035 status = "disabled"; 1036 }; 1037 1038 pwm4: pwm@e6e34000 { 1039 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1040 reg = <0 0xe6e34000 0 0x8>; 1041 clocks = <&cpg CPG_MOD 523>; 1042 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1043 resets = <&cpg 523>; 1044 #pwm-cells = <2>; 1045 status = "disabled"; 1046 }; 1047 1048 pwm5: pwm@e6e35000 { 1049 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1050 reg = <0 0xe6e35000 0 0x8>; 1051 clocks = <&cpg CPG_MOD 523>; 1052 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1053 resets = <&cpg 523>; 1054 #pwm-cells = <2>; 1055 status = "disabled"; 1056 }; 1057 1058 pwm6: pwm@e6e36000 { 1059 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1060 reg = <0 0xe6e36000 0 0x8>; 1061 clocks = <&cpg CPG_MOD 523>; 1062 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1063 resets = <&cpg 523>; 1064 #pwm-cells = <2>; 1065 status = "disabled"; 1066 }; 1067 1068 can0: can@e6e80000 { 1069 compatible = "renesas,can-r8a7745", 1070 "renesas,rcar-gen2-can"; 1071 reg = <0 0xe6e80000 0 0x1000>; 1072 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1073 clocks = <&cpg CPG_MOD 916>, 1074 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1075 <&can_clk>; 1076 clock-names = "clkp1", "clkp2", "can_clk"; 1077 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1078 resets = <&cpg 916>; 1079 status = "disabled"; 1080 }; 1081 1082 can1: can@e6e88000 { 1083 compatible = "renesas,can-r8a7745", 1084 "renesas,rcar-gen2-can"; 1085 reg = <0 0xe6e88000 0 0x1000>; 1086 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1087 clocks = <&cpg CPG_MOD 915>, 1088 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1089 <&can_clk>; 1090 clock-names = "clkp1", "clkp2", "can_clk"; 1091 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1092 resets = <&cpg 915>; 1093 status = "disabled"; 1094 }; 1095 1096 vin0: video@e6ef0000 { 1097 compatible = "renesas,vin-r8a7745", 1098 "renesas,rcar-gen2-vin"; 1099 reg = <0 0xe6ef0000 0 0x1000>; 1100 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1101 clocks = <&cpg CPG_MOD 811>; 1102 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1103 resets = <&cpg 811>; 1104 status = "disabled"; 1105 }; 1106 1107 vin1: video@e6ef1000 { 1108 compatible = "renesas,vin-r8a7745", 1109 "renesas,rcar-gen2-vin"; 1110 reg = <0 0xe6ef1000 0 0x1000>; 1111 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1112 clocks = <&cpg CPG_MOD 810>; 1113 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1114 resets = <&cpg 810>; 1115 status = "disabled"; 1116 }; 1117 1118 rcar_sound: sound@ec500000 { 1119 /* 1120 * #sound-dai-cells is required 1121 * 1122 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1123 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1124 */ 1125 compatible = "renesas,rcar_sound-r8a7745", 1126 "renesas,rcar_sound-gen2"; 1127 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1128 <0 0xec5a0000 0 0x100>, /* ADG */ 1129 <0 0xec540000 0 0x1000>, /* SSIU */ 1130 <0 0xec541000 0 0x280>, /* SSI */ 1131 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1132 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1133 1134 clocks = <&cpg CPG_MOD 1005>, 1135 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1136 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1137 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1138 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1139 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1140 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1141 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1142 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1143 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1144 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1145 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1146 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1147 <&cpg CPG_CORE R8A7745_CLK_M2>; 1148 clock-names = "ssi-all", 1149 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1150 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1151 "ssi.1", "ssi.0", 1152 "src.6", "src.5", "src.4", "src.3", 1153 "src.2", "src.1", 1154 "ctu.0", "ctu.1", 1155 "mix.0", "mix.1", 1156 "dvc.0", "dvc.1", 1157 "clk_a", "clk_b", "clk_c", "clk_i"; 1158 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1159 resets = <&cpg 1005>, 1160 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, 1161 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>, 1162 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>, 1163 <&cpg 1015>; 1164 reset-names = "ssi-all", 1165 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1166 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1167 "ssi.1", "ssi.0"; 1168 1169 status = "disabled"; 1170 1171 rcar_sound,dvc { 1172 dvc0: dvc-0 { 1173 dmas = <&audma0 0xbc>; 1174 dma-names = "tx"; 1175 }; 1176 dvc1: dvc-1 { 1177 dmas = <&audma0 0xbe>; 1178 dma-names = "tx"; 1179 }; 1180 }; 1181 1182 rcar_sound,mix { 1183 mix0: mix-0 { }; 1184 mix1: mix-1 { }; 1185 }; 1186 1187 rcar_sound,ctu { 1188 ctu00: ctu-0 { }; 1189 ctu01: ctu-1 { }; 1190 ctu02: ctu-2 { }; 1191 ctu03: ctu-3 { }; 1192 ctu10: ctu-4 { }; 1193 ctu11: ctu-5 { }; 1194 ctu12: ctu-6 { }; 1195 ctu13: ctu-7 { }; 1196 }; 1197 1198 rcar_sound,src { 1199 src-0 { 1200 status = "disabled"; 1201 }; 1202 src1: src-1 { 1203 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1204 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1205 dma-names = "rx", "tx"; 1206 }; 1207 src2: src-2 { 1208 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1209 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1210 dma-names = "rx", "tx"; 1211 }; 1212 src3: src-3 { 1213 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1214 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1215 dma-names = "rx", "tx"; 1216 }; 1217 src4: src-4 { 1218 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1219 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1220 dma-names = "rx", "tx"; 1221 }; 1222 src5: src-5 { 1223 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1224 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1225 dma-names = "rx", "tx"; 1226 }; 1227 src6: src-6 { 1228 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1229 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1230 dma-names = "rx", "tx"; 1231 }; 1232 }; 1233 1234 rcar_sound,ssi { 1235 ssi0: ssi-0 { 1236 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1237 dmas = <&audma0 0x01>, <&audma0 0x02>, 1238 <&audma0 0x15>, <&audma0 0x16>; 1239 dma-names = "rx", "tx", "rxu", "txu"; 1240 }; 1241 ssi1: ssi-1 { 1242 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1243 dmas = <&audma0 0x03>, <&audma0 0x04>, 1244 <&audma0 0x49>, <&audma0 0x4a>; 1245 dma-names = "rx", "tx", "rxu", "txu"; 1246 }; 1247 ssi2: ssi-2 { 1248 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1249 dmas = <&audma0 0x05>, <&audma0 0x06>, 1250 <&audma0 0x63>, <&audma0 0x64>; 1251 dma-names = "rx", "tx", "rxu", "txu"; 1252 }; 1253 ssi3: ssi-3 { 1254 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1255 dmas = <&audma0 0x07>, <&audma0 0x08>, 1256 <&audma0 0x6f>, <&audma0 0x70>; 1257 dma-names = "rx", "tx", "rxu", "txu"; 1258 }; 1259 ssi4: ssi-4 { 1260 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1261 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1262 <&audma0 0x71>, <&audma0 0x72>; 1263 dma-names = "rx", "tx", "rxu", "txu"; 1264 }; 1265 ssi5: ssi-5 { 1266 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1267 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1268 <&audma0 0x73>, <&audma0 0x74>; 1269 dma-names = "rx", "tx", "rxu", "txu"; 1270 }; 1271 ssi6: ssi-6 { 1272 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1273 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1274 <&audma0 0x75>, <&audma0 0x76>; 1275 dma-names = "rx", "tx", "rxu", "txu"; 1276 }; 1277 ssi7: ssi-7 { 1278 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1279 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1280 <&audma0 0x79>, <&audma0 0x7a>; 1281 dma-names = "rx", "tx", "rxu", "txu"; 1282 }; 1283 ssi8: ssi-8 { 1284 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1285 dmas = <&audma0 0x11>, <&audma0 0x12>, 1286 <&audma0 0x7b>, <&audma0 0x7c>; 1287 dma-names = "rx", "tx", "rxu", "txu"; 1288 }; 1289 ssi9: ssi-9 { 1290 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1291 dmas = <&audma0 0x13>, <&audma0 0x14>, 1292 <&audma0 0x7d>, <&audma0 0x7e>; 1293 dma-names = "rx", "tx", "rxu", "txu"; 1294 }; 1295 }; 1296 }; 1297 1298 audma0: dma-controller@ec700000 { 1299 compatible = "renesas,dmac-r8a7745", 1300 "renesas,rcar-dmac"; 1301 reg = <0 0xec700000 0 0x10000>; 1302 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1303 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1304 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1305 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1306 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1307 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1308 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1309 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1310 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1311 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1312 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1313 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1314 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1315 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1316 interrupt-names = "error", 1317 "ch0", "ch1", "ch2", "ch3", 1318 "ch4", "ch5", "ch6", "ch7", 1319 "ch8", "ch9", "ch10", "ch11", 1320 "ch12"; 1321 clocks = <&cpg CPG_MOD 502>; 1322 clock-names = "fck"; 1323 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1324 resets = <&cpg 502>; 1325 #dma-cells = <1>; 1326 dma-channels = <13>; 1327 }; 1328 1329 pci0: pci@ee090000 { 1330 compatible = "renesas,pci-r8a7745", 1331 "renesas,pci-rcar-gen2"; 1332 device_type = "pci"; 1333 reg = <0 0xee090000 0 0xc00>, 1334 <0 0xee080000 0 0x1100>; 1335 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1336 clocks = <&cpg CPG_MOD 703>; 1337 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1338 resets = <&cpg 703>; 1339 status = "disabled"; 1340 1341 bus-range = <0 0>; 1342 #address-cells = <3>; 1343 #size-cells = <2>; 1344 #interrupt-cells = <1>; 1345 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1346 interrupt-map-mask = <0xf800 0 0 0x7>; 1347 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1348 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1349 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1350 1351 usb@1,0 { 1352 reg = <0x800 0 0 0 0>; 1353 phys = <&usb0 0>; 1354 phy-names = "usb"; 1355 }; 1356 1357 usb@2,0 { 1358 reg = <0x1000 0 0 0 0>; 1359 phys = <&usb0 0>; 1360 phy-names = "usb"; 1361 }; 1362 }; 1363 1364 pci1: pci@ee0d0000 { 1365 compatible = "renesas,pci-r8a7745", 1366 "renesas,pci-rcar-gen2"; 1367 device_type = "pci"; 1368 reg = <0 0xee0d0000 0 0xc00>, 1369 <0 0xee0c0000 0 0x1100>; 1370 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 703>; 1372 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1373 resets = <&cpg 703>; 1374 status = "disabled"; 1375 1376 bus-range = <1 1>; 1377 #address-cells = <3>; 1378 #size-cells = <2>; 1379 #interrupt-cells = <1>; 1380 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1381 interrupt-map-mask = <0xf800 0 0 0x7>; 1382 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1383 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1384 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1385 1386 usb@1,0 { 1387 reg = <0x10800 0 0 0 0>; 1388 phys = <&usb2 0>; 1389 phy-names = "usb"; 1390 }; 1391 1392 usb@2,0 { 1393 reg = <0x11000 0 0 0 0>; 1394 phys = <&usb2 0>; 1395 phy-names = "usb"; 1396 }; 1397 }; 1398 1399 sdhi0: mmc@ee100000 { 1400 compatible = "renesas,sdhi-r8a7745", 1401 "renesas,rcar-gen2-sdhi"; 1402 reg = <0 0xee100000 0 0x328>; 1403 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 314>; 1405 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1406 <&dmac1 0xcd>, <&dmac1 0xce>; 1407 dma-names = "tx", "rx", "tx", "rx"; 1408 max-frequency = <195000000>; 1409 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1410 resets = <&cpg 314>; 1411 status = "disabled"; 1412 }; 1413 1414 sdhi1: mmc@ee140000 { 1415 compatible = "renesas,sdhi-r8a7745", 1416 "renesas,rcar-gen2-sdhi"; 1417 reg = <0 0xee140000 0 0x100>; 1418 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1419 clocks = <&cpg CPG_MOD 312>; 1420 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1421 <&dmac1 0xc1>, <&dmac1 0xc2>; 1422 dma-names = "tx", "rx", "tx", "rx"; 1423 max-frequency = <97500000>; 1424 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1425 resets = <&cpg 312>; 1426 status = "disabled"; 1427 }; 1428 1429 sdhi2: mmc@ee160000 { 1430 compatible = "renesas,sdhi-r8a7745", 1431 "renesas,rcar-gen2-sdhi"; 1432 reg = <0 0xee160000 0 0x100>; 1433 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1434 clocks = <&cpg CPG_MOD 311>; 1435 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1436 <&dmac1 0xd3>, <&dmac1 0xd4>; 1437 dma-names = "tx", "rx", "tx", "rx"; 1438 max-frequency = <97500000>; 1439 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1440 resets = <&cpg 311>; 1441 status = "disabled"; 1442 }; 1443 1444 mmcif0: mmc@ee200000 { 1445 compatible = "renesas,mmcif-r8a7745", 1446 "renesas,sh-mmcif"; 1447 reg = <0 0xee200000 0 0x80>; 1448 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1449 clocks = <&cpg CPG_MOD 315>; 1450 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1451 <&dmac1 0xd1>, <&dmac1 0xd2>; 1452 dma-names = "tx", "rx", "tx", "rx"; 1453 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1454 resets = <&cpg 315>; 1455 reg-io-width = <4>; 1456 max-frequency = <97500000>; 1457 status = "disabled"; 1458 }; 1459 1460 ether: ethernet@ee700000 { 1461 compatible = "renesas,ether-r8a7745", 1462 "renesas,rcar-gen2-ether"; 1463 reg = <0 0xee700000 0 0x400>; 1464 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1465 clocks = <&cpg CPG_MOD 813>; 1466 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1467 resets = <&cpg 813>; 1468 phy-mode = "rmii"; 1469 #address-cells = <1>; 1470 #size-cells = <0>; 1471 status = "disabled"; 1472 }; 1473 1474 gic: interrupt-controller@f1001000 { 1475 compatible = "arm,gic-400"; 1476 #interrupt-cells = <3>; 1477 #address-cells = <0>; 1478 interrupt-controller; 1479 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1480 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1481 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1482 clocks = <&cpg CPG_MOD 408>; 1483 clock-names = "clk"; 1484 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1485 resets = <&cpg 408>; 1486 }; 1487 1488 vsp@fe928000 { 1489 compatible = "renesas,vsp1"; 1490 reg = <0 0xfe928000 0 0x8000>; 1491 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1492 clocks = <&cpg CPG_MOD 131>; 1493 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1494 resets = <&cpg 131>; 1495 }; 1496 1497 vsp@fe930000 { 1498 compatible = "renesas,vsp1"; 1499 reg = <0 0xfe930000 0 0x8000>; 1500 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1501 clocks = <&cpg CPG_MOD 128>; 1502 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1503 resets = <&cpg 128>; 1504 }; 1505 1506 du: display@feb00000 { 1507 compatible = "renesas,du-r8a7745"; 1508 reg = <0 0xfeb00000 0 0x40000>; 1509 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1510 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1511 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1512 clock-names = "du.0", "du.1"; 1513 resets = <&cpg 724>; 1514 reset-names = "du.0"; 1515 status = "disabled"; 1516 1517 ports { 1518 #address-cells = <1>; 1519 #size-cells = <0>; 1520 1521 port@0 { 1522 reg = <0>; 1523 du_out_rgb0: endpoint { 1524 }; 1525 }; 1526 port@1 { 1527 reg = <1>; 1528 du_out_rgb1: endpoint { 1529 }; 1530 }; 1531 }; 1532 }; 1533 1534 prr: chipid@ff000044 { 1535 compatible = "renesas,prr"; 1536 reg = <0 0xff000044 0 4>; 1537 }; 1538 1539 cmt0: timer@ffca0000 { 1540 compatible = "renesas,r8a7745-cmt0", 1541 "renesas,rcar-gen2-cmt0"; 1542 reg = <0 0xffca0000 0 0x1004>; 1543 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1544 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1545 clocks = <&cpg CPG_MOD 124>; 1546 clock-names = "fck"; 1547 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1548 resets = <&cpg 124>; 1549 status = "disabled"; 1550 }; 1551 1552 cmt1: timer@e6130000 { 1553 compatible = "renesas,r8a7745-cmt1", 1554 "renesas,rcar-gen2-cmt1"; 1555 reg = <0 0xe6130000 0 0x1004>; 1556 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1557 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1558 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1559 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1560 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1561 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1562 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1563 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1564 clocks = <&cpg CPG_MOD 329>; 1565 clock-names = "fck"; 1566 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1567 resets = <&cpg 329>; 1568 status = "disabled"; 1569 }; 1570 }; 1571 1572 timer { 1573 compatible = "arm,armv7-timer"; 1574 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1575 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1576 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1577 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1578 }; 1579 1580 /* External USB clock - can be overridden by the board */ 1581 usb_extal_clk: usb_extal { 1582 compatible = "fixed-clock"; 1583 #clock-cells = <0>; 1584 clock-frequency = <48000000>; 1585 }; 1586}; 1587