1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77470 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11#include <dt-bindings/power/r8a77470-sysc.h>
12/ {
13	compatible = "renesas,r8a77470";
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	aliases {
18		i2c0 = &i2c0;
19		i2c1 = &i2c1;
20		i2c2 = &i2c2;
21		i2c3 = &i2c3;
22		i2c4 = &i2c4;
23	};
24
25	cpus {
26		#address-cells = <1>;
27		#size-cells = <0>;
28		enable-method = "renesas,apmu";
29
30		cpu0: cpu@0 {
31			device_type = "cpu";
32			compatible = "arm,cortex-a7";
33			reg = <0>;
34			clock-frequency = <1000000000>;
35			clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
36			power-domains = <&sysc R8A77470_PD_CA7_CPU0>;
37			next-level-cache = <&L2_CA7>;
38		};
39
40		cpu1: cpu@1 {
41			device_type = "cpu";
42			compatible = "arm,cortex-a7";
43			reg = <1>;
44			clock-frequency = <1000000000>;
45			clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
46			power-domains = <&sysc R8A77470_PD_CA7_CPU1>;
47			next-level-cache = <&L2_CA7>;
48		};
49
50		L2_CA7: cache-controller-0 {
51			compatible = "cache";
52			cache-unified;
53			cache-level = <2>;
54			power-domains = <&sysc R8A77470_PD_CA7_SCU>;
55		};
56	};
57
58	/* External root clock */
59	extal_clk: extal {
60		compatible = "fixed-clock";
61		#clock-cells = <0>;
62		/* This value must be overridden by the board. */
63		clock-frequency = <0>;
64	};
65
66	pmu {
67		compatible = "arm,cortex-a7-pmu";
68		interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
69				      <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
70		interrupt-affinity = <&cpu0>, <&cpu1>;
71	};
72
73	/* External SCIF clock */
74	scif_clk: scif {
75		compatible = "fixed-clock";
76		#clock-cells = <0>;
77		/* This value must be overridden by the board. */
78		clock-frequency = <0>;
79	};
80
81	soc {
82		compatible = "simple-bus";
83		interrupt-parent = <&gic>;
84
85		#address-cells = <2>;
86		#size-cells = <2>;
87		ranges;
88
89		rwdt: watchdog@e6020000 {
90			compatible = "renesas,r8a77470-wdt",
91				     "renesas,rcar-gen2-wdt";
92			reg = <0 0xe6020000 0 0x0c>;
93			clocks = <&cpg CPG_MOD 402>;
94			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
95			resets = <&cpg 402>;
96			status = "disabled";
97		};
98
99		gpio0: gpio@e6050000 {
100			compatible = "renesas,gpio-r8a77470",
101				     "renesas,rcar-gen2-gpio";
102			reg = <0 0xe6050000 0 0x50>;
103			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
104			#gpio-cells = <2>;
105			gpio-controller;
106			gpio-ranges = <&pfc 0 0 23>;
107			#interrupt-cells = <2>;
108			interrupt-controller;
109			clocks = <&cpg CPG_MOD 912>;
110			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
111			resets = <&cpg 912>;
112		};
113
114		gpio1: gpio@e6051000 {
115			compatible = "renesas,gpio-r8a77470",
116				     "renesas,rcar-gen2-gpio";
117			reg = <0 0xe6051000 0 0x50>;
118			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
119			#gpio-cells = <2>;
120			gpio-controller;
121			gpio-ranges = <&pfc 0 32 23>;
122			#interrupt-cells = <2>;
123			interrupt-controller;
124			clocks = <&cpg CPG_MOD 911>;
125			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
126			resets = <&cpg 911>;
127		};
128
129		gpio2: gpio@e6052000 {
130			compatible = "renesas,gpio-r8a77470",
131				     "renesas,rcar-gen2-gpio";
132			reg = <0 0xe6052000 0 0x50>;
133			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
134			#gpio-cells = <2>;
135			gpio-controller;
136			gpio-ranges = <&pfc 0 64 32>;
137			#interrupt-cells = <2>;
138			interrupt-controller;
139			clocks = <&cpg CPG_MOD 910>;
140			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
141			resets = <&cpg 910>;
142		};
143
144		gpio3: gpio@e6053000 {
145			compatible = "renesas,gpio-r8a77470",
146				     "renesas,rcar-gen2-gpio";
147			reg = <0 0xe6053000 0 0x50>;
148			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
149			#gpio-cells = <2>;
150			gpio-controller;
151			gpio-ranges = <&pfc 0 96 30>;
152			gpio-reserved-ranges = <17 10>;
153			#interrupt-cells = <2>;
154			interrupt-controller;
155			clocks = <&cpg CPG_MOD 909>;
156			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
157			resets = <&cpg 909>;
158		};
159
160		gpio4: gpio@e6054000 {
161			compatible = "renesas,gpio-r8a77470",
162				     "renesas,rcar-gen2-gpio";
163			reg = <0 0xe6054000 0 0x50>;
164			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
165			#gpio-cells = <2>;
166			gpio-controller;
167			gpio-ranges = <&pfc 0 128 26>;
168			#interrupt-cells = <2>;
169			interrupt-controller;
170			clocks = <&cpg CPG_MOD 908>;
171			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
172			resets = <&cpg 908>;
173		};
174
175		gpio5: gpio@e6055000 {
176			compatible = "renesas,gpio-r8a77470",
177				     "renesas,rcar-gen2-gpio";
178			reg = <0 0xe6055000 0 0x50>;
179			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
180			#gpio-cells = <2>;
181			gpio-controller;
182			gpio-ranges = <&pfc 0 160 32>;
183			#interrupt-cells = <2>;
184			interrupt-controller;
185			clocks = <&cpg CPG_MOD 907>;
186			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
187			resets = <&cpg 907>;
188		};
189
190		pfc: pinctrl@e6060000 {
191			compatible = "renesas,pfc-r8a77470";
192			reg = <0 0xe6060000 0 0x118>;
193		};
194
195		cpg: clock-controller@e6150000 {
196			compatible = "renesas,r8a77470-cpg-mssr";
197			reg = <0 0xe6150000 0 0x1000>;
198			clocks = <&extal_clk>, <&usb_extal_clk>;
199			clock-names = "extal", "usb_extal";
200			#clock-cells = <2>;
201			#power-domain-cells = <0>;
202			#reset-cells = <1>;
203		};
204
205		apmu@e6151000 {
206			compatible = "renesas,r8a77470-apmu", "renesas,apmu";
207			reg = <0 0xe6151000 0 0x188>;
208			cpus = <&cpu0>, <&cpu1>;
209		};
210
211		rst: reset-controller@e6160000 {
212			compatible = "renesas,r8a77470-rst";
213			reg = <0 0xe6160000 0 0x100>;
214		};
215
216		sysc: system-controller@e6180000 {
217			compatible = "renesas,r8a77470-sysc";
218			reg = <0 0xe6180000 0 0x200>;
219			#power-domain-cells = <1>;
220		};
221
222		irqc: interrupt-controller@e61c0000 {
223			compatible = "renesas,irqc-r8a77470", "renesas,irqc";
224			#interrupt-cells = <2>;
225			interrupt-controller;
226			reg = <0 0xe61c0000 0 0x200>;
227			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
228				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
229				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
230				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
231				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
232				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
233				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
234				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
235				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
236				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
237			clocks = <&cpg CPG_MOD 407>;
238			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
239			resets = <&cpg 407>;
240		};
241
242		icram0:	sram@e63a0000 {
243			compatible = "mmio-sram";
244			reg = <0 0xe63a0000 0 0x12000>;
245			#address-cells = <1>;
246			#size-cells = <1>;
247			ranges = <0 0 0xe63a0000 0x12000>;
248		};
249
250		icram1:	sram@e63c0000 {
251			compatible = "mmio-sram";
252			reg = <0 0xe63c0000 0 0x1000>;
253			#address-cells = <1>;
254			#size-cells = <1>;
255			ranges = <0 0 0xe63c0000 0x1000>;
256
257			smp-sram@0 {
258				compatible = "renesas,smp-sram";
259				reg = <0 0x100>;
260			};
261		};
262
263		icram2:	sram@e6300000 {
264			compatible = "mmio-sram";
265			reg = <0 0xe6300000 0 0x20000>;
266			#address-cells = <1>;
267			#size-cells = <1>;
268			ranges = <0 0 0xe6300000 0x20000>;
269		};
270
271		i2c0: i2c@e6508000 {
272			#address-cells = <1>;
273			#size-cells = <0>;
274			compatible = "renesas,i2c-r8a77470",
275				     "renesas,rcar-gen2-i2c";
276			reg = <0 0xe6508000 0 0x40>;
277			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
278			clocks = <&cpg CPG_MOD 931>;
279			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
280			resets = <&cpg 931>;
281			i2c-scl-internal-delay-ns = <6>;
282			status = "disabled";
283		};
284
285		i2c1: i2c@e6518000 {
286			#address-cells = <1>;
287			#size-cells = <0>;
288			compatible = "renesas,i2c-r8a77470",
289				     "renesas,rcar-gen2-i2c";
290			reg = <0 0xe6518000 0 0x40>;
291			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
292			clocks = <&cpg CPG_MOD 930>;
293			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
294			resets = <&cpg 930>;
295			i2c-scl-internal-delay-ns = <6>;
296			status = "disabled";
297		};
298
299		i2c2: i2c@e6530000 {
300			#address-cells = <1>;
301			#size-cells = <0>;
302			compatible = "renesas,i2c-r8a77470",
303				     "renesas,rcar-gen2-i2c";
304			reg = <0 0xe6530000 0 0x40>;
305			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
306			clocks = <&cpg CPG_MOD 929>;
307			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
308			resets = <&cpg 929>;
309			i2c-scl-internal-delay-ns = <6>;
310			status = "disabled";
311		};
312
313		i2c3: i2c@e6540000 {
314			#address-cells = <1>;
315			#size-cells = <0>;
316			compatible = "renesas,i2c-r8a77470",
317				     "renesas,rcar-gen2-i2c";
318			reg = <0 0xe6540000 0 0x40>;
319			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
320			clocks = <&cpg CPG_MOD 928>;
321			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
322			resets = <&cpg 928>;
323			i2c-scl-internal-delay-ns = <6>;
324			status = "disabled";
325		};
326
327		i2c4: i2c@e6520000 {
328			#address-cells = <1>;
329			#size-cells = <0>;
330			compatible = "renesas,i2c-r8a77470",
331				     "renesas,rcar-gen2-i2c";
332			reg = <0 0xe6520000 0 0x40>;
333			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
334			clocks = <&cpg CPG_MOD 927>;
335			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
336			resets = <&cpg 927>;
337			i2c-scl-internal-delay-ns = <6>;
338			status = "disabled";
339		};
340
341		hsusb0: hsusb@e6590000 {
342			compatible = "renesas,usbhs-r8a77470",
343				     "renesas,rcar-gen2-usbhs";
344			reg = <0 0xe6590000 0 0x100>;
345			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
346			clocks = <&cpg CPG_MOD 704>;
347			dmas = <&usb_dmac00 0>, <&usb_dmac00 1>,
348			       <&usb_dmac10 0>, <&usb_dmac10 1>;
349			dma-names = "ch0", "ch1", "ch2", "ch3";
350			renesas,buswait = <4>;
351			phys = <&usb0 1>;
352			phy-names = "usb";
353			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
354			resets = <&cpg 704>;
355			status = "disabled";
356		};
357
358		usbphy0: usb-phy@e6590100 {
359			compatible = "renesas,usb-phy-r8a77470",
360				     "renesas,rcar-gen2-usb-phy";
361			reg = <0 0xe6590100 0 0x100>;
362			#address-cells = <1>;
363			#size-cells = <0>;
364			clocks = <&cpg CPG_MOD 704>;
365			clock-names = "usbhs";
366			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
367			resets = <&cpg 704>;
368			status = "disabled";
369
370			usb0: usb-channel@0 {
371				reg = <0>;
372				#phy-cells = <1>;
373			};
374		};
375
376		hsusb1: hsusb@e6598000 {
377			compatible = "renesas,usbhs-r8a77470",
378				     "renesas,rcar-gen2-usbhs";
379			reg = <0 0xe6598000 0 0x100>;
380			interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
381			clocks = <&cpg CPG_MOD 706>;
382			dmas = <&usb_dmac01 0>, <&usb_dmac01 1>,
383			       <&usb_dmac11 0>, <&usb_dmac11 1>;
384			dma-names = "ch0", "ch1", "ch2", "ch3";
385			renesas,buswait = <4>;
386			/* We need to turn on usbphy0 to make usbphy1 to work */
387			phys = <&usb1 1>;
388			phy-names = "usb";
389			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
390			resets = <&cpg 706>;
391			status = "disabled";
392		};
393
394		usbphy1: usb-phy@e6598100 {
395			compatible = "renesas,usb-phy-r8a77470",
396				     "renesas,rcar-gen2-usb-phy";
397			reg = <0 0xe6598100 0 0x100>;
398			#address-cells = <1>;
399			#size-cells = <0>;
400			clocks = <&cpg CPG_MOD 706>;
401			clock-names = "usbhs";
402			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
403			resets = <&cpg 706>;
404			status = "disabled";
405
406			usb1: usb-channel@0 {
407				reg = <0>;
408				#phy-cells = <1>;
409			};
410		};
411
412		usb_dmac00: dma-controller@e65a0000 {
413			compatible = "renesas,r8a77470-usb-dmac",
414				     "renesas,usb-dmac";
415			reg = <0 0xe65a0000 0 0x100>;
416			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
417				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
418			interrupt-names = "ch0", "ch1";
419			clocks = <&cpg CPG_MOD 330>;
420			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
421			resets = <&cpg 330>;
422			#dma-cells = <1>;
423			dma-channels = <2>;
424		};
425
426		usb_dmac10: dma-controller@e65b0000 {
427			compatible = "renesas,r8a77470-usb-dmac",
428				     "renesas,usb-dmac";
429			reg = <0 0xe65b0000 0 0x100>;
430			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
431				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
432			interrupt-names = "ch0", "ch1";
433			clocks = <&cpg CPG_MOD 331>;
434			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
435			resets = <&cpg 331>;
436			#dma-cells = <1>;
437			dma-channels = <2>;
438		};
439
440		usb_dmac01: dma-controller@e65a8000 {
441			compatible = "renesas,r8a77470-usb-dmac",
442				     "renesas,usb-dmac";
443			reg = <0 0xe65a8000 0 0x100>;
444			interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
445				     <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
446			interrupt-names = "ch0", "ch1";
447			clocks = <&cpg CPG_MOD 326>;
448			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
449			resets = <&cpg 326>;
450			#dma-cells = <1>;
451			dma-channels = <2>;
452		};
453
454		usb_dmac11: dma-controller@e65b8000 {
455			compatible = "renesas,r8a77470-usb-dmac",
456				     "renesas,usb-dmac";
457			reg = <0 0xe65b8000 0 0x100>;
458			interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
459				     <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
460			interrupt-names = "ch0", "ch1";
461			clocks = <&cpg CPG_MOD 327>;
462			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
463			resets = <&cpg 327>;
464			#dma-cells = <1>;
465			dma-channels = <2>;
466		};
467
468		dmac0: dma-controller@e6700000 {
469			compatible = "renesas,dmac-r8a77470",
470				     "renesas,rcar-dmac";
471			reg = <0 0xe6700000 0 0x20000>;
472			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
473				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
474				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
475				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
476				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
477				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
478				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
479				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
480				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
481				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
482				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
483				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
484				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
485				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
486				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
487				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
488			interrupt-names = "error",
489					  "ch0", "ch1", "ch2", "ch3",
490					  "ch4", "ch5", "ch6", "ch7",
491					  "ch8", "ch9", "ch10", "ch11",
492					  "ch12", "ch13", "ch14";
493			clocks = <&cpg CPG_MOD 219>;
494			clock-names = "fck";
495			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
496			resets = <&cpg 219>;
497			#dma-cells = <1>;
498			dma-channels = <15>;
499		};
500
501		dmac1: dma-controller@e6720000 {
502			compatible = "renesas,dmac-r8a77470",
503				     "renesas,rcar-dmac";
504			reg = <0 0xe6720000 0 0x20000>;
505			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
506				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
507				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
508				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
509				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
510				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
511				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
512				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
513				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
514				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
515				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
516				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
517				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
518				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
519				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
520				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
521			interrupt-names = "error",
522					  "ch0", "ch1", "ch2", "ch3",
523					  "ch4", "ch5", "ch6", "ch7",
524					  "ch8", "ch9", "ch10", "ch11",
525					  "ch12", "ch13", "ch14";
526			clocks = <&cpg CPG_MOD 218>;
527			clock-names = "fck";
528			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
529			resets = <&cpg 218>;
530			#dma-cells = <1>;
531			dma-channels = <15>;
532		};
533
534		avb: ethernet@e6800000 {
535			compatible = "renesas,etheravb-r8a77470",
536				     "renesas,etheravb-rcar-gen2";
537			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
538			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
539			clocks = <&cpg CPG_MOD 812>;
540			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
541			resets = <&cpg 812>;
542			#address-cells = <1>;
543			#size-cells = <0>;
544			status = "disabled";
545		};
546
547		qspi0: spi@e6b10000 {
548			compatible = "renesas,qspi-r8a77470", "renesas,qspi";
549			reg = <0 0xe6b10000 0 0x2c>;
550			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
551			clocks = <&cpg CPG_MOD 918>;
552			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
553			       <&dmac1 0x17>, <&dmac1 0x18>;
554			dma-names = "tx", "rx", "tx", "rx";
555			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
556			num-cs = <1>;
557			#address-cells = <1>;
558			#size-cells = <0>;
559			resets = <&cpg 918>;
560			status = "disabled";
561		};
562
563		qspi1: spi@ee200000 {
564			compatible = "renesas,qspi-r8a77470", "renesas,qspi";
565			reg = <0 0xee200000 0 0x2c>;
566			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
567			clocks = <&cpg CPG_MOD 917>;
568			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
569			       <&dmac1 0xd1>, <&dmac1 0xd2>;
570			dma-names = "tx", "rx", "tx", "rx";
571			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
572			num-cs = <1>;
573			#address-cells = <1>;
574			#size-cells = <0>;
575			resets = <&cpg 917>;
576			status = "disabled";
577		};
578
579		scif0: serial@e6e60000 {
580			compatible = "renesas,scif-r8a77470",
581				     "renesas,rcar-gen2-scif", "renesas,scif";
582			reg = <0 0xe6e60000 0 0x40>;
583			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
584			clocks = <&cpg CPG_MOD 721>,
585				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
586			clock-names = "fck", "brg_int", "scif_clk";
587			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
588			       <&dmac1 0x29>, <&dmac1 0x2a>;
589			dma-names = "tx", "rx", "tx", "rx";
590			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
591			resets = <&cpg 721>;
592			status = "disabled";
593		};
594
595		scif1: serial@e6e68000 {
596			compatible = "renesas,scif-r8a77470",
597				     "renesas,rcar-gen2-scif", "renesas,scif";
598			reg = <0 0xe6e68000 0 0x40>;
599			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
600			clocks = <&cpg CPG_MOD 720>,
601				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
602			clock-names = "fck", "brg_int", "scif_clk";
603			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
604			       <&dmac1 0x2d>, <&dmac1 0x2e>;
605			dma-names = "tx", "rx", "tx", "rx";
606			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
607			resets = <&cpg 720>;
608			status = "disabled";
609		};
610
611		scif2: serial@e6e58000 {
612			compatible = "renesas,scif-r8a77470",
613				     "renesas,rcar-gen2-scif", "renesas,scif";
614			reg = <0 0xe6e58000 0 0x40>;
615			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
616			clocks = <&cpg CPG_MOD 719>,
617				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
618			clock-names = "fck", "brg_int", "scif_clk";
619			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
620			       <&dmac1 0x2b>, <&dmac1 0x2c>;
621			dma-names = "tx", "rx", "tx", "rx";
622			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
623			resets = <&cpg 719>;
624			status = "disabled";
625		};
626
627		scif3: serial@e6ea8000 {
628			compatible = "renesas,scif-r8a77470",
629				     "renesas,rcar-gen2-scif", "renesas,scif";
630			reg = <0 0xe6ea8000 0 0x40>;
631			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
632			clocks = <&cpg CPG_MOD 718>,
633				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
634			clock-names = "fck", "brg_int", "scif_clk";
635			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
636			       <&dmac1 0x2f>, <&dmac1 0x30>;
637			dma-names = "tx", "rx", "tx", "rx";
638			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
639			resets = <&cpg 718>;
640			status = "disabled";
641		};
642
643		scif4: serial@e6ee0000 {
644			compatible = "renesas,scif-r8a77470",
645				     "renesas,rcar-gen2-scif", "renesas,scif";
646			reg = <0 0xe6ee0000 0 0x40>;
647			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
648			clocks = <&cpg CPG_MOD 715>,
649				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
650			clock-names = "fck", "brg_int", "scif_clk";
651			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
652			       <&dmac1 0xfb>, <&dmac1 0xfc>;
653			dma-names = "tx", "rx", "tx", "rx";
654			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
655			resets = <&cpg 715>;
656			status = "disabled";
657		};
658
659		scif5: serial@e6ee8000 {
660			compatible = "renesas,scif-r8a77470",
661				     "renesas,rcar-gen2-scif", "renesas,scif";
662			reg = <0 0xe6ee8000 0 0x40>;
663			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
664			clocks = <&cpg CPG_MOD 714>,
665				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
666			clock-names = "fck", "brg_int", "scif_clk";
667			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
668			       <&dmac1 0xfd>, <&dmac1 0xfe>;
669			dma-names = "tx", "rx", "tx", "rx";
670			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
671			resets = <&cpg 714>;
672			status = "disabled";
673		};
674
675		hscif0: serial@e62c0000 {
676			compatible = "renesas,hscif-r8a77470",
677				     "renesas,rcar-gen2-hscif", "renesas,hscif";
678			reg = <0 0xe62c0000 0 0x60>;
679			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
680			clocks = <&cpg CPG_MOD 717>,
681				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
682			clock-names = "fck", "brg_int", "scif_clk";
683			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
684			       <&dmac1 0x39>, <&dmac1 0x3a>;
685			dma-names = "tx", "rx", "tx", "rx";
686			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
687			resets = <&cpg 717>;
688			status = "disabled";
689		};
690
691		hscif1: serial@e62c8000 {
692			compatible = "renesas,hscif-r8a77470",
693				     "renesas,rcar-gen2-hscif", "renesas,hscif";
694			reg = <0 0xe62c8000 0 0x60>;
695			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
696			clocks = <&cpg CPG_MOD 716>,
697				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
698			clock-names = "fck", "brg_int", "scif_clk";
699			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
700			       <&dmac1 0x4d>, <&dmac1 0x4e>;
701			dma-names = "tx", "rx", "tx", "rx";
702			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
703			resets = <&cpg 716>;
704			status = "disabled";
705		};
706
707		hscif2: serial@e62d0000 {
708			compatible = "renesas,hscif-r8a77470",
709				     "renesas,rcar-gen2-hscif", "renesas,hscif";
710			reg = <0 0xe62d0000 0 0x60>;
711			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
712			clocks = <&cpg CPG_MOD 713>,
713				 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
714			clock-names = "fck", "brg_int", "scif_clk";
715			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
716			       <&dmac1 0x3b>, <&dmac1 0x3c>;
717			dma-names = "tx", "rx", "tx", "rx";
718			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
719			resets = <&cpg 713>;
720			status = "disabled";
721		};
722
723		pwm0: pwm@e6e30000 {
724			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
725			reg = <0 0xe6e30000 0 0x8>;
726			clocks = <&cpg CPG_MOD 523>;
727			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
728			resets = <&cpg 523>;
729			#pwm-cells = <2>;
730			status = "disabled";
731		};
732
733		pwm1: pwm@e6e31000 {
734			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
735			reg = <0 0xe6e31000 0 0x8>;
736			clocks = <&cpg CPG_MOD 523>;
737			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
738			resets = <&cpg 523>;
739			#pwm-cells = <2>;
740			status = "disabled";
741		};
742
743		pwm2: pwm@e6e32000 {
744			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
745			reg = <0 0xe6e32000 0 0x8>;
746			clocks = <&cpg CPG_MOD 523>;
747			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
748			resets = <&cpg 523>;
749			#pwm-cells = <2>;
750			status = "disabled";
751		};
752
753		pwm3: pwm@e6e33000 {
754			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
755			reg = <0 0xe6e33000 0 0x8>;
756			clocks = <&cpg CPG_MOD 523>;
757			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
758			resets = <&cpg 523>;
759			#pwm-cells = <2>;
760			status = "disabled";
761		};
762
763		pwm4: pwm@e6e34000 {
764			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
765			reg = <0 0xe6e34000 0 0x8>;
766			clocks = <&cpg CPG_MOD 523>;
767			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
768			resets = <&cpg 523>;
769			#pwm-cells = <2>;
770			status = "disabled";
771		};
772
773		pwm5: pwm@e6e35000 {
774			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
775			reg = <0 0xe6e35000 0 0x8>;
776			clocks = <&cpg CPG_MOD 523>;
777			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
778			resets = <&cpg 523>;
779			#pwm-cells = <2>;
780			status = "disabled";
781		};
782
783		pwm6: pwm@e6e36000 {
784			compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
785			reg = <0 0xe6e36000 0 0x8>;
786			clocks = <&cpg CPG_MOD 523>;
787			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
788			resets = <&cpg 523>;
789			#pwm-cells = <2>;
790			status = "disabled";
791		};
792
793		vin0: video@e6ef0000 {
794			compatible = "renesas,vin-r8a77470",
795				     "renesas,rcar-gen2-vin";
796			reg = <0 0xe6ef0000 0 0x1000>;
797			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
798			clocks = <&cpg CPG_MOD 811>;
799			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
800			resets = <&cpg 811>;
801			status = "disabled";
802		};
803
804		vin1: video@e6ef1000 {
805			compatible = "renesas,vin-r8a77470",
806				     "renesas,rcar-gen2-vin";
807			reg = <0 0xe6ef1000 0 0x1000>;
808			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
809			clocks = <&cpg CPG_MOD 810>;
810			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
811			resets = <&cpg 810>;
812			status = "disabled";
813		};
814
815		ohci0: usb@ee080000 {
816			compatible = "generic-ohci";
817			reg = <0 0xee080000 0 0x100>;
818			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
819			clocks = <&cpg CPG_MOD 703>;
820			phys = <&usb0 0>, <&usb2_phy0>;
821			phy-names = "usb";
822			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
823			resets = <&cpg 703>;
824			status = "disabled";
825		};
826
827		ehci0: usb@ee080100 {
828			compatible = "generic-ehci";
829			reg = <0 0xee080100 0 0x100>;
830			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
831			clocks = <&cpg CPG_MOD 703>;
832			phys = <&usb0 0>, <&usb2_phy0>;
833			phy-names = "usb";
834			companion = <&ohci0>;
835			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
836			resets = <&cpg 703>;
837			status = "disabled";
838		};
839
840		usb2_phy0: usb-phy@ee080200 {
841			compatible = "renesas,usb2-phy-r8a77470";
842			reg = <0 0xee080200 0 0x700>;
843			clocks = <&cpg CPG_MOD 703>;
844			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
845			resets = <&cpg 703>;
846			#phy-cells = <0>;
847			status = "disabled";
848		};
849
850		ohci1: usb@ee0c0000 {
851			compatible = "generic-ohci";
852			reg = <0 0xee0c0000 0 0x100>;
853			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
854			clocks = <&cpg CPG_MOD 705>;
855			phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
856			phy-names = "usb";
857			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
858			resets = <&cpg 705>;
859			status = "disabled";
860		};
861
862		ehci1: usb@ee0c0100 {
863			compatible = "generic-ehci";
864			reg = <0 0xee0c0100 0 0x100>;
865			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
866			clocks = <&cpg CPG_MOD 705>;
867			phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
868			phy-names = "usb";
869			companion = <&ohci1>;
870			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
871			resets = <&cpg 705>;
872			status = "disabled";
873		};
874
875		usb2_phy1: usb-phy@ee0c0200 {
876			compatible = "renesas,usb2-phy-r8a77470";
877			reg = <0 0xee0c0200 0 0x700>;
878			clocks = <&cpg CPG_MOD 705>;
879			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
880			resets = <&cpg 705>;
881			#phy-cells = <0>;
882			status = "disabled";
883		};
884
885		sdhi0: mmc@ee100000 {
886			compatible = "renesas,sdhi-r8a77470",
887				     "renesas,rcar-gen2-sdhi";
888			reg = <0 0xee100000 0 0x328>;
889			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
890			clocks = <&cpg CPG_MOD 314>;
891			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
892			       <&dmac1 0xcd>, <&dmac1 0xce>;
893			dma-names = "tx", "rx", "tx", "rx";
894			max-frequency = <156000000>;
895			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
896			resets = <&cpg 314>;
897			status = "disabled";
898		};
899
900		sdhi1: mmc@ee300000 {
901			compatible = "renesas,sdhi-mmc-r8a77470";
902			reg = <0 0xee300000 0 0x2000>;
903			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
904			clocks = <&cpg CPG_MOD 313>;
905			max-frequency = <156000000>;
906			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
907			resets = <&cpg 313>;
908			status = "disabled";
909		};
910
911		sdhi2: mmc@ee160000 {
912			compatible = "renesas,sdhi-r8a77470",
913				     "renesas,rcar-gen2-sdhi";
914			reg = <0 0xee160000 0 0x328>;
915			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
916			clocks = <&cpg CPG_MOD 312>;
917			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
918			       <&dmac1 0xd3>, <&dmac1 0xd4>;
919			dma-names = "tx", "rx", "tx", "rx";
920			max-frequency = <78000000>;
921			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
922			resets = <&cpg 312>;
923			status = "disabled";
924		};
925
926		gic: interrupt-controller@f1001000 {
927			compatible = "arm,gic-400";
928			#interrupt-cells = <3>;
929			#address-cells = <0>;
930			interrupt-controller;
931			reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
932			      <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
933			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
934			clocks = <&cpg CPG_MOD 408>;
935			clock-names = "clk";
936			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
937			resets = <&cpg 408>;
938		};
939
940		du: display@feb00000 {
941			compatible = "renesas,du-r8a77470";
942			reg = <0 0xfeb00000 0 0x40000>;
943			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
944				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
945			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
946			clock-names = "du.0", "du.1";
947			resets = <&cpg 724>;
948			reset-names = "du.0";
949			status = "disabled";
950
951			ports {
952				#address-cells = <1>;
953				#size-cells = <0>;
954
955				port@0 {
956					reg = <0>;
957					du_out_rgb0: endpoint {
958					};
959				};
960				port@1 {
961					reg = <1>;
962					du_out_rgb1: endpoint {
963					};
964				};
965				port@2 {
966					reg = <2>;
967					du_out_lvds0: endpoint {
968					};
969				};
970			};
971		};
972
973		prr: chipid@ff000044 {
974			compatible = "renesas,prr";
975			reg = <0 0xff000044 0 4>;
976		};
977
978		cmt0: timer@ffca0000 {
979			compatible = "renesas,r8a77470-cmt0",
980				     "renesas,rcar-gen2-cmt0";
981			reg = <0 0xffca0000 0 0x1004>;
982			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
983				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
984			clocks = <&cpg CPG_MOD 124>;
985			clock-names = "fck";
986			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
987			resets = <&cpg 124>;
988			status = "disabled";
989		};
990
991		cmt1: timer@e6130000 {
992			compatible = "renesas,r8a77470-cmt1",
993				     "renesas,rcar-gen2-cmt1";
994			reg = <0 0xe6130000 0 0x1004>;
995			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
996				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
997				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
998				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
999				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1000				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1001				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1002				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1003			clocks = <&cpg CPG_MOD 329>;
1004			clock-names = "fck";
1005			power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
1006			resets = <&cpg 329>;
1007			status = "disabled";
1008		};
1009	};
1010
1011	timer {
1012		compatible = "arm,armv7-timer";
1013		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1014				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1015				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1016				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1017	};
1018
1019	/* External USB clock - can be overridden by the board */
1020	usb_extal_clk: usb_extal {
1021		compatible = "fixed-clock";
1022		#clock-cells = <0>;
1023		clock-frequency = <48000000>;
1024	};
1025};
1026