1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright 2012 ST-Ericsson AB 4 */ 5 6#include <dt-bindings/interrupt-controller/irq.h> 7#include "ste-href-family-pinctrl.dtsi" 8 9/ { 10 memory { 11 device_type = "memory"; 12 reg = <0x00000000 0x20000000>; 13 }; 14 15 soc { 16 uart@80120000 { 17 pinctrl-names = "default", "sleep"; 18 pinctrl-0 = <&u0_a_1_default>; 19 pinctrl-1 = <&u0_a_1_sleep>; 20 status = "okay"; 21 }; 22 23 /* This UART is unused and thus left disabled */ 24 uart@80121000 { 25 pinctrl-names = "default", "sleep"; 26 pinctrl-0 = <&u1rxtx_a_1_default>; 27 pinctrl-1 = <&u1rxtx_a_1_sleep>; 28 }; 29 30 uart@80007000 { 31 pinctrl-names = "default", "sleep"; 32 pinctrl-0 = <&u2rxtx_c_1_default>; 33 pinctrl-1 = <&u2rxtx_c_1_sleep>; 34 status = "okay"; 35 }; 36 37 i2c@80004000 { 38 pinctrl-names = "default","sleep"; 39 pinctrl-0 = <&i2c0_a_1_default>; 40 pinctrl-1 = <&i2c0_a_1_sleep>; 41 status = "okay"; 42 }; 43 44 i2c@80122000 { 45 pinctrl-names = "default","sleep"; 46 pinctrl-0 = <&i2c1_b_2_default>; 47 pinctrl-1 = <&i2c1_b_2_sleep>; 48 status = "okay"; 49 }; 50 51 i2c@80128000 { 52 pinctrl-names = "default","sleep"; 53 pinctrl-0 = <&i2c2_b_2_default>; 54 pinctrl-1 = <&i2c2_b_2_sleep>; 55 status = "okay"; 56 lp5521@33 { 57 compatible = "national,lp5521"; 58 reg = <0x33>; 59 label = "lp5521_pri"; 60 clock-mode = /bits/ 8 <2>; 61 #address-cells = <1>; 62 #size-cells = <0>; 63 chan@0 { 64 reg = <0>; 65 led-cur = /bits/ 8 <0x2f>; 66 max-cur = /bits/ 8 <0x5f>; 67 linux,default-trigger = "heartbeat"; 68 }; 69 chan@1 { 70 reg = <1>; 71 led-cur = /bits/ 8 <0x2f>; 72 max-cur = /bits/ 8 <0x5f>; 73 }; 74 chan@2 { 75 reg = <2>; 76 led-cur = /bits/ 8 <0x2f>; 77 max-cur = /bits/ 8 <0x5f>; 78 }; 79 }; 80 lp5521@34 { 81 compatible = "national,lp5521"; 82 reg = <0x34>; 83 label = "lp5521_sec"; 84 clock-mode = /bits/ 8 <2>; 85 #address-cells = <1>; 86 #size-cells = <0>; 87 chan@0 { 88 reg = <0>; 89 led-cur = /bits/ 8 <0x2f>; 90 max-cur = /bits/ 8 <0x5f>; 91 }; 92 chan@1 { 93 reg = <1>; 94 led-cur = /bits/ 8 <0x2f>; 95 max-cur = /bits/ 8 <0x5f>; 96 }; 97 chan@2 { 98 reg = <2>; 99 led-cur = /bits/ 8 <0x2f>; 100 max-cur = /bits/ 8 <0x5f>; 101 }; 102 }; 103 bh1780@29 { 104 compatible = "rohm,bh1780gli"; 105 reg = <0x29>; 106 }; 107 }; 108 109 i2c@80110000 { 110 pinctrl-names = "default","sleep"; 111 pinctrl-0 = <&i2c3_c_2_default>; 112 pinctrl-1 = <&i2c3_c_2_sleep>; 113 status = "okay"; 114 }; 115 116 // External Micro SD slot 117 mmc@80126000 { 118 arm,primecell-periphid = <0x10480180>; 119 max-frequency = <100000000>; 120 bus-width = <4>; 121 cap-sd-highspeed; 122 cap-mmc-highspeed; 123 sd-uhs-sdr12; 124 sd-uhs-sdr25; 125 full-pwr-cycle; 126 st,sig-dir-dat0; 127 st,sig-dir-dat2; 128 st,sig-dir-cmd; 129 st,sig-pin-fbclk; 130 vmmc-supply = <&ab8500_ldo_aux3_reg>; 131 vqmmc-supply = <&vmmci>; 132 pinctrl-names = "default", "sleep"; 133 pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>; 134 pinctrl-1 = <&mc0_a_1_sleep>; 135 136 status = "okay"; 137 }; 138 139 // WLAN SDIO channel 140 mmc@80118000 { 141 arm,primecell-periphid = <0x10480180>; 142 max-frequency = <100000000>; 143 bus-width = <4>; 144 non-removable; 145 pinctrl-names = "default", "sleep"; 146 pinctrl-0 = <&mc1_a_1_default>; 147 pinctrl-1 = <&mc1_a_1_sleep>; 148 149 status = "okay"; 150 }; 151 152 // PoP:ed eMMC 153 mmc@80005000 { 154 arm,primecell-periphid = <0x10480180>; 155 max-frequency = <100000000>; 156 bus-width = <8>; 157 cap-mmc-highspeed; 158 non-removable; 159 vmmc-supply = <&db8500_vsmps2_reg>; 160 pinctrl-names = "default", "sleep"; 161 pinctrl-0 = <&mc2_a_1_default>; 162 pinctrl-1 = <&mc2_a_1_sleep>; 163 164 status = "okay"; 165 }; 166 167 // On-board eMMC 168 mmc@80114000 { 169 arm,primecell-periphid = <0x10480180>; 170 max-frequency = <100000000>; 171 bus-width = <8>; 172 cap-mmc-highspeed; 173 non-removable; 174 vmmc-supply = <&ab8500_ldo_aux2_reg>; 175 pinctrl-names = "default", "sleep"; 176 pinctrl-0 = <&mc4_a_1_default>; 177 pinctrl-1 = <&mc4_a_1_sleep>; 178 179 status = "okay"; 180 }; 181 182 msp0: msp@80123000 { 183 pinctrl-names = "default"; 184 pinctrl-0 = <&msp0txrxtfstck_a_1_default>; 185 status = "okay"; 186 }; 187 188 msp1: msp@80124000 { 189 pinctrl-names = "default"; 190 pinctrl-0 = <&msp1txrx_a_1_default>; 191 status = "okay"; 192 }; 193 194 msp2: msp@80117000 { 195 pinctrl-names = "default"; 196 pinctrl-0 = <&msp2_a_1_default>; 197 }; 198 199 msp3: msp@80125000 { 200 status = "okay"; 201 }; 202 203 prcmu@80157000 { 204 ab8500 { 205 ab8500-gpio { 206 }; 207 208 ab8500_usb { 209 pinctrl-names = "default", "sleep"; 210 pinctrl-0 = <&usb_a_1_default>; 211 pinctrl-1 = <&usb_a_1_sleep>; 212 }; 213 214 ab8500-regulators { 215 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { 216 regulator-name = "V-DISPLAY"; 217 }; 218 219 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { 220 regulator-name = "V-eMMC1"; 221 }; 222 223 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { 224 regulator-name = "V-MMC-SD"; 225 }; 226 227 ab8500_ldo_intcore_reg: ab8500_ldo_intcore { 228 regulator-name = "V-INTCORE"; 229 }; 230 231 ab8500_ldo_tvout_reg: ab8500_ldo_tvout { 232 regulator-name = "V-TVOUT"; 233 }; 234 235 ab8500_ldo_audio_reg: ab8500_ldo_audio { 236 regulator-name = "V-AUD"; 237 }; 238 239 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { 240 regulator-name = "V-AMIC1"; 241 }; 242 243 ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { 244 regulator-name = "V-AMIC2"; 245 }; 246 247 ab8500_ldo_dmic_reg: ab8500_ldo_dmic { 248 regulator-name = "V-DMIC"; 249 }; 250 251 ab8500_ldo_ana_reg: ab8500_ldo_ana { 252 regulator-name = "V-CSI/DSI"; 253 }; 254 }; 255 }; 256 }; 257 258 pinctrl { 259 sdi0 { 260 sdi0_default_mode: sdi0_default { 261 /* Some boards set additional settings here */ 262 }; 263 }; 264 }; 265 266 mcde@a0350000 { 267 pinctrl-names = "default", "sleep"; 268 pinctrl-0 = <&lcd_default_mode>; 269 pinctrl-1 = <&lcd_sleep_mode>; 270 }; 271 }; 272}; 273