1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ispccdc.c
4 *
5 * TI OMAP3 ISP - CCDC module
6 *
7 * Copyright (C) 2009-2010 Nokia Corporation
8 * Copyright (C) 2009 Texas Instruments, Inc.
9 *
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
12 */
13
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <media/v4l2-event.h>
23
24 #include "isp.h"
25 #include "ispreg.h"
26 #include "ispccdc.h"
27
28 #define CCDC_MIN_WIDTH 32
29 #define CCDC_MIN_HEIGHT 32
30
31 static struct v4l2_mbus_framefmt *
32 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
33 unsigned int pad, enum v4l2_subdev_format_whence which);
34
35 static const unsigned int ccdc_fmts[] = {
36 MEDIA_BUS_FMT_Y8_1X8,
37 MEDIA_BUS_FMT_Y10_1X10,
38 MEDIA_BUS_FMT_Y12_1X12,
39 MEDIA_BUS_FMT_SGRBG8_1X8,
40 MEDIA_BUS_FMT_SRGGB8_1X8,
41 MEDIA_BUS_FMT_SBGGR8_1X8,
42 MEDIA_BUS_FMT_SGBRG8_1X8,
43 MEDIA_BUS_FMT_SGRBG10_1X10,
44 MEDIA_BUS_FMT_SRGGB10_1X10,
45 MEDIA_BUS_FMT_SBGGR10_1X10,
46 MEDIA_BUS_FMT_SGBRG10_1X10,
47 MEDIA_BUS_FMT_SGRBG12_1X12,
48 MEDIA_BUS_FMT_SRGGB12_1X12,
49 MEDIA_BUS_FMT_SBGGR12_1X12,
50 MEDIA_BUS_FMT_SGBRG12_1X12,
51 MEDIA_BUS_FMT_YUYV8_2X8,
52 MEDIA_BUS_FMT_UYVY8_2X8,
53 };
54
55 /*
56 * ccdc_print_status - Print current CCDC Module register values.
57 * @ccdc: Pointer to ISP CCDC device.
58 *
59 * Also prints other debug information stored in the CCDC module.
60 */
61 #define CCDC_PRINT_REGISTER(isp, name)\
62 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
63 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
64
ccdc_print_status(struct isp_ccdc_device * ccdc)65 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
66 {
67 struct isp_device *isp = to_isp_device(ccdc);
68
69 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
70
71 CCDC_PRINT_REGISTER(isp, PCR);
72 CCDC_PRINT_REGISTER(isp, SYN_MODE);
73 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
74 CCDC_PRINT_REGISTER(isp, PIX_LINES);
75 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
76 CCDC_PRINT_REGISTER(isp, VERT_START);
77 CCDC_PRINT_REGISTER(isp, VERT_LINES);
78 CCDC_PRINT_REGISTER(isp, CULLING);
79 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
80 CCDC_PRINT_REGISTER(isp, SDOFST);
81 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
82 CCDC_PRINT_REGISTER(isp, CLAMP);
83 CCDC_PRINT_REGISTER(isp, DCSUB);
84 CCDC_PRINT_REGISTER(isp, COLPTN);
85 CCDC_PRINT_REGISTER(isp, BLKCMP);
86 CCDC_PRINT_REGISTER(isp, FPC);
87 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
88 CCDC_PRINT_REGISTER(isp, VDINT);
89 CCDC_PRINT_REGISTER(isp, ALAW);
90 CCDC_PRINT_REGISTER(isp, REC656IF);
91 CCDC_PRINT_REGISTER(isp, CFG);
92 CCDC_PRINT_REGISTER(isp, FMTCFG);
93 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
94 CCDC_PRINT_REGISTER(isp, FMT_VERT);
95 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
96 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
97 CCDC_PRINT_REGISTER(isp, PRGODD0);
98 CCDC_PRINT_REGISTER(isp, PRGODD1);
99 CCDC_PRINT_REGISTER(isp, VP_OUT);
100 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
101 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
102 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
103 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
104
105 dev_dbg(isp->dev, "--------------------------------------------\n");
106 }
107
108 /*
109 * omap3isp_ccdc_busy - Get busy state of the CCDC.
110 * @ccdc: Pointer to ISP CCDC device.
111 */
omap3isp_ccdc_busy(struct isp_ccdc_device * ccdc)112 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
113 {
114 struct isp_device *isp = to_isp_device(ccdc);
115
116 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
117 ISPCCDC_PCR_BUSY;
118 }
119
120 /* -----------------------------------------------------------------------------
121 * Lens Shading Compensation
122 */
123
124 /*
125 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
126 * @ccdc: Pointer to ISP CCDC device.
127 * @lsc_cfg: the LSC configuration to check.
128 *
129 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
130 */
ccdc_lsc_validate_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * lsc_cfg)131 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
132 struct omap3isp_ccdc_lsc_config *lsc_cfg)
133 {
134 struct isp_device *isp = to_isp_device(ccdc);
135 struct v4l2_mbus_framefmt *format;
136 unsigned int paxel_width, paxel_height;
137 unsigned int paxel_shift_x, paxel_shift_y;
138 unsigned int min_width, min_height, min_size;
139 unsigned int input_width, input_height;
140
141 paxel_shift_x = lsc_cfg->gain_mode_m;
142 paxel_shift_y = lsc_cfg->gain_mode_n;
143
144 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
145 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
146 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
147 return -EINVAL;
148 }
149
150 if (lsc_cfg->offset & 3) {
151 dev_dbg(isp->dev,
152 "CCDC: LSC: Offset must be a multiple of 4\n");
153 return -EINVAL;
154 }
155
156 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
157 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
158 return -EINVAL;
159 }
160
161 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
162 V4L2_SUBDEV_FORMAT_ACTIVE);
163 input_width = format->width;
164 input_height = format->height;
165
166 /* Calculate minimum bytesize for validation */
167 paxel_width = 1 << paxel_shift_x;
168 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
169 >> paxel_shift_x) + 1;
170
171 paxel_height = 1 << paxel_shift_y;
172 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
173 >> paxel_shift_y) + 1;
174
175 min_size = 4 * min_width * min_height;
176 if (min_size > lsc_cfg->size) {
177 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
178 return -EINVAL;
179 }
180 if (lsc_cfg->offset < (min_width * 4)) {
181 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
182 return -EINVAL;
183 }
184 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
185 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
186 return -EINVAL;
187 }
188 return 0;
189 }
190
191 /*
192 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
193 * @ccdc: Pointer to ISP CCDC device.
194 */
ccdc_lsc_program_table(struct isp_ccdc_device * ccdc,dma_addr_t addr)195 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
196 dma_addr_t addr)
197 {
198 isp_reg_writel(to_isp_device(ccdc), addr,
199 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
200 }
201
202 /*
203 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
204 * @ccdc: Pointer to ISP CCDC device.
205 */
ccdc_lsc_setup_regs(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * cfg)206 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
207 struct omap3isp_ccdc_lsc_config *cfg)
208 {
209 struct isp_device *isp = to_isp_device(ccdc);
210 int reg;
211
212 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
213 ISPCCDC_LSC_TABLE_OFFSET);
214
215 reg = 0;
216 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
217 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
218 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
219 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
220
221 reg = 0;
222 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
223 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
224 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
225 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
226 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
227 ISPCCDC_LSC_INITIAL);
228 }
229
ccdc_lsc_wait_prefetch(struct isp_ccdc_device * ccdc)230 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
231 {
232 struct isp_device *isp = to_isp_device(ccdc);
233 unsigned int wait;
234
235 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
236 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
237
238 /* timeout 1 ms */
239 for (wait = 0; wait < 1000; wait++) {
240 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
241 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
242 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
243 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
244 return 0;
245 }
246
247 rmb();
248 udelay(1);
249 }
250
251 return -ETIMEDOUT;
252 }
253
254 /*
255 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
256 * @ccdc: Pointer to ISP CCDC device.
257 * @enable: 0 Disables LSC, 1 Enables LSC.
258 */
__ccdc_lsc_enable(struct isp_ccdc_device * ccdc,int enable)259 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
260 {
261 struct isp_device *isp = to_isp_device(ccdc);
262 const struct v4l2_mbus_framefmt *format =
263 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
264 V4L2_SUBDEV_FORMAT_ACTIVE);
265
266 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
267 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
268 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
269 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
270 return -EINVAL;
271
272 if (enable)
273 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
274
275 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
276 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
277
278 if (enable) {
279 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
280 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
281 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
282 ccdc->lsc.state = LSC_STATE_STOPPED;
283 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
284 return -ETIMEDOUT;
285 }
286 ccdc->lsc.state = LSC_STATE_RUNNING;
287 } else {
288 ccdc->lsc.state = LSC_STATE_STOPPING;
289 }
290
291 return 0;
292 }
293
ccdc_lsc_busy(struct isp_ccdc_device * ccdc)294 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
295 {
296 struct isp_device *isp = to_isp_device(ccdc);
297
298 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
299 ISPCCDC_LSC_BUSY;
300 }
301
302 /*
303 * __ccdc_lsc_configure - Apply a new configuration to the LSC engine
304 * @ccdc: Pointer to ISP CCDC device
305 * @req: New configuration request
306 */
__ccdc_lsc_configure(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)307 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
308 struct ispccdc_lsc_config_req *req)
309 {
310 if (!req->enable)
311 return -EINVAL;
312
313 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
314 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
315 return -EINVAL;
316 }
317
318 if (ccdc_lsc_busy(ccdc))
319 return -EBUSY;
320
321 ccdc_lsc_setup_regs(ccdc, &req->config);
322 ccdc_lsc_program_table(ccdc, req->table.dma);
323 return 0;
324 }
325
326 /*
327 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
328 * @ccdc: Pointer to ISP CCDC device.
329 *
330 * Disables LSC, and defers enablement to shadow registers update time.
331 */
ccdc_lsc_error_handler(struct isp_ccdc_device * ccdc)332 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
333 {
334 struct isp_device *isp = to_isp_device(ccdc);
335 /*
336 * From OMAP3 TRM: When this event is pending, the module
337 * goes into transparent mode (output =input). Normal
338 * operation can be resumed at the start of the next frame
339 * after:
340 * 1) Clearing this event
341 * 2) Disabling the LSC module
342 * 3) Enabling it
343 */
344 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
345 ISPCCDC_LSC_ENABLE);
346 ccdc->lsc.state = LSC_STATE_STOPPED;
347 }
348
ccdc_lsc_free_request(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)349 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
350 struct ispccdc_lsc_config_req *req)
351 {
352 struct isp_device *isp = to_isp_device(ccdc);
353
354 if (req == NULL)
355 return;
356
357 if (req->table.addr) {
358 sg_free_table(&req->table.sgt);
359 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
360 req->table.dma);
361 }
362
363 kfree(req);
364 }
365
ccdc_lsc_free_queue(struct isp_ccdc_device * ccdc,struct list_head * queue)366 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
367 struct list_head *queue)
368 {
369 struct ispccdc_lsc_config_req *req, *n;
370 unsigned long flags;
371
372 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
373 list_for_each_entry_safe(req, n, queue, list) {
374 list_del(&req->list);
375 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
376 ccdc_lsc_free_request(ccdc, req);
377 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
378 }
379 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
380 }
381
ccdc_lsc_free_table_work(struct work_struct * work)382 static void ccdc_lsc_free_table_work(struct work_struct *work)
383 {
384 struct isp_ccdc_device *ccdc;
385 struct ispccdc_lsc *lsc;
386
387 lsc = container_of(work, struct ispccdc_lsc, table_work);
388 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
389
390 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
391 }
392
393 /*
394 * ccdc_lsc_config - Configure the LSC module from a userspace request
395 *
396 * Store the request LSC configuration in the LSC engine request pointer. The
397 * configuration will be applied to the hardware when the CCDC will be enabled,
398 * or at the next LSC interrupt if the CCDC is already running.
399 */
ccdc_lsc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * config)400 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
401 struct omap3isp_ccdc_update_config *config)
402 {
403 struct isp_device *isp = to_isp_device(ccdc);
404 struct ispccdc_lsc_config_req *req;
405 unsigned long flags;
406 u16 update;
407 int ret;
408
409 update = config->update &
410 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
411 if (!update)
412 return 0;
413
414 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
415 dev_dbg(to_device(ccdc),
416 "%s: Both LSC configuration and table need to be supplied\n",
417 __func__);
418 return -EINVAL;
419 }
420
421 req = kzalloc(sizeof(*req), GFP_KERNEL);
422 if (req == NULL)
423 return -ENOMEM;
424
425 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
426 if (copy_from_user(&req->config, config->lsc_cfg,
427 sizeof(req->config))) {
428 ret = -EFAULT;
429 goto done;
430 }
431
432 req->enable = 1;
433
434 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
435 &req->table.dma,
436 GFP_KERNEL);
437 if (req->table.addr == NULL) {
438 ret = -ENOMEM;
439 goto done;
440 }
441
442 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
443 req->table.addr, req->table.dma,
444 req->config.size);
445 if (ret < 0)
446 goto done;
447
448 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
449 req->table.sgt.nents, DMA_TO_DEVICE);
450
451 if (copy_from_user(req->table.addr, config->lsc,
452 req->config.size)) {
453 ret = -EFAULT;
454 goto done;
455 }
456
457 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
458 req->table.sgt.nents, DMA_TO_DEVICE);
459 }
460
461 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
462 if (ccdc->lsc.request) {
463 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
464 schedule_work(&ccdc->lsc.table_work);
465 }
466 ccdc->lsc.request = req;
467 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
468
469 ret = 0;
470
471 done:
472 if (ret < 0)
473 ccdc_lsc_free_request(ccdc, req);
474
475 return ret;
476 }
477
ccdc_lsc_is_configured(struct isp_ccdc_device * ccdc)478 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
479 {
480 unsigned long flags;
481 int ret;
482
483 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
484 ret = ccdc->lsc.active != NULL;
485 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
486
487 return ret;
488 }
489
ccdc_lsc_enable(struct isp_ccdc_device * ccdc)490 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
491 {
492 struct ispccdc_lsc *lsc = &ccdc->lsc;
493
494 if (lsc->state != LSC_STATE_STOPPED)
495 return -EINVAL;
496
497 if (lsc->active) {
498 list_add_tail(&lsc->active->list, &lsc->free_queue);
499 lsc->active = NULL;
500 }
501
502 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
503 omap3isp_sbl_disable(to_isp_device(ccdc),
504 OMAP3_ISP_SBL_CCDC_LSC_READ);
505 list_add_tail(&lsc->request->list, &lsc->free_queue);
506 lsc->request = NULL;
507 goto done;
508 }
509
510 lsc->active = lsc->request;
511 lsc->request = NULL;
512 __ccdc_lsc_enable(ccdc, 1);
513
514 done:
515 if (!list_empty(&lsc->free_queue))
516 schedule_work(&lsc->table_work);
517
518 return 0;
519 }
520
521 /* -----------------------------------------------------------------------------
522 * Parameters configuration
523 */
524
525 /*
526 * ccdc_configure_clamp - Configure optical-black or digital clamping
527 * @ccdc: Pointer to ISP CCDC device.
528 *
529 * The CCDC performs either optical-black or digital clamp. Configure and enable
530 * the selected clamp method.
531 */
ccdc_configure_clamp(struct isp_ccdc_device * ccdc)532 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
533 {
534 struct isp_device *isp = to_isp_device(ccdc);
535 u32 clamp;
536
537 if (ccdc->obclamp) {
538 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
539 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
540 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
541 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
542 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
543 } else {
544 isp_reg_writel(isp, ccdc->clamp.dcsubval,
545 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
546 }
547
548 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
549 ISPCCDC_CLAMP_CLAMPEN,
550 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
551 }
552
553 /*
554 * ccdc_configure_fpc - Configure Faulty Pixel Correction
555 * @ccdc: Pointer to ISP CCDC device.
556 */
ccdc_configure_fpc(struct isp_ccdc_device * ccdc)557 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
558 {
559 struct isp_device *isp = to_isp_device(ccdc);
560
561 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
562
563 if (!ccdc->fpc_en)
564 return;
565
566 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
567 ISPCCDC_FPC_ADDR);
568 /* The FPNUM field must be set before enabling FPC. */
569 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
570 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
571 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
572 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
573 }
574
575 /*
576 * ccdc_configure_black_comp - Configure Black Level Compensation.
577 * @ccdc: Pointer to ISP CCDC device.
578 */
ccdc_configure_black_comp(struct isp_ccdc_device * ccdc)579 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
580 {
581 struct isp_device *isp = to_isp_device(ccdc);
582 u32 blcomp;
583
584 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
585 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
586 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
587 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
588
589 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
590 }
591
592 /*
593 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
594 * @ccdc: Pointer to ISP CCDC device.
595 */
ccdc_configure_lpf(struct isp_ccdc_device * ccdc)596 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
597 {
598 struct isp_device *isp = to_isp_device(ccdc);
599
600 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
601 ISPCCDC_SYN_MODE_LPF,
602 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
603 }
604
605 /*
606 * ccdc_configure_alaw - Configure A-law compression.
607 * @ccdc: Pointer to ISP CCDC device.
608 */
ccdc_configure_alaw(struct isp_ccdc_device * ccdc)609 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
610 {
611 struct isp_device *isp = to_isp_device(ccdc);
612 const struct isp_format_info *info;
613 u32 alaw = 0;
614
615 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
616
617 switch (info->width) {
618 case 8:
619 return;
620
621 case 10:
622 alaw = ISPCCDC_ALAW_GWDI_9_0;
623 break;
624 case 11:
625 alaw = ISPCCDC_ALAW_GWDI_10_1;
626 break;
627 case 12:
628 alaw = ISPCCDC_ALAW_GWDI_11_2;
629 break;
630 case 13:
631 alaw = ISPCCDC_ALAW_GWDI_12_3;
632 break;
633 }
634
635 if (ccdc->alaw)
636 alaw |= ISPCCDC_ALAW_CCDTBL;
637
638 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
639 }
640
641 /*
642 * ccdc_config_imgattr - Configure sensor image specific attributes.
643 * @ccdc: Pointer to ISP CCDC device.
644 * @colptn: Color pattern of the sensor.
645 */
ccdc_config_imgattr(struct isp_ccdc_device * ccdc,u32 colptn)646 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
647 {
648 struct isp_device *isp = to_isp_device(ccdc);
649
650 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
651 }
652
653 /*
654 * ccdc_config - Set CCDC configuration from userspace
655 * @ccdc: Pointer to ISP CCDC device.
656 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
657 *
658 * Returns 0 if successful, -EINVAL if the pointer to the configuration
659 * structure is null, or the copy_from_user function fails to copy user space
660 * memory to kernel space memory.
661 */
ccdc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * ccdc_struct)662 static int ccdc_config(struct isp_ccdc_device *ccdc,
663 struct omap3isp_ccdc_update_config *ccdc_struct)
664 {
665 struct isp_device *isp = to_isp_device(ccdc);
666 unsigned long flags;
667
668 spin_lock_irqsave(&ccdc->lock, flags);
669 ccdc->shadow_update = 1;
670 spin_unlock_irqrestore(&ccdc->lock, flags);
671
672 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
673 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
674 ccdc->update |= OMAP3ISP_CCDC_ALAW;
675 }
676
677 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
678 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
679 ccdc->update |= OMAP3ISP_CCDC_LPF;
680 }
681
682 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
683 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
684 sizeof(ccdc->clamp))) {
685 ccdc->shadow_update = 0;
686 return -EFAULT;
687 }
688
689 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
690 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
691 }
692
693 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
694 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
695 sizeof(ccdc->blcomp))) {
696 ccdc->shadow_update = 0;
697 return -EFAULT;
698 }
699
700 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
701 }
702
703 ccdc->shadow_update = 0;
704
705 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
706 struct omap3isp_ccdc_fpc fpc;
707 struct ispccdc_fpc fpc_old = { .addr = NULL, };
708 struct ispccdc_fpc fpc_new;
709 u32 size;
710
711 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
712 return -EBUSY;
713
714 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
715
716 if (ccdc->fpc_en) {
717 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
718 return -EFAULT;
719
720 size = fpc.fpnum * 4;
721
722 /*
723 * The table address must be 64-bytes aligned, which is
724 * guaranteed by dma_alloc_coherent().
725 */
726 fpc_new.fpnum = fpc.fpnum;
727 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
728 &fpc_new.dma,
729 GFP_KERNEL);
730 if (fpc_new.addr == NULL)
731 return -ENOMEM;
732
733 if (copy_from_user(fpc_new.addr,
734 (__force void __user *)(long)fpc.fpcaddr,
735 size)) {
736 dma_free_coherent(isp->dev, size, fpc_new.addr,
737 fpc_new.dma);
738 return -EFAULT;
739 }
740
741 fpc_old = ccdc->fpc;
742 ccdc->fpc = fpc_new;
743 }
744
745 ccdc_configure_fpc(ccdc);
746
747 if (fpc_old.addr != NULL)
748 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
749 fpc_old.addr, fpc_old.dma);
750 }
751
752 return ccdc_lsc_config(ccdc, ccdc_struct);
753 }
754
ccdc_apply_controls(struct isp_ccdc_device * ccdc)755 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
756 {
757 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
758 ccdc_configure_alaw(ccdc);
759 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
760 }
761
762 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
763 ccdc_configure_lpf(ccdc);
764 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
765 }
766
767 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
768 ccdc_configure_clamp(ccdc);
769 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
770 }
771
772 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
773 ccdc_configure_black_comp(ccdc);
774 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
775 }
776 }
777
778 /*
779 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
780 * @isp: Pointer to ISP device
781 */
omap3isp_ccdc_restore_context(struct isp_device * isp)782 void omap3isp_ccdc_restore_context(struct isp_device *isp)
783 {
784 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
785
786 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
787
788 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
789 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
790 ccdc_apply_controls(ccdc);
791 ccdc_configure_fpc(ccdc);
792 }
793
794 /* -----------------------------------------------------------------------------
795 * Format- and pipeline-related configuration helpers
796 */
797
798 /*
799 * ccdc_config_vp - Configure the Video Port.
800 * @ccdc: Pointer to ISP CCDC device.
801 */
ccdc_config_vp(struct isp_ccdc_device * ccdc)802 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
803 {
804 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
805 struct isp_device *isp = to_isp_device(ccdc);
806 const struct isp_format_info *info;
807 struct v4l2_mbus_framefmt *format;
808 unsigned long l3_ick = pipe->l3_ick;
809 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
810 unsigned int div = 0;
811 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
812
813 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
814
815 if (!format->code) {
816 /* Disable the video port when the input format isn't supported.
817 * This is indicated by a pixel code set to 0.
818 */
819 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
820 return;
821 }
822
823 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
824 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
825 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
826 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
827 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
828 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
829
830 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
831 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
832 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
833
834 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
835
836 switch (info->width) {
837 case 8:
838 case 10:
839 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
840 break;
841 case 11:
842 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
843 break;
844 case 12:
845 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
846 break;
847 case 13:
848 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
849 break;
850 }
851
852 if (pipe->input)
853 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
854 else if (pipe->external_rate)
855 div = l3_ick / pipe->external_rate;
856
857 div = clamp(div, 2U, max_div);
858 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
859
860 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
861 }
862
863 /*
864 * ccdc_config_outlineoffset - Configure memory saving output line offset
865 * @ccdc: Pointer to ISP CCDC device.
866 * @bpl: Number of bytes per line when stored in memory.
867 * @field: Field order when storing interlaced formats in memory.
868 *
869 * Configure the offsets for the line output control:
870 *
871 * - The horizontal line offset is defined as the number of bytes between the
872 * start of two consecutive lines in memory. Set it to the given bytes per
873 * line value.
874 *
875 * - The field offset value is defined as the number of lines to offset the
876 * start of the field identified by FID = 1. Set it to one.
877 *
878 * - The line offset values are defined as the number of lines (as defined by
879 * the horizontal line offset) between the start of two consecutive lines for
880 * all combinations of odd/even lines in odd/even fields. When interleaving
881 * fields set them all to two lines, and to one line otherwise.
882 */
ccdc_config_outlineoffset(struct isp_ccdc_device * ccdc,unsigned int bpl,enum v4l2_field field)883 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
884 unsigned int bpl,
885 enum v4l2_field field)
886 {
887 struct isp_device *isp = to_isp_device(ccdc);
888 u32 sdofst = 0;
889
890 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
891 ISPCCDC_HSIZE_OFF);
892
893 switch (field) {
894 case V4L2_FIELD_INTERLACED_TB:
895 case V4L2_FIELD_INTERLACED_BT:
896 /* When interleaving fields in memory offset field one by one
897 * line and set the line offset to two lines.
898 */
899 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
900 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
901 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
902 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
903 break;
904
905 default:
906 /* In all other cases set the line offsets to one line. */
907 break;
908 }
909
910 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
911 }
912
913 /*
914 * ccdc_set_outaddr - Set memory address to save output image
915 * @ccdc: Pointer to ISP CCDC device.
916 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
917 *
918 * Sets the memory address where the output will be saved.
919 */
ccdc_set_outaddr(struct isp_ccdc_device * ccdc,u32 addr)920 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
921 {
922 struct isp_device *isp = to_isp_device(ccdc);
923
924 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
925 }
926
927 /*
928 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
929 * @ccdc: Pointer to ISP CCDC device.
930 * @max_rate: Maximum calculated data rate.
931 *
932 * Returns in *max_rate less value between calculated and passed
933 */
omap3isp_ccdc_max_rate(struct isp_ccdc_device * ccdc,unsigned int * max_rate)934 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
935 unsigned int *max_rate)
936 {
937 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
938 unsigned int rate;
939
940 if (pipe == NULL)
941 return;
942
943 /*
944 * TRM says that for parallel sensors the maximum data rate
945 * should be 90% form L3/2 clock, otherwise just L3/2.
946 */
947 if (ccdc->input == CCDC_INPUT_PARALLEL)
948 rate = pipe->l3_ick / 2 * 9 / 10;
949 else
950 rate = pipe->l3_ick / 2;
951
952 *max_rate = min(*max_rate, rate);
953 }
954
955 /*
956 * ccdc_config_sync_if - Set CCDC sync interface configuration
957 * @ccdc: Pointer to ISP CCDC device.
958 * @parcfg: Parallel interface platform data (may be NULL)
959 * @data_size: Data size
960 */
ccdc_config_sync_if(struct isp_ccdc_device * ccdc,struct isp_parallel_cfg * parcfg,unsigned int data_size)961 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
962 struct isp_parallel_cfg *parcfg,
963 unsigned int data_size)
964 {
965 struct isp_device *isp = to_isp_device(ccdc);
966 const struct v4l2_mbus_framefmt *format;
967 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
968
969 format = &ccdc->formats[CCDC_PAD_SINK];
970
971 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
972 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
973 /* According to the OMAP3 TRM the input mode only affects SYNC
974 * mode, enabling BT.656 mode should take precedence. However,
975 * in practice setting the input mode to YCbCr data on 8 bits
976 * seems to be required in BT.656 mode. In SYNC mode set it to
977 * YCbCr on 16 bits as the bridge is enabled in that case.
978 */
979 if (ccdc->bt656)
980 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
981 else
982 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
983 }
984
985 switch (data_size) {
986 case 8:
987 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
988 break;
989 case 10:
990 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
991 break;
992 case 11:
993 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
994 break;
995 case 12:
996 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
997 break;
998 }
999
1000 if (parcfg && parcfg->data_pol)
1001 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1002
1003 if (parcfg && parcfg->hs_pol)
1004 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1005
1006 /* The polarity of the vertical sync signal output by the BT.656
1007 * decoder is not documented and seems to be active low.
1008 */
1009 if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1010 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1011
1012 if (parcfg && parcfg->fld_pol)
1013 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1014
1015 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1016
1017 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1018 * hardware seems to ignore it in all other input modes.
1019 */
1020 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1021 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1022 ISPCCDC_CFG_Y8POS);
1023 else
1024 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1025 ISPCCDC_CFG_Y8POS);
1026
1027 /* Enable or disable BT.656 mode, including error correction for the
1028 * synchronization codes.
1029 */
1030 if (ccdc->bt656)
1031 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1032 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1033 else
1034 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1035 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1036
1037 }
1038
1039 /* CCDC formats descriptions */
1040 static const u32 ccdc_sgrbg_pattern =
1041 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1042 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1043 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1044 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1045 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1046 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1047 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1048 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1049 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1050 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1051 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1052 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1053 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1054 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1055 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1056 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1057
1058 static const u32 ccdc_srggb_pattern =
1059 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1060 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1061 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1062 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1063 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1064 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1065 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1066 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1067 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1068 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1069 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1070 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1071 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1072 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1073 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1074 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1075
1076 static const u32 ccdc_sbggr_pattern =
1077 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1078 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1079 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1080 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1081 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1082 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1083 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1084 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1085 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1086 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1087 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1088 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1089 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1090 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1091 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1092 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1093
1094 static const u32 ccdc_sgbrg_pattern =
1095 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1096 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1097 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1098 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1099 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1100 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1101 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1102 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1103 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1104 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1105 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1106 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1107 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1108 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1109 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1110 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1111
ccdc_configure(struct isp_ccdc_device * ccdc)1112 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1113 {
1114 struct isp_device *isp = to_isp_device(ccdc);
1115 struct isp_parallel_cfg *parcfg = NULL;
1116 struct v4l2_subdev *sensor;
1117 struct v4l2_mbus_framefmt *format;
1118 const struct v4l2_rect *crop;
1119 const struct isp_format_info *fmt_info;
1120 struct v4l2_subdev_format fmt_src;
1121 unsigned int depth_out;
1122 unsigned int depth_in = 0;
1123 struct media_pad *pad;
1124 unsigned long flags;
1125 unsigned int bridge;
1126 unsigned int shift;
1127 unsigned int nph;
1128 unsigned int sph;
1129 u32 syn_mode;
1130 u32 ccdc_pattern;
1131
1132 ccdc->bt656 = false;
1133 ccdc->fields = 0;
1134
1135 pad = media_entity_remote_pad(&ccdc->pads[CCDC_PAD_SINK]);
1136 sensor = media_entity_to_v4l2_subdev(pad->entity);
1137 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1138 struct v4l2_subdev *sd =
1139 to_isp_pipeline(&ccdc->subdev.entity)->external;
1140
1141 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel;
1142 ccdc->bt656 = parcfg->bt656;
1143 }
1144
1145 /* CCDC_PAD_SINK */
1146 format = &ccdc->formats[CCDC_PAD_SINK];
1147
1148 /* Compute the lane shifter shift value and enable the bridge when the
1149 * input format is a non-BT.656 YUV variant.
1150 */
1151 fmt_src.pad = pad->index;
1152 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1153 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1154 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1155 depth_in = fmt_info->width;
1156 }
1157
1158 fmt_info = omap3isp_video_format_info(format->code);
1159 depth_out = fmt_info->width;
1160 shift = depth_in - depth_out;
1161
1162 if (ccdc->bt656)
1163 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1164 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1165 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1166 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1167 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1168 else
1169 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1170
1171 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1172
1173 /* Configure the sync interface. */
1174 ccdc_config_sync_if(ccdc, parcfg, depth_out);
1175
1176 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1177
1178 /* Use the raw, unprocessed data when writing to memory. The H3A and
1179 * histogram modules are still fed with lens shading corrected data.
1180 */
1181 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1182
1183 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1184 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1185 else
1186 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1187
1188 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1189 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1190 else
1191 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1192
1193 /* Mosaic filter */
1194 switch (format->code) {
1195 case MEDIA_BUS_FMT_SRGGB10_1X10:
1196 case MEDIA_BUS_FMT_SRGGB12_1X12:
1197 ccdc_pattern = ccdc_srggb_pattern;
1198 break;
1199 case MEDIA_BUS_FMT_SBGGR10_1X10:
1200 case MEDIA_BUS_FMT_SBGGR12_1X12:
1201 ccdc_pattern = ccdc_sbggr_pattern;
1202 break;
1203 case MEDIA_BUS_FMT_SGBRG10_1X10:
1204 case MEDIA_BUS_FMT_SGBRG12_1X12:
1205 ccdc_pattern = ccdc_sgbrg_pattern;
1206 break;
1207 default:
1208 /* Use GRBG */
1209 ccdc_pattern = ccdc_sgrbg_pattern;
1210 break;
1211 }
1212 ccdc_config_imgattr(ccdc, ccdc_pattern);
1213
1214 /* Generate VD0 on the last line of the image and VD1 on the
1215 * 2/3 height line.
1216 */
1217 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1218 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1219 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1220
1221 /* CCDC_PAD_SOURCE_OF */
1222 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1223 crop = &ccdc->crop;
1224
1225 /* The horizontal coordinates are expressed in pixel clock cycles. We
1226 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1227 * SYNC mode regardless of the format as the bridge is enabled for YUV
1228 * formats in that case.
1229 */
1230 if (ccdc->bt656) {
1231 sph = crop->left * 2;
1232 nph = crop->width * 2 - 1;
1233 } else {
1234 sph = crop->left;
1235 nph = crop->width - 1;
1236 }
1237
1238 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1239 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1240 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1241 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1242 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1243 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1244 isp_reg_writel(isp, (crop->height - 1)
1245 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1246 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1247
1248 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1249 format->field);
1250
1251 /* When interleaving fields enable processing of the field input signal.
1252 * This will cause the line output control module to apply the field
1253 * offset to field 1.
1254 */
1255 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1256 (format->field == V4L2_FIELD_INTERLACED_TB ||
1257 format->field == V4L2_FIELD_INTERLACED_BT))
1258 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1259
1260 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1261 * YUYV.
1262 */
1263 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1264 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1265 ISPCCDC_CFG_BSWD);
1266 else
1267 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1268 ISPCCDC_CFG_BSWD);
1269
1270 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1271 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1272 * for simplicity.
1273 */
1274 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1275 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1276 else
1277 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1278
1279 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1280
1281 /* CCDC_PAD_SOURCE_VP */
1282 ccdc_config_vp(ccdc);
1283
1284 /* Lens shading correction. */
1285 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1286 if (ccdc->lsc.request == NULL)
1287 goto unlock;
1288
1289 WARN_ON(ccdc->lsc.active);
1290
1291 /* Get last good LSC configuration. If it is not supported for
1292 * the current active resolution discard it.
1293 */
1294 if (ccdc->lsc.active == NULL &&
1295 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1296 ccdc->lsc.active = ccdc->lsc.request;
1297 } else {
1298 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1299 schedule_work(&ccdc->lsc.table_work);
1300 }
1301
1302 ccdc->lsc.request = NULL;
1303
1304 unlock:
1305 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1306
1307 ccdc_apply_controls(ccdc);
1308 }
1309
__ccdc_enable(struct isp_ccdc_device * ccdc,int enable)1310 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1311 {
1312 struct isp_device *isp = to_isp_device(ccdc);
1313
1314 /* Avoid restarting the CCDC when streaming is stopping. */
1315 if (enable && ccdc->stopping & CCDC_STOP_REQUEST)
1316 return;
1317
1318 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1319 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1320
1321 ccdc->running = enable;
1322 }
1323
ccdc_disable(struct isp_ccdc_device * ccdc)1324 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1325 {
1326 unsigned long flags;
1327 int ret = 0;
1328
1329 spin_lock_irqsave(&ccdc->lock, flags);
1330 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1331 ccdc->stopping = CCDC_STOP_REQUEST;
1332 if (!ccdc->running)
1333 ccdc->stopping = CCDC_STOP_FINISHED;
1334 spin_unlock_irqrestore(&ccdc->lock, flags);
1335
1336 ret = wait_event_timeout(ccdc->wait,
1337 ccdc->stopping == CCDC_STOP_FINISHED,
1338 msecs_to_jiffies(2000));
1339 if (ret == 0) {
1340 ret = -ETIMEDOUT;
1341 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1342 }
1343
1344 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1345
1346 mutex_lock(&ccdc->ioctl_lock);
1347 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1348 ccdc->lsc.request = ccdc->lsc.active;
1349 ccdc->lsc.active = NULL;
1350 cancel_work_sync(&ccdc->lsc.table_work);
1351 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1352 mutex_unlock(&ccdc->ioctl_lock);
1353
1354 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1355
1356 return ret > 0 ? 0 : ret;
1357 }
1358
ccdc_enable(struct isp_ccdc_device * ccdc)1359 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1360 {
1361 if (ccdc_lsc_is_configured(ccdc))
1362 __ccdc_lsc_enable(ccdc, 1);
1363 __ccdc_enable(ccdc, 1);
1364 }
1365
1366 /* -----------------------------------------------------------------------------
1367 * Interrupt handling
1368 */
1369
1370 /*
1371 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1372 * @ccdc: Pointer to ISP CCDC device.
1373 *
1374 * Returns zero if the CCDC is idle and the image has been written to
1375 * memory, too.
1376 */
ccdc_sbl_busy(struct isp_ccdc_device * ccdc)1377 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1378 {
1379 struct isp_device *isp = to_isp_device(ccdc);
1380
1381 return omap3isp_ccdc_busy(ccdc)
1382 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1383 ISPSBL_CCDC_WR_0_DATA_READY)
1384 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1385 ISPSBL_CCDC_WR_0_DATA_READY)
1386 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1387 ISPSBL_CCDC_WR_0_DATA_READY)
1388 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1389 ISPSBL_CCDC_WR_0_DATA_READY);
1390 }
1391
1392 /*
1393 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1394 * @ccdc: Pointer to ISP CCDC device.
1395 * @max_wait: Max retry count in us for wait for idle/busy transition.
1396 */
ccdc_sbl_wait_idle(struct isp_ccdc_device * ccdc,unsigned int max_wait)1397 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1398 unsigned int max_wait)
1399 {
1400 unsigned int wait = 0;
1401
1402 if (max_wait == 0)
1403 max_wait = 10000; /* 10 ms */
1404
1405 for (wait = 0; wait <= max_wait; wait++) {
1406 if (!ccdc_sbl_busy(ccdc))
1407 return 0;
1408
1409 rmb();
1410 udelay(1);
1411 }
1412
1413 return -EBUSY;
1414 }
1415
1416 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1417 * @ccdc: Pointer to ISP CCDC device.
1418 * @event: Pointing which event trigger handler
1419 *
1420 * Return 1 when the event and stopping request combination is satisfied,
1421 * zero otherwise.
1422 */
ccdc_handle_stopping(struct isp_ccdc_device * ccdc,u32 event)1423 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1424 {
1425 int rval = 0;
1426
1427 switch ((ccdc->stopping & 3) | event) {
1428 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1429 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1430 __ccdc_lsc_enable(ccdc, 0);
1431 __ccdc_enable(ccdc, 0);
1432 ccdc->stopping = CCDC_STOP_EXECUTED;
1433 return 1;
1434
1435 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1436 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1437 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1438 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1439 rval = 1;
1440 break;
1441
1442 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1443 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1444 rval = 1;
1445 break;
1446
1447 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1448 return 1;
1449 }
1450
1451 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1452 wake_up(&ccdc->wait);
1453 rval = 1;
1454 }
1455
1456 return rval;
1457 }
1458
ccdc_hs_vs_isr(struct isp_ccdc_device * ccdc)1459 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1460 {
1461 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1462 struct video_device *vdev = ccdc->subdev.devnode;
1463 struct v4l2_event event;
1464
1465 /* Frame number propagation */
1466 atomic_inc(&pipe->frame_number);
1467
1468 memset(&event, 0, sizeof(event));
1469 event.type = V4L2_EVENT_FRAME_SYNC;
1470 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1471
1472 v4l2_event_queue(vdev, &event);
1473 }
1474
1475 /*
1476 * ccdc_lsc_isr - Handle LSC events
1477 * @ccdc: Pointer to ISP CCDC device.
1478 * @events: LSC events
1479 */
ccdc_lsc_isr(struct isp_ccdc_device * ccdc,u32 events)1480 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1481 {
1482 unsigned long flags;
1483
1484 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1485 struct isp_pipeline *pipe =
1486 to_isp_pipeline(&ccdc->subdev.entity);
1487
1488 ccdc_lsc_error_handler(ccdc);
1489 pipe->error = true;
1490 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1491 }
1492
1493 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1494 return;
1495
1496 /* LSC_DONE interrupt occur, there are two cases
1497 * 1. stopping for reconfiguration
1498 * 2. stopping because of STREAM OFF command
1499 */
1500 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1501
1502 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1503 ccdc->lsc.state = LSC_STATE_STOPPED;
1504
1505 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1506 goto done;
1507
1508 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1509 goto done;
1510
1511 /* LSC is in STOPPING state, change to the new state */
1512 ccdc->lsc.state = LSC_STATE_STOPPED;
1513
1514 /* This is an exception. Start of frame and LSC_DONE interrupt
1515 * have been received on the same time. Skip this event and wait
1516 * for better times.
1517 */
1518 if (events & IRQ0STATUS_HS_VS_IRQ)
1519 goto done;
1520
1521 /* The LSC engine is stopped at this point. Enable it if there's a
1522 * pending request.
1523 */
1524 if (ccdc->lsc.request == NULL)
1525 goto done;
1526
1527 ccdc_lsc_enable(ccdc);
1528
1529 done:
1530 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1531 }
1532
1533 /*
1534 * Check whether the CCDC has captured all fields necessary to complete the
1535 * buffer.
1536 */
ccdc_has_all_fields(struct isp_ccdc_device * ccdc)1537 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1538 {
1539 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1540 struct isp_device *isp = to_isp_device(ccdc);
1541 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1542 enum v4l2_field field;
1543
1544 /* When the input is progressive fields don't matter. */
1545 if (of_field == V4L2_FIELD_NONE)
1546 return true;
1547
1548 /* Read the current field identifier. */
1549 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1550 & ISPCCDC_SYN_MODE_FLDSTAT
1551 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1552
1553 /* When capturing fields in alternate order just store the current field
1554 * identifier in the pipeline.
1555 */
1556 if (of_field == V4L2_FIELD_ALTERNATE) {
1557 pipe->field = field;
1558 return true;
1559 }
1560
1561 /* The format is interlaced. Make sure we've captured both fields. */
1562 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1563 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1564
1565 if (ccdc->fields != CCDC_FIELD_BOTH)
1566 return false;
1567
1568 /* Verify that the field just captured corresponds to the last field
1569 * needed based on the desired field order.
1570 */
1571 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1572 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1573 return false;
1574
1575 /* The buffer can be completed, reset the fields for the next buffer. */
1576 ccdc->fields = 0;
1577
1578 return true;
1579 }
1580
ccdc_isr_buffer(struct isp_ccdc_device * ccdc)1581 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1582 {
1583 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1584 struct isp_device *isp = to_isp_device(ccdc);
1585 struct isp_buffer *buffer;
1586
1587 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1588 * doesn't explicitly state if that's supposed to happen or not, so it
1589 * can be considered as a hardware bug or as a feature, but we have to
1590 * deal with it anyway). Disabling the CCDC when no buffer is available
1591 * would thus not be enough, we need to handle the situation explicitly.
1592 */
1593 if (list_empty(&ccdc->video_out.dmaqueue))
1594 return 0;
1595
1596 /* We're in continuous mode, and memory writes were disabled due to a
1597 * buffer underrun. Re-enable them now that we have a buffer. The buffer
1598 * address has been set in ccdc_video_queue.
1599 */
1600 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1601 ccdc->underrun = 0;
1602 return 1;
1603 }
1604
1605 /* Wait for the CCDC to become idle. */
1606 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1607 dev_info(isp->dev, "CCDC won't become idle!\n");
1608 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1609 omap3isp_pipeline_cancel_stream(pipe);
1610 return 0;
1611 }
1612
1613 /* Don't restart CCDC if we're just about to stop streaming. */
1614 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1615 ccdc->stopping & CCDC_STOP_REQUEST)
1616 return 0;
1617
1618 if (!ccdc_has_all_fields(ccdc))
1619 return 1;
1620
1621 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1622 if (buffer != NULL)
1623 ccdc_set_outaddr(ccdc, buffer->dma);
1624
1625 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1626
1627 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1628 isp_pipeline_ready(pipe))
1629 omap3isp_pipeline_set_stream(pipe,
1630 ISP_PIPELINE_STREAM_SINGLESHOT);
1631
1632 return buffer != NULL;
1633 }
1634
1635 /*
1636 * ccdc_vd0_isr - Handle VD0 event
1637 * @ccdc: Pointer to ISP CCDC device.
1638 *
1639 * Executes LSC deferred enablement before next frame starts.
1640 */
ccdc_vd0_isr(struct isp_ccdc_device * ccdc)1641 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1642 {
1643 unsigned long flags;
1644 int restart = 0;
1645
1646 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1647 * need to increment the frame counter here.
1648 */
1649 if (ccdc->bt656) {
1650 struct isp_pipeline *pipe =
1651 to_isp_pipeline(&ccdc->subdev.entity);
1652
1653 atomic_inc(&pipe->frame_number);
1654 }
1655
1656 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1657 * the VD1 interrupt handler in that mode without risking a CCDC stall
1658 * if a short frame is received.
1659 */
1660 if (ccdc->bt656) {
1661 spin_lock_irqsave(&ccdc->lock, flags);
1662 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1663 ccdc->output & CCDC_OUTPUT_MEMORY) {
1664 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1665 __ccdc_lsc_enable(ccdc, 0);
1666 __ccdc_enable(ccdc, 0);
1667 }
1668 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1669 spin_unlock_irqrestore(&ccdc->lock, flags);
1670 }
1671
1672 spin_lock_irqsave(&ccdc->lock, flags);
1673 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1674 spin_unlock_irqrestore(&ccdc->lock, flags);
1675 return;
1676 }
1677
1678 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1679 restart = ccdc_isr_buffer(ccdc);
1680
1681 if (!ccdc->shadow_update)
1682 ccdc_apply_controls(ccdc);
1683 spin_unlock_irqrestore(&ccdc->lock, flags);
1684
1685 if (restart)
1686 ccdc_enable(ccdc);
1687 }
1688
1689 /*
1690 * ccdc_vd1_isr - Handle VD1 event
1691 * @ccdc: Pointer to ISP CCDC device.
1692 */
ccdc_vd1_isr(struct isp_ccdc_device * ccdc)1693 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1694 {
1695 unsigned long flags;
1696
1697 /* In BT.656 mode the synchronization signals are generated by the CCDC
1698 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1699 * only triggered when the CCDC is enabled, unlike external sync mode
1700 * where the line counter runs even when the CCDC is stopped. We can't
1701 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1702 * for a short frame, which would result in the CCDC being stopped and
1703 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1704 * interrupt handler instead for BT.656.
1705 */
1706 if (ccdc->bt656)
1707 return;
1708
1709 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1710
1711 /*
1712 * Depending on the CCDC pipeline state, CCDC stopping should be
1713 * handled differently. In SINGLESHOT we emulate an internal CCDC
1714 * stopping because the CCDC hw works only in continuous mode.
1715 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1716 * data to memory the CCDC and LSC are stopped immediately but
1717 * without change the CCDC stopping state machine. The CCDC
1718 * stopping state machine should be used only when user request
1719 * for stopping is received (SINGLESHOT is an exception).
1720 */
1721 switch (ccdc->state) {
1722 case ISP_PIPELINE_STREAM_SINGLESHOT:
1723 ccdc->stopping = CCDC_STOP_REQUEST;
1724 break;
1725
1726 case ISP_PIPELINE_STREAM_CONTINUOUS:
1727 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1728 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1729 __ccdc_lsc_enable(ccdc, 0);
1730 __ccdc_enable(ccdc, 0);
1731 }
1732 break;
1733
1734 case ISP_PIPELINE_STREAM_STOPPED:
1735 break;
1736 }
1737
1738 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1739 goto done;
1740
1741 if (ccdc->lsc.request == NULL)
1742 goto done;
1743
1744 /*
1745 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1746 * do the appropriate changes in registers
1747 */
1748 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1749 __ccdc_lsc_enable(ccdc, 0);
1750 ccdc->lsc.state = LSC_STATE_RECONFIG;
1751 goto done;
1752 }
1753
1754 /* LSC has been in STOPPED state, enable it */
1755 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1756 ccdc_lsc_enable(ccdc);
1757
1758 done:
1759 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1760 }
1761
1762 /*
1763 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1764 * @ccdc: Pointer to ISP CCDC device.
1765 * @events: CCDC events
1766 */
omap3isp_ccdc_isr(struct isp_ccdc_device * ccdc,u32 events)1767 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1768 {
1769 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1770 return 0;
1771
1772 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1773 ccdc_vd1_isr(ccdc);
1774
1775 ccdc_lsc_isr(ccdc, events);
1776
1777 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1778 ccdc_vd0_isr(ccdc);
1779
1780 if (events & IRQ0STATUS_HS_VS_IRQ)
1781 ccdc_hs_vs_isr(ccdc);
1782
1783 return 0;
1784 }
1785
1786 /* -----------------------------------------------------------------------------
1787 * ISP video operations
1788 */
1789
ccdc_video_queue(struct isp_video * video,struct isp_buffer * buffer)1790 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1791 {
1792 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1793 unsigned long flags;
1794 bool restart = false;
1795
1796 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1797 return -ENODEV;
1798
1799 ccdc_set_outaddr(ccdc, buffer->dma);
1800
1801 /* We now have a buffer queued on the output, restart the pipeline
1802 * on the next CCDC interrupt if running in continuous mode (or when
1803 * starting the stream) in external sync mode, or immediately in BT.656
1804 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1805 * in that case.
1806 */
1807 spin_lock_irqsave(&ccdc->lock, flags);
1808 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1809 ccdc->bt656)
1810 restart = true;
1811 else
1812 ccdc->underrun = 1;
1813 spin_unlock_irqrestore(&ccdc->lock, flags);
1814
1815 if (restart)
1816 ccdc_enable(ccdc);
1817
1818 return 0;
1819 }
1820
1821 static const struct isp_video_operations ccdc_video_ops = {
1822 .queue = ccdc_video_queue,
1823 };
1824
1825 /* -----------------------------------------------------------------------------
1826 * V4L2 subdev operations
1827 */
1828
1829 /*
1830 * ccdc_ioctl - CCDC module private ioctl's
1831 * @sd: ISP CCDC V4L2 subdevice
1832 * @cmd: ioctl command
1833 * @arg: ioctl argument
1834 *
1835 * Return 0 on success or a negative error code otherwise.
1836 */
ccdc_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1837 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1838 {
1839 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1840 int ret;
1841
1842 switch (cmd) {
1843 case VIDIOC_OMAP3ISP_CCDC_CFG:
1844 mutex_lock(&ccdc->ioctl_lock);
1845 ret = ccdc_config(ccdc, arg);
1846 mutex_unlock(&ccdc->ioctl_lock);
1847 break;
1848
1849 default:
1850 return -ENOIOCTLCMD;
1851 }
1852
1853 return ret;
1854 }
1855
ccdc_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1856 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1857 struct v4l2_event_subscription *sub)
1858 {
1859 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1860 return -EINVAL;
1861
1862 /* line number is zero at frame start */
1863 if (sub->id != 0)
1864 return -EINVAL;
1865
1866 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1867 }
1868
ccdc_unsubscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1869 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1870 struct v4l2_event_subscription *sub)
1871 {
1872 return v4l2_event_unsubscribe(fh, sub);
1873 }
1874
1875 /*
1876 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1877 * @sd: ISP CCDC V4L2 subdevice
1878 * @enable: Enable/disable stream
1879 *
1880 * When writing to memory, the CCDC hardware can't be enabled without a memory
1881 * buffer to write to. As the s_stream operation is called in response to a
1882 * STREAMON call without any buffer queued yet, just update the enabled field
1883 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1884 *
1885 * When not writing to memory enable the CCDC immediately.
1886 */
ccdc_set_stream(struct v4l2_subdev * sd,int enable)1887 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1888 {
1889 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1890 struct isp_device *isp = to_isp_device(ccdc);
1891 int ret = 0;
1892
1893 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1894 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1895 return 0;
1896
1897 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1898 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1899 ISPCCDC_CFG_VDLC);
1900
1901 ccdc_configure(ccdc);
1902
1903 ccdc_print_status(ccdc);
1904 }
1905
1906 switch (enable) {
1907 case ISP_PIPELINE_STREAM_CONTINUOUS:
1908 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1909 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1910
1911 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1912 ccdc_enable(ccdc);
1913
1914 ccdc->underrun = 0;
1915 break;
1916
1917 case ISP_PIPELINE_STREAM_SINGLESHOT:
1918 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1919 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1920 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1921
1922 ccdc_enable(ccdc);
1923 break;
1924
1925 case ISP_PIPELINE_STREAM_STOPPED:
1926 ret = ccdc_disable(ccdc);
1927 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1928 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1929 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1930 ccdc->underrun = 0;
1931 break;
1932 }
1933
1934 ccdc->state = enable;
1935 return ret;
1936 }
1937
1938 static struct v4l2_mbus_framefmt *
__ccdc_get_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)1939 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1940 unsigned int pad, enum v4l2_subdev_format_whence which)
1941 {
1942 if (which == V4L2_SUBDEV_FORMAT_TRY)
1943 return v4l2_subdev_get_try_format(&ccdc->subdev, cfg, pad);
1944 else
1945 return &ccdc->formats[pad];
1946 }
1947
1948 static struct v4l2_rect *
__ccdc_get_crop(struct isp_ccdc_device * ccdc,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)1949 __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1950 enum v4l2_subdev_format_whence which)
1951 {
1952 if (which == V4L2_SUBDEV_FORMAT_TRY)
1953 return v4l2_subdev_get_try_crop(&ccdc->subdev, cfg, CCDC_PAD_SOURCE_OF);
1954 else
1955 return &ccdc->crop;
1956 }
1957
1958 /*
1959 * ccdc_try_format - Try video format on a pad
1960 * @ccdc: ISP CCDC device
1961 * @cfg : V4L2 subdev pad configuration
1962 * @pad: Pad number
1963 * @fmt: Format
1964 */
1965 static void
ccdc_try_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_pad_config * cfg,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)1966 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_pad_config *cfg,
1967 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1968 enum v4l2_subdev_format_whence which)
1969 {
1970 const struct isp_format_info *info;
1971 u32 pixelcode;
1972 unsigned int width = fmt->width;
1973 unsigned int height = fmt->height;
1974 struct v4l2_rect *crop;
1975 enum v4l2_field field;
1976 unsigned int i;
1977
1978 switch (pad) {
1979 case CCDC_PAD_SINK:
1980 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1981 if (fmt->code == ccdc_fmts[i])
1982 break;
1983 }
1984
1985 /* If not found, use SGRBG10 as default */
1986 if (i >= ARRAY_SIZE(ccdc_fmts))
1987 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1988
1989 /* Clamp the input size. */
1990 fmt->width = clamp_t(u32, width, 32, 4096);
1991 fmt->height = clamp_t(u32, height, 32, 4096);
1992
1993 /* Default to progressive field order. */
1994 if (fmt->field == V4L2_FIELD_ANY)
1995 fmt->field = V4L2_FIELD_NONE;
1996
1997 break;
1998
1999 case CCDC_PAD_SOURCE_OF:
2000 pixelcode = fmt->code;
2001 field = fmt->field;
2002 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2003
2004 /* In SYNC mode the bridge converts YUV formats from 2X8 to
2005 * 1X16. In BT.656 no such conversion occurs. As we don't know
2006 * at this point whether the source will use SYNC or BT.656 mode
2007 * let's pretend the conversion always occurs. The CCDC will be
2008 * configured to pack bytes in BT.656, hiding the inaccuracy.
2009 * In all cases bytes can be swapped.
2010 */
2011 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2012 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2013 /* Use the user requested format if YUV. */
2014 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2015 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2016 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2017 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2018 fmt->code = pixelcode;
2019
2020 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2021 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2022 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2023 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2024 }
2025
2026 /* Hardcode the output size to the crop rectangle size. */
2027 crop = __ccdc_get_crop(ccdc, cfg, which);
2028 fmt->width = crop->width;
2029 fmt->height = crop->height;
2030
2031 /* When input format is interlaced with alternating fields the
2032 * CCDC can interleave the fields.
2033 */
2034 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2035 (field == V4L2_FIELD_INTERLACED_TB ||
2036 field == V4L2_FIELD_INTERLACED_BT)) {
2037 fmt->field = field;
2038 fmt->height *= 2;
2039 }
2040
2041 break;
2042
2043 case CCDC_PAD_SOURCE_VP:
2044 *fmt = *__ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, which);
2045
2046 /* The video port interface truncates the data to 10 bits. */
2047 info = omap3isp_video_format_info(fmt->code);
2048 fmt->code = info->truncated;
2049
2050 /* YUV formats are not supported by the video port. */
2051 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2052 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2053 fmt->code = 0;
2054
2055 /* The number of lines that can be clocked out from the video
2056 * port output must be at least one line less than the number
2057 * of input lines.
2058 */
2059 fmt->width = clamp_t(u32, width, 32, fmt->width);
2060 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2061 break;
2062 }
2063
2064 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2065 * stored on 2 bytes.
2066 */
2067 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2068 }
2069
2070 /*
2071 * ccdc_try_crop - Validate a crop rectangle
2072 * @ccdc: ISP CCDC device
2073 * @sink: format on the sink pad
2074 * @crop: crop rectangle to be validated
2075 */
ccdc_try_crop(struct isp_ccdc_device * ccdc,const struct v4l2_mbus_framefmt * sink,struct v4l2_rect * crop)2076 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2077 const struct v4l2_mbus_framefmt *sink,
2078 struct v4l2_rect *crop)
2079 {
2080 const struct isp_format_info *info;
2081 unsigned int max_width;
2082
2083 /* For Bayer formats, restrict left/top and width/height to even values
2084 * to keep the Bayer pattern.
2085 */
2086 info = omap3isp_video_format_info(sink->code);
2087 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2088 crop->left &= ~1;
2089 crop->top &= ~1;
2090 }
2091
2092 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2093 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2094
2095 /* The data formatter truncates the number of horizontal output pixels
2096 * to a multiple of 16. To avoid clipping data, allow callers to request
2097 * an output size bigger than the input size up to the nearest multiple
2098 * of 16.
2099 */
2100 max_width = (sink->width - crop->left + 15) & ~15;
2101 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2102 & ~15;
2103 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2104 sink->height - crop->top);
2105
2106 /* Odd width/height values don't make sense for Bayer formats. */
2107 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2108 crop->width &= ~1;
2109 crop->height &= ~1;
2110 }
2111 }
2112
2113 /*
2114 * ccdc_enum_mbus_code - Handle pixel format enumeration
2115 * @sd : pointer to v4l2 subdev structure
2116 * @cfg : V4L2 subdev pad configuration
2117 * @code : pointer to v4l2_subdev_mbus_code_enum structure
2118 * return -EINVAL or zero on success
2119 */
ccdc_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)2120 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2121 struct v4l2_subdev_pad_config *cfg,
2122 struct v4l2_subdev_mbus_code_enum *code)
2123 {
2124 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2125 struct v4l2_mbus_framefmt *format;
2126
2127 switch (code->pad) {
2128 case CCDC_PAD_SINK:
2129 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2130 return -EINVAL;
2131
2132 code->code = ccdc_fmts[code->index];
2133 break;
2134
2135 case CCDC_PAD_SOURCE_OF:
2136 format = __ccdc_get_format(ccdc, cfg, code->pad,
2137 code->which);
2138
2139 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2140 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2141 /* In YUV mode the CCDC can swap bytes. */
2142 if (code->index == 0)
2143 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2144 else if (code->index == 1)
2145 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2146 else
2147 return -EINVAL;
2148 } else {
2149 /* In raw mode, no configurable format confversion is
2150 * available.
2151 */
2152 if (code->index == 0)
2153 code->code = format->code;
2154 else
2155 return -EINVAL;
2156 }
2157 break;
2158
2159 case CCDC_PAD_SOURCE_VP:
2160 /* The CCDC supports no configurable format conversion
2161 * compatible with the video port. Enumerate a single output
2162 * format code.
2163 */
2164 if (code->index != 0)
2165 return -EINVAL;
2166
2167 format = __ccdc_get_format(ccdc, cfg, code->pad,
2168 code->which);
2169
2170 /* A pixel code equal to 0 means that the video port doesn't
2171 * support the input format. Don't enumerate any pixel code.
2172 */
2173 if (format->code == 0)
2174 return -EINVAL;
2175
2176 code->code = format->code;
2177 break;
2178
2179 default:
2180 return -EINVAL;
2181 }
2182
2183 return 0;
2184 }
2185
ccdc_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)2186 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2187 struct v4l2_subdev_pad_config *cfg,
2188 struct v4l2_subdev_frame_size_enum *fse)
2189 {
2190 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2191 struct v4l2_mbus_framefmt format;
2192
2193 if (fse->index != 0)
2194 return -EINVAL;
2195
2196 format.code = fse->code;
2197 format.width = 1;
2198 format.height = 1;
2199 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2200 fse->min_width = format.width;
2201 fse->min_height = format.height;
2202
2203 if (format.code != fse->code)
2204 return -EINVAL;
2205
2206 format.code = fse->code;
2207 format.width = -1;
2208 format.height = -1;
2209 ccdc_try_format(ccdc, cfg, fse->pad, &format, fse->which);
2210 fse->max_width = format.width;
2211 fse->max_height = format.height;
2212
2213 return 0;
2214 }
2215
2216 /*
2217 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2218 * @sd: ISP CCDC V4L2 subdevice
2219 * @cfg: V4L2 subdev pad configuration
2220 * @sel: Selection rectangle
2221 *
2222 * The only supported rectangles are the crop rectangles on the output formatter
2223 * source pad.
2224 *
2225 * Return 0 on success or a negative error code otherwise.
2226 */
ccdc_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)2227 static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2228 struct v4l2_subdev_selection *sel)
2229 {
2230 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2231 struct v4l2_mbus_framefmt *format;
2232
2233 if (sel->pad != CCDC_PAD_SOURCE_OF)
2234 return -EINVAL;
2235
2236 switch (sel->target) {
2237 case V4L2_SEL_TGT_CROP_BOUNDS:
2238 sel->r.left = 0;
2239 sel->r.top = 0;
2240 sel->r.width = INT_MAX;
2241 sel->r.height = INT_MAX;
2242
2243 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2244 ccdc_try_crop(ccdc, format, &sel->r);
2245 break;
2246
2247 case V4L2_SEL_TGT_CROP:
2248 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2249 break;
2250
2251 default:
2252 return -EINVAL;
2253 }
2254
2255 return 0;
2256 }
2257
2258 /*
2259 * ccdc_set_selection - Set a selection rectangle on a pad
2260 * @sd: ISP CCDC V4L2 subdevice
2261 * @cfg: V4L2 subdev pad configuration
2262 * @sel: Selection rectangle
2263 *
2264 * The only supported rectangle is the actual crop rectangle on the output
2265 * formatter source pad.
2266 *
2267 * Return 0 on success or a negative error code otherwise.
2268 */
ccdc_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)2269 static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2270 struct v4l2_subdev_selection *sel)
2271 {
2272 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2273 struct v4l2_mbus_framefmt *format;
2274
2275 if (sel->target != V4L2_SEL_TGT_CROP ||
2276 sel->pad != CCDC_PAD_SOURCE_OF)
2277 return -EINVAL;
2278
2279 /* The crop rectangle can't be changed while streaming. */
2280 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2281 return -EBUSY;
2282
2283 /* Modifying the crop rectangle always changes the format on the source
2284 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2285 * rectangle.
2286 */
2287 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2288 sel->r = *__ccdc_get_crop(ccdc, cfg, sel->which);
2289 return 0;
2290 }
2291
2292 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SINK, sel->which);
2293 ccdc_try_crop(ccdc, format, &sel->r);
2294 *__ccdc_get_crop(ccdc, cfg, sel->which) = sel->r;
2295
2296 /* Update the source format. */
2297 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, sel->which);
2298 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format, sel->which);
2299
2300 return 0;
2301 }
2302
2303 /*
2304 * ccdc_get_format - Retrieve the video format on a pad
2305 * @sd : ISP CCDC V4L2 subdevice
2306 * @cfg: V4L2 subdev pad configuration
2307 * @fmt: Format
2308 *
2309 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2310 * to the format type.
2311 */
ccdc_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)2312 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2313 struct v4l2_subdev_format *fmt)
2314 {
2315 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2316 struct v4l2_mbus_framefmt *format;
2317
2318 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2319 if (format == NULL)
2320 return -EINVAL;
2321
2322 fmt->format = *format;
2323 return 0;
2324 }
2325
2326 /*
2327 * ccdc_set_format - Set the video format on a pad
2328 * @sd : ISP CCDC V4L2 subdevice
2329 * @cfg: V4L2 subdev pad configuration
2330 * @fmt: Format
2331 *
2332 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2333 * to the format type.
2334 */
ccdc_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)2335 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
2336 struct v4l2_subdev_format *fmt)
2337 {
2338 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2339 struct v4l2_mbus_framefmt *format;
2340 struct v4l2_rect *crop;
2341
2342 format = __ccdc_get_format(ccdc, cfg, fmt->pad, fmt->which);
2343 if (format == NULL)
2344 return -EINVAL;
2345
2346 ccdc_try_format(ccdc, cfg, fmt->pad, &fmt->format, fmt->which);
2347 *format = fmt->format;
2348
2349 /* Propagate the format from sink to source */
2350 if (fmt->pad == CCDC_PAD_SINK) {
2351 /* Reset the crop rectangle. */
2352 crop = __ccdc_get_crop(ccdc, cfg, fmt->which);
2353 crop->left = 0;
2354 crop->top = 0;
2355 crop->width = fmt->format.width;
2356 crop->height = fmt->format.height;
2357
2358 ccdc_try_crop(ccdc, &fmt->format, crop);
2359
2360 /* Update the source formats. */
2361 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_OF,
2362 fmt->which);
2363 *format = fmt->format;
2364 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_OF, format,
2365 fmt->which);
2366
2367 format = __ccdc_get_format(ccdc, cfg, CCDC_PAD_SOURCE_VP,
2368 fmt->which);
2369 *format = fmt->format;
2370 ccdc_try_format(ccdc, cfg, CCDC_PAD_SOURCE_VP, format,
2371 fmt->which);
2372 }
2373
2374 return 0;
2375 }
2376
2377 /*
2378 * Decide whether desired output pixel code can be obtained with
2379 * the lane shifter by shifting the input pixel code.
2380 * @in: input pixelcode to shifter
2381 * @out: output pixelcode from shifter
2382 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2383 *
2384 * return true if the combination is possible
2385 * return false otherwise
2386 */
ccdc_is_shiftable(u32 in,u32 out,unsigned int additional_shift)2387 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2388 {
2389 const struct isp_format_info *in_info, *out_info;
2390
2391 if (in == out)
2392 return true;
2393
2394 in_info = omap3isp_video_format_info(in);
2395 out_info = omap3isp_video_format_info(out);
2396
2397 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2398 return false;
2399
2400 if (in_info->flavor != out_info->flavor)
2401 return false;
2402
2403 return in_info->width - out_info->width + additional_shift <= 6;
2404 }
2405
ccdc_link_validate(struct v4l2_subdev * sd,struct media_link * link,struct v4l2_subdev_format * source_fmt,struct v4l2_subdev_format * sink_fmt)2406 static int ccdc_link_validate(struct v4l2_subdev *sd,
2407 struct media_link *link,
2408 struct v4l2_subdev_format *source_fmt,
2409 struct v4l2_subdev_format *sink_fmt)
2410 {
2411 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2412 unsigned long parallel_shift;
2413
2414 /* Check if the two ends match */
2415 if (source_fmt->format.width != sink_fmt->format.width ||
2416 source_fmt->format.height != sink_fmt->format.height)
2417 return -EPIPE;
2418
2419 /* We've got a parallel sensor here. */
2420 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2421 struct v4l2_subdev *sd =
2422 media_entity_to_v4l2_subdev(link->source->entity);
2423 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2424
2425 parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2426 } else {
2427 parallel_shift = 0;
2428 }
2429
2430 /* Lane shifter may be used to drop bits on CCDC sink pad */
2431 if (!ccdc_is_shiftable(source_fmt->format.code,
2432 sink_fmt->format.code, parallel_shift))
2433 return -EPIPE;
2434
2435 return 0;
2436 }
2437
2438 /*
2439 * ccdc_init_formats - Initialize formats on all pads
2440 * @sd: ISP CCDC V4L2 subdevice
2441 * @fh: V4L2 subdev file handle
2442 *
2443 * Initialize all pad formats with default values. If fh is not NULL, try
2444 * formats are initialized on the file handle. Otherwise active formats are
2445 * initialized on the device.
2446 */
ccdc_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)2447 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2448 {
2449 struct v4l2_subdev_format format;
2450
2451 memset(&format, 0, sizeof(format));
2452 format.pad = CCDC_PAD_SINK;
2453 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2454 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2455 format.format.width = 4096;
2456 format.format.height = 4096;
2457 ccdc_set_format(sd, fh ? fh->pad : NULL, &format);
2458
2459 return 0;
2460 }
2461
2462 /* V4L2 subdev core operations */
2463 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2464 .ioctl = ccdc_ioctl,
2465 .subscribe_event = ccdc_subscribe_event,
2466 .unsubscribe_event = ccdc_unsubscribe_event,
2467 };
2468
2469 /* V4L2 subdev video operations */
2470 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2471 .s_stream = ccdc_set_stream,
2472 };
2473
2474 /* V4L2 subdev pad operations */
2475 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2476 .enum_mbus_code = ccdc_enum_mbus_code,
2477 .enum_frame_size = ccdc_enum_frame_size,
2478 .get_fmt = ccdc_get_format,
2479 .set_fmt = ccdc_set_format,
2480 .get_selection = ccdc_get_selection,
2481 .set_selection = ccdc_set_selection,
2482 .link_validate = ccdc_link_validate,
2483 };
2484
2485 /* V4L2 subdev operations */
2486 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2487 .core = &ccdc_v4l2_core_ops,
2488 .video = &ccdc_v4l2_video_ops,
2489 .pad = &ccdc_v4l2_pad_ops,
2490 };
2491
2492 /* V4L2 subdev internal operations */
2493 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2494 .open = ccdc_init_formats,
2495 };
2496
2497 /* -----------------------------------------------------------------------------
2498 * Media entity operations
2499 */
2500
2501 /*
2502 * ccdc_link_setup - Setup CCDC connections
2503 * @entity: CCDC media entity
2504 * @local: Pad at the local end of the link
2505 * @remote: Pad at the remote end of the link
2506 * @flags: Link flags
2507 *
2508 * return -EINVAL or zero on success
2509 */
ccdc_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)2510 static int ccdc_link_setup(struct media_entity *entity,
2511 const struct media_pad *local,
2512 const struct media_pad *remote, u32 flags)
2513 {
2514 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2515 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2516 struct isp_device *isp = to_isp_device(ccdc);
2517 unsigned int index = local->index;
2518
2519 /* FIXME: this is actually a hack! */
2520 if (is_media_entity_v4l2_subdev(remote->entity))
2521 index |= 2 << 16;
2522
2523 switch (index) {
2524 case CCDC_PAD_SINK | 2 << 16:
2525 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2526 * CSI2c.
2527 */
2528 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2529 ccdc->input = CCDC_INPUT_NONE;
2530 break;
2531 }
2532
2533 if (ccdc->input != CCDC_INPUT_NONE)
2534 return -EBUSY;
2535
2536 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2537 ccdc->input = CCDC_INPUT_CCP2B;
2538 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2539 ccdc->input = CCDC_INPUT_CSI2A;
2540 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2541 ccdc->input = CCDC_INPUT_CSI2C;
2542 else
2543 ccdc->input = CCDC_INPUT_PARALLEL;
2544
2545 break;
2546
2547 /*
2548 * The ISP core doesn't support pipelines with multiple video outputs.
2549 * Revisit this when it will be implemented, and return -EBUSY for now.
2550 */
2551
2552 case CCDC_PAD_SOURCE_VP | 2 << 16:
2553 /* Write to preview engine, histogram and H3A. When none of
2554 * those links are active, the video port can be disabled.
2555 */
2556 if (flags & MEDIA_LNK_FL_ENABLED) {
2557 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2558 return -EBUSY;
2559 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2560 } else {
2561 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2562 }
2563 break;
2564
2565 case CCDC_PAD_SOURCE_OF:
2566 /* Write to memory */
2567 if (flags & MEDIA_LNK_FL_ENABLED) {
2568 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2569 return -EBUSY;
2570 ccdc->output |= CCDC_OUTPUT_MEMORY;
2571 } else {
2572 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2573 }
2574 break;
2575
2576 case CCDC_PAD_SOURCE_OF | 2 << 16:
2577 /* Write to resizer */
2578 if (flags & MEDIA_LNK_FL_ENABLED) {
2579 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2580 return -EBUSY;
2581 ccdc->output |= CCDC_OUTPUT_RESIZER;
2582 } else {
2583 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2584 }
2585 break;
2586
2587 default:
2588 return -EINVAL;
2589 }
2590
2591 return 0;
2592 }
2593
2594 /* media operations */
2595 static const struct media_entity_operations ccdc_media_ops = {
2596 .link_setup = ccdc_link_setup,
2597 .link_validate = v4l2_subdev_link_validate,
2598 };
2599
omap3isp_ccdc_unregister_entities(struct isp_ccdc_device * ccdc)2600 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2601 {
2602 v4l2_device_unregister_subdev(&ccdc->subdev);
2603 omap3isp_video_unregister(&ccdc->video_out);
2604 }
2605
omap3isp_ccdc_register_entities(struct isp_ccdc_device * ccdc,struct v4l2_device * vdev)2606 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2607 struct v4l2_device *vdev)
2608 {
2609 int ret;
2610
2611 /* Register the subdev and video node. */
2612 ccdc->subdev.dev = vdev->mdev->dev;
2613 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2614 if (ret < 0)
2615 goto error;
2616
2617 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2618 if (ret < 0)
2619 goto error;
2620
2621 return 0;
2622
2623 error:
2624 omap3isp_ccdc_unregister_entities(ccdc);
2625 return ret;
2626 }
2627
2628 /* -----------------------------------------------------------------------------
2629 * ISP CCDC initialisation and cleanup
2630 */
2631
2632 /*
2633 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2634 * @ccdc: ISP CCDC module
2635 *
2636 * Return 0 on success and a negative error code on failure.
2637 */
ccdc_init_entities(struct isp_ccdc_device * ccdc)2638 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2639 {
2640 struct v4l2_subdev *sd = &ccdc->subdev;
2641 struct media_pad *pads = ccdc->pads;
2642 struct media_entity *me = &sd->entity;
2643 int ret;
2644
2645 ccdc->input = CCDC_INPUT_NONE;
2646
2647 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2648 sd->internal_ops = &ccdc_v4l2_internal_ops;
2649 strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2650 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2651 v4l2_set_subdevdata(sd, ccdc);
2652 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2653
2654 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2655 | MEDIA_PAD_FL_MUST_CONNECT;
2656 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2657 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2658
2659 me->ops = &ccdc_media_ops;
2660 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2661 if (ret < 0)
2662 return ret;
2663
2664 ccdc_init_formats(sd, NULL);
2665
2666 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2667 ccdc->video_out.ops = &ccdc_video_ops;
2668 ccdc->video_out.isp = to_isp_device(ccdc);
2669 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2670 ccdc->video_out.bpl_alignment = 32;
2671
2672 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2673 if (ret < 0)
2674 goto error;
2675
2676 return 0;
2677
2678 error:
2679 media_entity_cleanup(me);
2680 return ret;
2681 }
2682
2683 /*
2684 * omap3isp_ccdc_init - CCDC module initialization.
2685 * @isp: Device pointer specific to the OMAP3 ISP.
2686 *
2687 * TODO: Get the initialisation values from platform data.
2688 *
2689 * Return 0 on success or a negative error code otherwise.
2690 */
omap3isp_ccdc_init(struct isp_device * isp)2691 int omap3isp_ccdc_init(struct isp_device *isp)
2692 {
2693 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2694 int ret;
2695
2696 spin_lock_init(&ccdc->lock);
2697 init_waitqueue_head(&ccdc->wait);
2698 mutex_init(&ccdc->ioctl_lock);
2699
2700 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2701
2702 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2703 ccdc->lsc.state = LSC_STATE_STOPPED;
2704 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2705 spin_lock_init(&ccdc->lsc.req_lock);
2706
2707 ccdc->clamp.oblen = 0;
2708 ccdc->clamp.dcsubval = 0;
2709
2710 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2711 ccdc_apply_controls(ccdc);
2712
2713 ret = ccdc_init_entities(ccdc);
2714 if (ret < 0) {
2715 mutex_destroy(&ccdc->ioctl_lock);
2716 return ret;
2717 }
2718
2719 return 0;
2720 }
2721
2722 /*
2723 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2724 * @isp: Device pointer specific to the OMAP3 ISP.
2725 */
omap3isp_ccdc_cleanup(struct isp_device * isp)2726 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2727 {
2728 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2729
2730 omap3isp_video_cleanup(&ccdc->video_out);
2731 media_entity_cleanup(&ccdc->subdev.entity);
2732
2733 /* Free LSC requests. As the CCDC is stopped there's no active request,
2734 * so only the pending request and the free queue need to be handled.
2735 */
2736 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2737 cancel_work_sync(&ccdc->lsc.table_work);
2738 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2739
2740 if (ccdc->fpc.addr != NULL)
2741 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2742 ccdc->fpc.dma);
2743
2744 mutex_destroy(&ccdc->ioctl_lock);
2745 }
2746