1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Broadcom Northstar USB 2.0 PHY Driver
4  *
5  * Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
6  */
7 
8 #include <linux/bcma/bcma.h>
9 #include <linux/clk.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/of_address.h>
14 #include <linux/of_platform.h>
15 #include <linux/phy/phy.h>
16 #include <linux/platform_device.h>
17 #include <linux/slab.h>
18 
19 struct bcm_ns_usb2 {
20 	struct device *dev;
21 	struct clk *ref_clk;
22 	struct phy *phy;
23 	void __iomem *dmu;
24 };
25 
bcm_ns_usb2_phy_init(struct phy * phy)26 static int bcm_ns_usb2_phy_init(struct phy *phy)
27 {
28 	struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy);
29 	struct device *dev = usb2->dev;
30 	void __iomem *dmu = usb2->dmu;
31 	u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
32 	int err = 0;
33 
34 	err = clk_prepare_enable(usb2->ref_clk);
35 	if (err < 0) {
36 		dev_err(dev, "Failed to prepare ref clock: %d\n", err);
37 		goto err_out;
38 	}
39 
40 	ref_clk_rate = clk_get_rate(usb2->ref_clk);
41 	if (!ref_clk_rate) {
42 		dev_err(dev, "Failed to get ref clock rate\n");
43 		err = -EINVAL;
44 		goto err_clk_off;
45 	}
46 
47 	usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL);
48 
49 	if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) {
50 		usb_pll_pdiv = usb2ctl;
51 		usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
52 		usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
53 	} else {
54 		usb_pll_pdiv = 1 << 3;
55 	}
56 
57 	/* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
58 	usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
59 
60 	/* Unlock DMU PLL settings with some magic value */
61 	writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
62 
63 	/* Write USB 2.0 PLL control setting */
64 	usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
65 	usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
66 	writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
67 
68 	/* Lock DMU PLL settings */
69 	writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
70 
71 err_clk_off:
72 	clk_disable_unprepare(usb2->ref_clk);
73 err_out:
74 	return err;
75 }
76 
77 static const struct phy_ops ops = {
78 	.init		= bcm_ns_usb2_phy_init,
79 	.owner		= THIS_MODULE,
80 };
81 
bcm_ns_usb2_probe(struct platform_device * pdev)82 static int bcm_ns_usb2_probe(struct platform_device *pdev)
83 {
84 	struct device *dev = &pdev->dev;
85 	struct bcm_ns_usb2 *usb2;
86 	struct phy_provider *phy_provider;
87 
88 	usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL);
89 	if (!usb2)
90 		return -ENOMEM;
91 	usb2->dev = dev;
92 
93 	usb2->dmu = devm_platform_ioremap_resource_byname(pdev, "dmu");
94 	if (IS_ERR(usb2->dmu)) {
95 		dev_err(dev, "Failed to map DMU regs\n");
96 		return PTR_ERR(usb2->dmu);
97 	}
98 
99 	usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk");
100 	if (IS_ERR(usb2->ref_clk)) {
101 		dev_err(dev, "Clock not defined\n");
102 		return PTR_ERR(usb2->ref_clk);
103 	}
104 
105 	usb2->phy = devm_phy_create(dev, NULL, &ops);
106 	if (IS_ERR(usb2->phy))
107 		return PTR_ERR(usb2->phy);
108 
109 	phy_set_drvdata(usb2->phy, usb2);
110 	platform_set_drvdata(pdev, usb2);
111 
112 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
113 	return PTR_ERR_OR_ZERO(phy_provider);
114 }
115 
116 static const struct of_device_id bcm_ns_usb2_id_table[] = {
117 	{ .compatible = "brcm,ns-usb2-phy", },
118 	{},
119 };
120 MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table);
121 
122 static struct platform_driver bcm_ns_usb2_driver = {
123 	.probe		= bcm_ns_usb2_probe,
124 	.driver = {
125 		.name = "bcm_ns_usb2",
126 		.of_match_table = bcm_ns_usb2_id_table,
127 	},
128 };
129 module_platform_driver(bcm_ns_usb2_driver);
130 
131 MODULE_LICENSE("GPL v2");
132