1 /* 2 * Copyright (c) 2008-2011 Atheros Communications Inc. 3 * 4 * Modified for iPXE by Scott K Logan <logans@cottsay.net> July 2011 5 * Original from Linux kernel 3.0.1 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #ifndef ANI_H 21 #define ANI_H 22 23 FILE_LICENCE ( BSD2 ); 24 25 #define HAL_PROCESS_ANI 0x00000001 26 27 #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan) 28 29 #define BEACON_RSSI(ahp) (ahp->stats.avgbrssi) 30 31 /* units are errors per second */ 32 #define ATH9K_ANI_OFDM_TRIG_HIGH_OLD 500 33 #define ATH9K_ANI_OFDM_TRIG_HIGH_NEW 1000 34 35 /* units are errors per second */ 36 #define ATH9K_ANI_OFDM_TRIG_LOW_OLD 200 37 #define ATH9K_ANI_OFDM_TRIG_LOW_NEW 400 38 39 /* units are errors per second */ 40 #define ATH9K_ANI_CCK_TRIG_HIGH_OLD 200 41 #define ATH9K_ANI_CCK_TRIG_HIGH_NEW 600 42 43 /* units are errors per second */ 44 #define ATH9K_ANI_CCK_TRIG_LOW_OLD 100 45 #define ATH9K_ANI_CCK_TRIG_LOW_NEW 300 46 47 #define ATH9K_ANI_NOISE_IMMUNE_LVL 4 48 #define ATH9K_ANI_USE_OFDM_WEAK_SIG 1 49 #define ATH9K_ANI_CCK_WEAK_SIG_THR 0 50 51 #define ATH9K_ANI_SPUR_IMMUNE_LVL_OLD 7 52 #define ATH9K_ANI_SPUR_IMMUNE_LVL_NEW 3 53 54 #define ATH9K_ANI_FIRSTEP_LVL_OLD 0 55 #define ATH9K_ANI_FIRSTEP_LVL_NEW 2 56 57 #define ATH9K_ANI_RSSI_THR_HIGH 40 58 #define ATH9K_ANI_RSSI_THR_LOW 7 59 60 #define ATH9K_ANI_PERIOD_OLD 100 61 #define ATH9K_ANI_PERIOD_NEW 1000 62 63 /* in ms */ 64 #define ATH9K_ANI_POLLINTERVAL_OLD 100 65 #define ATH9K_ANI_POLLINTERVAL_NEW 1000 66 67 #define HAL_NOISE_IMMUNE_MAX 4 68 #define HAL_SPUR_IMMUNE_MAX 7 69 #define HAL_FIRST_STEP_MAX 2 70 71 #define ATH9K_SIG_FIRSTEP_SETTING_MIN 0 72 #define ATH9K_SIG_FIRSTEP_SETTING_MAX 20 73 #define ATH9K_SIG_SPUR_IMM_SETTING_MIN 0 74 #define ATH9K_SIG_SPUR_IMM_SETTING_MAX 22 75 76 #define ATH9K_ANI_ENABLE_MRC_CCK 1 77 78 /* values here are relative to the INI */ 79 80 enum ath9k_ani_cmd { 81 ATH9K_ANI_PRESENT = 0x1, 82 ATH9K_ANI_NOISE_IMMUNITY_LEVEL = 0x2, 83 ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION = 0x4, 84 ATH9K_ANI_CCK_WEAK_SIGNAL_THR = 0x8, 85 ATH9K_ANI_FIRSTEP_LEVEL = 0x10, 86 ATH9K_ANI_SPUR_IMMUNITY_LEVEL = 0x20, 87 ATH9K_ANI_MODE = 0x40, 88 ATH9K_ANI_PHYERR_RESET = 0x80, 89 ATH9K_ANI_MRC_CCK = 0x100, 90 ATH9K_ANI_ALL = 0xfff 91 }; 92 93 struct ath9k_mib_stats { 94 u32 ackrcv_bad; 95 u32 rts_bad; 96 u32 rts_good; 97 u32 fcs_bad; 98 u32 beacons; 99 }; 100 101 /* INI default values for ANI registers */ 102 struct ath9k_ani_default { 103 u16 m1ThreshLow; 104 u16 m2ThreshLow; 105 u16 m1Thresh; 106 u16 m2Thresh; 107 u16 m2CountThr; 108 u16 m2CountThrLow; 109 u16 m1ThreshLowExt; 110 u16 m2ThreshLowExt; 111 u16 m1ThreshExt; 112 u16 m2ThreshExt; 113 u16 firstep; 114 u16 firstepLow; 115 u16 cycpwrThr1; 116 u16 cycpwrThr1Ext; 117 }; 118 119 struct ar5416AniState { 120 struct ath9k_channel *c; 121 u8 noiseImmunityLevel; 122 u8 ofdmNoiseImmunityLevel; 123 u8 cckNoiseImmunityLevel; 124 int ofdmsTurn; 125 u8 mrcCCKOff; 126 u8 spurImmunityLevel; 127 u8 firstepLevel; 128 u8 ofdmWeakSigDetect; 129 u8 cckWeakSigThreshold; 130 u32 listenTime; 131 int32_t rssiThrLow; 132 int32_t rssiThrHigh; 133 u32 noiseFloor; 134 u32 ofdmPhyErrCount; 135 u32 cckPhyErrCount; 136 int16_t pktRssi[2]; 137 int16_t ofdmErrRssi[2]; 138 int16_t cckErrRssi[2]; 139 struct ath9k_ani_default iniDef; 140 }; 141 142 struct ar5416Stats { 143 u32 ast_ani_niup; 144 u32 ast_ani_nidown; 145 u32 ast_ani_spurup; 146 u32 ast_ani_spurdown; 147 u32 ast_ani_ofdmon; 148 u32 ast_ani_ofdmoff; 149 u32 ast_ani_cckhigh; 150 u32 ast_ani_ccklow; 151 u32 ast_ani_stepup; 152 u32 ast_ani_stepdown; 153 u32 ast_ani_ofdmerrs; 154 u32 ast_ani_cckerrs; 155 u32 ast_ani_reset; 156 u32 ast_ani_lzero; 157 u32 ast_ani_lneg; 158 u32 avgbrssi; 159 struct ath9k_mib_stats ast_mibstats; 160 }; 161 #define ah_mibStats stats.ast_mibstats 162 163 void ath9k_enable_mib_counters(struct ath_hw *ah); 164 void ath9k_hw_disable_mib_counters(struct ath_hw *ah); 165 void ath9k_hw_ani_setup(struct ath_hw *ah); 166 void ath9k_hw_ani_init(struct ath_hw *ah); 167 int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, 168 struct ath9k_channel *chan); 169 170 #endif /* ANI_H */ 171